tegra_pcm.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * tegra_pcm.c - Tegra PCM driver
  4. *
  5. * Author: Stephen Warren <swarren@nvidia.com>
  6. * Copyright (C) 2010,2012 - NVIDIA, Inc.
  7. *
  8. * Based on code copyright/by:
  9. *
  10. * Copyright (c) 2009-2010, NVIDIA Corporation.
  11. * Scott Peterson <speterson@nvidia.com>
  12. * Vijay Mali <vmali@nvidia.com>
  13. *
  14. * Copyright (C) 2010 Google, Inc.
  15. * Iliyan Malchev <malchev@google.com>
  16. */
  17. #include <linux/module.h>
  18. #include <linux/dma-mapping.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <sound/dmaengine_pcm.h>
  24. #include "tegra_pcm.h"
  25. static const struct snd_pcm_hardware tegra_pcm_hardware = {
  26. .info = SNDRV_PCM_INFO_MMAP |
  27. SNDRV_PCM_INFO_MMAP_VALID |
  28. SNDRV_PCM_INFO_INTERLEAVED,
  29. .period_bytes_min = 1024,
  30. .period_bytes_max = PAGE_SIZE,
  31. .periods_min = 2,
  32. .periods_max = 8,
  33. .buffer_bytes_max = PAGE_SIZE * 8,
  34. .fifo_size = 4,
  35. };
  36. static const struct snd_dmaengine_pcm_config tegra_dmaengine_pcm_config = {
  37. .pcm_hardware = &tegra_pcm_hardware,
  38. .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
  39. .prealloc_buffer_size = PAGE_SIZE * 8,
  40. };
  41. int tegra_pcm_platform_register(struct device *dev)
  42. {
  43. return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config, 0);
  44. }
  45. EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
  46. int devm_tegra_pcm_platform_register(struct device *dev)
  47. {
  48. return devm_snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config, 0);
  49. }
  50. EXPORT_SYMBOL_GPL(devm_tegra_pcm_platform_register);
  51. int tegra_pcm_platform_register_with_chan_names(struct device *dev,
  52. struct snd_dmaengine_pcm_config *config,
  53. char *txdmachan, char *rxdmachan)
  54. {
  55. *config = tegra_dmaengine_pcm_config;
  56. config->dma_dev = dev->parent;
  57. config->chan_names[0] = txdmachan;
  58. config->chan_names[1] = rxdmachan;
  59. return snd_dmaengine_pcm_register(dev, config, 0);
  60. }
  61. EXPORT_SYMBOL_GPL(tegra_pcm_platform_register_with_chan_names);
  62. void tegra_pcm_platform_unregister(struct device *dev)
  63. {
  64. return snd_dmaengine_pcm_unregister(dev);
  65. }
  66. EXPORT_SYMBOL_GPL(tegra_pcm_platform_unregister);
  67. int tegra_pcm_open(struct snd_soc_component *component,
  68. struct snd_pcm_substream *substream)
  69. {
  70. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  71. struct snd_dmaengine_dai_dma_data *dmap;
  72. struct dma_chan *chan;
  73. struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
  74. int ret;
  75. if (rtd->dai_link->no_pcm)
  76. return 0;
  77. dmap = snd_soc_dai_get_dma_data(cpu_dai, substream);
  78. /* Set HW params now that initialization is complete */
  79. snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
  80. /* Ensure period size is multiple of 8 */
  81. ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
  82. SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
  83. if (ret) {
  84. dev_err(rtd->dev, "failed to set constraint %d\n", ret);
  85. return ret;
  86. }
  87. chan = dma_request_chan(cpu_dai->dev, dmap->chan_name);
  88. if (IS_ERR(chan)) {
  89. dev_err(cpu_dai->dev,
  90. "dmaengine request slave channel failed! (%s)\n",
  91. dmap->chan_name);
  92. return -ENODEV;
  93. }
  94. ret = snd_dmaengine_pcm_open(substream, chan);
  95. if (ret) {
  96. dev_err(rtd->dev,
  97. "dmaengine pcm open failed with err %d (%s)\n", ret,
  98. dmap->chan_name);
  99. dma_release_channel(chan);
  100. return ret;
  101. }
  102. /* Set wait time to 500ms by default */
  103. substream->wait_time = 500;
  104. return 0;
  105. }
  106. EXPORT_SYMBOL_GPL(tegra_pcm_open);
  107. int tegra_pcm_close(struct snd_soc_component *component,
  108. struct snd_pcm_substream *substream)
  109. {
  110. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  111. if (rtd->dai_link->no_pcm)
  112. return 0;
  113. snd_dmaengine_pcm_close_release_chan(substream);
  114. return 0;
  115. }
  116. EXPORT_SYMBOL_GPL(tegra_pcm_close);
  117. int tegra_pcm_hw_params(struct snd_soc_component *component,
  118. struct snd_pcm_substream *substream,
  119. struct snd_pcm_hw_params *params)
  120. {
  121. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  122. struct snd_dmaengine_dai_dma_data *dmap;
  123. struct dma_slave_config slave_config;
  124. struct dma_chan *chan;
  125. int ret;
  126. if (rtd->dai_link->no_pcm)
  127. return 0;
  128. dmap = snd_soc_dai_get_dma_data(snd_soc_rtd_to_cpu(rtd, 0), substream);
  129. if (!dmap)
  130. return 0;
  131. chan = snd_dmaengine_pcm_get_chan(substream);
  132. ret = snd_hwparams_to_dma_slave_config(substream, params,
  133. &slave_config);
  134. if (ret) {
  135. dev_err(rtd->dev, "hw params config failed with err %d\n", ret);
  136. return ret;
  137. }
  138. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  139. slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  140. slave_config.dst_addr = dmap->addr;
  141. slave_config.dst_maxburst = 8;
  142. } else {
  143. slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  144. slave_config.src_addr = dmap->addr;
  145. slave_config.src_maxburst = 8;
  146. }
  147. ret = dmaengine_slave_config(chan, &slave_config);
  148. if (ret < 0) {
  149. dev_err(rtd->dev, "dma slave config failed with err %d\n", ret);
  150. return ret;
  151. }
  152. return 0;
  153. }
  154. EXPORT_SYMBOL_GPL(tegra_pcm_hw_params);
  155. snd_pcm_uframes_t tegra_pcm_pointer(struct snd_soc_component *component,
  156. struct snd_pcm_substream *substream)
  157. {
  158. return snd_dmaengine_pcm_pointer(substream);
  159. }
  160. EXPORT_SYMBOL_GPL(tegra_pcm_pointer);
  161. static int tegra_pcm_dma_allocate(struct device *dev, struct snd_soc_pcm_runtime *rtd,
  162. size_t size)
  163. {
  164. struct snd_pcm *pcm = rtd->pcm;
  165. int ret;
  166. ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
  167. if (ret < 0)
  168. return ret;
  169. return snd_pcm_set_fixed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_WC, dev, size);
  170. }
  171. int tegra_pcm_construct(struct snd_soc_component *component,
  172. struct snd_soc_pcm_runtime *rtd)
  173. {
  174. struct device *dev = component->dev;
  175. /*
  176. * Fallback for backwards-compatibility with older device trees that
  177. * have the iommus property in the virtual, top-level "sound" node.
  178. */
  179. if (!of_property_present(dev->of_node, "iommus"))
  180. dev = rtd->card->snd_card->dev;
  181. return tegra_pcm_dma_allocate(dev, rtd, tegra_pcm_hardware.buffer_bytes_max);
  182. }
  183. EXPORT_SYMBOL_GPL(tegra_pcm_construct);
  184. MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
  185. MODULE_DESCRIPTION("Tegra PCM ASoC driver");
  186. MODULE_LICENSE("GPL");