sun4i-codec.c 79 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2014 Emilio López <emilio@elopez.com.ar>
  4. * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
  5. * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
  6. * Copyright 2015 Adam Sampson <ats@offog.org>
  7. * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
  8. * Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com>
  9. *
  10. * Based on the Allwinner SDK driver, released under the GPL.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/delay.h>
  17. #include <linux/slab.h>
  18. #include <linux/clk.h>
  19. #include <linux/regmap.h>
  20. #include <linux/reset.h>
  21. #include <linux/gpio/consumer.h>
  22. #include <sound/core.h>
  23. #include <sound/jack.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/tlv.h>
  28. #include <sound/initval.h>
  29. #include <sound/dmaengine_pcm.h>
  30. /* Codec DAC digital controls and FIFO registers */
  31. #define SUN4I_CODEC_DAC_DPC (0x00)
  32. #define SUN4I_CODEC_DAC_DPC_EN_DA (31)
  33. #define SUN4I_CODEC_DAC_DPC_DVOL (12)
  34. #define SUN4I_CODEC_DAC_FIFOC (0x04)
  35. #define SUN4I_CODEC_DAC_FIFOC_DAC_FS (29)
  36. #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION (28)
  37. #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT (26)
  38. #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE (24)
  39. #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT (21)
  40. #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL (8)
  41. #define SUN4I_CODEC_DAC_FIFOC_MONO_EN (6)
  42. #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS (5)
  43. #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN (4)
  44. #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH (0)
  45. #define SUN4I_CODEC_DAC_FIFOS (0x08)
  46. #define SUN4I_CODEC_DAC_TXDATA (0x0c)
  47. /* Codec DAC side analog signal controls */
  48. #define SUN4I_CODEC_DAC_ACTL (0x10)
  49. #define SUN4I_CODEC_DAC_ACTL_DACAENR (31)
  50. #define SUN4I_CODEC_DAC_ACTL_DACAENL (30)
  51. #define SUN4I_CODEC_DAC_ACTL_MIXEN (29)
  52. #define SUN4I_CODEC_DAC_ACTL_LNG (26)
  53. #define SUN4I_CODEC_DAC_ACTL_FMG (23)
  54. #define SUN4I_CODEC_DAC_ACTL_MICG (20)
  55. #define SUN4I_CODEC_DAC_ACTL_LLNS (19)
  56. #define SUN4I_CODEC_DAC_ACTL_RLNS (18)
  57. #define SUN4I_CODEC_DAC_ACTL_LFMS (17)
  58. #define SUN4I_CODEC_DAC_ACTL_RFMS (16)
  59. #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS (15)
  60. #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS (14)
  61. #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS (13)
  62. #define SUN4I_CODEC_DAC_ACTL_MIC1LS (12)
  63. #define SUN4I_CODEC_DAC_ACTL_MIC1RS (11)
  64. #define SUN4I_CODEC_DAC_ACTL_MIC2LS (10)
  65. #define SUN4I_CODEC_DAC_ACTL_MIC2RS (9)
  66. #define SUN4I_CODEC_DAC_ACTL_DACPAS (8)
  67. #define SUN4I_CODEC_DAC_ACTL_MIXPAS (7)
  68. #define SUN4I_CODEC_DAC_ACTL_PA_MUTE (6)
  69. #define SUN4I_CODEC_DAC_ACTL_PA_VOL (0)
  70. #define SUN4I_CODEC_DAC_TUNE (0x14)
  71. #define SUN4I_CODEC_DAC_DEBUG (0x18)
  72. /* Codec ADC digital controls and FIFO registers */
  73. #define SUN4I_CODEC_ADC_FIFOC (0x1c)
  74. #define SUN4I_CODEC_ADC_FIFOC_ADC_FS (29)
  75. #define SUN4I_CODEC_ADC_FIFOC_EN_AD (28)
  76. #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE (24)
  77. #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL (8)
  78. #define SUN4I_CODEC_ADC_FIFOC_MONO_EN (7)
  79. #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS (6)
  80. #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN (4)
  81. #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH (0)
  82. #define SUN4I_CODEC_ADC_FIFOS (0x20)
  83. #define SUN4I_CODEC_ADC_RXDATA (0x24)
  84. /* Codec ADC side analog signal controls */
  85. #define SUN4I_CODEC_ADC_ACTL (0x28)
  86. #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN (31)
  87. #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN (30)
  88. #define SUN4I_CODEC_ADC_ACTL_PREG1EN (29)
  89. #define SUN4I_CODEC_ADC_ACTL_PREG2EN (28)
  90. #define SUN4I_CODEC_ADC_ACTL_VMICEN (27)
  91. #define SUN4I_CODEC_ADC_ACTL_PREG1 (25)
  92. #define SUN4I_CODEC_ADC_ACTL_PREG2 (23)
  93. #define SUN4I_CODEC_ADC_ACTL_VADCG (20)
  94. #define SUN4I_CODEC_ADC_ACTL_ADCIS (17)
  95. #define SUN4I_CODEC_ADC_ACTL_LNPREG (13)
  96. #define SUN4I_CODEC_ADC_ACTL_PA_EN (4)
  97. #define SUN4I_CODEC_ADC_ACTL_DDE (3)
  98. #define SUN4I_CODEC_ADC_DEBUG (0x2c)
  99. /* FIFO counters */
  100. #define SUN4I_CODEC_DAC_TXCNT (0x30)
  101. #define SUN4I_CODEC_ADC_RXCNT (0x34)
  102. /* Calibration register (sun7i only) */
  103. #define SUN7I_CODEC_AC_DAC_CAL (0x38)
  104. /* Microphone controls (sun7i only) */
  105. #define SUN7I_CODEC_AC_MIC_PHONE_CAL (0x3c)
  106. #define SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG1 (29)
  107. #define SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG2 (26)
  108. /*
  109. * sun6i specific registers
  110. *
  111. * sun6i shares the same digital control and FIFO registers as sun4i,
  112. * but only the DAC digital controls are at the same offset. The others
  113. * have been moved around to accommodate extra analog controls.
  114. */
  115. /* Codec DAC digital controls and FIFO registers */
  116. #define SUN6I_CODEC_ADC_FIFOC (0x10)
  117. #define SUN6I_CODEC_ADC_FIFOC_EN_AD (28)
  118. #define SUN6I_CODEC_ADC_FIFOS (0x14)
  119. #define SUN6I_CODEC_ADC_RXDATA (0x18)
  120. /* Output mixer and gain controls */
  121. #define SUN6I_CODEC_OM_DACA_CTRL (0x20)
  122. #define SUN6I_CODEC_OM_DACA_CTRL_DACAREN (31)
  123. #define SUN6I_CODEC_OM_DACA_CTRL_DACALEN (30)
  124. #define SUN6I_CODEC_OM_DACA_CTRL_RMIXEN (29)
  125. #define SUN6I_CODEC_OM_DACA_CTRL_LMIXEN (28)
  126. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1 (23)
  127. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2 (22)
  128. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONE (21)
  129. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONEP (20)
  130. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR (19)
  131. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR (18)
  132. #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL (17)
  133. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1 (16)
  134. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2 (15)
  135. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONE (14)
  136. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONEN (13)
  137. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL (12)
  138. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL (11)
  139. #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR (10)
  140. #define SUN6I_CODEC_OM_DACA_CTRL_RHPIS (9)
  141. #define SUN6I_CODEC_OM_DACA_CTRL_LHPIS (8)
  142. #define SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE (7)
  143. #define SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE (6)
  144. #define SUN6I_CODEC_OM_DACA_CTRL_HPVOL (0)
  145. #define SUN6I_CODEC_OM_PA_CTRL (0x24)
  146. #define SUN6I_CODEC_OM_PA_CTRL_HPPAEN (31)
  147. #define SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL (29)
  148. #define SUN6I_CODEC_OM_PA_CTRL_COMPTEN (28)
  149. #define SUN6I_CODEC_OM_PA_CTRL_MIC1G (15)
  150. #define SUN6I_CODEC_OM_PA_CTRL_MIC2G (12)
  151. #define SUN6I_CODEC_OM_PA_CTRL_LINEING (9)
  152. #define SUN6I_CODEC_OM_PA_CTRL_PHONEG (6)
  153. #define SUN6I_CODEC_OM_PA_CTRL_PHONEPG (3)
  154. #define SUN6I_CODEC_OM_PA_CTRL_PHONENG (0)
  155. /* Microphone, line out and phone out controls */
  156. #define SUN6I_CODEC_MIC_CTRL (0x28)
  157. #define SUN6I_CODEC_MIC_CTRL_HBIASEN (31)
  158. #define SUN6I_CODEC_MIC_CTRL_MBIASEN (30)
  159. #define SUN6I_CODEC_MIC_CTRL_MIC1AMPEN (28)
  160. #define SUN6I_CODEC_MIC_CTRL_MIC1BOOST (25)
  161. #define SUN6I_CODEC_MIC_CTRL_MIC2AMPEN (24)
  162. #define SUN6I_CODEC_MIC_CTRL_MIC2BOOST (21)
  163. #define SUN6I_CODEC_MIC_CTRL_MIC2SLT (20)
  164. #define SUN6I_CODEC_MIC_CTRL_LINEOUTLEN (19)
  165. #define SUN6I_CODEC_MIC_CTRL_LINEOUTREN (18)
  166. #define SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC (17)
  167. #define SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC (16)
  168. #define SUN6I_CODEC_MIC_CTRL_LINEOUTVC (11)
  169. #define SUN6I_CODEC_MIC_CTRL_PHONEPREG (8)
  170. /* ADC mixer controls */
  171. #define SUN6I_CODEC_ADC_ACTL (0x2c)
  172. #define SUN6I_CODEC_ADC_ACTL_ADCREN (31)
  173. #define SUN6I_CODEC_ADC_ACTL_ADCLEN (30)
  174. #define SUN6I_CODEC_ADC_ACTL_ADCRG (27)
  175. #define SUN6I_CODEC_ADC_ACTL_ADCLG (24)
  176. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1 (13)
  177. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2 (12)
  178. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONE (11)
  179. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONEP (10)
  180. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR (9)
  181. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR (8)
  182. #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL (7)
  183. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1 (6)
  184. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2 (5)
  185. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONE (4)
  186. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONEN (3)
  187. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL (2)
  188. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL (1)
  189. #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR (0)
  190. /* Analog performance tuning controls */
  191. #define SUN6I_CODEC_ADDA_TUNE (0x30)
  192. /* Calibration controls */
  193. #define SUN6I_CODEC_CALIBRATION (0x34)
  194. /* FIFO counters */
  195. #define SUN6I_CODEC_DAC_TXCNT (0x40)
  196. #define SUN6I_CODEC_ADC_RXCNT (0x44)
  197. /* headset jack detection and button support registers */
  198. #define SUN6I_CODEC_HMIC_CTL (0x50)
  199. #define SUN6I_CODEC_HMIC_DATA (0x54)
  200. /* TODO sun6i DAP (Digital Audio Processing) bits */
  201. /* FIFO counters moved on A23 */
  202. #define SUN8I_A23_CODEC_DAC_TXCNT (0x1c)
  203. #define SUN8I_A23_CODEC_ADC_RXCNT (0x20)
  204. /* TX FIFO moved on H3 */
  205. #define SUN8I_H3_CODEC_DAC_TXDATA (0x20)
  206. #define SUN8I_H3_CODEC_DAC_DBG (0x48)
  207. #define SUN8I_H3_CODEC_ADC_DBG (0x4c)
  208. /* H616 specific registers */
  209. #define SUN50I_H616_CODEC_DAC_FIFOC (0x10)
  210. #define SUN50I_DAC_FIFO_STA (0x14)
  211. #define SUN50I_DAC_TXE_INT (3)
  212. #define SUN50I_DAC_TXU_INT (2)
  213. #define SUN50I_DAC_TXO_INT (1)
  214. #define SUN50I_DAC_CNT (0x24)
  215. #define SUN50I_DAC_DG_REG (0x28)
  216. #define SUN50I_DAC_DAP_CTL (0xf0)
  217. #define SUN50I_H616_DAC_AC_DAC_REG (0x310)
  218. #define SUN50I_H616_DAC_LEN (15)
  219. #define SUN50I_H616_DAC_REN (14)
  220. #define SUN50I_H616_LINEOUTL_EN (13)
  221. #define SUN50I_H616_LMUTE (12)
  222. #define SUN50I_H616_LINEOUTR_EN (11)
  223. #define SUN50I_H616_RMUTE (10)
  224. #define SUN50I_H616_RSWITCH (9)
  225. #define SUN50I_H616_RAMPEN (8)
  226. #define SUN50I_H616_LINEOUTL_SEL (6)
  227. #define SUN50I_H616_LINEOUTR_SEL (5)
  228. #define SUN50I_H616_LINEOUT_VOL (0)
  229. #define SUN50I_H616_DAC_AC_MIXER_REG (0x314)
  230. #define SUN50I_H616_LMIX_LDAC (21)
  231. #define SUN50I_H616_LMIX_RDAC (20)
  232. #define SUN50I_H616_RMIX_RDAC (17)
  233. #define SUN50I_H616_RMIX_LDAC (16)
  234. #define SUN50I_H616_LMIXEN (11)
  235. #define SUN50I_H616_RMIXEN (10)
  236. #define SUN50I_H616_DAC_AC_RAMP_REG (0x31c)
  237. #define SUN50I_H616_RAMP_STEP (4)
  238. #define SUN50I_H616_RDEN (0)
  239. /* TODO H3 DAP (Digital Audio Processing) bits */
  240. #define SUN4I_DMA_MAX_BURST (8)
  241. /* suniv specific registers */
  242. #define SUNIV_DMA_MAX_BURST (4)
  243. /* Codec DAC digital controls and FIFO registers */
  244. #define SUNIV_CODEC_ADC_FIFOC (0x10)
  245. #define SUNIV_CODEC_ADC_FIFOC_EN_AD (28)
  246. #define SUNIV_CODEC_ADC_FIFOS (0x14)
  247. #define SUNIV_CODEC_ADC_RXDATA (0x18)
  248. /* Output mixer and gain controls */
  249. #define SUNIV_CODEC_OM_DACA_CTRL (0x20)
  250. #define SUNIV_CODEC_OM_DACA_CTRL_DACAREN (31)
  251. #define SUNIV_CODEC_OM_DACA_CTRL_DACALEN (30)
  252. #define SUNIV_CODEC_OM_DACA_CTRL_RMIXEN (29)
  253. #define SUNIV_CODEC_OM_DACA_CTRL_LMIXEN (28)
  254. #define SUNIV_CODEC_OM_DACA_CTRL_RHPPAMUTE (27)
  255. #define SUNIV_CODEC_OM_DACA_CTRL_LHPPAMUTE (26)
  256. #define SUNIV_CODEC_OM_DACA_CTRL_RHPIS (25)
  257. #define SUNIV_CODEC_OM_DACA_CTRL_LHPIS (24)
  258. #define SUNIV_CODEC_OM_DACA_CTRL_HPCOM_CTL (22)
  259. #define SUNIV_CODEC_OM_DACA_CTRL_COMPTEN (21)
  260. #define SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_MICIN (20)
  261. #define SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_LINEIN (19)
  262. #define SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_FMIN (18)
  263. #define SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_RDAC (17)
  264. #define SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_LDAC (16)
  265. #define SUNIV_CODEC_OM_DACA_CTRL_HPPAEN (15)
  266. #define SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_MICIN (12)
  267. #define SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_LINEIN (11)
  268. #define SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_FMIN (10)
  269. #define SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_LDAC (9)
  270. #define SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_RDAC (8)
  271. #define SUNIV_CODEC_OM_DACA_CTRL_LTLNMUTE (7)
  272. #define SUNIV_CODEC_OM_DACA_CTRL_RTLNMUTE (6)
  273. #define SUNIV_CODEC_OM_DACA_CTRL_HPVOL (0)
  274. /* Analog Input Mixer controls */
  275. #define SUNIV_CODEC_ADC_ACTL (0x24)
  276. #define SUNIV_CODEC_ADC_ADCEN (31)
  277. #define SUNIV_CODEC_ADC_MICG (24)
  278. #define SUNIV_CODEC_ADC_LINEINVOL (21)
  279. #define SUNIV_CODEC_ADC_ADCG (16)
  280. #define SUNIV_CODEC_ADC_ADCMIX_MIC (13)
  281. #define SUNIV_CODEC_ADC_ADCMIX_FMINL (12)
  282. #define SUNIV_CODEC_ADC_ADCMIX_FMINR (11)
  283. #define SUNIV_CODEC_ADC_ADCMIX_LINEIN (10)
  284. #define SUNIV_CODEC_ADC_ADCMIX_LOUT (9)
  285. #define SUNIV_CODEC_ADC_ADCMIX_ROUT (8)
  286. #define SUNIV_CODEC_ADC_PASPEEDSELECT (7)
  287. #define SUNIV_CODEC_ADC_FMINVOL (4)
  288. #define SUNIV_CODEC_ADC_MICAMPEN (3)
  289. #define SUNIV_CODEC_ADC_MICBOOST (0)
  290. #define SUNIV_CODEC_ADC_DBG (0x4c)
  291. struct sun4i_codec {
  292. struct device *dev;
  293. struct regmap *regmap;
  294. struct clk *clk_apb;
  295. struct clk *clk_module;
  296. struct reset_control *rst;
  297. struct gpio_desc *gpio_pa;
  298. struct gpio_desc *gpio_hp;
  299. /* ADC_FIFOC register is at different offset on different SoCs */
  300. struct regmap_field *reg_adc_fifoc;
  301. /* DAC_FIFOC register is at different offset on different SoCs */
  302. struct regmap_field *reg_dac_fifoc;
  303. struct snd_dmaengine_dai_dma_data capture_dma_data;
  304. struct snd_dmaengine_dai_dma_data playback_dma_data;
  305. };
  306. static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
  307. {
  308. /* Flush TX FIFO */
  309. regmap_field_set_bits(scodec->reg_dac_fifoc,
  310. BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
  311. /* Enable DAC DRQ */
  312. regmap_field_set_bits(scodec->reg_dac_fifoc,
  313. BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
  314. }
  315. static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
  316. {
  317. /* Disable DAC DRQ */
  318. regmap_field_clear_bits(scodec->reg_dac_fifoc,
  319. BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
  320. }
  321. static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
  322. {
  323. /* Enable ADC DRQ */
  324. regmap_field_set_bits(scodec->reg_adc_fifoc,
  325. BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
  326. }
  327. static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
  328. {
  329. /* Disable ADC DRQ */
  330. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  331. BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
  332. }
  333. static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
  334. struct snd_soc_dai *dai)
  335. {
  336. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  337. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  338. switch (cmd) {
  339. case SNDRV_PCM_TRIGGER_START:
  340. case SNDRV_PCM_TRIGGER_RESUME:
  341. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  342. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  343. sun4i_codec_start_playback(scodec);
  344. else
  345. sun4i_codec_start_capture(scodec);
  346. break;
  347. case SNDRV_PCM_TRIGGER_STOP:
  348. case SNDRV_PCM_TRIGGER_SUSPEND:
  349. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  350. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  351. sun4i_codec_stop_playback(scodec);
  352. else
  353. sun4i_codec_stop_capture(scodec);
  354. break;
  355. default:
  356. return -EINVAL;
  357. }
  358. return 0;
  359. }
  360. static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
  361. struct snd_soc_dai *dai)
  362. {
  363. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  364. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  365. /* Flush RX FIFO */
  366. regmap_field_set_bits(scodec->reg_adc_fifoc,
  367. BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
  368. /* Set RX FIFO trigger level */
  369. regmap_field_update_bits(scodec->reg_adc_fifoc,
  370. 0xf << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL,
  371. 0x7 << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL);
  372. /*
  373. * FIXME: Undocumented in the datasheet, but
  374. * Allwinner's code mentions that it is
  375. * related to microphone gain
  376. */
  377. if (of_device_is_compatible(scodec->dev->of_node,
  378. "allwinner,sun4i-a10-codec") ||
  379. of_device_is_compatible(scodec->dev->of_node,
  380. "allwinner,sun7i-a20-codec")) {
  381. regmap_update_bits(scodec->regmap, SUN4I_CODEC_ADC_ACTL,
  382. 0x3 << 25,
  383. 0x1 << 25);
  384. }
  385. if (of_device_is_compatible(scodec->dev->of_node,
  386. "allwinner,sun7i-a20-codec"))
  387. /* FIXME: Undocumented bits */
  388. regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_TUNE,
  389. 0x3 << 8,
  390. 0x1 << 8);
  391. return 0;
  392. }
  393. static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
  394. struct snd_soc_dai *dai)
  395. {
  396. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  397. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  398. u32 val;
  399. /* Flush the TX FIFO */
  400. regmap_field_set_bits(scodec->reg_dac_fifoc,
  401. BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
  402. /* Set TX FIFO Empty Trigger Level */
  403. regmap_field_update_bits(scodec->reg_dac_fifoc,
  404. 0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL,
  405. 0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL);
  406. if (substream->runtime->rate > 32000)
  407. /* Use 64 bits FIR filter */
  408. val = 0;
  409. else
  410. /* Use 32 bits FIR filter */
  411. val = BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION);
  412. regmap_field_update_bits(scodec->reg_dac_fifoc,
  413. BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION),
  414. val);
  415. /* Send zeros when we have an underrun */
  416. regmap_field_clear_bits(scodec->reg_dac_fifoc,
  417. BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT));
  418. return 0;
  419. };
  420. static int sun4i_codec_prepare(struct snd_pcm_substream *substream,
  421. struct snd_soc_dai *dai)
  422. {
  423. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  424. return sun4i_codec_prepare_playback(substream, dai);
  425. return sun4i_codec_prepare_capture(substream, dai);
  426. }
  427. static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params *params)
  428. {
  429. unsigned int rate = params_rate(params);
  430. switch (rate) {
  431. case 176400:
  432. case 88200:
  433. case 44100:
  434. case 33075:
  435. case 22050:
  436. case 14700:
  437. case 11025:
  438. case 7350:
  439. return 22579200;
  440. case 192000:
  441. case 96000:
  442. case 48000:
  443. case 32000:
  444. case 24000:
  445. case 16000:
  446. case 12000:
  447. case 8000:
  448. return 24576000;
  449. default:
  450. return 0;
  451. }
  452. }
  453. static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params *params)
  454. {
  455. unsigned int rate = params_rate(params);
  456. switch (rate) {
  457. case 192000:
  458. case 176400:
  459. return 6;
  460. case 96000:
  461. case 88200:
  462. return 7;
  463. case 48000:
  464. case 44100:
  465. return 0;
  466. case 32000:
  467. case 33075:
  468. return 1;
  469. case 24000:
  470. case 22050:
  471. return 2;
  472. case 16000:
  473. case 14700:
  474. return 3;
  475. case 12000:
  476. case 11025:
  477. return 4;
  478. case 8000:
  479. case 7350:
  480. return 5;
  481. default:
  482. return -EINVAL;
  483. }
  484. }
  485. static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
  486. struct snd_pcm_hw_params *params,
  487. unsigned int hwrate)
  488. {
  489. /* Set ADC sample rate */
  490. regmap_field_update_bits(scodec->reg_adc_fifoc,
  491. 7 << SUN4I_CODEC_ADC_FIFOC_ADC_FS,
  492. hwrate << SUN4I_CODEC_ADC_FIFOC_ADC_FS);
  493. /* Set the number of channels we want to use */
  494. if (params_channels(params) == 1)
  495. regmap_field_set_bits(scodec->reg_adc_fifoc,
  496. BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
  497. else
  498. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  499. BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
  500. /* Set the number of sample bits to either 16 or 24 bits */
  501. if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
  502. regmap_field_set_bits(scodec->reg_adc_fifoc,
  503. BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
  504. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  505. BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
  506. scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  507. } else {
  508. regmap_field_clear_bits(scodec->reg_adc_fifoc,
  509. BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
  510. /* Fill most significant bits with valid data MSB */
  511. regmap_field_set_bits(scodec->reg_adc_fifoc,
  512. BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
  513. scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  514. }
  515. return 0;
  516. }
  517. static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec,
  518. struct snd_pcm_hw_params *params,
  519. unsigned int hwrate)
  520. {
  521. u32 val;
  522. /* Set DAC sample rate */
  523. regmap_field_update_bits(scodec->reg_dac_fifoc,
  524. 7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS,
  525. hwrate << SUN4I_CODEC_DAC_FIFOC_DAC_FS);
  526. /* Set the number of channels we want to use */
  527. if (params_channels(params) == 1)
  528. val = BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN);
  529. else
  530. val = 0;
  531. regmap_field_update_bits(scodec->reg_dac_fifoc,
  532. BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN),
  533. val);
  534. /* Set the number of sample bits to either 16 or 24 bits */
  535. if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
  536. regmap_field_set_bits(scodec->reg_dac_fifoc,
  537. BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
  538. /* Set TX FIFO mode to padding the LSBs with 0 */
  539. regmap_field_clear_bits(scodec->reg_dac_fifoc,
  540. BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
  541. scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
  542. } else {
  543. regmap_field_clear_bits(scodec->reg_dac_fifoc,
  544. BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
  545. /* Set TX FIFO mode to repeat the MSB */
  546. regmap_field_set_bits(scodec->reg_dac_fifoc,
  547. BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
  548. scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  549. }
  550. return 0;
  551. }
  552. static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
  553. struct snd_pcm_hw_params *params,
  554. struct snd_soc_dai *dai)
  555. {
  556. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  557. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  558. unsigned long clk_freq;
  559. int ret, hwrate;
  560. clk_freq = sun4i_codec_get_mod_freq(params);
  561. if (!clk_freq)
  562. return -EINVAL;
  563. ret = clk_set_rate(scodec->clk_module, clk_freq);
  564. if (ret)
  565. return ret;
  566. hwrate = sun4i_codec_get_hw_rate(params);
  567. if (hwrate < 0)
  568. return hwrate;
  569. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  570. return sun4i_codec_hw_params_playback(scodec, params,
  571. hwrate);
  572. return sun4i_codec_hw_params_capture(scodec, params,
  573. hwrate);
  574. }
  575. static int sun4i_codec_startup(struct snd_pcm_substream *substream,
  576. struct snd_soc_dai *dai)
  577. {
  578. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  579. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  580. /*
  581. * Stop issuing DRQ when we have room for less than 16 samples
  582. * in our TX FIFO
  583. */
  584. regmap_field_set_bits(scodec->reg_dac_fifoc,
  585. 3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
  586. return clk_prepare_enable(scodec->clk_module);
  587. }
  588. static void sun4i_codec_shutdown(struct snd_pcm_substream *substream,
  589. struct snd_soc_dai *dai)
  590. {
  591. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  592. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
  593. clk_disable_unprepare(scodec->clk_module);
  594. }
  595. static const struct snd_soc_dai_ops sun4i_codec_dai_ops = {
  596. .startup = sun4i_codec_startup,
  597. .shutdown = sun4i_codec_shutdown,
  598. .trigger = sun4i_codec_trigger,
  599. .hw_params = sun4i_codec_hw_params,
  600. .prepare = sun4i_codec_prepare,
  601. };
  602. #define SUN4I_CODEC_RATES ( \
  603. SNDRV_PCM_RATE_8000_48000 | \
  604. SNDRV_PCM_RATE_12000 | \
  605. SNDRV_PCM_RATE_24000 | \
  606. SNDRV_PCM_RATE_96000 | \
  607. SNDRV_PCM_RATE_192000)
  608. static struct snd_soc_dai_driver sun4i_codec_dai = {
  609. .name = "Codec",
  610. .ops = &sun4i_codec_dai_ops,
  611. .playback = {
  612. .stream_name = "Codec Playback",
  613. .channels_min = 1,
  614. .channels_max = 2,
  615. .rate_min = 8000,
  616. .rate_max = 192000,
  617. .rates = SUN4I_CODEC_RATES,
  618. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  619. SNDRV_PCM_FMTBIT_S32_LE,
  620. .sig_bits = 24,
  621. },
  622. .capture = {
  623. .stream_name = "Codec Capture",
  624. .channels_min = 1,
  625. .channels_max = 2,
  626. .rate_min = 8000,
  627. .rate_max = 48000,
  628. .rates = SUN4I_CODEC_RATES,
  629. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  630. SNDRV_PCM_FMTBIT_S32_LE,
  631. .sig_bits = 24,
  632. },
  633. };
  634. /*** sun4i Codec ***/
  635. static const struct snd_kcontrol_new sun4i_codec_pa_mute =
  636. SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL,
  637. SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0);
  638. static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1);
  639. static DECLARE_TLV_DB_SCALE(sun4i_codec_linein_loopback_gain_scale, -150, 150,
  640. 0);
  641. static DECLARE_TLV_DB_SCALE(sun4i_codec_linein_preamp_gain_scale, -1200, 300,
  642. 0);
  643. static DECLARE_TLV_DB_SCALE(sun4i_codec_fmin_loopback_gain_scale, -450, 150,
  644. 0);
  645. static DECLARE_TLV_DB_SCALE(sun4i_codec_micin_loopback_gain_scale, -450, 150,
  646. 0);
  647. static DECLARE_TLV_DB_RANGE(sun4i_codec_micin_preamp_gain_scale,
  648. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  649. 1, 7, TLV_DB_SCALE_ITEM(3500, 300, 0));
  650. static DECLARE_TLV_DB_RANGE(sun7i_codec_micin_preamp_gain_scale,
  651. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  652. 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0));
  653. static const struct snd_kcontrol_new sun4i_codec_controls[] = {
  654. SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
  655. SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
  656. sun4i_codec_pa_volume_scale),
  657. SOC_SINGLE_TLV("Line Playback Volume", SUN4I_CODEC_DAC_ACTL,
  658. SUN4I_CODEC_DAC_ACTL_LNG, 1, 0,
  659. sun4i_codec_linein_loopback_gain_scale),
  660. SOC_SINGLE_TLV("Line Boost Volume", SUN4I_CODEC_ADC_ACTL,
  661. SUN4I_CODEC_ADC_ACTL_LNPREG, 7, 0,
  662. sun4i_codec_linein_preamp_gain_scale),
  663. SOC_SINGLE_TLV("FM Playback Volume", SUN4I_CODEC_DAC_ACTL,
  664. SUN4I_CODEC_DAC_ACTL_FMG, 3, 0,
  665. sun4i_codec_fmin_loopback_gain_scale),
  666. SOC_SINGLE_TLV("Mic Playback Volume", SUN4I_CODEC_DAC_ACTL,
  667. SUN4I_CODEC_DAC_ACTL_MICG, 7, 0,
  668. sun4i_codec_micin_loopback_gain_scale),
  669. SOC_SINGLE_TLV("Mic1 Boost Volume", SUN4I_CODEC_ADC_ACTL,
  670. SUN4I_CODEC_ADC_ACTL_PREG1, 3, 0,
  671. sun4i_codec_micin_preamp_gain_scale),
  672. SOC_SINGLE_TLV("Mic2 Boost Volume", SUN4I_CODEC_ADC_ACTL,
  673. SUN4I_CODEC_ADC_ACTL_PREG2, 3, 0,
  674. sun4i_codec_micin_preamp_gain_scale),
  675. };
  676. static const struct snd_kcontrol_new sun7i_codec_controls[] = {
  677. SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
  678. SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
  679. sun4i_codec_pa_volume_scale),
  680. SOC_SINGLE_TLV("Line Playback Volume", SUN4I_CODEC_DAC_ACTL,
  681. SUN4I_CODEC_DAC_ACTL_LNG, 1, 0,
  682. sun4i_codec_linein_loopback_gain_scale),
  683. SOC_SINGLE_TLV("Line Boost Volume", SUN4I_CODEC_ADC_ACTL,
  684. SUN4I_CODEC_ADC_ACTL_LNPREG, 7, 0,
  685. sun4i_codec_linein_preamp_gain_scale),
  686. SOC_SINGLE_TLV("FM Playback Volume", SUN4I_CODEC_DAC_ACTL,
  687. SUN4I_CODEC_DAC_ACTL_FMG, 3, 0,
  688. sun4i_codec_fmin_loopback_gain_scale),
  689. SOC_SINGLE_TLV("Mic Playback Volume", SUN4I_CODEC_DAC_ACTL,
  690. SUN4I_CODEC_DAC_ACTL_MICG, 7, 0,
  691. sun4i_codec_micin_loopback_gain_scale),
  692. SOC_SINGLE_TLV("Mic1 Boost Volume", SUN7I_CODEC_AC_MIC_PHONE_CAL,
  693. SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG1, 7, 0,
  694. sun7i_codec_micin_preamp_gain_scale),
  695. SOC_SINGLE_TLV("Mic2 Boost Volume", SUN7I_CODEC_AC_MIC_PHONE_CAL,
  696. SUN7I_CODEC_AC_MIC_PHONE_CAL_PREG2, 7, 0,
  697. sun7i_codec_micin_preamp_gain_scale),
  698. };
  699. static const struct snd_kcontrol_new sun4i_codec_mixer_controls[] = {
  700. SOC_DAPM_SINGLE("Left Mixer Left DAC Playback Switch",
  701. SUN4I_CODEC_DAC_ACTL, SUN4I_CODEC_DAC_ACTL_LDACLMIXS,
  702. 1, 0),
  703. SOC_DAPM_SINGLE("Right Mixer Right DAC Playback Switch",
  704. SUN4I_CODEC_DAC_ACTL, SUN4I_CODEC_DAC_ACTL_RDACRMIXS,
  705. 1, 0),
  706. SOC_DAPM_SINGLE("Right Mixer Left DAC Playback Switch",
  707. SUN4I_CODEC_DAC_ACTL,
  708. SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0),
  709. SOC_DAPM_DOUBLE("Line Playback Switch", SUN4I_CODEC_DAC_ACTL,
  710. SUN4I_CODEC_DAC_ACTL_LLNS,
  711. SUN4I_CODEC_DAC_ACTL_RLNS, 1, 0),
  712. SOC_DAPM_DOUBLE("FM Playback Switch", SUN4I_CODEC_DAC_ACTL,
  713. SUN4I_CODEC_DAC_ACTL_LFMS,
  714. SUN4I_CODEC_DAC_ACTL_RFMS, 1, 0),
  715. SOC_DAPM_DOUBLE("Mic1 Playback Switch", SUN4I_CODEC_DAC_ACTL,
  716. SUN4I_CODEC_DAC_ACTL_MIC1LS,
  717. SUN4I_CODEC_DAC_ACTL_MIC1RS, 1, 0),
  718. SOC_DAPM_DOUBLE("Mic2 Playback Switch", SUN4I_CODEC_DAC_ACTL,
  719. SUN4I_CODEC_DAC_ACTL_MIC2LS,
  720. SUN4I_CODEC_DAC_ACTL_MIC2RS, 1, 0),
  721. };
  722. static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = {
  723. SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
  724. SUN4I_CODEC_DAC_ACTL_DACPAS, 1, 0),
  725. SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL,
  726. SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0),
  727. };
  728. static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets[] = {
  729. /* Digital parts of the ADCs */
  730. SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC,
  731. SUN4I_CODEC_ADC_FIFOC_EN_AD, 0,
  732. NULL, 0),
  733. /* Digital parts of the DACs */
  734. SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC,
  735. SUN4I_CODEC_DAC_DPC_EN_DA, 0,
  736. NULL, 0),
  737. /* Analog parts of the ADCs */
  738. SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
  739. SUN4I_CODEC_ADC_ACTL_ADC_L_EN, 0),
  740. SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
  741. SUN4I_CODEC_ADC_ACTL_ADC_R_EN, 0),
  742. /* Analog parts of the DACs */
  743. SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
  744. SUN4I_CODEC_DAC_ACTL_DACAENL, 0),
  745. SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
  746. SUN4I_CODEC_DAC_ACTL_DACAENR, 0),
  747. /* Mixers */
  748. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  749. sun4i_codec_mixer_controls,
  750. ARRAY_SIZE(sun4i_codec_mixer_controls)),
  751. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  752. sun4i_codec_mixer_controls,
  753. ARRAY_SIZE(sun4i_codec_mixer_controls)),
  754. /* Global Mixer Enable */
  755. SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL,
  756. SUN4I_CODEC_DAC_ACTL_MIXEN, 0, NULL, 0),
  757. /* VMIC */
  758. SND_SOC_DAPM_SUPPLY("VMIC", SUN4I_CODEC_ADC_ACTL,
  759. SUN4I_CODEC_ADC_ACTL_VMICEN, 0, NULL, 0),
  760. /* Mic Pre-Amplifiers */
  761. SND_SOC_DAPM_PGA("MIC1 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
  762. SUN4I_CODEC_ADC_ACTL_PREG1EN, 0, NULL, 0),
  763. SND_SOC_DAPM_PGA("MIC2 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
  764. SUN4I_CODEC_ADC_ACTL_PREG2EN, 0, NULL, 0),
  765. /* Power Amplifier */
  766. SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL,
  767. SUN4I_CODEC_ADC_ACTL_PA_EN, 0,
  768. sun4i_codec_pa_mixer_controls,
  769. ARRAY_SIZE(sun4i_codec_pa_mixer_controls)),
  770. SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM, 0, 0,
  771. &sun4i_codec_pa_mute),
  772. SND_SOC_DAPM_INPUT("Line Right"),
  773. SND_SOC_DAPM_INPUT("Line Left"),
  774. SND_SOC_DAPM_INPUT("FM Right"),
  775. SND_SOC_DAPM_INPUT("FM Left"),
  776. SND_SOC_DAPM_INPUT("Mic1"),
  777. SND_SOC_DAPM_INPUT("Mic2"),
  778. SND_SOC_DAPM_OUTPUT("HP Right"),
  779. SND_SOC_DAPM_OUTPUT("HP Left"),
  780. };
  781. static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes[] = {
  782. /* Left ADC / DAC Routes */
  783. { "Left ADC", NULL, "ADC" },
  784. { "Left DAC", NULL, "DAC" },
  785. /* Right ADC / DAC Routes */
  786. { "Right ADC", NULL, "ADC" },
  787. { "Right DAC", NULL, "DAC" },
  788. /* Right Mixer Routes */
  789. { "Right Mixer", NULL, "Mixer Enable" },
  790. { "Right Mixer", "Right Mixer Left DAC Playback Switch", "Left DAC" },
  791. { "Right Mixer", "Right Mixer Right DAC Playback Switch", "Right DAC" },
  792. { "Right Mixer", "Line Playback Switch", "Line Right" },
  793. { "Right Mixer", "FM Playback Switch", "FM Right" },
  794. { "Right Mixer", "Mic1 Playback Switch", "MIC1 Pre-Amplifier" },
  795. { "Right Mixer", "Mic2 Playback Switch", "MIC2 Pre-Amplifier" },
  796. /* Left Mixer Routes */
  797. { "Left Mixer", NULL, "Mixer Enable" },
  798. { "Left Mixer", "Left Mixer Left DAC Playback Switch", "Left DAC" },
  799. { "Left Mixer", "Line Playback Switch", "Line Left" },
  800. { "Left Mixer", "FM Playback Switch", "FM Left" },
  801. { "Left Mixer", "Mic1 Playback Switch", "MIC1 Pre-Amplifier" },
  802. { "Left Mixer", "Mic2 Playback Switch", "MIC2 Pre-Amplifier" },
  803. /* Power Amplifier Routes */
  804. { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
  805. { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
  806. { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
  807. { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
  808. /* Headphone Output Routes */
  809. { "Power Amplifier Mute", "Switch", "Power Amplifier" },
  810. { "HP Right", NULL, "Power Amplifier Mute" },
  811. { "HP Left", NULL, "Power Amplifier Mute" },
  812. /* Mic1 Routes */
  813. { "Left ADC", NULL, "MIC1 Pre-Amplifier" },
  814. { "Right ADC", NULL, "MIC1 Pre-Amplifier" },
  815. { "MIC1 Pre-Amplifier", NULL, "Mic1"},
  816. { "Mic1", NULL, "VMIC" },
  817. /* Mic2 Routes */
  818. { "Left ADC", NULL, "MIC2 Pre-Amplifier" },
  819. { "Right ADC", NULL, "MIC2 Pre-Amplifier" },
  820. { "MIC2 Pre-Amplifier", NULL, "Mic2"},
  821. { "Mic2", NULL, "VMIC" },
  822. };
  823. static const struct snd_soc_component_driver sun4i_codec_codec = {
  824. .controls = sun4i_codec_controls,
  825. .num_controls = ARRAY_SIZE(sun4i_codec_controls),
  826. .dapm_widgets = sun4i_codec_codec_dapm_widgets,
  827. .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
  828. .dapm_routes = sun4i_codec_codec_dapm_routes,
  829. .num_dapm_routes = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
  830. .idle_bias_on = 1,
  831. .use_pmdown_time = 1,
  832. .endianness = 1,
  833. };
  834. static const struct snd_soc_component_driver sun7i_codec_codec = {
  835. .controls = sun7i_codec_controls,
  836. .num_controls = ARRAY_SIZE(sun7i_codec_controls),
  837. .dapm_widgets = sun4i_codec_codec_dapm_widgets,
  838. .num_dapm_widgets = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
  839. .dapm_routes = sun4i_codec_codec_dapm_routes,
  840. .num_dapm_routes = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
  841. .idle_bias_on = 1,
  842. .use_pmdown_time = 1,
  843. .endianness = 1,
  844. };
  845. /*** sun6i Codec ***/
  846. /* mixer controls */
  847. static const struct snd_kcontrol_new sun6i_codec_mixer_controls[] = {
  848. SOC_DAPM_DOUBLE("DAC Playback Switch",
  849. SUN6I_CODEC_OM_DACA_CTRL,
  850. SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL,
  851. SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR, 1, 0),
  852. SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
  853. SUN6I_CODEC_OM_DACA_CTRL,
  854. SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR,
  855. SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL, 1, 0),
  856. SOC_DAPM_DOUBLE("Line In Playback Switch",
  857. SUN6I_CODEC_OM_DACA_CTRL,
  858. SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL,
  859. SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR, 1, 0),
  860. SOC_DAPM_DOUBLE("Mic1 Playback Switch",
  861. SUN6I_CODEC_OM_DACA_CTRL,
  862. SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1,
  863. SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1, 1, 0),
  864. SOC_DAPM_DOUBLE("Mic2 Playback Switch",
  865. SUN6I_CODEC_OM_DACA_CTRL,
  866. SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2,
  867. SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2, 1, 0),
  868. };
  869. /* ADC mixer controls */
  870. static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls[] = {
  871. SOC_DAPM_DOUBLE("Mixer Capture Switch",
  872. SUN6I_CODEC_ADC_ACTL,
  873. SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL,
  874. SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR, 1, 0),
  875. SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
  876. SUN6I_CODEC_ADC_ACTL,
  877. SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR,
  878. SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL, 1, 0),
  879. SOC_DAPM_DOUBLE("Line In Capture Switch",
  880. SUN6I_CODEC_ADC_ACTL,
  881. SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL,
  882. SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR, 1, 0),
  883. SOC_DAPM_DOUBLE("Mic1 Capture Switch",
  884. SUN6I_CODEC_ADC_ACTL,
  885. SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1,
  886. SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1, 1, 0),
  887. SOC_DAPM_DOUBLE("Mic2 Capture Switch",
  888. SUN6I_CODEC_ADC_ACTL,
  889. SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2,
  890. SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2, 1, 0),
  891. };
  892. /* headphone controls */
  893. static const char * const sun6i_codec_hp_src_enum_text[] = {
  894. "DAC", "Mixer",
  895. };
  896. static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum,
  897. SUN6I_CODEC_OM_DACA_CTRL,
  898. SUN6I_CODEC_OM_DACA_CTRL_LHPIS,
  899. SUN6I_CODEC_OM_DACA_CTRL_RHPIS,
  900. sun6i_codec_hp_src_enum_text);
  901. static const struct snd_kcontrol_new sun6i_codec_hp_src[] = {
  902. SOC_DAPM_ENUM("Headphone Source Playback Route",
  903. sun6i_codec_hp_src_enum),
  904. };
  905. /* microphone controls */
  906. static const char * const sun6i_codec_mic2_src_enum_text[] = {
  907. "Mic2", "Mic3",
  908. };
  909. static SOC_ENUM_SINGLE_DECL(sun6i_codec_mic2_src_enum,
  910. SUN6I_CODEC_MIC_CTRL,
  911. SUN6I_CODEC_MIC_CTRL_MIC2SLT,
  912. sun6i_codec_mic2_src_enum_text);
  913. static const struct snd_kcontrol_new sun6i_codec_mic2_src[] = {
  914. SOC_DAPM_ENUM("Mic2 Amplifier Source Route",
  915. sun6i_codec_mic2_src_enum),
  916. };
  917. /* line out controls */
  918. static const char * const sun6i_codec_lineout_src_enum_text[] = {
  919. "Stereo", "Mono Differential",
  920. };
  921. static SOC_ENUM_DOUBLE_DECL(sun6i_codec_lineout_src_enum,
  922. SUN6I_CODEC_MIC_CTRL,
  923. SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC,
  924. SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC,
  925. sun6i_codec_lineout_src_enum_text);
  926. static const struct snd_kcontrol_new sun6i_codec_lineout_src[] = {
  927. SOC_DAPM_ENUM("Line Out Source Playback Route",
  928. sun6i_codec_lineout_src_enum),
  929. };
  930. /* volume / mute controls */
  931. static const DECLARE_TLV_DB_SCALE(sun6i_codec_dvol_scale, -7308, 116, 0);
  932. static const DECLARE_TLV_DB_SCALE(sun6i_codec_hp_vol_scale, -6300, 100, 1);
  933. static const DECLARE_TLV_DB_SCALE(sun6i_codec_out_mixer_pregain_scale,
  934. -450, 150, 0);
  935. static const DECLARE_TLV_DB_RANGE(sun6i_codec_lineout_vol_scale,
  936. 0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
  937. 2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0),
  938. );
  939. static const DECLARE_TLV_DB_RANGE(sun6i_codec_mic_gain_scale,
  940. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  941. 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
  942. );
  943. static const struct snd_kcontrol_new sun6i_codec_codec_widgets[] = {
  944. SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
  945. SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
  946. sun6i_codec_dvol_scale),
  947. SOC_SINGLE_TLV("Headphone Playback Volume",
  948. SUN6I_CODEC_OM_DACA_CTRL,
  949. SUN6I_CODEC_OM_DACA_CTRL_HPVOL, 0x3f, 0,
  950. sun6i_codec_hp_vol_scale),
  951. SOC_SINGLE_TLV("Line Out Playback Volume",
  952. SUN6I_CODEC_MIC_CTRL,
  953. SUN6I_CODEC_MIC_CTRL_LINEOUTVC, 0x1f, 0,
  954. sun6i_codec_lineout_vol_scale),
  955. SOC_DOUBLE("Headphone Playback Switch",
  956. SUN6I_CODEC_OM_DACA_CTRL,
  957. SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE,
  958. SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE, 1, 0),
  959. SOC_DOUBLE("Line Out Playback Switch",
  960. SUN6I_CODEC_MIC_CTRL,
  961. SUN6I_CODEC_MIC_CTRL_LINEOUTLEN,
  962. SUN6I_CODEC_MIC_CTRL_LINEOUTREN, 1, 0),
  963. /* Mixer pre-gains */
  964. SOC_SINGLE_TLV("Line In Playback Volume",
  965. SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_LINEING,
  966. 0x7, 0, sun6i_codec_out_mixer_pregain_scale),
  967. SOC_SINGLE_TLV("Mic1 Playback Volume",
  968. SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC1G,
  969. 0x7, 0, sun6i_codec_out_mixer_pregain_scale),
  970. SOC_SINGLE_TLV("Mic2 Playback Volume",
  971. SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC2G,
  972. 0x7, 0, sun6i_codec_out_mixer_pregain_scale),
  973. /* Microphone Amp boost gains */
  974. SOC_SINGLE_TLV("Mic1 Boost Volume", SUN6I_CODEC_MIC_CTRL,
  975. SUN6I_CODEC_MIC_CTRL_MIC1BOOST, 0x7, 0,
  976. sun6i_codec_mic_gain_scale),
  977. SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL,
  978. SUN6I_CODEC_MIC_CTRL_MIC2BOOST, 0x7, 0,
  979. sun6i_codec_mic_gain_scale),
  980. SOC_DOUBLE_TLV("ADC Capture Volume",
  981. SUN6I_CODEC_ADC_ACTL, SUN6I_CODEC_ADC_ACTL_ADCLG,
  982. SUN6I_CODEC_ADC_ACTL_ADCRG, 0x7, 0,
  983. sun6i_codec_out_mixer_pregain_scale),
  984. };
  985. static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
  986. /* Microphone inputs */
  987. SND_SOC_DAPM_INPUT("MIC1"),
  988. SND_SOC_DAPM_INPUT("MIC2"),
  989. SND_SOC_DAPM_INPUT("MIC3"),
  990. /* Microphone Bias */
  991. SND_SOC_DAPM_SUPPLY("HBIAS", SUN6I_CODEC_MIC_CTRL,
  992. SUN6I_CODEC_MIC_CTRL_HBIASEN, 0, NULL, 0),
  993. SND_SOC_DAPM_SUPPLY("MBIAS", SUN6I_CODEC_MIC_CTRL,
  994. SUN6I_CODEC_MIC_CTRL_MBIASEN, 0, NULL, 0),
  995. /* Mic input path */
  996. SND_SOC_DAPM_MUX("Mic2 Amplifier Source Route",
  997. SND_SOC_NOPM, 0, 0, sun6i_codec_mic2_src),
  998. SND_SOC_DAPM_PGA("Mic1 Amplifier", SUN6I_CODEC_MIC_CTRL,
  999. SUN6I_CODEC_MIC_CTRL_MIC1AMPEN, 0, NULL, 0),
  1000. SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN6I_CODEC_MIC_CTRL,
  1001. SUN6I_CODEC_MIC_CTRL_MIC2AMPEN, 0, NULL, 0),
  1002. /* Line In */
  1003. SND_SOC_DAPM_INPUT("LINEIN"),
  1004. /* Digital parts of the ADCs */
  1005. SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
  1006. SUN6I_CODEC_ADC_FIFOC_EN_AD, 0,
  1007. NULL, 0),
  1008. /* Analog parts of the ADCs */
  1009. SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
  1010. SUN6I_CODEC_ADC_ACTL_ADCLEN, 0),
  1011. SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
  1012. SUN6I_CODEC_ADC_ACTL_ADCREN, 0),
  1013. /* ADC Mixers */
  1014. SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
  1015. sun6i_codec_adc_mixer_controls),
  1016. SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
  1017. sun6i_codec_adc_mixer_controls),
  1018. /* Digital parts of the DACs */
  1019. SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
  1020. SUN4I_CODEC_DAC_DPC_EN_DA, 0,
  1021. NULL, 0),
  1022. /* Analog parts of the DACs */
  1023. SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
  1024. SUN6I_CODEC_OM_DACA_CTRL,
  1025. SUN6I_CODEC_OM_DACA_CTRL_DACALEN, 0),
  1026. SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
  1027. SUN6I_CODEC_OM_DACA_CTRL,
  1028. SUN6I_CODEC_OM_DACA_CTRL_DACAREN, 0),
  1029. /* Mixers */
  1030. SOC_MIXER_ARRAY("Left Mixer", SUN6I_CODEC_OM_DACA_CTRL,
  1031. SUN6I_CODEC_OM_DACA_CTRL_LMIXEN, 0,
  1032. sun6i_codec_mixer_controls),
  1033. SOC_MIXER_ARRAY("Right Mixer", SUN6I_CODEC_OM_DACA_CTRL,
  1034. SUN6I_CODEC_OM_DACA_CTRL_RMIXEN, 0,
  1035. sun6i_codec_mixer_controls),
  1036. /* Headphone output path */
  1037. SND_SOC_DAPM_MUX("Headphone Source Playback Route",
  1038. SND_SOC_NOPM, 0, 0, sun6i_codec_hp_src),
  1039. SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN6I_CODEC_OM_PA_CTRL,
  1040. SUN6I_CODEC_OM_PA_CTRL_HPPAEN, 0, NULL, 0),
  1041. SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUN6I_CODEC_OM_PA_CTRL,
  1042. SUN6I_CODEC_OM_PA_CTRL_COMPTEN, 0, NULL, 0),
  1043. SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPCOM", SUN6I_CODEC_OM_PA_CTRL,
  1044. SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL, 0x3, 0x3, 0),
  1045. SND_SOC_DAPM_OUTPUT("HP"),
  1046. /* Line Out path */
  1047. SND_SOC_DAPM_MUX("Line Out Source Playback Route",
  1048. SND_SOC_NOPM, 0, 0, sun6i_codec_lineout_src),
  1049. SND_SOC_DAPM_OUTPUT("LINEOUT"),
  1050. };
  1051. static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
  1052. /* DAC Routes */
  1053. { "Left DAC", NULL, "DAC Enable" },
  1054. { "Right DAC", NULL, "DAC Enable" },
  1055. /* Microphone Routes */
  1056. { "Mic1 Amplifier", NULL, "MIC1"},
  1057. { "Mic2 Amplifier Source Route", "Mic2", "MIC2" },
  1058. { "Mic2 Amplifier Source Route", "Mic3", "MIC3" },
  1059. { "Mic2 Amplifier", NULL, "Mic2 Amplifier Source Route"},
  1060. /* Left Mixer Routes */
  1061. { "Left Mixer", "DAC Playback Switch", "Left DAC" },
  1062. { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
  1063. { "Left Mixer", "Line In Playback Switch", "LINEIN" },
  1064. { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
  1065. { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
  1066. /* Right Mixer Routes */
  1067. { "Right Mixer", "DAC Playback Switch", "Right DAC" },
  1068. { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
  1069. { "Right Mixer", "Line In Playback Switch", "LINEIN" },
  1070. { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
  1071. { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
  1072. /* Left ADC Mixer Routes */
  1073. { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
  1074. { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
  1075. { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
  1076. { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
  1077. { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
  1078. /* Right ADC Mixer Routes */
  1079. { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
  1080. { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
  1081. { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
  1082. { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
  1083. { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
  1084. /* Headphone Routes */
  1085. { "Headphone Source Playback Route", "DAC", "Left DAC" },
  1086. { "Headphone Source Playback Route", "DAC", "Right DAC" },
  1087. { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
  1088. { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
  1089. { "Headphone Amp", NULL, "Headphone Source Playback Route" },
  1090. { "HP", NULL, "Headphone Amp" },
  1091. { "HPCOM", NULL, "HPCOM Protection" },
  1092. /* Line Out Routes */
  1093. { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
  1094. { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
  1095. { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
  1096. { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
  1097. { "LINEOUT", NULL, "Line Out Source Playback Route" },
  1098. /* ADC Routes */
  1099. { "Left ADC", NULL, "ADC Enable" },
  1100. { "Right ADC", NULL, "ADC Enable" },
  1101. { "Left ADC", NULL, "Left ADC Mixer" },
  1102. { "Right ADC", NULL, "Right ADC Mixer" },
  1103. };
  1104. static const struct snd_soc_component_driver sun6i_codec_codec = {
  1105. .controls = sun6i_codec_codec_widgets,
  1106. .num_controls = ARRAY_SIZE(sun6i_codec_codec_widgets),
  1107. .dapm_widgets = sun6i_codec_codec_dapm_widgets,
  1108. .num_dapm_widgets = ARRAY_SIZE(sun6i_codec_codec_dapm_widgets),
  1109. .dapm_routes = sun6i_codec_codec_dapm_routes,
  1110. .num_dapm_routes = ARRAY_SIZE(sun6i_codec_codec_dapm_routes),
  1111. .idle_bias_on = 1,
  1112. .use_pmdown_time = 1,
  1113. .endianness = 1,
  1114. };
  1115. /* sun8i A23 codec */
  1116. static const struct snd_kcontrol_new sun8i_a23_codec_codec_controls[] = {
  1117. SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
  1118. SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
  1119. sun6i_codec_dvol_scale),
  1120. };
  1121. static const struct snd_soc_dapm_widget sun8i_a23_codec_codec_widgets[] = {
  1122. /* Digital parts of the ADCs */
  1123. SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
  1124. SUN6I_CODEC_ADC_FIFOC_EN_AD, 0, NULL, 0),
  1125. /* Digital parts of the DACs */
  1126. SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
  1127. SUN4I_CODEC_DAC_DPC_EN_DA, 0, NULL, 0),
  1128. };
  1129. static const struct snd_soc_component_driver sun8i_a23_codec_codec = {
  1130. .controls = sun8i_a23_codec_codec_controls,
  1131. .num_controls = ARRAY_SIZE(sun8i_a23_codec_codec_controls),
  1132. .dapm_widgets = sun8i_a23_codec_codec_widgets,
  1133. .num_dapm_widgets = ARRAY_SIZE(sun8i_a23_codec_codec_widgets),
  1134. .idle_bias_on = 1,
  1135. .use_pmdown_time = 1,
  1136. .endianness = 1,
  1137. };
  1138. /*suniv F1C100s codec */
  1139. /* headphone controls */
  1140. static const char * const suniv_codec_hp_src_enum_text[] = {
  1141. "DAC", "Mixer",
  1142. };
  1143. static SOC_ENUM_DOUBLE_DECL(suniv_codec_hp_src_enum,
  1144. SUNIV_CODEC_OM_DACA_CTRL,
  1145. SUNIV_CODEC_OM_DACA_CTRL_LHPIS,
  1146. SUNIV_CODEC_OM_DACA_CTRL_RHPIS,
  1147. suniv_codec_hp_src_enum_text);
  1148. static const struct snd_kcontrol_new suniv_codec_hp_src[] = {
  1149. SOC_DAPM_ENUM("Headphone Source Playback Route",
  1150. suniv_codec_hp_src_enum),
  1151. };
  1152. /* mixer controls */
  1153. static const struct snd_kcontrol_new suniv_codec_adc_mixer_controls[] = {
  1154. SOC_DAPM_SINGLE("Right Out Capture Switch", SUNIV_CODEC_ADC_ACTL,
  1155. SUNIV_CODEC_ADC_ADCMIX_ROUT, 1, 0),
  1156. SOC_DAPM_SINGLE("Left Out Capture Switch", SUNIV_CODEC_ADC_ACTL,
  1157. SUNIV_CODEC_ADC_ADCMIX_LOUT, 1, 0),
  1158. SOC_DAPM_SINGLE("Line In Capture Switch", SUNIV_CODEC_ADC_ACTL,
  1159. SUNIV_CODEC_ADC_ADCMIX_LINEIN, 1, 0),
  1160. SOC_DAPM_SINGLE("Right FM In Capture Switch", SUNIV_CODEC_ADC_ACTL,
  1161. SUNIV_CODEC_ADC_ADCMIX_FMINR, 1, 0),
  1162. SOC_DAPM_SINGLE("Left FM In Capture Switch", SUNIV_CODEC_ADC_ACTL,
  1163. SUNIV_CODEC_ADC_ADCMIX_FMINL, 1, 0),
  1164. SOC_DAPM_SINGLE("Mic Capture Switch", SUNIV_CODEC_ADC_ACTL,
  1165. SUNIV_CODEC_ADC_ADCMIX_MIC, 1, 0),
  1166. };
  1167. static const struct snd_kcontrol_new suniv_codec_dac_lmixer_controls[] = {
  1168. SOC_DAPM_SINGLE("Right DAC Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1169. SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_RDAC, 1, 0),
  1170. SOC_DAPM_SINGLE("Left DAC Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1171. SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_LDAC, 1, 0),
  1172. SOC_DAPM_SINGLE("FM In Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1173. SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_FMIN, 1, 0),
  1174. SOC_DAPM_SINGLE("Line In Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1175. SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_LINEIN, 1, 0),
  1176. SOC_DAPM_SINGLE("Mic In Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1177. SUNIV_CODEC_OM_DACA_CTRL_LMIXMUTE_MICIN, 1, 0),
  1178. };
  1179. static const struct snd_kcontrol_new suniv_codec_dac_rmixer_controls[] = {
  1180. SOC_DAPM_SINGLE("Left DAC Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1181. SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_LDAC, 1, 0),
  1182. SOC_DAPM_SINGLE("Right DAC Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1183. SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_RDAC, 1, 0),
  1184. SOC_DAPM_SINGLE("FM In Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1185. SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_FMIN, 1, 0),
  1186. SOC_DAPM_SINGLE("Line In Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1187. SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_LINEIN, 1, 0),
  1188. SOC_DAPM_SINGLE("Mic In Playback Switch", SUNIV_CODEC_OM_DACA_CTRL,
  1189. SUNIV_CODEC_OM_DACA_CTRL_RMIXMUTE_MICIN, 1, 0),
  1190. };
  1191. static const DECLARE_TLV_DB_SCALE(suniv_codec_dvol_scale, -7308, 116, 0);
  1192. static const DECLARE_TLV_DB_SCALE(suniv_codec_hp_vol_scale, -6300, 100, 1);
  1193. static const DECLARE_TLV_DB_SCALE(suniv_codec_out_mixer_pregain_scale,
  1194. -450, 150, 0);
  1195. static const DECLARE_TLV_DB_RANGE(suniv_codec_mic_gain_scale,
  1196. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  1197. 1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
  1198. );
  1199. static const struct snd_kcontrol_new suniv_codec_codec_widgets[] = {
  1200. SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
  1201. SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
  1202. suniv_codec_dvol_scale),
  1203. SOC_SINGLE_TLV("Headphone Playback Volume",
  1204. SUNIV_CODEC_OM_DACA_CTRL,
  1205. SUNIV_CODEC_OM_DACA_CTRL_HPVOL, 0x3f, 0,
  1206. suniv_codec_hp_vol_scale),
  1207. SOC_DOUBLE("Headphone Playback Switch",
  1208. SUNIV_CODEC_OM_DACA_CTRL,
  1209. SUNIV_CODEC_OM_DACA_CTRL_LHPPAMUTE,
  1210. SUNIV_CODEC_OM_DACA_CTRL_RHPPAMUTE, 1, 0),
  1211. SOC_SINGLE_TLV("Line In Playback Volume",
  1212. SUNIV_CODEC_ADC_ACTL, SUNIV_CODEC_ADC_LINEINVOL,
  1213. 0x7, 0, suniv_codec_out_mixer_pregain_scale),
  1214. SOC_SINGLE_TLV("FM In Playback Volume",
  1215. SUNIV_CODEC_ADC_ACTL, SUNIV_CODEC_ADC_FMINVOL,
  1216. 0x7, 0, suniv_codec_out_mixer_pregain_scale),
  1217. SOC_SINGLE_TLV("Mic In Playback Volume",
  1218. SUNIV_CODEC_ADC_ACTL, SUNIV_CODEC_ADC_MICG,
  1219. 0x7, 0, suniv_codec_out_mixer_pregain_scale),
  1220. /* Microphone Amp boost gains */
  1221. SOC_SINGLE_TLV("Mic Boost Volume", SUNIV_CODEC_ADC_ACTL,
  1222. SUNIV_CODEC_ADC_MICBOOST, 0x7, 0,
  1223. suniv_codec_mic_gain_scale),
  1224. SOC_SINGLE_TLV("ADC Capture Volume",
  1225. SUNIV_CODEC_ADC_ACTL, SUNIV_CODEC_ADC_ADCG,
  1226. 0x7, 0, suniv_codec_out_mixer_pregain_scale),
  1227. };
  1228. static const struct snd_soc_dapm_widget suniv_codec_codec_dapm_widgets[] = {
  1229. /* Microphone inputs */
  1230. SND_SOC_DAPM_INPUT("MIC"),
  1231. /* Microphone Bias */
  1232. /* deleted: HBIAS, MBIAS */
  1233. /* Mic input path */
  1234. SND_SOC_DAPM_PGA("Mic Amplifier", SUNIV_CODEC_ADC_ACTL,
  1235. SUNIV_CODEC_ADC_MICAMPEN, 0, NULL, 0),
  1236. /* Line In */
  1237. SND_SOC_DAPM_INPUT("LINEIN"),
  1238. /* FM In */
  1239. SND_SOC_DAPM_INPUT("FMINR"),
  1240. SND_SOC_DAPM_INPUT("FMINL"),
  1241. /* Digital parts of the ADCs */
  1242. SND_SOC_DAPM_SUPPLY("ADC Enable", SUNIV_CODEC_ADC_FIFOC,
  1243. SUNIV_CODEC_ADC_FIFOC_EN_AD, 0,
  1244. NULL, 0),
  1245. /* Analog parts of the ADCs */
  1246. SND_SOC_DAPM_ADC("ADC", "Codec Capture", SUNIV_CODEC_ADC_ACTL,
  1247. SUNIV_CODEC_ADC_ADCEN, 0),
  1248. /* ADC Mixers */
  1249. SOC_MIXER_ARRAY("ADC Mixer", SUNIV_CODEC_ADC_ACTL,
  1250. SND_SOC_NOPM, 0,
  1251. suniv_codec_adc_mixer_controls),
  1252. /* Digital parts of the DACs */
  1253. SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
  1254. SUN4I_CODEC_DAC_DPC_EN_DA, 0,
  1255. NULL, 0),
  1256. /* Analog parts of the DACs */
  1257. SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
  1258. SUNIV_CODEC_OM_DACA_CTRL,
  1259. SUNIV_CODEC_OM_DACA_CTRL_DACALEN, 0),
  1260. SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
  1261. SUNIV_CODEC_OM_DACA_CTRL,
  1262. SUNIV_CODEC_OM_DACA_CTRL_DACAREN, 0),
  1263. /* Mixers */
  1264. SOC_MIXER_ARRAY("Left Mixer", SUNIV_CODEC_OM_DACA_CTRL,
  1265. SUNIV_CODEC_OM_DACA_CTRL_LMIXEN, 0,
  1266. suniv_codec_dac_lmixer_controls),
  1267. SOC_MIXER_ARRAY("Right Mixer", SUNIV_CODEC_OM_DACA_CTRL,
  1268. SUNIV_CODEC_OM_DACA_CTRL_RMIXEN, 0,
  1269. suniv_codec_dac_rmixer_controls),
  1270. /* Headphone output path */
  1271. SND_SOC_DAPM_MUX("Headphone Source Playback Route",
  1272. SND_SOC_NOPM, 0, 0, suniv_codec_hp_src),
  1273. SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUNIV_CODEC_OM_DACA_CTRL,
  1274. SUNIV_CODEC_OM_DACA_CTRL_HPPAEN, 0, NULL, 0),
  1275. SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUNIV_CODEC_OM_DACA_CTRL,
  1276. SUNIV_CODEC_OM_DACA_CTRL_COMPTEN, 0, NULL, 0),
  1277. SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPCOM", SUNIV_CODEC_OM_DACA_CTRL,
  1278. SUNIV_CODEC_OM_DACA_CTRL_HPCOM_CTL, 0x3, 0x3, 0),
  1279. SND_SOC_DAPM_OUTPUT("HP"),
  1280. };
  1281. static const struct snd_soc_dapm_route suniv_codec_codec_dapm_routes[] = {
  1282. /* DAC Routes */
  1283. { "Left DAC", NULL, "DAC Enable" },
  1284. { "Right DAC", NULL, "DAC Enable" },
  1285. /* Microphone Routes */
  1286. { "Mic Amplifier", NULL, "MIC"},
  1287. /* Left Mixer Routes */
  1288. { "Left Mixer", "Right DAC Playback Switch", "Right DAC" },
  1289. { "Left Mixer", "Left DAC Playback Switch", "Left DAC" },
  1290. { "Left Mixer", "FM In Playback Switch", "FMINL" },
  1291. { "Left Mixer", "Line In Playback Switch", "LINEIN" },
  1292. { "Left Mixer", "Mic In Playback Switch", "Mic Amplifier" },
  1293. /* Right Mixer Routes */
  1294. { "Right Mixer", "Left DAC Playback Switch", "Left DAC" },
  1295. { "Right Mixer", "Right DAC Playback Switch", "Right DAC" },
  1296. { "Right Mixer", "FM In Playback Switch", "FMINR" },
  1297. { "Right Mixer", "Line In Playback Switch", "LINEIN" },
  1298. { "Right Mixer", "Mic In Playback Switch", "Mic Amplifier" },
  1299. /* ADC Mixer Routes */
  1300. { "ADC Mixer", "Right Out Capture Switch", "Right Mixer" },
  1301. { "ADC Mixer", "Left Out Capture Switch", "Left Mixer" },
  1302. { "ADC Mixer", "Line In Capture Switch", "LINEIN" },
  1303. { "ADC Mixer", "Right FM In Capture Switch", "FMINR" },
  1304. { "ADC Mixer", "Left FM In Capture Switch", "FMINL" },
  1305. { "ADC Mixer", "Mic Capture Switch", "Mic Amplifier" },
  1306. /* Headphone Routes */
  1307. { "Headphone Source Playback Route", "DAC", "Left DAC" },
  1308. { "Headphone Source Playback Route", "DAC", "Right DAC" },
  1309. { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
  1310. { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
  1311. { "Headphone Amp", NULL, "Headphone Source Playback Route" },
  1312. { "HP", NULL, "Headphone Amp" },
  1313. { "HPCOM", NULL, "HPCOM Protection" },
  1314. /* ADC Routes */
  1315. { "ADC", NULL, "ADC Mixer" },
  1316. { "ADC", NULL, "ADC Enable" },
  1317. };
  1318. static const struct snd_soc_component_driver suniv_codec_codec = {
  1319. .controls = suniv_codec_codec_widgets,
  1320. .num_controls = ARRAY_SIZE(suniv_codec_codec_widgets),
  1321. .dapm_widgets = suniv_codec_codec_dapm_widgets,
  1322. .num_dapm_widgets = ARRAY_SIZE(suniv_codec_codec_dapm_widgets),
  1323. .dapm_routes = suniv_codec_codec_dapm_routes,
  1324. .num_dapm_routes = ARRAY_SIZE(suniv_codec_codec_dapm_routes),
  1325. .idle_bias_on = 1,
  1326. .use_pmdown_time = 1,
  1327. .endianness = 1,
  1328. };
  1329. static const struct snd_soc_component_driver sun4i_codec_component = {
  1330. .name = "sun4i-codec",
  1331. .legacy_dai_naming = 1,
  1332. #ifdef CONFIG_DEBUG_FS
  1333. .debugfs_prefix = "cpu",
  1334. #endif
  1335. };
  1336. #define SUN4I_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
  1337. SNDRV_PCM_FMTBIT_S32_LE)
  1338. static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
  1339. {
  1340. struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
  1341. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
  1342. snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
  1343. &scodec->capture_dma_data);
  1344. return 0;
  1345. }
  1346. static const struct snd_soc_dai_ops dummy_dai_ops = {
  1347. .probe = sun4i_codec_dai_probe,
  1348. };
  1349. static struct snd_soc_dai_driver dummy_cpu_dai = {
  1350. .name = "sun4i-codec-cpu-dai",
  1351. .playback = {
  1352. .stream_name = "Playback",
  1353. .channels_min = 1,
  1354. .channels_max = 2,
  1355. .rates = SUN4I_CODEC_RATES,
  1356. .formats = SUN4I_CODEC_FORMATS,
  1357. .sig_bits = 24,
  1358. },
  1359. .capture = {
  1360. .stream_name = "Capture",
  1361. .channels_min = 1,
  1362. .channels_max = 2,
  1363. .rates = SUN4I_CODEC_RATES,
  1364. .formats = SUN4I_CODEC_FORMATS,
  1365. .sig_bits = 24,
  1366. },
  1367. .ops = &dummy_dai_ops,
  1368. };
  1369. static struct snd_soc_jack sun4i_headphone_jack;
  1370. static struct snd_soc_jack_pin sun4i_headphone_jack_pins[] = {
  1371. { .pin = "Headphone", .mask = SND_JACK_HEADPHONE },
  1372. };
  1373. static struct snd_soc_jack_gpio sun4i_headphone_jack_gpio = {
  1374. .name = "hp-det",
  1375. .report = SND_JACK_HEADPHONE,
  1376. .debounce_time = 150,
  1377. };
  1378. static int sun4i_codec_machine_init(struct snd_soc_pcm_runtime *rtd)
  1379. {
  1380. struct snd_soc_card *card = rtd->card;
  1381. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
  1382. int ret;
  1383. if (scodec->gpio_hp) {
  1384. ret = snd_soc_card_jack_new_pins(card, "Headphone Jack",
  1385. SND_JACK_HEADPHONE,
  1386. &sun4i_headphone_jack,
  1387. sun4i_headphone_jack_pins,
  1388. ARRAY_SIZE(sun4i_headphone_jack_pins));
  1389. if (ret) {
  1390. dev_err(rtd->dev,
  1391. "Headphone jack creation failed: %d\n", ret);
  1392. return ret;
  1393. }
  1394. sun4i_headphone_jack_gpio.desc = scodec->gpio_hp;
  1395. ret = snd_soc_jack_add_gpios(&sun4i_headphone_jack, 1,
  1396. &sun4i_headphone_jack_gpio);
  1397. if (ret) {
  1398. dev_err(rtd->dev, "Headphone GPIO not added: %d\n", ret);
  1399. return ret;
  1400. }
  1401. }
  1402. return 0;
  1403. }
  1404. static struct snd_soc_dai_link *sun4i_codec_create_link(struct device *dev,
  1405. int *num_links)
  1406. {
  1407. struct snd_soc_dai_link *link = devm_kzalloc(dev, sizeof(*link),
  1408. GFP_KERNEL);
  1409. struct snd_soc_dai_link_component *dlc = devm_kzalloc(dev,
  1410. 3 * sizeof(*dlc), GFP_KERNEL);
  1411. if (!link || !dlc)
  1412. return NULL;
  1413. link->cpus = &dlc[0];
  1414. link->codecs = &dlc[1];
  1415. link->platforms = &dlc[2];
  1416. link->num_cpus = 1;
  1417. link->num_codecs = 1;
  1418. link->num_platforms = 1;
  1419. link->name = "cdc";
  1420. link->stream_name = "CDC PCM";
  1421. link->codecs->dai_name = "Codec";
  1422. link->cpus->dai_name = dev_name(dev);
  1423. link->codecs->name = dev_name(dev);
  1424. link->platforms->name = dev_name(dev);
  1425. link->dai_fmt = SND_SOC_DAIFMT_I2S;
  1426. link->init = sun4i_codec_machine_init;
  1427. *num_links = 1;
  1428. return link;
  1429. };
  1430. static int sun4i_codec_spk_event(struct snd_soc_dapm_widget *w,
  1431. struct snd_kcontrol *k, int event)
  1432. {
  1433. struct snd_soc_card *card = snd_soc_dapm_to_card(w->dapm);
  1434. struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
  1435. gpiod_set_value_cansleep(scodec->gpio_pa,
  1436. !!SND_SOC_DAPM_EVENT_ON(event));
  1437. if (SND_SOC_DAPM_EVENT_ON(event)) {
  1438. /*
  1439. * Need a delay to wait for DAC to push the data. 700ms seems
  1440. * to be the best compromise not to feel this delay while
  1441. * playing a sound.
  1442. */
  1443. msleep(700);
  1444. }
  1445. return 0;
  1446. }
  1447. static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets[] = {
  1448. SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
  1449. };
  1450. static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes[] = {
  1451. { "Speaker", NULL, "HP Right" },
  1452. { "Speaker", NULL, "HP Left" },
  1453. };
  1454. static struct snd_soc_card *sun4i_codec_create_card(struct device *dev)
  1455. {
  1456. struct snd_soc_card *card;
  1457. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1458. if (!card)
  1459. return ERR_PTR(-ENOMEM);
  1460. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1461. if (!card->dai_link)
  1462. return ERR_PTR(-ENOMEM);
  1463. card->dev = dev;
  1464. card->owner = THIS_MODULE;
  1465. card->name = "sun4i-codec";
  1466. card->dapm_widgets = sun4i_codec_card_dapm_widgets;
  1467. card->num_dapm_widgets = ARRAY_SIZE(sun4i_codec_card_dapm_widgets);
  1468. card->dapm_routes = sun4i_codec_card_dapm_routes;
  1469. card->num_dapm_routes = ARRAY_SIZE(sun4i_codec_card_dapm_routes);
  1470. return card;
  1471. };
  1472. static const struct snd_soc_dapm_widget sun6i_codec_card_dapm_widgets[] = {
  1473. SND_SOC_DAPM_HP("Headphone", NULL),
  1474. SND_SOC_DAPM_LINE("Line In", NULL),
  1475. SND_SOC_DAPM_LINE("Line Out", NULL),
  1476. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  1477. SND_SOC_DAPM_MIC("Mic", NULL),
  1478. SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
  1479. };
  1480. static struct snd_soc_card *sun6i_codec_create_card(struct device *dev)
  1481. {
  1482. struct snd_soc_card *card;
  1483. int ret;
  1484. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1485. if (!card)
  1486. return ERR_PTR(-ENOMEM);
  1487. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1488. if (!card->dai_link)
  1489. return ERR_PTR(-ENOMEM);
  1490. card->dev = dev;
  1491. card->owner = THIS_MODULE;
  1492. card->name = "A31 Audio Codec";
  1493. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1494. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1495. card->fully_routed = true;
  1496. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1497. if (ret)
  1498. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1499. return card;
  1500. };
  1501. /* Connect digital side enables to analog side widgets */
  1502. static const struct snd_soc_dapm_route sun8i_codec_card_routes[] = {
  1503. /* ADC Routes */
  1504. { "Left ADC", NULL, "ADC Enable" },
  1505. { "Right ADC", NULL, "ADC Enable" },
  1506. { "Codec Capture", NULL, "Left ADC" },
  1507. { "Codec Capture", NULL, "Right ADC" },
  1508. /* DAC Routes */
  1509. { "Left DAC", NULL, "DAC Enable" },
  1510. { "Right DAC", NULL, "DAC Enable" },
  1511. { "Left DAC", NULL, "Codec Playback" },
  1512. { "Right DAC", NULL, "Codec Playback" },
  1513. };
  1514. static struct snd_soc_aux_dev aux_dev = {
  1515. .dlc = COMP_EMPTY(),
  1516. };
  1517. static struct snd_soc_card *sun8i_a23_codec_create_card(struct device *dev)
  1518. {
  1519. struct snd_soc_card *card;
  1520. int ret;
  1521. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1522. if (!card)
  1523. return ERR_PTR(-ENOMEM);
  1524. aux_dev.dlc.of_node = of_parse_phandle(dev->of_node,
  1525. "allwinner,codec-analog-controls",
  1526. 0);
  1527. if (!aux_dev.dlc.of_node) {
  1528. dev_err(dev, "Can't find analog controls for codec.\n");
  1529. return ERR_PTR(-EINVAL);
  1530. }
  1531. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1532. if (!card->dai_link)
  1533. return ERR_PTR(-ENOMEM);
  1534. card->dev = dev;
  1535. card->owner = THIS_MODULE;
  1536. card->name = "A23 Audio Codec";
  1537. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1538. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1539. card->dapm_routes = sun8i_codec_card_routes;
  1540. card->num_dapm_routes = ARRAY_SIZE(sun8i_codec_card_routes);
  1541. card->aux_dev = &aux_dev;
  1542. card->num_aux_devs = 1;
  1543. card->fully_routed = true;
  1544. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1545. if (ret)
  1546. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1547. return card;
  1548. };
  1549. static struct snd_soc_card *sun8i_h3_codec_create_card(struct device *dev)
  1550. {
  1551. struct snd_soc_card *card;
  1552. int ret;
  1553. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1554. if (!card)
  1555. return ERR_PTR(-ENOMEM);
  1556. aux_dev.dlc.of_node = of_parse_phandle(dev->of_node,
  1557. "allwinner,codec-analog-controls",
  1558. 0);
  1559. if (!aux_dev.dlc.of_node) {
  1560. dev_err(dev, "Can't find analog controls for codec.\n");
  1561. return ERR_PTR(-EINVAL);
  1562. }
  1563. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1564. if (!card->dai_link)
  1565. return ERR_PTR(-ENOMEM);
  1566. card->dev = dev;
  1567. card->owner = THIS_MODULE;
  1568. card->name = "H3 Audio Codec";
  1569. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1570. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1571. card->dapm_routes = sun8i_codec_card_routes;
  1572. card->num_dapm_routes = ARRAY_SIZE(sun8i_codec_card_routes);
  1573. card->aux_dev = &aux_dev;
  1574. card->num_aux_devs = 1;
  1575. card->fully_routed = true;
  1576. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1577. if (ret)
  1578. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1579. return card;
  1580. };
  1581. static struct snd_soc_card *sun8i_v3s_codec_create_card(struct device *dev)
  1582. {
  1583. struct snd_soc_card *card;
  1584. int ret;
  1585. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1586. if (!card)
  1587. return ERR_PTR(-ENOMEM);
  1588. aux_dev.dlc.of_node = of_parse_phandle(dev->of_node,
  1589. "allwinner,codec-analog-controls",
  1590. 0);
  1591. if (!aux_dev.dlc.of_node) {
  1592. dev_err(dev, "Can't find analog controls for codec.\n");
  1593. return ERR_PTR(-EINVAL);
  1594. }
  1595. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1596. if (!card->dai_link)
  1597. return ERR_PTR(-ENOMEM);
  1598. card->dev = dev;
  1599. card->owner = THIS_MODULE;
  1600. card->name = "V3s Audio Codec";
  1601. card->dapm_widgets = sun6i_codec_card_dapm_widgets;
  1602. card->num_dapm_widgets = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
  1603. card->dapm_routes = sun8i_codec_card_routes;
  1604. card->num_dapm_routes = ARRAY_SIZE(sun8i_codec_card_routes);
  1605. card->aux_dev = &aux_dev;
  1606. card->num_aux_devs = 1;
  1607. card->fully_routed = true;
  1608. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1609. if (ret)
  1610. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1611. return card;
  1612. };
  1613. static const struct snd_kcontrol_new sun50i_h616_codec_codec_controls[] = {
  1614. SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
  1615. SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
  1616. sun6i_codec_dvol_scale),
  1617. SOC_SINGLE_TLV("Line Out Playback Volume",
  1618. SUN50I_H616_DAC_AC_DAC_REG,
  1619. SUN50I_H616_LINEOUT_VOL, 0x1f, 0,
  1620. sun6i_codec_lineout_vol_scale),
  1621. SOC_DOUBLE("Line Out Playback Switch",
  1622. SUN50I_H616_DAC_AC_DAC_REG,
  1623. SUN50I_H616_LINEOUTL_EN,
  1624. SUN50I_H616_LINEOUTR_EN, 1, 0),
  1625. };
  1626. static const struct snd_kcontrol_new sun50i_h616_codec_mixer_controls[] = {
  1627. SOC_DAPM_DOUBLE("DAC Playback Switch",
  1628. SUN50I_H616_DAC_AC_MIXER_REG,
  1629. SUN50I_H616_LMIX_LDAC,
  1630. SUN50I_H616_RMIX_RDAC, 1, 0),
  1631. SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
  1632. SUN50I_H616_DAC_AC_MIXER_REG,
  1633. SUN50I_H616_LMIX_RDAC,
  1634. SUN50I_H616_RMIX_LDAC, 1, 0),
  1635. };
  1636. static SOC_ENUM_DOUBLE_DECL(sun50i_h616_codec_lineout_src_enum,
  1637. SUN50I_H616_DAC_AC_DAC_REG,
  1638. SUN50I_H616_LINEOUTL_SEL,
  1639. SUN50I_H616_LINEOUTR_SEL,
  1640. sun6i_codec_lineout_src_enum_text);
  1641. static const struct snd_kcontrol_new sun50i_h616_codec_lineout_src[] = {
  1642. SOC_DAPM_ENUM("Line Out Source Playback Route",
  1643. sun50i_h616_codec_lineout_src_enum),
  1644. };
  1645. static const struct snd_soc_dapm_widget sun50i_h616_codec_codec_widgets[] = {
  1646. /* Digital parts of the DACs */
  1647. SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
  1648. SUN4I_CODEC_DAC_DPC_EN_DA, 0,
  1649. NULL, 0),
  1650. /* Analog parts of the DACs */
  1651. SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
  1652. SUN50I_H616_DAC_AC_DAC_REG,
  1653. SUN50I_H616_DAC_LEN, 0),
  1654. SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
  1655. SUN50I_H616_DAC_AC_DAC_REG,
  1656. SUN50I_H616_DAC_REN, 0),
  1657. /* Mixers */
  1658. SOC_MIXER_ARRAY("Left Mixer", SUN50I_H616_DAC_AC_MIXER_REG,
  1659. SUN50I_H616_LMIXEN, 0,
  1660. sun50i_h616_codec_mixer_controls),
  1661. SOC_MIXER_ARRAY("Right Mixer", SUN50I_H616_DAC_AC_MIXER_REG,
  1662. SUN50I_H616_RMIXEN, 0,
  1663. sun50i_h616_codec_mixer_controls),
  1664. /* Line Out path */
  1665. SND_SOC_DAPM_MUX("Line Out Source Playback Route",
  1666. SND_SOC_NOPM, 0, 0, sun50i_h616_codec_lineout_src),
  1667. SND_SOC_DAPM_OUT_DRV("Line Out Ramp Controller",
  1668. SUN50I_H616_DAC_AC_RAMP_REG,
  1669. SUN50I_H616_RDEN, 0, NULL, 0),
  1670. SND_SOC_DAPM_OUTPUT("LINEOUT"),
  1671. };
  1672. static const struct snd_soc_component_driver sun50i_h616_codec_codec = {
  1673. .controls = sun50i_h616_codec_codec_controls,
  1674. .num_controls = ARRAY_SIZE(sun50i_h616_codec_codec_controls),
  1675. .dapm_widgets = sun50i_h616_codec_codec_widgets,
  1676. .num_dapm_widgets = ARRAY_SIZE(sun50i_h616_codec_codec_widgets),
  1677. .idle_bias_on = 1,
  1678. .use_pmdown_time = 1,
  1679. .endianness = 1,
  1680. };
  1681. static const struct snd_kcontrol_new sun50i_h616_card_controls[] = {
  1682. SOC_DAPM_PIN_SWITCH("Speaker"),
  1683. };
  1684. static const struct snd_soc_dapm_widget sun50i_h616_codec_card_dapm_widgets[] = {
  1685. SND_SOC_DAPM_HP("Headphone", NULL),
  1686. SND_SOC_DAPM_LINE("Line Out", NULL),
  1687. SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
  1688. };
  1689. /* Connect digital side enables to analog side widgets */
  1690. static const struct snd_soc_dapm_route sun50i_h616_codec_card_routes[] = {
  1691. /* DAC Routes */
  1692. { "Left DAC", NULL, "DAC Enable" },
  1693. { "Right DAC", NULL, "DAC Enable" },
  1694. /* Left Mixer Routes */
  1695. { "Left Mixer", "DAC Playback Switch", "Left DAC" },
  1696. { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
  1697. /* Right Mixer Routes */
  1698. { "Right Mixer", "DAC Playback Switch", "Right DAC" },
  1699. { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
  1700. /* Line Out Routes */
  1701. { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
  1702. { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
  1703. { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
  1704. { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
  1705. { "Line Out Ramp Controller", NULL, "Line Out Source Playback Route" },
  1706. { "LINEOUT", NULL, "Line Out Ramp Controller" },
  1707. };
  1708. static struct snd_soc_card *sun50i_h616_codec_create_card(struct device *dev)
  1709. {
  1710. struct snd_soc_card *card;
  1711. int ret;
  1712. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1713. if (!card)
  1714. return ERR_PTR(-ENOMEM);
  1715. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1716. if (!card->dai_link)
  1717. return ERR_PTR(-ENOMEM);
  1718. card->dai_link->playback_only = true;
  1719. card->dai_link->capture_only = false;
  1720. card->dev = dev;
  1721. card->owner = THIS_MODULE;
  1722. card->name = "H616 Audio Codec";
  1723. card->long_name = "h616-audio-codec";
  1724. card->driver_name = "sun4i-codec";
  1725. card->controls = sun50i_h616_card_controls;
  1726. card->num_controls = ARRAY_SIZE(sun50i_h616_card_controls);
  1727. card->dapm_widgets = sun50i_h616_codec_card_dapm_widgets;
  1728. card->num_dapm_widgets = ARRAY_SIZE(sun50i_h616_codec_card_dapm_widgets);
  1729. card->dapm_routes = sun50i_h616_codec_card_routes;
  1730. card->num_dapm_routes = ARRAY_SIZE(sun50i_h616_codec_card_routes);
  1731. card->fully_routed = true;
  1732. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1733. if (ret)
  1734. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1735. return card;
  1736. };
  1737. static const struct snd_soc_dapm_widget suniv_codec_card_dapm_widgets[] = {
  1738. SND_SOC_DAPM_HP("Headphone", NULL),
  1739. SND_SOC_DAPM_LINE("Line In", NULL),
  1740. SND_SOC_DAPM_LINE("Right FM In", NULL),
  1741. SND_SOC_DAPM_LINE("Left FM In", NULL),
  1742. SND_SOC_DAPM_MIC("Mic", NULL),
  1743. SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
  1744. };
  1745. /* Connect digital side enables to analog side widgets */
  1746. static const struct snd_soc_dapm_route suniv_codec_card_routes[] = {
  1747. /* ADC Routes */
  1748. { "ADC", NULL, "ADC Enable" },
  1749. { "Codec Capture", NULL, "ADC" },
  1750. /* DAC Routes */
  1751. { "Left DAC", NULL, "DAC Enable" },
  1752. { "Right DAC", NULL, "DAC Enable" },
  1753. { "Left DAC", NULL, "Codec Playback" },
  1754. { "Right DAC", NULL, "Codec Playback" },
  1755. };
  1756. static struct snd_soc_card *suniv_codec_create_card(struct device *dev)
  1757. {
  1758. struct snd_soc_card *card;
  1759. int ret;
  1760. card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
  1761. if (!card)
  1762. return ERR_PTR(-ENOMEM);
  1763. card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
  1764. if (!card->dai_link)
  1765. return ERR_PTR(-ENOMEM);
  1766. card->dev = dev;
  1767. card->name = "F1C100s Audio Codec";
  1768. card->dapm_widgets = suniv_codec_card_dapm_widgets;
  1769. card->num_dapm_widgets = ARRAY_SIZE(suniv_codec_card_dapm_widgets);
  1770. card->dapm_routes = suniv_codec_card_routes;
  1771. card->num_dapm_routes = ARRAY_SIZE(suniv_codec_card_routes);
  1772. card->fully_routed = true;
  1773. ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
  1774. if (ret)
  1775. dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
  1776. return card;
  1777. };
  1778. static const struct regmap_config sun4i_codec_regmap_config = {
  1779. .reg_bits = 32,
  1780. .reg_stride = 4,
  1781. .val_bits = 32,
  1782. .max_register = SUN4I_CODEC_ADC_RXCNT,
  1783. };
  1784. static const struct regmap_config sun6i_codec_regmap_config = {
  1785. .reg_bits = 32,
  1786. .reg_stride = 4,
  1787. .val_bits = 32,
  1788. .max_register = SUN6I_CODEC_HMIC_DATA,
  1789. };
  1790. static const struct regmap_config sun7i_codec_regmap_config = {
  1791. .reg_bits = 32,
  1792. .reg_stride = 4,
  1793. .val_bits = 32,
  1794. .max_register = SUN7I_CODEC_AC_MIC_PHONE_CAL,
  1795. };
  1796. static const struct regmap_config sun8i_a23_codec_regmap_config = {
  1797. .reg_bits = 32,
  1798. .reg_stride = 4,
  1799. .val_bits = 32,
  1800. .max_register = SUN8I_A23_CODEC_ADC_RXCNT,
  1801. };
  1802. static const struct regmap_config sun8i_h3_codec_regmap_config = {
  1803. .reg_bits = 32,
  1804. .reg_stride = 4,
  1805. .val_bits = 32,
  1806. .max_register = SUN8I_H3_CODEC_ADC_DBG,
  1807. };
  1808. static const struct regmap_config sun8i_v3s_codec_regmap_config = {
  1809. .reg_bits = 32,
  1810. .reg_stride = 4,
  1811. .val_bits = 32,
  1812. .max_register = SUN8I_H3_CODEC_ADC_DBG,
  1813. };
  1814. static const struct regmap_config sun50i_h616_codec_regmap_config = {
  1815. .reg_bits = 32,
  1816. .reg_stride = 4,
  1817. .val_bits = 32,
  1818. .max_register = SUN50I_H616_DAC_AC_RAMP_REG,
  1819. .cache_type = REGCACHE_NONE,
  1820. };
  1821. static const struct regmap_config suniv_codec_regmap_config = {
  1822. .reg_bits = 32,
  1823. .reg_stride = 4,
  1824. .val_bits = 32,
  1825. .max_register = SUNIV_CODEC_ADC_DBG,
  1826. };
  1827. struct sun4i_codec_quirks {
  1828. const struct regmap_config *regmap_config;
  1829. const struct snd_soc_component_driver *codec;
  1830. struct snd_soc_card * (*create_card)(struct device *dev);
  1831. struct reg_field reg_adc_fifoc; /* used for regmap_field */
  1832. struct reg_field reg_dac_fifoc; /* used for regmap_field */
  1833. unsigned int reg_dac_txdata; /* TX FIFO offset for DMA config */
  1834. unsigned int reg_adc_rxdata; /* RX FIFO offset for DMA config */
  1835. bool has_reset;
  1836. bool playback_only;
  1837. u32 dma_max_burst;
  1838. };
  1839. static const struct sun4i_codec_quirks sun4i_codec_quirks = {
  1840. .regmap_config = &sun4i_codec_regmap_config,
  1841. .codec = &sun4i_codec_codec,
  1842. .create_card = sun4i_codec_create_card,
  1843. .reg_adc_fifoc = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
  1844. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1845. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1846. .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
  1847. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1848. };
  1849. static const struct sun4i_codec_quirks sun6i_a31_codec_quirks = {
  1850. .regmap_config = &sun6i_codec_regmap_config,
  1851. .codec = &sun6i_codec_codec,
  1852. .create_card = sun6i_codec_create_card,
  1853. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1854. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1855. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1856. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1857. .has_reset = true,
  1858. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1859. };
  1860. static const struct sun4i_codec_quirks sun7i_codec_quirks = {
  1861. .regmap_config = &sun7i_codec_regmap_config,
  1862. .codec = &sun7i_codec_codec,
  1863. .create_card = sun4i_codec_create_card,
  1864. .reg_adc_fifoc = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
  1865. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1866. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1867. .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
  1868. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1869. };
  1870. static const struct sun4i_codec_quirks sun8i_a23_codec_quirks = {
  1871. .regmap_config = &sun8i_a23_codec_regmap_config,
  1872. .codec = &sun8i_a23_codec_codec,
  1873. .create_card = sun8i_a23_codec_create_card,
  1874. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1875. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1876. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1877. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1878. .has_reset = true,
  1879. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1880. };
  1881. static const struct sun4i_codec_quirks sun8i_h3_codec_quirks = {
  1882. .regmap_config = &sun8i_h3_codec_regmap_config,
  1883. /*
  1884. * TODO Share the codec structure with A23 for now.
  1885. * This should be split out when adding digital audio
  1886. * processing support for the H3.
  1887. */
  1888. .codec = &sun8i_a23_codec_codec,
  1889. .create_card = sun8i_h3_codec_create_card,
  1890. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1891. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1892. .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
  1893. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1894. .has_reset = true,
  1895. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1896. };
  1897. static const struct sun4i_codec_quirks sun8i_v3s_codec_quirks = {
  1898. .regmap_config = &sun8i_v3s_codec_regmap_config,
  1899. /*
  1900. * TODO The codec structure should be split out, like
  1901. * H3, when adding digital audio processing support.
  1902. */
  1903. .codec = &sun8i_a23_codec_codec,
  1904. .create_card = sun8i_v3s_codec_create_card,
  1905. .reg_adc_fifoc = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
  1906. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1907. .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
  1908. .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
  1909. .has_reset = true,
  1910. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1911. };
  1912. static const struct sun4i_codec_quirks sun50i_h616_codec_quirks = {
  1913. .regmap_config = &sun50i_h616_codec_regmap_config,
  1914. .codec = &sun50i_h616_codec_codec,
  1915. .create_card = sun50i_h616_codec_create_card,
  1916. .reg_dac_fifoc = REG_FIELD(SUN50I_H616_CODEC_DAC_FIFOC, 0, 31),
  1917. .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
  1918. .has_reset = true,
  1919. .dma_max_burst = SUN4I_DMA_MAX_BURST,
  1920. };
  1921. static const struct sun4i_codec_quirks suniv_f1c100s_codec_quirks = {
  1922. .regmap_config = &suniv_codec_regmap_config,
  1923. .codec = &suniv_codec_codec,
  1924. .create_card = suniv_codec_create_card,
  1925. .reg_adc_fifoc = REG_FIELD(SUNIV_CODEC_ADC_FIFOC, 0, 31),
  1926. .reg_dac_fifoc = REG_FIELD(SUN4I_CODEC_DAC_FIFOC, 0, 31),
  1927. .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
  1928. .reg_adc_rxdata = SUNIV_CODEC_ADC_RXDATA,
  1929. .has_reset = true,
  1930. .dma_max_burst = SUNIV_DMA_MAX_BURST,
  1931. };
  1932. static const struct of_device_id sun4i_codec_of_match[] = {
  1933. {
  1934. .compatible = "allwinner,sun4i-a10-codec",
  1935. .data = &sun4i_codec_quirks,
  1936. },
  1937. {
  1938. .compatible = "allwinner,sun6i-a31-codec",
  1939. .data = &sun6i_a31_codec_quirks,
  1940. },
  1941. {
  1942. .compatible = "allwinner,sun7i-a20-codec",
  1943. .data = &sun7i_codec_quirks,
  1944. },
  1945. {
  1946. .compatible = "allwinner,sun8i-a23-codec",
  1947. .data = &sun8i_a23_codec_quirks,
  1948. },
  1949. {
  1950. .compatible = "allwinner,sun8i-h3-codec",
  1951. .data = &sun8i_h3_codec_quirks,
  1952. },
  1953. {
  1954. .compatible = "allwinner,sun8i-v3s-codec",
  1955. .data = &sun8i_v3s_codec_quirks,
  1956. },
  1957. {
  1958. .compatible = "allwinner,sun50i-h616-codec",
  1959. .data = &sun50i_h616_codec_quirks,
  1960. },
  1961. {
  1962. .compatible = "allwinner,suniv-f1c100s-codec",
  1963. .data = &suniv_f1c100s_codec_quirks,
  1964. },
  1965. {}
  1966. };
  1967. MODULE_DEVICE_TABLE(of, sun4i_codec_of_match);
  1968. static int sun4i_codec_probe(struct platform_device *pdev)
  1969. {
  1970. struct snd_soc_card *card;
  1971. struct sun4i_codec *scodec;
  1972. const struct sun4i_codec_quirks *quirks;
  1973. struct resource *res;
  1974. void __iomem *base;
  1975. int ret;
  1976. scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
  1977. if (!scodec)
  1978. return -ENOMEM;
  1979. scodec->dev = &pdev->dev;
  1980. base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
  1981. if (IS_ERR(base))
  1982. return PTR_ERR(base);
  1983. quirks = of_device_get_match_data(&pdev->dev);
  1984. if (quirks == NULL) {
  1985. dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
  1986. return -ENODEV;
  1987. }
  1988. scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
  1989. quirks->regmap_config);
  1990. if (IS_ERR(scodec->regmap)) {
  1991. dev_err(&pdev->dev, "Failed to create our regmap\n");
  1992. return PTR_ERR(scodec->regmap);
  1993. }
  1994. /* Get the clocks from the DT */
  1995. scodec->clk_apb = devm_clk_get_enabled(&pdev->dev, "apb");
  1996. if (IS_ERR(scodec->clk_apb)) {
  1997. dev_err(&pdev->dev, "Failed to get the APB clock\n");
  1998. return PTR_ERR(scodec->clk_apb);
  1999. }
  2000. scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
  2001. if (IS_ERR(scodec->clk_module)) {
  2002. dev_err(&pdev->dev, "Failed to get the module clock\n");
  2003. return PTR_ERR(scodec->clk_module);
  2004. }
  2005. if (quirks->has_reset) {
  2006. scodec->rst = devm_reset_control_get_exclusive_deasserted(&pdev->dev, NULL);
  2007. if (IS_ERR(scodec->rst)) {
  2008. dev_err(&pdev->dev, "Failed to get reset control\n");
  2009. return PTR_ERR(scodec->rst);
  2010. }
  2011. }
  2012. scodec->gpio_pa = devm_gpiod_get_optional(&pdev->dev, "allwinner,pa",
  2013. GPIOD_OUT_LOW);
  2014. if (IS_ERR(scodec->gpio_pa)) {
  2015. ret = PTR_ERR(scodec->gpio_pa);
  2016. dev_err_probe(&pdev->dev, ret, "Failed to get pa gpio\n");
  2017. return ret;
  2018. }
  2019. scodec->gpio_hp = devm_gpiod_get_optional(&pdev->dev, "hp-det", GPIOD_IN);
  2020. if (IS_ERR(scodec->gpio_hp)) {
  2021. ret = PTR_ERR(scodec->gpio_hp);
  2022. dev_err_probe(&pdev->dev, ret, "Failed to get hp-det gpio\n");
  2023. return ret;
  2024. }
  2025. /* reg_field setup */
  2026. scodec->reg_adc_fifoc = devm_regmap_field_alloc(&pdev->dev,
  2027. scodec->regmap,
  2028. quirks->reg_adc_fifoc);
  2029. if (IS_ERR(scodec->reg_adc_fifoc)) {
  2030. ret = PTR_ERR(scodec->reg_adc_fifoc);
  2031. dev_err(&pdev->dev, "Failed to create regmap fields: %d\n",
  2032. ret);
  2033. return ret;
  2034. }
  2035. scodec->reg_dac_fifoc = devm_regmap_field_alloc(&pdev->dev,
  2036. scodec->regmap,
  2037. quirks->reg_dac_fifoc);
  2038. if (IS_ERR(scodec->reg_dac_fifoc)) {
  2039. ret = PTR_ERR(scodec->reg_dac_fifoc);
  2040. dev_err(&pdev->dev, "Failed to create regmap fields: %d\n",
  2041. ret);
  2042. return ret;
  2043. }
  2044. /* DMA configuration for TX FIFO */
  2045. scodec->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
  2046. scodec->playback_dma_data.maxburst = quirks->dma_max_burst;
  2047. scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  2048. if (!quirks->playback_only) {
  2049. /* DMA configuration for RX FIFO */
  2050. scodec->capture_dma_data.addr = res->start +
  2051. quirks->reg_adc_rxdata;
  2052. scodec->capture_dma_data.maxburst = quirks->dma_max_burst;
  2053. scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
  2054. }
  2055. ret = devm_snd_soc_register_component(&pdev->dev, quirks->codec,
  2056. &sun4i_codec_dai, 1);
  2057. if (ret) {
  2058. dev_err(&pdev->dev, "Failed to register our codec\n");
  2059. return ret;
  2060. }
  2061. ret = devm_snd_soc_register_component(&pdev->dev,
  2062. &sun4i_codec_component,
  2063. &dummy_cpu_dai, 1);
  2064. if (ret) {
  2065. dev_err(&pdev->dev, "Failed to register our DAI\n");
  2066. return ret;
  2067. }
  2068. ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
  2069. if (ret) {
  2070. dev_err(&pdev->dev, "Failed to register against DMAEngine\n");
  2071. return ret;
  2072. }
  2073. card = quirks->create_card(&pdev->dev);
  2074. if (IS_ERR(card)) {
  2075. ret = PTR_ERR(card);
  2076. dev_err(&pdev->dev, "Failed to create our card\n");
  2077. return ret;
  2078. }
  2079. snd_soc_card_set_drvdata(card, scodec);
  2080. ret = snd_soc_register_card(card);
  2081. if (ret) {
  2082. dev_err_probe(&pdev->dev, ret, "Failed to register our card\n");
  2083. return ret;
  2084. }
  2085. return 0;
  2086. }
  2087. static void sun4i_codec_remove(struct platform_device *pdev)
  2088. {
  2089. struct snd_soc_card *card = platform_get_drvdata(pdev);
  2090. snd_soc_unregister_card(card);
  2091. }
  2092. static struct platform_driver sun4i_codec_driver = {
  2093. .driver = {
  2094. .name = "sun4i-codec",
  2095. .of_match_table = sun4i_codec_of_match,
  2096. },
  2097. .probe = sun4i_codec_probe,
  2098. .remove = sun4i_codec_remove,
  2099. };
  2100. module_platform_driver(sun4i_codec_driver);
  2101. MODULE_DESCRIPTION("Allwinner A10 codec driver");
  2102. MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
  2103. MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
  2104. MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
  2105. MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
  2106. MODULE_AUTHOR("Ryan Walklin <ryan@testtoast.com");
  2107. MODULE_AUTHOR("Mesih Kilinc <mesikilinc@gmail.com>");
  2108. MODULE_LICENSE("GPL");