ipc3-pcm.c 14 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
  2. //
  3. // This file is provided under a dual BSD/GPLv2 license. When using or
  4. // redistributing this file, you may do so under either license.
  5. //
  6. // Copyright(c) 2021 Intel Corporation
  7. //
  8. //
  9. #include <sound/pcm_params.h>
  10. #include "ipc3-priv.h"
  11. #include "ops.h"
  12. #include "sof-priv.h"
  13. #include "sof-audio.h"
  14. static int sof_ipc3_pcm_hw_free(struct snd_soc_component *component,
  15. struct snd_pcm_substream *substream)
  16. {
  17. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  18. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  19. struct sof_ipc_stream stream;
  20. struct snd_sof_pcm *spcm;
  21. spcm = snd_sof_find_spcm_dai(component, rtd);
  22. if (!spcm)
  23. return -EINVAL;
  24. if (!spcm->prepared[substream->stream])
  25. return 0;
  26. stream.hdr.size = sizeof(stream);
  27. stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_PCM_FREE;
  28. stream.comp_id = spcm->stream[substream->stream].comp_id;
  29. /* send IPC to the DSP */
  30. return sof_ipc_tx_message_no_reply(sdev->ipc, &stream, sizeof(stream));
  31. }
  32. static int sof_ipc3_pcm_hw_params(struct snd_soc_component *component,
  33. struct snd_pcm_substream *substream,
  34. struct snd_pcm_hw_params *params,
  35. struct snd_sof_platform_stream_params *platform_params)
  36. {
  37. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  38. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  39. struct sof_ipc_fw_version *v = &sdev->fw_ready.version;
  40. struct snd_pcm_runtime *runtime = substream->runtime;
  41. struct sof_ipc_pcm_params_reply ipc_params_reply;
  42. struct sof_ipc_pcm_params pcm;
  43. struct snd_sof_pcm *spcm;
  44. int ret;
  45. spcm = snd_sof_find_spcm_dai(component, rtd);
  46. if (!spcm)
  47. return -EINVAL;
  48. memset(&pcm, 0, sizeof(pcm));
  49. /* number of pages should be rounded up */
  50. pcm.params.buffer.pages = PFN_UP(runtime->dma_bytes);
  51. /* set IPC PCM parameters */
  52. pcm.hdr.size = sizeof(pcm);
  53. pcm.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_PCM_PARAMS;
  54. pcm.comp_id = spcm->stream[substream->stream].comp_id;
  55. pcm.params.hdr.size = sizeof(pcm.params);
  56. pcm.params.buffer.phy_addr = spcm->stream[substream->stream].page_table.addr;
  57. pcm.params.buffer.size = runtime->dma_bytes;
  58. pcm.params.direction = substream->stream;
  59. pcm.params.sample_valid_bytes = params_width(params) >> 3;
  60. pcm.params.buffer_fmt = SOF_IPC_BUFFER_INTERLEAVED;
  61. pcm.params.rate = params_rate(params);
  62. pcm.params.channels = params_channels(params);
  63. pcm.params.host_period_bytes = params_period_bytes(params);
  64. /* container size */
  65. ret = snd_pcm_format_physical_width(params_format(params));
  66. if (ret < 0)
  67. return ret;
  68. pcm.params.sample_container_bytes = ret >> 3;
  69. /* format */
  70. switch (params_format(params)) {
  71. case SNDRV_PCM_FORMAT_S16:
  72. pcm.params.frame_fmt = SOF_IPC_FRAME_S16_LE;
  73. break;
  74. case SNDRV_PCM_FORMAT_S24:
  75. pcm.params.frame_fmt = SOF_IPC_FRAME_S24_4LE;
  76. break;
  77. case SNDRV_PCM_FORMAT_S32:
  78. pcm.params.frame_fmt = SOF_IPC_FRAME_S32_LE;
  79. break;
  80. case SNDRV_PCM_FORMAT_FLOAT:
  81. pcm.params.frame_fmt = SOF_IPC_FRAME_FLOAT;
  82. break;
  83. default:
  84. return -EINVAL;
  85. }
  86. /* Update the IPC message with information from the platform */
  87. pcm.params.stream_tag = platform_params->stream_tag;
  88. if (platform_params->use_phy_address)
  89. pcm.params.buffer.phy_addr = platform_params->phy_addr;
  90. if (platform_params->no_ipc_position) {
  91. /* For older ABIs set host_period_bytes to zero to inform
  92. * FW we don't want position updates. Newer versions use
  93. * no_stream_position for this purpose.
  94. */
  95. if (v->abi_version < SOF_ABI_VER(3, 10, 0))
  96. pcm.params.host_period_bytes = 0;
  97. else
  98. pcm.params.no_stream_position = 1;
  99. }
  100. if (platform_params->cont_update_posn)
  101. pcm.params.cont_update_posn = 1;
  102. spcm_dbg(spcm, substream->stream, "stream_tag %d\n",
  103. pcm.params.stream_tag);
  104. /* send hw_params IPC to the DSP */
  105. ret = sof_ipc_tx_message(sdev->ipc, &pcm, sizeof(pcm),
  106. &ipc_params_reply, sizeof(ipc_params_reply));
  107. if (ret < 0) {
  108. spcm_err(spcm, substream->stream,
  109. "STREAM_PCM_PARAMS ipc failed for stream_tag %d\n",
  110. pcm.params.stream_tag);
  111. return ret;
  112. }
  113. ret = snd_sof_set_stream_data_offset(sdev, &spcm->stream[substream->stream],
  114. ipc_params_reply.posn_offset);
  115. if (ret < 0) {
  116. spcm_err(spcm, substream->stream, "invalid stream data offset\n");
  117. return ret;
  118. }
  119. return ret;
  120. }
  121. static int sof_ipc3_pcm_trigger(struct snd_soc_component *component,
  122. struct snd_pcm_substream *substream, int cmd)
  123. {
  124. struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
  125. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  126. struct sof_ipc_stream stream;
  127. struct snd_sof_pcm *spcm;
  128. spcm = snd_sof_find_spcm_dai(component, rtd);
  129. if (!spcm)
  130. return -EINVAL;
  131. stream.hdr.size = sizeof(stream);
  132. stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG;
  133. stream.comp_id = spcm->stream[substream->stream].comp_id;
  134. switch (cmd) {
  135. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  136. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_PAUSE;
  137. break;
  138. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  139. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_RELEASE;
  140. break;
  141. case SNDRV_PCM_TRIGGER_START:
  142. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_START;
  143. break;
  144. case SNDRV_PCM_TRIGGER_SUSPEND:
  145. fallthrough;
  146. case SNDRV_PCM_TRIGGER_STOP:
  147. stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_STOP;
  148. break;
  149. default:
  150. spcm_err(spcm, substream->stream, "Unhandled trigger cmd %d\n", cmd);
  151. return -EINVAL;
  152. }
  153. /* send IPC to the DSP */
  154. return sof_ipc_tx_message_no_reply(sdev->ipc, &stream, sizeof(stream));
  155. }
  156. static void ssp_dai_config_pcm_params_match(struct snd_sof_dev *sdev, const char *link_name,
  157. struct snd_pcm_hw_params *params)
  158. {
  159. struct sof_ipc_dai_config *config;
  160. struct snd_sof_dai *dai;
  161. int i;
  162. /*
  163. * Search for all matching DAIs as we can have both playback and capture DAI
  164. * associated with the same link.
  165. */
  166. list_for_each_entry(dai, &sdev->dai_list, list) {
  167. if (!dai->name || strcmp(link_name, dai->name))
  168. continue;
  169. for (i = 0; i < dai->number_configs; i++) {
  170. struct sof_dai_private_data *private = dai->private;
  171. config = &private->dai_config[i];
  172. if (config->ssp.fsync_rate == params_rate(params)) {
  173. dev_dbg(sdev->dev, "DAI config %d matches pcm hw params\n", i);
  174. dai->current_config = i;
  175. break;
  176. }
  177. }
  178. }
  179. }
  180. static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd,
  181. struct snd_pcm_hw_params *params)
  182. {
  183. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, SOF_AUDIO_PCM_DRV_NAME);
  184. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  185. struct snd_sof_dai *dai = snd_sof_find_dai(component, (char *)rtd->dai_link->name);
  186. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  187. struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
  188. struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component);
  189. struct sof_dai_private_data *private;
  190. struct snd_soc_dpcm *dpcm;
  191. if (!dai) {
  192. dev_err(component->dev, "%s: No DAI found with name %s\n", __func__,
  193. rtd->dai_link->name);
  194. return -EINVAL;
  195. }
  196. private = dai->private;
  197. if (!private) {
  198. dev_err(component->dev, "%s: No private data found for DAI %s\n", __func__,
  199. rtd->dai_link->name);
  200. return -EINVAL;
  201. }
  202. /* read format from topology */
  203. snd_mask_none(fmt);
  204. switch (private->comp_dai->config.frame_fmt) {
  205. case SOF_IPC_FRAME_S16_LE:
  206. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE);
  207. break;
  208. case SOF_IPC_FRAME_S24_4LE:
  209. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE);
  210. break;
  211. case SOF_IPC_FRAME_S32_LE:
  212. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE);
  213. break;
  214. default:
  215. dev_err(component->dev, "No available DAI format!\n");
  216. return -EINVAL;
  217. }
  218. /* read rate and channels from topology */
  219. switch (private->dai_config->type) {
  220. case SOF_DAI_INTEL_SSP:
  221. /* search for config to pcm params match, if not found use default */
  222. ssp_dai_config_pcm_params_match(sdev, (char *)rtd->dai_link->name, params);
  223. rate->min = private->dai_config[dai->current_config].ssp.fsync_rate;
  224. rate->max = private->dai_config[dai->current_config].ssp.fsync_rate;
  225. channels->min = private->dai_config[dai->current_config].ssp.tdm_slots;
  226. channels->max = private->dai_config[dai->current_config].ssp.tdm_slots;
  227. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  228. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  229. channels->min, channels->max);
  230. break;
  231. case SOF_DAI_INTEL_DMIC:
  232. /* DMIC only supports 16 or 32 bit formats */
  233. if (private->comp_dai->config.frame_fmt == SOF_IPC_FRAME_S24_4LE) {
  234. dev_err(component->dev, "Invalid fmt %d for DAI type %d\n",
  235. private->comp_dai->config.frame_fmt,
  236. private->dai_config->type);
  237. }
  238. break;
  239. case SOF_DAI_INTEL_HDA:
  240. /*
  241. * HDAudio does not follow the default trigger
  242. * sequence due to firmware implementation
  243. */
  244. for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) {
  245. struct snd_soc_pcm_runtime *fe = dpcm->fe;
  246. fe->dai_link->trigger[SNDRV_PCM_STREAM_PLAYBACK] =
  247. SND_SOC_DPCM_TRIGGER_POST;
  248. }
  249. break;
  250. case SOF_DAI_INTEL_ALH:
  251. /*
  252. * Dai could run with different channel count compared with
  253. * front end, so get dai channel count from topology
  254. */
  255. channels->min = private->dai_config->alh.channels;
  256. channels->max = private->dai_config->alh.channels;
  257. break;
  258. case SOF_DAI_IMX_ESAI:
  259. rate->min = private->dai_config->esai.fsync_rate;
  260. rate->max = private->dai_config->esai.fsync_rate;
  261. channels->min = private->dai_config->esai.tdm_slots;
  262. channels->max = private->dai_config->esai.tdm_slots;
  263. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  264. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  265. channels->min, channels->max);
  266. break;
  267. case SOF_DAI_MEDIATEK_AFE:
  268. rate->min = private->dai_config->afe.rate;
  269. rate->max = private->dai_config->afe.rate;
  270. channels->min = private->dai_config->afe.channels;
  271. channels->max = private->dai_config->afe.channels;
  272. snd_mask_none(fmt);
  273. switch (private->dai_config->afe.format) {
  274. case SOF_IPC_FRAME_S16_LE:
  275. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE);
  276. break;
  277. case SOF_IPC_FRAME_S24_4LE:
  278. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE);
  279. break;
  280. case SOF_IPC_FRAME_S32_LE:
  281. snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE);
  282. break;
  283. default:
  284. dev_err(component->dev, "Not available format!\n");
  285. return -EINVAL;
  286. }
  287. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  288. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  289. channels->min, channels->max);
  290. break;
  291. case SOF_DAI_IMX_SAI:
  292. rate->min = private->dai_config->sai.fsync_rate;
  293. rate->max = private->dai_config->sai.fsync_rate;
  294. channels->min = private->dai_config->sai.tdm_slots;
  295. channels->max = private->dai_config->sai.tdm_slots;
  296. dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max);
  297. dev_dbg(component->dev, "channels_min: %d channels_max: %d\n",
  298. channels->min, channels->max);
  299. break;
  300. case SOF_DAI_AMD_BT:
  301. rate->min = private->dai_config->acpbt.fsync_rate;
  302. rate->max = private->dai_config->acpbt.fsync_rate;
  303. channels->min = private->dai_config->acpbt.tdm_slots;
  304. channels->max = private->dai_config->acpbt.tdm_slots;
  305. dev_dbg(component->dev,
  306. "AMD_BT rate_min: %d rate_max: %d\n", rate->min, rate->max);
  307. dev_dbg(component->dev, "AMD_BT channels_min: %d channels_max: %d\n",
  308. channels->min, channels->max);
  309. break;
  310. case SOF_DAI_AMD_SP:
  311. case SOF_DAI_AMD_SP_VIRTUAL:
  312. rate->min = private->dai_config->acpsp.fsync_rate;
  313. rate->max = private->dai_config->acpsp.fsync_rate;
  314. channels->min = private->dai_config->acpsp.tdm_slots;
  315. channels->max = private->dai_config->acpsp.tdm_slots;
  316. dev_dbg(component->dev,
  317. "AMD_SP rate_min: %d rate_max: %d\n", rate->min, rate->max);
  318. dev_dbg(component->dev, "AMD_SP channels_min: %d channels_max: %d\n",
  319. channels->min, channels->max);
  320. break;
  321. case SOF_DAI_AMD_HS:
  322. case SOF_DAI_AMD_HS_VIRTUAL:
  323. rate->min = private->dai_config->acphs.fsync_rate;
  324. rate->max = private->dai_config->acphs.fsync_rate;
  325. channels->min = private->dai_config->acphs.tdm_slots;
  326. channels->max = private->dai_config->acphs.tdm_slots;
  327. dev_dbg(component->dev,
  328. "AMD_HS channel_max: %d rate_max: %d\n", channels->max, rate->max);
  329. break;
  330. case SOF_DAI_AMD_DMIC:
  331. rate->min = private->dai_config->acpdmic.pdm_rate;
  332. rate->max = private->dai_config->acpdmic.pdm_rate;
  333. channels->min = private->dai_config->acpdmic.pdm_ch;
  334. channels->max = private->dai_config->acpdmic.pdm_ch;
  335. dev_dbg(component->dev,
  336. "AMD_DMIC rate_min: %d rate_max: %d\n", rate->min, rate->max);
  337. dev_dbg(component->dev, "AMD_DMIC channels_min: %d channels_max: %d\n",
  338. channels->min, channels->max);
  339. break;
  340. case SOF_DAI_IMX_MICFIL:
  341. rate->min = private->dai_config->micfil.pdm_rate;
  342. rate->max = private->dai_config->micfil.pdm_rate;
  343. channels->min = private->dai_config->micfil.pdm_ch;
  344. channels->max = private->dai_config->micfil.pdm_ch;
  345. dev_dbg(component->dev,
  346. "MICFIL PDM rate_min: %d rate_max: %d\n", rate->min, rate->max);
  347. dev_dbg(component->dev, "MICFIL PDM channels_min: %d channels_max: %d\n",
  348. channels->min, channels->max);
  349. break;
  350. case SOF_DAI_AMD_SDW:
  351. /* change the default trigger sequence as per HW implementation */
  352. for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) {
  353. struct snd_soc_pcm_runtime *fe = dpcm->fe;
  354. fe->dai_link->trigger[SNDRV_PCM_STREAM_PLAYBACK] =
  355. SND_SOC_DPCM_TRIGGER_POST;
  356. }
  357. for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_CAPTURE, dpcm) {
  358. struct snd_soc_pcm_runtime *fe = dpcm->fe;
  359. fe->dai_link->trigger[SNDRV_PCM_STREAM_CAPTURE] =
  360. SND_SOC_DPCM_TRIGGER_POST;
  361. }
  362. rate->min = private->dai_config->acp_sdw.rate;
  363. rate->max = private->dai_config->acp_sdw.rate;
  364. channels->min = private->dai_config->acp_sdw.channels;
  365. channels->max = private->dai_config->acp_sdw.channels;
  366. dev_dbg(component->dev,
  367. "AMD_SDW rate_min: %d rate_max: %d\n", rate->min, rate->max);
  368. dev_dbg(component->dev, "AMD_SDW channels_min: %d channels_max: %d\n",
  369. channels->min, channels->max);
  370. break;
  371. default:
  372. dev_err(component->dev, "Invalid DAI type %d\n", private->dai_config->type);
  373. break;
  374. }
  375. return 0;
  376. }
  377. const struct sof_ipc_pcm_ops ipc3_pcm_ops = {
  378. .hw_params = sof_ipc3_pcm_hw_params,
  379. .hw_free = sof_ipc3_pcm_hw_free,
  380. .trigger = sof_ipc3_pcm_trigger,
  381. .dai_link_fixup = sof_ipc3_pcm_dai_link_fixup,
  382. .reset_hw_params_during_stop = true,
  383. .d0i3_supported_in_s0ix = true,
  384. };