crc32.h 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * crc32-mips.c - CRC32 and CRC32C using optional MIPSr6 instructions
  4. *
  5. * Module based on arm64/crypto/crc32-arm.c
  6. *
  7. * Copyright (C) 2014 Linaro Ltd <yazen.ghannam@linaro.org>
  8. * Copyright (C) 2018 MIPS Tech, LLC
  9. */
  10. #include <linux/cpufeature.h>
  11. #include <asm/mipsregs.h>
  12. #include <linux/unaligned.h>
  13. #ifndef TOOLCHAIN_SUPPORTS_CRC
  14. #define _ASM_SET_CRC(OP, SZ, TYPE) \
  15. _ASM_MACRO_3R(OP, rt, rs, rt2, \
  16. ".ifnc \\rt, \\rt2\n\t" \
  17. ".error \"invalid operands \\\"" #OP " \\rt,\\rs,\\rt2\\\"\"\n\t" \
  18. ".endif\n\t" \
  19. _ASM_INSN_IF_MIPS(0x7c00000f | (__rt << 16) | (__rs << 21) | \
  20. ((SZ) << 6) | ((TYPE) << 8)) \
  21. _ASM_INSN32_IF_MM(0x00000030 | (__rs << 16) | (__rt << 21) | \
  22. ((SZ) << 14) | ((TYPE) << 3)))
  23. #define _ASM_UNSET_CRC(op, SZ, TYPE) ".purgem " #op "\n\t"
  24. #else /* !TOOLCHAIN_SUPPORTS_CRC */
  25. #define _ASM_SET_CRC(op, SZ, TYPE) ".set\tcrc\n\t"
  26. #define _ASM_UNSET_CRC(op, SZ, TYPE)
  27. #endif
  28. #define __CRC32(crc, value, op, SZ, TYPE) \
  29. do { \
  30. __asm__ __volatile__( \
  31. ".set push\n\t" \
  32. _ASM_SET_CRC(op, SZ, TYPE) \
  33. #op " %0, %1, %0\n\t" \
  34. _ASM_UNSET_CRC(op, SZ, TYPE) \
  35. ".set pop" \
  36. : "+r" (crc) \
  37. : "r" (value)); \
  38. } while (0)
  39. #define _CRC32_crc32b(crc, value) __CRC32(crc, value, crc32b, 0, 0)
  40. #define _CRC32_crc32h(crc, value) __CRC32(crc, value, crc32h, 1, 0)
  41. #define _CRC32_crc32w(crc, value) __CRC32(crc, value, crc32w, 2, 0)
  42. #define _CRC32_crc32d(crc, value) __CRC32(crc, value, crc32d, 3, 0)
  43. #define _CRC32_crc32cb(crc, value) __CRC32(crc, value, crc32cb, 0, 1)
  44. #define _CRC32_crc32ch(crc, value) __CRC32(crc, value, crc32ch, 1, 1)
  45. #define _CRC32_crc32cw(crc, value) __CRC32(crc, value, crc32cw, 2, 1)
  46. #define _CRC32_crc32cd(crc, value) __CRC32(crc, value, crc32cd, 3, 1)
  47. #define _CRC32(crc, value, size, op) \
  48. _CRC32_##op##size(crc, value)
  49. #define CRC32(crc, value, size) \
  50. _CRC32(crc, value, size, crc32)
  51. #define CRC32C(crc, value, size) \
  52. _CRC32(crc, value, size, crc32c)
  53. static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32);
  54. static inline u32 crc32_le_arch(u32 crc, const u8 *p, size_t len)
  55. {
  56. if (!static_branch_likely(&have_crc32))
  57. return crc32_le_base(crc, p, len);
  58. if (IS_ENABLED(CONFIG_64BIT)) {
  59. for (; len >= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {
  60. u64 value = get_unaligned_le64(p);
  61. CRC32(crc, value, d);
  62. }
  63. if (len & sizeof(u32)) {
  64. u32 value = get_unaligned_le32(p);
  65. CRC32(crc, value, w);
  66. p += sizeof(u32);
  67. }
  68. } else {
  69. for (; len >= sizeof(u32); len -= sizeof(u32)) {
  70. u32 value = get_unaligned_le32(p);
  71. CRC32(crc, value, w);
  72. p += sizeof(u32);
  73. }
  74. }
  75. if (len & sizeof(u16)) {
  76. u16 value = get_unaligned_le16(p);
  77. CRC32(crc, value, h);
  78. p += sizeof(u16);
  79. }
  80. if (len & sizeof(u8)) {
  81. u8 value = *p++;
  82. CRC32(crc, value, b);
  83. }
  84. return crc;
  85. }
  86. static inline u32 crc32c_arch(u32 crc, const u8 *p, size_t len)
  87. {
  88. if (!static_branch_likely(&have_crc32))
  89. return crc32c_base(crc, p, len);
  90. if (IS_ENABLED(CONFIG_64BIT)) {
  91. for (; len >= sizeof(u64); p += sizeof(u64), len -= sizeof(u64)) {
  92. u64 value = get_unaligned_le64(p);
  93. CRC32C(crc, value, d);
  94. }
  95. if (len & sizeof(u32)) {
  96. u32 value = get_unaligned_le32(p);
  97. CRC32C(crc, value, w);
  98. p += sizeof(u32);
  99. }
  100. } else {
  101. for (; len >= sizeof(u32); len -= sizeof(u32)) {
  102. u32 value = get_unaligned_le32(p);
  103. CRC32C(crc, value, w);
  104. p += sizeof(u32);
  105. }
  106. }
  107. if (len & sizeof(u16)) {
  108. u16 value = get_unaligned_le16(p);
  109. CRC32C(crc, value, h);
  110. p += sizeof(u16);
  111. }
  112. if (len & sizeof(u8)) {
  113. u8 value = *p++;
  114. CRC32C(crc, value, b);
  115. }
  116. return crc;
  117. }
  118. #define crc32_be_arch crc32_be_base /* not implemented on this arch */
  119. #define crc32_mod_init_arch crc32_mod_init_arch
  120. static void crc32_mod_init_arch(void)
  121. {
  122. if (cpu_have_feature(cpu_feature(MIPS_CRC32)))
  123. static_branch_enable(&have_crc32);
  124. }
  125. static inline u32 crc32_optimizations_arch(void)
  126. {
  127. if (static_key_enabled(&have_crc32))
  128. return CRC32_LE_OPTIMIZATION | CRC32C_OPTIMIZATION;
  129. return 0;
  130. }