v4l2-cci.h 4.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * MIPI Camera Control Interface (CCI) register access helpers.
  4. *
  5. * Copyright (C) 2023 Hans de Goede <hansg@kernel.org>
  6. */
  7. #ifndef _V4L2_CCI_H
  8. #define _V4L2_CCI_H
  9. #include <linux/bitfield.h>
  10. #include <linux/bits.h>
  11. #include <linux/types.h>
  12. struct i2c_client;
  13. struct regmap;
  14. /**
  15. * struct cci_reg_sequence - An individual write from a sequence of CCI writes
  16. *
  17. * @reg: Register address, use CCI_REG#() macros to encode reg width
  18. * @val: Register value
  19. *
  20. * Register/value pairs for sequences of writes.
  21. */
  22. struct cci_reg_sequence {
  23. u32 reg;
  24. u64 val;
  25. };
  26. /*
  27. * Macros to define register address with the register width encoded
  28. * into the higher bits.
  29. */
  30. #define CCI_REG_ADDR_MASK GENMASK(15, 0)
  31. #define CCI_REG_WIDTH_SHIFT 16
  32. #define CCI_REG_WIDTH_MASK GENMASK(19, 16)
  33. /*
  34. * Private CCI register flags, for the use of drivers.
  35. */
  36. #define CCI_REG_PRIVATE_SHIFT 28U
  37. #define CCI_REG_PRIVATE_MASK GENMASK(31U, CCI_REG_PRIVATE_SHIFT)
  38. #define CCI_REG_WIDTH_BYTES(x) FIELD_GET(CCI_REG_WIDTH_MASK, x)
  39. #define CCI_REG_WIDTH(x) (CCI_REG_WIDTH_BYTES(x) << 3)
  40. #define CCI_REG_ADDR(x) FIELD_GET(CCI_REG_ADDR_MASK, x)
  41. #define CCI_REG_LE BIT(20)
  42. #define CCI_REG8(x) ((1 << CCI_REG_WIDTH_SHIFT) | (x))
  43. #define CCI_REG16(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x))
  44. #define CCI_REG24(x) ((3 << CCI_REG_WIDTH_SHIFT) | (x))
  45. #define CCI_REG32(x) ((4 << CCI_REG_WIDTH_SHIFT) | (x))
  46. #define CCI_REG64(x) ((8 << CCI_REG_WIDTH_SHIFT) | (x))
  47. #define CCI_REG16_LE(x) (CCI_REG_LE | (2U << CCI_REG_WIDTH_SHIFT) | (x))
  48. #define CCI_REG24_LE(x) (CCI_REG_LE | (3U << CCI_REG_WIDTH_SHIFT) | (x))
  49. #define CCI_REG32_LE(x) (CCI_REG_LE | (4U << CCI_REG_WIDTH_SHIFT) | (x))
  50. #define CCI_REG64_LE(x) (CCI_REG_LE | (8U << CCI_REG_WIDTH_SHIFT) | (x))
  51. /**
  52. * cci_read() - Read a value from a single CCI register
  53. *
  54. * @map: Register map to read from
  55. * @reg: Register address to read, use CCI_REG#() macros to encode reg width
  56. * @val: Pointer to store read value
  57. * @err: Optional pointer to store errors, if a previous error is set
  58. * then the read will be skipped
  59. *
  60. * Return: %0 on success or a negative error code on failure.
  61. */
  62. int cci_read(struct regmap *map, u32 reg, u64 *val, int *err);
  63. /**
  64. * cci_write() - Write a value to a single CCI register
  65. *
  66. * @map: Register map to write to
  67. * @reg: Register address to write, use CCI_REG#() macros to encode reg width
  68. * @val: Value to be written
  69. * @err: Optional pointer to store errors, if a previous error is set
  70. * then the write will be skipped
  71. *
  72. * Return: %0 on success or a negative error code on failure.
  73. */
  74. int cci_write(struct regmap *map, u32 reg, u64 val, int *err);
  75. /**
  76. * cci_update_bits() - Perform a read/modify/write cycle on
  77. * a single CCI register
  78. *
  79. * @map: Register map to update
  80. * @reg: Register address to update, use CCI_REG#() macros to encode reg width
  81. * @mask: Bitmask to change
  82. * @val: New value for bitmask
  83. * @err: Optional pointer to store errors, if a previous error is set
  84. * then the update will be skipped
  85. *
  86. * Note this uses read-modify-write to update the bits, atomicity with regards
  87. * to other cci_*() register access functions is NOT guaranteed.
  88. *
  89. * Return: %0 on success or a negative error code on failure.
  90. */
  91. int cci_update_bits(struct regmap *map, u32 reg, u64 mask, u64 val, int *err);
  92. /**
  93. * cci_multi_reg_write() - Write multiple registers to the device
  94. *
  95. * @map: Register map to write to
  96. * @regs: Array of structures containing register-address, -value pairs to be
  97. * written, register-addresses use CCI_REG#() macros to encode reg width
  98. * @num_regs: Number of registers to write
  99. * @err: Optional pointer to store errors, if a previous error is set
  100. * then the write will be skipped
  101. *
  102. * Write multiple registers to the device where the set of register, value
  103. * pairs are supplied in any order, possibly not all in a single range.
  104. *
  105. * Use of the CCI_REG#() macros to encode reg width is mandatory.
  106. *
  107. * For raw lists of register-address, -value pairs with only 8 bit
  108. * wide writes regmap_multi_reg_write() can be used instead.
  109. *
  110. * Return: %0 on success or a negative error code on failure.
  111. */
  112. int cci_multi_reg_write(struct regmap *map, const struct cci_reg_sequence *regs,
  113. unsigned int num_regs, int *err);
  114. #if IS_ENABLED(CONFIG_V4L2_CCI_I2C)
  115. /**
  116. * devm_cci_regmap_init_i2c() - Create regmap to use with cci_*() register
  117. * access functions
  118. *
  119. * @client: i2c_client to create the regmap for
  120. * @reg_addr_bits: register address width to use (8 or 16)
  121. *
  122. * Note the memory for the created regmap is devm() managed, tied to the client.
  123. *
  124. * Return: %0 on success or a negative error code on failure.
  125. */
  126. struct regmap *devm_cci_regmap_init_i2c(struct i2c_client *client,
  127. int reg_addr_bits);
  128. #endif
  129. #endif