tvp7002.h 1.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
  3. * Digitizer with Horizontal PLL registers
  4. *
  5. * Copyright (C) 2009 Texas Instruments Inc
  6. * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
  7. *
  8. * This code is partially based upon the TVP5150 driver
  9. * written by Mauro Carvalho Chehab <mchehab@kernel.org>,
  10. * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
  11. * and the TVP7002 driver in the TI LSP 2.10.00.14
  12. */
  13. #ifndef _TVP7002_H_
  14. #define _TVP7002_H_
  15. #define TVP7002_MODULE_NAME "tvp7002"
  16. /**
  17. * struct tvp7002_config - Platform dependent data
  18. *@clk_polarity: Clock polarity
  19. * 0 - Data clocked out on rising edge of DATACLK signal
  20. * 1 - Data clocked out on falling edge of DATACLK signal
  21. *@hs_polarity: HSYNC polarity
  22. * 0 - Active low HSYNC output, 1 - Active high HSYNC output
  23. *@vs_polarity: VSYNC Polarity
  24. * 0 - Active low VSYNC output, 1 - Active high VSYNC output
  25. *@fid_polarity: Active-high Field ID polarity.
  26. * 0 - The field ID output is set to logic 1 for an odd field
  27. * (field 1) and set to logic 0 for an even field (field 0).
  28. * 1 - Operation with polarity inverted.
  29. *@sog_polarity: Active high Sync on Green output polarity.
  30. * 0 - Normal operation, 1 - Operation with polarity inverted
  31. */
  32. struct tvp7002_config {
  33. bool clk_polarity;
  34. bool hs_polarity;
  35. bool vs_polarity;
  36. bool fid_polarity;
  37. bool sog_polarity;
  38. };
  39. #endif