qcom,sdx75.h 2.6 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */
  2. /*
  3. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX75_H
  6. #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX75_H
  7. #define MASTER_QUP_CORE_0 1
  8. #define SLAVE_QUP_CORE_0 3
  9. #define MASTER_LLCC 0
  10. #define SLAVE_EBI1 1
  11. #define MASTER_CNOC_DC_NOC 0
  12. #define SLAVE_LAGG_CFG 1
  13. #define SLAVE_MCCC_MASTER 2
  14. #define SLAVE_GEM_NOC_CFG 3
  15. #define SLAVE_SNOOP_BWMON 4
  16. #define MASTER_SYS_TCU 0
  17. #define MASTER_APPSS_PROC 1
  18. #define MASTER_GEM_NOC_CFG 2
  19. #define MASTER_MSS_PROC 3
  20. #define MASTER_ANOC_PCIE_GEM_NOC 4
  21. #define MASTER_SNOC_SF_MEM_NOC 5
  22. #define MASTER_GIC 6
  23. #define MASTER_IPA_PCIE 7
  24. #define SLAVE_GEM_NOC_CNOC 8
  25. #define SLAVE_LLCC 9
  26. #define SLAVE_MEM_NOC_PCIE_SNOC 10
  27. #define SLAVE_SERVICE_GEM_NOC 11
  28. #define MASTER_PCIE_0 0
  29. #define MASTER_PCIE_1 1
  30. #define MASTER_PCIE_2 2
  31. #define SLAVE_ANOC_PCIE_GEM_NOC 3
  32. #define MASTER_AUDIO 0
  33. #define MASTER_GIC_AHB 1
  34. #define MASTER_PCIE_RSCC 2
  35. #define MASTER_QDSS_BAM 3
  36. #define MASTER_QPIC 4
  37. #define MASTER_QUP_0 5
  38. #define MASTER_ANOC_SNOC 6
  39. #define MASTER_GEM_NOC_CNOC 7
  40. #define MASTER_GEM_NOC_PCIE_SNOC 8
  41. #define MASTER_SNOC_CFG 9
  42. #define MASTER_PCIE_ANOC_CFG 10
  43. #define MASTER_CRYPTO 11
  44. #define MASTER_IPA 12
  45. #define MASTER_MVMSS 13
  46. #define MASTER_EMAC_0 14
  47. #define MASTER_EMAC_1 15
  48. #define MASTER_QDSS_ETR 16
  49. #define MASTER_QDSS_ETR_1 17
  50. #define MASTER_SDCC_1 18
  51. #define MASTER_SDCC_4 19
  52. #define MASTER_USB3_0 20
  53. #define SLAVE_ETH0_CFG 21
  54. #define SLAVE_ETH1_CFG 22
  55. #define SLAVE_AUDIO 23
  56. #define SLAVE_CLK_CTL 24
  57. #define SLAVE_CRYPTO_0_CFG 25
  58. #define SLAVE_IMEM_CFG 26
  59. #define SLAVE_IPA_CFG 27
  60. #define SLAVE_IPC_ROUTER_CFG 28
  61. #define SLAVE_CNOC_MSS 29
  62. #define SLAVE_ICBDI_MVMSS_CFG 30
  63. #define SLAVE_PCIE_0_CFG 31
  64. #define SLAVE_PCIE_1_CFG 32
  65. #define SLAVE_PCIE_2_CFG 33
  66. #define SLAVE_PCIE_RSC_CFG 34
  67. #define SLAVE_PDM 35
  68. #define SLAVE_PRNG 36
  69. #define SLAVE_QDSS_CFG 37
  70. #define SLAVE_QPIC 38
  71. #define SLAVE_QUP_0 39
  72. #define SLAVE_SDCC_1 40
  73. #define SLAVE_SDCC_4 41
  74. #define SLAVE_SPMI_VGI_COEX 42
  75. #define SLAVE_TCSR 43
  76. #define SLAVE_TLMM 44
  77. #define SLAVE_USB3 45
  78. #define SLAVE_USB3_PHY_CFG 46
  79. #define SLAVE_A1NOC_CFG 47
  80. #define SLAVE_DDRSS_CFG 48
  81. #define SLAVE_SNOC_GEM_NOC_SF 49
  82. #define SLAVE_SNOC_CFG 50
  83. #define SLAVE_PCIE_ANOC_CFG 51
  84. #define SLAVE_IMEM 52
  85. #define SLAVE_SERVICE_PCIE_ANOC 53
  86. #define SLAVE_SERVICE_SNOC 54
  87. #define SLAVE_PCIE_0 55
  88. #define SLAVE_PCIE_1 56
  89. #define SLAVE_PCIE_2 57
  90. #define SLAVE_QDSS_STM 58
  91. #define SLAVE_TCU 59
  92. #endif