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- /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
- #ifndef INTERCONNECT_QCOM_IPQ9574_H
- #define INTERCONNECT_QCOM_IPQ9574_H
- #define MASTER_ANOC_PCIE0 0
- #define SLAVE_ANOC_PCIE0 1
- #define MASTER_SNOC_PCIE0 2
- #define SLAVE_SNOC_PCIE0 3
- #define MASTER_ANOC_PCIE1 4
- #define SLAVE_ANOC_PCIE1 5
- #define MASTER_SNOC_PCIE1 6
- #define SLAVE_SNOC_PCIE1 7
- #define MASTER_ANOC_PCIE2 8
- #define SLAVE_ANOC_PCIE2 9
- #define MASTER_SNOC_PCIE2 10
- #define SLAVE_SNOC_PCIE2 11
- #define MASTER_ANOC_PCIE3 12
- #define SLAVE_ANOC_PCIE3 13
- #define MASTER_SNOC_PCIE3 14
- #define SLAVE_SNOC_PCIE3 15
- #define MASTER_USB 16
- #define SLAVE_USB 17
- #define MASTER_USB_AXI 18
- #define SLAVE_USB_AXI 19
- #define MASTER_NSSNOC_NSSCC 20
- #define SLAVE_NSSNOC_NSSCC 21
- #define MASTER_NSSNOC_SNOC_0 22
- #define SLAVE_NSSNOC_SNOC_0 23
- #define MASTER_NSSNOC_SNOC_1 24
- #define SLAVE_NSSNOC_SNOC_1 25
- #define MASTER_NSSNOC_PCNOC_1 26
- #define SLAVE_NSSNOC_PCNOC_1 27
- #define MASTER_NSSNOC_QOSGEN_REF 28
- #define SLAVE_NSSNOC_QOSGEN_REF 29
- #define MASTER_NSSNOC_TIMEOUT_REF 30
- #define SLAVE_NSSNOC_TIMEOUT_REF 31
- #define MASTER_NSSNOC_XO_DCD 32
- #define SLAVE_NSSNOC_XO_DCD 33
- #define MASTER_NSSNOC_ATB 34
- #define SLAVE_NSSNOC_ATB 35
- #define MASTER_MEM_NOC_NSSNOC 36
- #define SLAVE_MEM_NOC_NSSNOC 37
- #define MASTER_NSSNOC_MEMNOC 38
- #define SLAVE_NSSNOC_MEMNOC 39
- #define MASTER_NSSNOC_MEM_NOC_1 40
- #define SLAVE_NSSNOC_MEM_NOC_1 41
- #define MASTER_NSSNOC_PPE 0
- #define SLAVE_NSSNOC_PPE 1
- #define MASTER_NSSNOC_PPE_CFG 2
- #define SLAVE_NSSNOC_PPE_CFG 3
- #define MASTER_NSSNOC_NSS_CSR 4
- #define SLAVE_NSSNOC_NSS_CSR 5
- #define MASTER_NSSNOC_IMEM_QSB 6
- #define SLAVE_NSSNOC_IMEM_QSB 7
- #define MASTER_NSSNOC_IMEM_AHB 8
- #define SLAVE_NSSNOC_IMEM_AHB 9
- #endif /* INTERCONNECT_QCOM_IPQ9574_H */
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