events_base.c 54 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Xen event channels
  4. *
  5. * Xen models interrupts with abstract event channels. Because each
  6. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  7. * must dynamically map irqs<->event channels. The event channels
  8. * interface with the rest of the kernel by defining a xen interrupt
  9. * chip. When an event is received, it is mapped to an irq and sent
  10. * through the normal interrupt processing path.
  11. *
  12. * There are four kinds of events which can be mapped to an event
  13. * channel:
  14. *
  15. * 1. Inter-domain notifications. This includes all the virtual
  16. * device events, since they're driven by front-ends in another domain
  17. * (typically dom0).
  18. * 2. VIRQs, typically used for timers. These are per-cpu events.
  19. * 3. IPIs.
  20. * 4. PIRQs - Hardware interrupts.
  21. *
  22. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  23. */
  24. #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
  25. #include <linux/linkage.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/irq.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/string.h>
  30. #include <linux/memblock.h>
  31. #include <linux/slab.h>
  32. #include <linux/irqnr.h>
  33. #include <linux/pci.h>
  34. #include <linux/rcupdate.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/cpuhotplug.h>
  37. #include <linux/atomic.h>
  38. #include <linux/ktime.h>
  39. #ifdef CONFIG_X86
  40. #include <asm/desc.h>
  41. #include <asm/ptrace.h>
  42. #include <asm/idtentry.h>
  43. #include <asm/irq.h>
  44. #include <asm/io_apic.h>
  45. #include <asm/i8259.h>
  46. #include <asm/xen/cpuid.h>
  47. #include <asm/xen/pci.h>
  48. #endif
  49. #include <asm/sync_bitops.h>
  50. #include <asm/xen/hypercall.h>
  51. #include <asm/xen/hypervisor.h>
  52. #include <xen/page.h>
  53. #include <xen/xen.h>
  54. #include <xen/hvm.h>
  55. #include <xen/xen-ops.h>
  56. #include <xen/events.h>
  57. #include <xen/interface/xen.h>
  58. #include <xen/interface/event_channel.h>
  59. #include <xen/interface/hvm/hvm_op.h>
  60. #include <xen/interface/hvm/params.h>
  61. #include <xen/interface/physdev.h>
  62. #include <xen/interface/sched.h>
  63. #include <xen/interface/vcpu.h>
  64. #include <xen/xenbus.h>
  65. #include <asm/hw_irq.h>
  66. #include "events_internal.h"
  67. #undef MODULE_PARAM_PREFIX
  68. #define MODULE_PARAM_PREFIX "xen."
  69. /* Interrupt types. */
  70. enum xen_irq_type {
  71. IRQT_UNBOUND = 0,
  72. IRQT_PIRQ,
  73. IRQT_VIRQ,
  74. IRQT_IPI,
  75. IRQT_EVTCHN
  76. };
  77. /*
  78. * Packed IRQ information:
  79. * type - enum xen_irq_type
  80. * event channel - irq->event channel mapping
  81. * cpu - cpu this event channel is bound to
  82. * index - type-specific information:
  83. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  84. * guest, or GSI (real passthrough IRQ) of the device.
  85. * VIRQ - virq number
  86. * IPI - IPI vector
  87. * EVTCHN -
  88. */
  89. struct irq_info {
  90. struct list_head list;
  91. struct list_head eoi_list;
  92. struct rcu_work rwork;
  93. short refcnt;
  94. u8 spurious_cnt;
  95. u8 is_accounted;
  96. short type; /* type: IRQT_* */
  97. u8 mask_reason; /* Why is event channel masked */
  98. #define EVT_MASK_REASON_EXPLICIT 0x01
  99. #define EVT_MASK_REASON_TEMPORARY 0x02
  100. #define EVT_MASK_REASON_EOI_PENDING 0x04
  101. u8 is_active; /* Is event just being handled? */
  102. unsigned irq;
  103. evtchn_port_t evtchn; /* event channel */
  104. unsigned short cpu; /* cpu bound */
  105. unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */
  106. unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */
  107. u64 eoi_time; /* Time in jiffies when to EOI. */
  108. raw_spinlock_t lock;
  109. bool is_static; /* Is event channel static */
  110. union {
  111. unsigned short virq;
  112. enum ipi_vector ipi;
  113. struct {
  114. unsigned short pirq;
  115. unsigned short gsi;
  116. unsigned char vector;
  117. unsigned char flags;
  118. uint16_t domid;
  119. } pirq;
  120. struct xenbus_device *interdomain;
  121. } u;
  122. };
  123. #define PIRQ_NEEDS_EOI (1 << 0)
  124. #define PIRQ_SHAREABLE (1 << 1)
  125. #define PIRQ_MSI_GROUP (1 << 2)
  126. static uint __read_mostly event_loop_timeout = 2;
  127. module_param(event_loop_timeout, uint, 0644);
  128. static uint __read_mostly event_eoi_delay = 10;
  129. module_param(event_eoi_delay, uint, 0644);
  130. const struct evtchn_ops *evtchn_ops;
  131. /*
  132. * This lock protects updates to the following mapping and reference-count
  133. * arrays. The lock does not need to be acquired to read the mapping tables.
  134. */
  135. static DEFINE_MUTEX(irq_mapping_update_lock);
  136. /*
  137. * Lock hierarchy:
  138. *
  139. * irq_mapping_update_lock
  140. * IRQ-desc lock
  141. * percpu eoi_list_lock
  142. * irq_info->lock
  143. */
  144. static LIST_HEAD(xen_irq_list_head);
  145. /* IRQ <-> VIRQ mapping. */
  146. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  147. /* IRQ <-> IPI mapping */
  148. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  149. /* Cache for IPI event channels - needed for hot cpu unplug (avoid RCU usage). */
  150. static DEFINE_PER_CPU(evtchn_port_t [XEN_NR_IPIS], ipi_to_evtchn) = {[0 ... XEN_NR_IPIS-1] = 0};
  151. /* Event channel distribution data */
  152. static atomic_t channels_on_cpu[NR_CPUS];
  153. static int **evtchn_to_irq;
  154. #ifdef CONFIG_X86
  155. static unsigned long *pirq_eoi_map;
  156. #endif
  157. static bool (*pirq_needs_eoi)(struct irq_info *info);
  158. #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  159. #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  160. #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
  161. /* Xen will never allocate port zero for any purpose. */
  162. #define VALID_EVTCHN(chn) ((chn) != 0)
  163. static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY];
  164. static struct irq_chip xen_dynamic_chip;
  165. static struct irq_chip xen_lateeoi_chip;
  166. static struct irq_chip xen_percpu_chip;
  167. static struct irq_chip xen_pirq_chip;
  168. static void enable_dynirq(struct irq_data *data);
  169. static DEFINE_PER_CPU(unsigned int, irq_epoch);
  170. static void clear_evtchn_to_irq_row(int *evtchn_row)
  171. {
  172. unsigned col;
  173. for (col = 0; col < EVTCHN_PER_ROW; col++)
  174. WRITE_ONCE(evtchn_row[col], -1);
  175. }
  176. static void clear_evtchn_to_irq_all(void)
  177. {
  178. unsigned row;
  179. for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
  180. if (evtchn_to_irq[row] == NULL)
  181. continue;
  182. clear_evtchn_to_irq_row(evtchn_to_irq[row]);
  183. }
  184. }
  185. static int set_evtchn_to_irq(evtchn_port_t evtchn, unsigned int irq)
  186. {
  187. unsigned row;
  188. unsigned col;
  189. int *evtchn_row;
  190. if (evtchn >= xen_evtchn_max_channels())
  191. return -EINVAL;
  192. row = EVTCHN_ROW(evtchn);
  193. col = EVTCHN_COL(evtchn);
  194. if (evtchn_to_irq[row] == NULL) {
  195. /* Unallocated irq entries return -1 anyway */
  196. if (irq == -1)
  197. return 0;
  198. evtchn_row = (int *) __get_free_pages(GFP_KERNEL, 0);
  199. if (evtchn_row == NULL)
  200. return -ENOMEM;
  201. clear_evtchn_to_irq_row(evtchn_row);
  202. /*
  203. * We've prepared an empty row for the mapping. If a different
  204. * thread was faster inserting it, we can drop ours.
  205. */
  206. if (cmpxchg(&evtchn_to_irq[row], NULL, evtchn_row) != NULL)
  207. free_page((unsigned long) evtchn_row);
  208. }
  209. WRITE_ONCE(evtchn_to_irq[row][col], irq);
  210. return 0;
  211. }
  212. /* Get info for IRQ */
  213. static struct irq_info *info_for_irq(unsigned irq)
  214. {
  215. if (irq < nr_legacy_irqs())
  216. return legacy_info_ptrs[irq];
  217. else
  218. return irq_get_chip_data(irq);
  219. }
  220. static void set_info_for_irq(unsigned int irq, struct irq_info *info)
  221. {
  222. if (irq < nr_legacy_irqs())
  223. legacy_info_ptrs[irq] = info;
  224. else
  225. irq_set_chip_data(irq, info);
  226. }
  227. static struct irq_info *evtchn_to_info(evtchn_port_t evtchn)
  228. {
  229. int irq;
  230. if (evtchn >= xen_evtchn_max_channels())
  231. return NULL;
  232. if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
  233. return NULL;
  234. irq = READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]);
  235. return (irq < 0) ? NULL : info_for_irq(irq);
  236. }
  237. /* Per CPU channel accounting */
  238. static void channels_on_cpu_dec(struct irq_info *info)
  239. {
  240. if (!info->is_accounted)
  241. return;
  242. info->is_accounted = 0;
  243. if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
  244. return;
  245. WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], -1 , 0));
  246. }
  247. static void channels_on_cpu_inc(struct irq_info *info)
  248. {
  249. if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
  250. return;
  251. if (WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], 1,
  252. INT_MAX)))
  253. return;
  254. info->is_accounted = 1;
  255. }
  256. static void xen_irq_free_desc(unsigned int irq)
  257. {
  258. /* Legacy IRQ descriptors are managed by the arch. */
  259. if (irq >= nr_legacy_irqs())
  260. irq_free_desc(irq);
  261. }
  262. static void delayed_free_irq(struct work_struct *work)
  263. {
  264. struct irq_info *info = container_of(to_rcu_work(work), struct irq_info,
  265. rwork);
  266. unsigned int irq = info->irq;
  267. /* Remove the info pointer only now, with no potential users left. */
  268. set_info_for_irq(irq, NULL);
  269. kfree(info);
  270. xen_irq_free_desc(irq);
  271. }
  272. /* Constructors for packed IRQ information. */
  273. static int xen_irq_info_common_setup(struct irq_info *info,
  274. enum xen_irq_type type,
  275. evtchn_port_t evtchn,
  276. unsigned short cpu)
  277. {
  278. int ret;
  279. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  280. info->type = type;
  281. info->evtchn = evtchn;
  282. info->cpu = cpu;
  283. info->mask_reason = EVT_MASK_REASON_EXPLICIT;
  284. raw_spin_lock_init(&info->lock);
  285. ret = set_evtchn_to_irq(evtchn, info->irq);
  286. if (ret < 0)
  287. return ret;
  288. irq_clear_status_flags(info->irq, IRQ_NOREQUEST | IRQ_NOAUTOEN);
  289. return xen_evtchn_port_setup(evtchn);
  290. }
  291. static int xen_irq_info_evtchn_setup(struct irq_info *info,
  292. evtchn_port_t evtchn,
  293. struct xenbus_device *dev)
  294. {
  295. int ret;
  296. ret = xen_irq_info_common_setup(info, IRQT_EVTCHN, evtchn, 0);
  297. info->u.interdomain = dev;
  298. if (dev)
  299. atomic_inc(&dev->event_channels);
  300. return ret;
  301. }
  302. static int xen_irq_info_ipi_setup(struct irq_info *info, unsigned int cpu,
  303. evtchn_port_t evtchn, enum ipi_vector ipi)
  304. {
  305. info->u.ipi = ipi;
  306. per_cpu(ipi_to_irq, cpu)[ipi] = info->irq;
  307. per_cpu(ipi_to_evtchn, cpu)[ipi] = evtchn;
  308. return xen_irq_info_common_setup(info, IRQT_IPI, evtchn, 0);
  309. }
  310. static int xen_irq_info_virq_setup(struct irq_info *info, unsigned int cpu,
  311. evtchn_port_t evtchn, unsigned int virq)
  312. {
  313. info->u.virq = virq;
  314. per_cpu(virq_to_irq, cpu)[virq] = info->irq;
  315. return xen_irq_info_common_setup(info, IRQT_VIRQ, evtchn, 0);
  316. }
  317. static int xen_irq_info_pirq_setup(struct irq_info *info, evtchn_port_t evtchn,
  318. unsigned int pirq, unsigned int gsi,
  319. uint16_t domid, unsigned char flags)
  320. {
  321. info->u.pirq.pirq = pirq;
  322. info->u.pirq.gsi = gsi;
  323. info->u.pirq.domid = domid;
  324. info->u.pirq.flags = flags;
  325. return xen_irq_info_common_setup(info, IRQT_PIRQ, evtchn, 0);
  326. }
  327. static void xen_irq_info_cleanup(struct irq_info *info)
  328. {
  329. set_evtchn_to_irq(info->evtchn, -1);
  330. xen_evtchn_port_remove(info->evtchn, info->cpu);
  331. info->evtchn = 0;
  332. channels_on_cpu_dec(info);
  333. }
  334. /*
  335. * Accessors for packed IRQ information.
  336. */
  337. static evtchn_port_t evtchn_from_irq(unsigned int irq)
  338. {
  339. const struct irq_info *info = NULL;
  340. if (likely(irq < irq_get_nr_irqs()))
  341. info = info_for_irq(irq);
  342. if (!info)
  343. return 0;
  344. return info->evtchn;
  345. }
  346. unsigned int irq_from_evtchn(evtchn_port_t evtchn)
  347. {
  348. struct irq_info *info = evtchn_to_info(evtchn);
  349. return info ? info->irq : -1;
  350. }
  351. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  352. int irq_evtchn_from_virq(unsigned int cpu, unsigned int virq,
  353. evtchn_port_t *evtchn)
  354. {
  355. int irq = per_cpu(virq_to_irq, cpu)[virq];
  356. *evtchn = evtchn_from_irq(irq);
  357. return irq;
  358. }
  359. static enum ipi_vector ipi_from_irq(struct irq_info *info)
  360. {
  361. BUG_ON(info == NULL);
  362. BUG_ON(info->type != IRQT_IPI);
  363. return info->u.ipi;
  364. }
  365. static unsigned int virq_from_irq(struct irq_info *info)
  366. {
  367. BUG_ON(info == NULL);
  368. BUG_ON(info->type != IRQT_VIRQ);
  369. return info->u.virq;
  370. }
  371. static unsigned int pirq_from_irq(struct irq_info *info)
  372. {
  373. BUG_ON(info == NULL);
  374. BUG_ON(info->type != IRQT_PIRQ);
  375. return info->u.pirq.pirq;
  376. }
  377. unsigned int cpu_from_evtchn(evtchn_port_t evtchn)
  378. {
  379. struct irq_info *info = evtchn_to_info(evtchn);
  380. return info ? info->cpu : 0;
  381. }
  382. static void do_mask(struct irq_info *info, u8 reason)
  383. {
  384. unsigned long flags;
  385. raw_spin_lock_irqsave(&info->lock, flags);
  386. if (!info->mask_reason)
  387. mask_evtchn(info->evtchn);
  388. info->mask_reason |= reason;
  389. raw_spin_unlock_irqrestore(&info->lock, flags);
  390. }
  391. static void do_unmask(struct irq_info *info, u8 reason)
  392. {
  393. unsigned long flags;
  394. raw_spin_lock_irqsave(&info->lock, flags);
  395. info->mask_reason &= ~reason;
  396. if (!info->mask_reason)
  397. unmask_evtchn(info->evtchn);
  398. raw_spin_unlock_irqrestore(&info->lock, flags);
  399. }
  400. #ifdef CONFIG_X86
  401. static bool pirq_check_eoi_map(struct irq_info *info)
  402. {
  403. return test_bit(pirq_from_irq(info), pirq_eoi_map);
  404. }
  405. #endif
  406. static bool pirq_needs_eoi_flag(struct irq_info *info)
  407. {
  408. BUG_ON(info->type != IRQT_PIRQ);
  409. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  410. }
  411. static void bind_evtchn_to_cpu(struct irq_info *info, unsigned int cpu,
  412. bool force_affinity)
  413. {
  414. if (IS_ENABLED(CONFIG_SMP) && force_affinity) {
  415. struct irq_data *data = irq_get_irq_data(info->irq);
  416. irq_data_update_affinity(data, cpumask_of(cpu));
  417. irq_data_update_effective_affinity(data, cpumask_of(cpu));
  418. }
  419. xen_evtchn_port_bind_to_cpu(info->evtchn, cpu, info->cpu);
  420. channels_on_cpu_dec(info);
  421. info->cpu = cpu;
  422. channels_on_cpu_inc(info);
  423. }
  424. /**
  425. * notify_remote_via_irq - send event to remote end of event channel via irq
  426. * @irq: irq of event channel to send event to
  427. *
  428. * Unlike notify_remote_via_evtchn(), this is safe to use across
  429. * save/restore. Notifications on a broken connection are silently
  430. * dropped.
  431. */
  432. void notify_remote_via_irq(int irq)
  433. {
  434. evtchn_port_t evtchn = evtchn_from_irq(irq);
  435. if (VALID_EVTCHN(evtchn))
  436. notify_remote_via_evtchn(evtchn);
  437. }
  438. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  439. struct lateeoi_work {
  440. struct delayed_work delayed;
  441. spinlock_t eoi_list_lock;
  442. struct list_head eoi_list;
  443. };
  444. static DEFINE_PER_CPU(struct lateeoi_work, lateeoi);
  445. static void lateeoi_list_del(struct irq_info *info)
  446. {
  447. struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
  448. unsigned long flags;
  449. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  450. list_del_init(&info->eoi_list);
  451. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  452. }
  453. static void lateeoi_list_add(struct irq_info *info)
  454. {
  455. struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
  456. struct irq_info *elem;
  457. u64 now = get_jiffies_64();
  458. unsigned long delay;
  459. unsigned long flags;
  460. if (now < info->eoi_time)
  461. delay = info->eoi_time - now;
  462. else
  463. delay = 1;
  464. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  465. elem = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
  466. eoi_list);
  467. if (!elem || info->eoi_time < elem->eoi_time) {
  468. list_add(&info->eoi_list, &eoi->eoi_list);
  469. mod_delayed_work_on(info->eoi_cpu, system_percpu_wq,
  470. &eoi->delayed, delay);
  471. } else {
  472. list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) {
  473. if (elem->eoi_time <= info->eoi_time)
  474. break;
  475. }
  476. list_add(&info->eoi_list, &elem->eoi_list);
  477. }
  478. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  479. }
  480. static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious)
  481. {
  482. evtchn_port_t evtchn;
  483. unsigned int cpu;
  484. unsigned int delay = 0;
  485. evtchn = info->evtchn;
  486. if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list))
  487. return;
  488. if (spurious) {
  489. struct xenbus_device *dev = info->u.interdomain;
  490. unsigned int threshold = 1;
  491. if (dev && dev->spurious_threshold)
  492. threshold = dev->spurious_threshold;
  493. if ((1 << info->spurious_cnt) < (HZ << 2)) {
  494. if (info->spurious_cnt != 0xFF)
  495. info->spurious_cnt++;
  496. }
  497. if (info->spurious_cnt > threshold) {
  498. delay = 1 << (info->spurious_cnt - 1 - threshold);
  499. if (delay > HZ)
  500. delay = HZ;
  501. if (!info->eoi_time)
  502. info->eoi_cpu = smp_processor_id();
  503. info->eoi_time = get_jiffies_64() + delay;
  504. if (dev)
  505. atomic_add(delay, &dev->jiffies_eoi_delayed);
  506. }
  507. if (dev)
  508. atomic_inc(&dev->spurious_events);
  509. } else {
  510. info->spurious_cnt = 0;
  511. }
  512. cpu = info->eoi_cpu;
  513. if (info->eoi_time &&
  514. (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) {
  515. lateeoi_list_add(info);
  516. return;
  517. }
  518. info->eoi_time = 0;
  519. /* is_active hasn't been reset yet, do it now. */
  520. smp_store_release(&info->is_active, 0);
  521. do_unmask(info, EVT_MASK_REASON_EOI_PENDING);
  522. }
  523. static void xen_irq_lateeoi_worker(struct work_struct *work)
  524. {
  525. struct lateeoi_work *eoi;
  526. struct irq_info *info;
  527. u64 now = get_jiffies_64();
  528. unsigned long flags;
  529. eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed);
  530. rcu_read_lock();
  531. while (true) {
  532. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  533. info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
  534. eoi_list);
  535. if (info == NULL)
  536. break;
  537. if (now < info->eoi_time) {
  538. mod_delayed_work_on(info->eoi_cpu, system_percpu_wq,
  539. &eoi->delayed,
  540. info->eoi_time - now);
  541. break;
  542. }
  543. list_del_init(&info->eoi_list);
  544. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  545. info->eoi_time = 0;
  546. xen_irq_lateeoi_locked(info, false);
  547. }
  548. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  549. rcu_read_unlock();
  550. }
  551. static void xen_cpu_init_eoi(unsigned int cpu)
  552. {
  553. struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu);
  554. INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker);
  555. spin_lock_init(&eoi->eoi_list_lock);
  556. INIT_LIST_HEAD(&eoi->eoi_list);
  557. }
  558. void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags)
  559. {
  560. struct irq_info *info;
  561. rcu_read_lock();
  562. info = info_for_irq(irq);
  563. if (info)
  564. xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS);
  565. rcu_read_unlock();
  566. }
  567. EXPORT_SYMBOL_GPL(xen_irq_lateeoi);
  568. static struct irq_info *xen_irq_init(unsigned int irq)
  569. {
  570. struct irq_info *info;
  571. info = kzalloc_obj(*info);
  572. if (info) {
  573. info->irq = irq;
  574. info->type = IRQT_UNBOUND;
  575. info->refcnt = -1;
  576. INIT_RCU_WORK(&info->rwork, delayed_free_irq);
  577. set_info_for_irq(irq, info);
  578. INIT_LIST_HEAD(&info->eoi_list);
  579. list_add_tail(&info->list, &xen_irq_list_head);
  580. }
  581. return info;
  582. }
  583. static struct irq_info *xen_allocate_irq_dynamic(void)
  584. {
  585. int irq = irq_alloc_desc_from(0, -1);
  586. struct irq_info *info = NULL;
  587. if (irq >= 0) {
  588. info = xen_irq_init(irq);
  589. if (!info)
  590. xen_irq_free_desc(irq);
  591. }
  592. return info;
  593. }
  594. static struct irq_info *xen_allocate_irq_gsi(unsigned int gsi)
  595. {
  596. int irq;
  597. struct irq_info *info;
  598. /*
  599. * A PV guest has no concept of a GSI (since it has no ACPI
  600. * nor access to/knowledge of the physical APICs). Therefore
  601. * all IRQs are dynamically allocated from the entire IRQ
  602. * space.
  603. */
  604. if (xen_pv_domain() && !xen_initial_domain())
  605. return xen_allocate_irq_dynamic();
  606. /* Legacy IRQ descriptors are already allocated by the arch. */
  607. if (gsi < nr_legacy_irqs())
  608. irq = gsi;
  609. else
  610. irq = irq_alloc_desc_at(gsi, -1);
  611. info = xen_irq_init(irq);
  612. if (!info)
  613. xen_irq_free_desc(irq);
  614. return info;
  615. }
  616. static void xen_free_irq(struct irq_info *info)
  617. {
  618. if (WARN_ON(!info))
  619. return;
  620. if (!list_empty(&info->eoi_list))
  621. lateeoi_list_del(info);
  622. list_del(&info->list);
  623. WARN_ON(info->refcnt > 0);
  624. queue_rcu_work(system_percpu_wq, &info->rwork);
  625. }
  626. /* Not called for lateeoi events. */
  627. static void event_handler_exit(struct irq_info *info)
  628. {
  629. smp_store_release(&info->is_active, 0);
  630. clear_evtchn(info->evtchn);
  631. }
  632. static void pirq_query_unmask(struct irq_info *info)
  633. {
  634. struct physdev_irq_status_query irq_status;
  635. irq_status.irq = pirq_from_irq(info);
  636. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  637. irq_status.flags = 0;
  638. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  639. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  640. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  641. }
  642. static void do_eoi_pirq(struct irq_info *info)
  643. {
  644. struct physdev_eoi eoi = { .irq = pirq_from_irq(info) };
  645. int rc = 0;
  646. if (!VALID_EVTCHN(info->evtchn))
  647. return;
  648. event_handler_exit(info);
  649. if (pirq_needs_eoi(info)) {
  650. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  651. WARN_ON(rc);
  652. }
  653. }
  654. static void eoi_pirq(struct irq_data *data)
  655. {
  656. struct irq_info *info = info_for_irq(data->irq);
  657. do_eoi_pirq(info);
  658. }
  659. static void do_disable_dynirq(struct irq_info *info)
  660. {
  661. if (VALID_EVTCHN(info->evtchn))
  662. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  663. }
  664. static void disable_dynirq(struct irq_data *data)
  665. {
  666. struct irq_info *info = info_for_irq(data->irq);
  667. if (info)
  668. do_disable_dynirq(info);
  669. }
  670. static void mask_ack_pirq(struct irq_data *data)
  671. {
  672. struct irq_info *info = info_for_irq(data->irq);
  673. if (info) {
  674. do_disable_dynirq(info);
  675. do_eoi_pirq(info);
  676. }
  677. }
  678. static unsigned int __startup_pirq(struct irq_info *info)
  679. {
  680. struct evtchn_bind_pirq bind_pirq;
  681. evtchn_port_t evtchn = info->evtchn;
  682. int rc;
  683. if (VALID_EVTCHN(evtchn))
  684. goto out;
  685. bind_pirq.pirq = pirq_from_irq(info);
  686. /* NB. We are happy to share unless we are probing. */
  687. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  688. BIND_PIRQ__WILL_SHARE : 0;
  689. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  690. if (rc != 0) {
  691. pr_warn("Failed to obtain physical IRQ %d\n", info->irq);
  692. return 0;
  693. }
  694. evtchn = bind_pirq.port;
  695. pirq_query_unmask(info);
  696. rc = set_evtchn_to_irq(evtchn, info->irq);
  697. if (rc)
  698. goto err;
  699. info->evtchn = evtchn;
  700. bind_evtchn_to_cpu(info, 0, false);
  701. rc = xen_evtchn_port_setup(evtchn);
  702. if (rc)
  703. goto err;
  704. out:
  705. do_unmask(info, EVT_MASK_REASON_EXPLICIT);
  706. do_eoi_pirq(info);
  707. return 0;
  708. err:
  709. pr_err("irq%d: Failed to set port to irq mapping (%d)\n", info->irq,
  710. rc);
  711. xen_evtchn_close(evtchn);
  712. return 0;
  713. }
  714. static unsigned int startup_pirq(struct irq_data *data)
  715. {
  716. struct irq_info *info = info_for_irq(data->irq);
  717. return __startup_pirq(info);
  718. }
  719. static void shutdown_pirq(struct irq_data *data)
  720. {
  721. struct irq_info *info = info_for_irq(data->irq);
  722. evtchn_port_t evtchn = info->evtchn;
  723. BUG_ON(info->type != IRQT_PIRQ);
  724. if (!VALID_EVTCHN(evtchn))
  725. return;
  726. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  727. xen_irq_info_cleanup(info);
  728. xen_evtchn_close(evtchn);
  729. }
  730. static void enable_pirq(struct irq_data *data)
  731. {
  732. enable_dynirq(data);
  733. }
  734. static void disable_pirq(struct irq_data *data)
  735. {
  736. disable_dynirq(data);
  737. }
  738. int xen_irq_from_gsi(unsigned gsi)
  739. {
  740. struct irq_info *info;
  741. list_for_each_entry(info, &xen_irq_list_head, list) {
  742. if (info->type != IRQT_PIRQ)
  743. continue;
  744. if (info->u.pirq.gsi == gsi)
  745. return info->irq;
  746. }
  747. return -1;
  748. }
  749. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  750. static void __unbind_from_irq(struct irq_info *info, unsigned int irq)
  751. {
  752. evtchn_port_t evtchn;
  753. bool close_evtchn = false;
  754. if (!info) {
  755. xen_irq_free_desc(irq);
  756. return;
  757. }
  758. if (info->refcnt > 0) {
  759. info->refcnt--;
  760. if (info->refcnt != 0)
  761. return;
  762. }
  763. evtchn = info->evtchn;
  764. if (VALID_EVTCHN(evtchn)) {
  765. unsigned int cpu = info->cpu;
  766. struct xenbus_device *dev;
  767. if (!info->is_static)
  768. close_evtchn = true;
  769. switch (info->type) {
  770. case IRQT_VIRQ:
  771. per_cpu(virq_to_irq, cpu)[virq_from_irq(info)] = -1;
  772. break;
  773. case IRQT_IPI:
  774. per_cpu(ipi_to_irq, cpu)[ipi_from_irq(info)] = -1;
  775. per_cpu(ipi_to_evtchn, cpu)[ipi_from_irq(info)] = 0;
  776. break;
  777. case IRQT_EVTCHN:
  778. dev = info->u.interdomain;
  779. if (dev)
  780. atomic_dec(&dev->event_channels);
  781. break;
  782. default:
  783. break;
  784. }
  785. xen_irq_info_cleanup(info);
  786. if (close_evtchn)
  787. xen_evtchn_close(evtchn);
  788. }
  789. xen_free_irq(info);
  790. }
  791. /*
  792. * Do not make any assumptions regarding the relationship between the
  793. * IRQ number returned here and the Xen pirq argument.
  794. *
  795. * Note: We don't assign an event channel until the irq actually started
  796. * up. Return an existing irq if we've already got one for the gsi.
  797. *
  798. * Shareable implies level triggered, not shareable implies edge
  799. * triggered here.
  800. */
  801. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  802. unsigned pirq, int shareable, char *name)
  803. {
  804. struct irq_info *info;
  805. struct physdev_irq irq_op;
  806. int ret;
  807. mutex_lock(&irq_mapping_update_lock);
  808. ret = xen_irq_from_gsi(gsi);
  809. if (ret != -1) {
  810. pr_info("%s: returning irq %d for gsi %u\n",
  811. __func__, ret, gsi);
  812. goto out;
  813. }
  814. info = xen_allocate_irq_gsi(gsi);
  815. if (!info)
  816. goto out;
  817. irq_op.irq = info->irq;
  818. irq_op.vector = 0;
  819. /* Only the privileged domain can do this. For non-priv, the pcifront
  820. * driver provides a PCI bus that does the call to do exactly
  821. * this in the priv domain. */
  822. if (xen_initial_domain() &&
  823. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  824. xen_free_irq(info);
  825. ret = -ENOSPC;
  826. goto out;
  827. }
  828. ret = xen_irq_info_pirq_setup(info, 0, pirq, gsi, DOMID_SELF,
  829. shareable ? PIRQ_SHAREABLE : 0);
  830. if (ret < 0) {
  831. __unbind_from_irq(info, info->irq);
  832. goto out;
  833. }
  834. pirq_query_unmask(info);
  835. /* We try to use the handler with the appropriate semantic for the
  836. * type of interrupt: if the interrupt is an edge triggered
  837. * interrupt we use handle_edge_irq.
  838. *
  839. * On the other hand if the interrupt is level triggered we use
  840. * handle_fasteoi_irq like the native code does for this kind of
  841. * interrupts.
  842. *
  843. * Depending on the Xen version, pirq_needs_eoi might return true
  844. * not only for level triggered interrupts but for edge triggered
  845. * interrupts too. In any case Xen always honors the eoi mechanism,
  846. * not injecting any more pirqs of the same kind if the first one
  847. * hasn't received an eoi yet. Therefore using the fasteoi handler
  848. * is the right choice either way.
  849. */
  850. if (shareable)
  851. irq_set_chip_and_handler_name(info->irq, &xen_pirq_chip,
  852. handle_fasteoi_irq, name);
  853. else
  854. irq_set_chip_and_handler_name(info->irq, &xen_pirq_chip,
  855. handle_edge_irq, name);
  856. ret = info->irq;
  857. out:
  858. mutex_unlock(&irq_mapping_update_lock);
  859. return ret;
  860. }
  861. #ifdef CONFIG_PCI_MSI
  862. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  863. {
  864. int rc;
  865. struct physdev_get_free_pirq op_get_free_pirq;
  866. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  867. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  868. WARN_ONCE(rc == -ENOSYS,
  869. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  870. return rc ? -1 : op_get_free_pirq.pirq;
  871. }
  872. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  873. int pirq, int nvec, const char *name, domid_t domid)
  874. {
  875. int i, irq, ret;
  876. struct irq_info *info;
  877. mutex_lock(&irq_mapping_update_lock);
  878. irq = irq_alloc_descs(-1, 0, nvec, -1);
  879. if (irq < 0)
  880. goto out;
  881. for (i = 0; i < nvec; i++) {
  882. info = xen_irq_init(irq + i);
  883. if (!info) {
  884. ret = -ENOMEM;
  885. goto error_irq;
  886. }
  887. irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
  888. ret = xen_irq_info_pirq_setup(info, 0, pirq + i, 0, domid,
  889. i == 0 ? 0 : PIRQ_MSI_GROUP);
  890. if (ret < 0)
  891. goto error_irq;
  892. }
  893. ret = irq_set_msi_desc(irq, msidesc);
  894. if (ret < 0)
  895. goto error_irq;
  896. out:
  897. mutex_unlock(&irq_mapping_update_lock);
  898. return irq;
  899. error_irq:
  900. while (nvec--) {
  901. info = info_for_irq(irq + nvec);
  902. __unbind_from_irq(info, irq + nvec);
  903. }
  904. mutex_unlock(&irq_mapping_update_lock);
  905. return ret;
  906. }
  907. #endif
  908. int xen_destroy_irq(int irq)
  909. {
  910. struct physdev_unmap_pirq unmap_irq;
  911. struct irq_info *info = info_for_irq(irq);
  912. int rc = -ENOENT;
  913. mutex_lock(&irq_mapping_update_lock);
  914. /*
  915. * If trying to remove a vector in a MSI group different
  916. * than the first one skip the PIRQ unmap unless this vector
  917. * is the first one in the group.
  918. */
  919. if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
  920. unmap_irq.pirq = info->u.pirq.pirq;
  921. unmap_irq.domid = info->u.pirq.domid;
  922. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  923. /* If another domain quits without making the pci_disable_msix
  924. * call, the Xen hypervisor takes care of freeing the PIRQs
  925. * (free_domain_pirqs).
  926. */
  927. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  928. pr_info("domain %d does not have %d anymore\n",
  929. info->u.pirq.domid, info->u.pirq.pirq);
  930. else if (rc) {
  931. pr_warn("unmap irq failed %d\n", rc);
  932. goto out;
  933. }
  934. }
  935. xen_free_irq(info);
  936. out:
  937. mutex_unlock(&irq_mapping_update_lock);
  938. return rc;
  939. }
  940. int xen_pirq_from_irq(unsigned irq)
  941. {
  942. struct irq_info *info = info_for_irq(irq);
  943. return pirq_from_irq(info);
  944. }
  945. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  946. static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip,
  947. struct xenbus_device *dev, bool shared)
  948. {
  949. int ret = -ENOMEM;
  950. struct irq_info *info;
  951. if (evtchn >= xen_evtchn_max_channels())
  952. return -ENOMEM;
  953. mutex_lock(&irq_mapping_update_lock);
  954. info = evtchn_to_info(evtchn);
  955. if (!info) {
  956. info = xen_allocate_irq_dynamic();
  957. if (!info)
  958. goto out;
  959. irq_set_chip_and_handler_name(info->irq, chip,
  960. handle_edge_irq, "event");
  961. ret = xen_irq_info_evtchn_setup(info, evtchn, dev);
  962. if (ret < 0) {
  963. __unbind_from_irq(info, info->irq);
  964. goto out;
  965. }
  966. /*
  967. * New interdomain events are initially bound to vCPU0 This
  968. * is required to setup the event channel in the first
  969. * place and also important for UP guests because the
  970. * affinity setting is not invoked on them so nothing would
  971. * bind the channel.
  972. */
  973. bind_evtchn_to_cpu(info, 0, false);
  974. } else if (!WARN_ON(info->type != IRQT_EVTCHN)) {
  975. if (shared && !WARN_ON(info->refcnt < 0))
  976. info->refcnt++;
  977. }
  978. ret = info->irq;
  979. out:
  980. mutex_unlock(&irq_mapping_update_lock);
  981. return ret;
  982. }
  983. int bind_evtchn_to_irq(evtchn_port_t evtchn)
  984. {
  985. return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip, NULL, false);
  986. }
  987. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  988. int bind_evtchn_to_irq_lateeoi(evtchn_port_t evtchn)
  989. {
  990. return bind_evtchn_to_irq_chip(evtchn, &xen_lateeoi_chip, NULL, false);
  991. }
  992. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq_lateeoi);
  993. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  994. {
  995. struct evtchn_bind_ipi bind_ipi;
  996. evtchn_port_t evtchn;
  997. struct irq_info *info;
  998. int ret;
  999. mutex_lock(&irq_mapping_update_lock);
  1000. ret = per_cpu(ipi_to_irq, cpu)[ipi];
  1001. if (ret == -1) {
  1002. info = xen_allocate_irq_dynamic();
  1003. if (!info)
  1004. goto out;
  1005. irq_set_chip_and_handler_name(info->irq, &xen_percpu_chip,
  1006. handle_percpu_irq, "ipi");
  1007. bind_ipi.vcpu = xen_vcpu_nr(cpu);
  1008. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1009. &bind_ipi) != 0)
  1010. BUG();
  1011. evtchn = bind_ipi.port;
  1012. ret = xen_irq_info_ipi_setup(info, cpu, evtchn, ipi);
  1013. if (ret < 0) {
  1014. __unbind_from_irq(info, info->irq);
  1015. goto out;
  1016. }
  1017. /*
  1018. * Force the affinity mask to the target CPU so proc shows
  1019. * the correct target.
  1020. */
  1021. bind_evtchn_to_cpu(info, cpu, true);
  1022. ret = info->irq;
  1023. } else {
  1024. info = info_for_irq(ret);
  1025. WARN_ON(info == NULL || info->type != IRQT_IPI);
  1026. }
  1027. out:
  1028. mutex_unlock(&irq_mapping_update_lock);
  1029. return ret;
  1030. }
  1031. static int bind_interdomain_evtchn_to_irq_chip(struct xenbus_device *dev,
  1032. evtchn_port_t remote_port,
  1033. struct irq_chip *chip,
  1034. bool shared)
  1035. {
  1036. struct evtchn_bind_interdomain bind_interdomain;
  1037. int err;
  1038. bind_interdomain.remote_dom = dev->otherend_id;
  1039. bind_interdomain.remote_port = remote_port;
  1040. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  1041. &bind_interdomain);
  1042. return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port,
  1043. chip, dev, shared);
  1044. }
  1045. int bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device *dev,
  1046. evtchn_port_t remote_port)
  1047. {
  1048. return bind_interdomain_evtchn_to_irq_chip(dev, remote_port,
  1049. &xen_lateeoi_chip, false);
  1050. }
  1051. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi);
  1052. static int find_virq(unsigned int virq, unsigned int cpu, evtchn_port_t *evtchn,
  1053. bool percpu)
  1054. {
  1055. struct evtchn_status status;
  1056. evtchn_port_t port;
  1057. bool exists = false;
  1058. memset(&status, 0, sizeof(status));
  1059. for (port = 0; port < xen_evtchn_max_channels(); port++) {
  1060. int rc;
  1061. status.dom = DOMID_SELF;
  1062. status.port = port;
  1063. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  1064. if (rc < 0)
  1065. continue;
  1066. if (status.status != EVTCHNSTAT_virq)
  1067. continue;
  1068. if (status.u.virq != virq)
  1069. continue;
  1070. if (status.vcpu == xen_vcpu_nr(cpu)) {
  1071. *evtchn = port;
  1072. return 0;
  1073. } else if (!percpu) {
  1074. exists = true;
  1075. }
  1076. }
  1077. return exists ? -EEXIST : -ENOENT;
  1078. }
  1079. /**
  1080. * xen_evtchn_nr_channels - number of usable event channel ports
  1081. *
  1082. * This may be less than the maximum supported by the current
  1083. * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
  1084. * supported.
  1085. */
  1086. unsigned xen_evtchn_nr_channels(void)
  1087. {
  1088. return evtchn_ops->nr_channels();
  1089. }
  1090. EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
  1091. int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
  1092. {
  1093. struct evtchn_bind_virq bind_virq;
  1094. evtchn_port_t evtchn = 0;
  1095. struct irq_info *info;
  1096. int ret;
  1097. mutex_lock(&irq_mapping_update_lock);
  1098. ret = per_cpu(virq_to_irq, cpu)[virq];
  1099. if (ret == -1) {
  1100. info = xen_allocate_irq_dynamic();
  1101. if (!info)
  1102. goto out;
  1103. if (percpu)
  1104. irq_set_chip_and_handler_name(info->irq, &xen_percpu_chip,
  1105. handle_percpu_irq, "virq");
  1106. else
  1107. irq_set_chip_and_handler_name(info->irq, &xen_dynamic_chip,
  1108. handle_edge_irq, "virq");
  1109. bind_virq.virq = virq;
  1110. bind_virq.vcpu = xen_vcpu_nr(cpu);
  1111. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1112. &bind_virq);
  1113. if (ret == 0)
  1114. evtchn = bind_virq.port;
  1115. else {
  1116. if (ret == -EEXIST)
  1117. ret = find_virq(virq, cpu, &evtchn, percpu);
  1118. if (ret) {
  1119. __unbind_from_irq(info, info->irq);
  1120. goto out;
  1121. }
  1122. }
  1123. ret = xen_irq_info_virq_setup(info, cpu, evtchn, virq);
  1124. if (ret < 0) {
  1125. __unbind_from_irq(info, info->irq);
  1126. goto out;
  1127. }
  1128. /*
  1129. * Force the affinity mask for percpu interrupts so proc
  1130. * shows the correct target.
  1131. */
  1132. bind_evtchn_to_cpu(info, cpu, percpu);
  1133. ret = info->irq;
  1134. } else {
  1135. info = info_for_irq(ret);
  1136. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  1137. }
  1138. out:
  1139. mutex_unlock(&irq_mapping_update_lock);
  1140. return ret;
  1141. }
  1142. static void unbind_from_irq(unsigned int irq)
  1143. {
  1144. struct irq_info *info;
  1145. mutex_lock(&irq_mapping_update_lock);
  1146. info = info_for_irq(irq);
  1147. __unbind_from_irq(info, irq);
  1148. mutex_unlock(&irq_mapping_update_lock);
  1149. }
  1150. static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn,
  1151. irq_handler_t handler,
  1152. unsigned long irqflags,
  1153. const char *devname, void *dev_id,
  1154. struct irq_chip *chip)
  1155. {
  1156. int irq, retval;
  1157. irq = bind_evtchn_to_irq_chip(evtchn, chip, NULL,
  1158. irqflags & IRQF_SHARED);
  1159. if (irq < 0)
  1160. return irq;
  1161. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1162. if (retval != 0) {
  1163. unbind_from_irq(irq);
  1164. return retval;
  1165. }
  1166. return irq;
  1167. }
  1168. int bind_evtchn_to_irqhandler(evtchn_port_t evtchn,
  1169. irq_handler_t handler,
  1170. unsigned long irqflags,
  1171. const char *devname, void *dev_id)
  1172. {
  1173. return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
  1174. devname, dev_id,
  1175. &xen_dynamic_chip);
  1176. }
  1177. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  1178. int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn,
  1179. irq_handler_t handler,
  1180. unsigned long irqflags,
  1181. const char *devname, void *dev_id)
  1182. {
  1183. return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
  1184. devname, dev_id,
  1185. &xen_lateeoi_chip);
  1186. }
  1187. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi);
  1188. static int bind_interdomain_evtchn_to_irqhandler_chip(
  1189. struct xenbus_device *dev, evtchn_port_t remote_port,
  1190. irq_handler_t handler, unsigned long irqflags,
  1191. const char *devname, void *dev_id, struct irq_chip *chip)
  1192. {
  1193. int irq, retval;
  1194. irq = bind_interdomain_evtchn_to_irq_chip(dev, remote_port, chip,
  1195. irqflags & IRQF_SHARED);
  1196. if (irq < 0)
  1197. return irq;
  1198. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1199. if (retval != 0) {
  1200. unbind_from_irq(irq);
  1201. return retval;
  1202. }
  1203. return irq;
  1204. }
  1205. int bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device *dev,
  1206. evtchn_port_t remote_port,
  1207. irq_handler_t handler,
  1208. unsigned long irqflags,
  1209. const char *devname,
  1210. void *dev_id)
  1211. {
  1212. return bind_interdomain_evtchn_to_irqhandler_chip(dev,
  1213. remote_port, handler, irqflags, devname,
  1214. dev_id, &xen_lateeoi_chip);
  1215. }
  1216. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi);
  1217. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  1218. irq_handler_t handler,
  1219. unsigned long irqflags, const char *devname, void *dev_id)
  1220. {
  1221. int irq, retval;
  1222. irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
  1223. if (irq < 0)
  1224. return irq;
  1225. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1226. if (retval != 0) {
  1227. unbind_from_irq(irq);
  1228. return retval;
  1229. }
  1230. return irq;
  1231. }
  1232. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  1233. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  1234. unsigned int cpu,
  1235. irq_handler_t handler,
  1236. unsigned long irqflags,
  1237. const char *devname,
  1238. void *dev_id)
  1239. {
  1240. int irq, retval;
  1241. irq = bind_ipi_to_irq(ipi, cpu);
  1242. if (irq < 0)
  1243. return irq;
  1244. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  1245. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1246. if (retval != 0) {
  1247. unbind_from_irq(irq);
  1248. return retval;
  1249. }
  1250. return irq;
  1251. }
  1252. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  1253. {
  1254. struct irq_info *info = info_for_irq(irq);
  1255. if (WARN_ON(!info))
  1256. return;
  1257. free_irq(irq, dev_id);
  1258. unbind_from_irq(irq);
  1259. }
  1260. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  1261. /**
  1262. * xen_set_irq_priority() - set an event channel priority.
  1263. * @irq:irq bound to an event channel.
  1264. * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
  1265. */
  1266. int xen_set_irq_priority(unsigned irq, unsigned priority)
  1267. {
  1268. struct evtchn_set_priority set_priority;
  1269. set_priority.port = evtchn_from_irq(irq);
  1270. set_priority.priority = priority;
  1271. return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
  1272. &set_priority);
  1273. }
  1274. EXPORT_SYMBOL_GPL(xen_set_irq_priority);
  1275. int evtchn_make_refcounted(evtchn_port_t evtchn, bool is_static)
  1276. {
  1277. struct irq_info *info = evtchn_to_info(evtchn);
  1278. if (!info)
  1279. return -ENOENT;
  1280. WARN_ON(info->refcnt != -1);
  1281. info->refcnt = 1;
  1282. info->is_static = is_static;
  1283. return 0;
  1284. }
  1285. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  1286. int evtchn_get(evtchn_port_t evtchn)
  1287. {
  1288. struct irq_info *info;
  1289. int err = -ENOENT;
  1290. if (evtchn >= xen_evtchn_max_channels())
  1291. return -EINVAL;
  1292. mutex_lock(&irq_mapping_update_lock);
  1293. info = evtchn_to_info(evtchn);
  1294. if (!info)
  1295. goto done;
  1296. err = -EINVAL;
  1297. if (info->refcnt <= 0 || info->refcnt == SHRT_MAX)
  1298. goto done;
  1299. info->refcnt++;
  1300. err = 0;
  1301. done:
  1302. mutex_unlock(&irq_mapping_update_lock);
  1303. return err;
  1304. }
  1305. EXPORT_SYMBOL_GPL(evtchn_get);
  1306. void evtchn_put(evtchn_port_t evtchn)
  1307. {
  1308. struct irq_info *info = evtchn_to_info(evtchn);
  1309. if (WARN_ON(!info))
  1310. return;
  1311. unbind_from_irq(info->irq);
  1312. }
  1313. EXPORT_SYMBOL_GPL(evtchn_put);
  1314. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  1315. {
  1316. evtchn_port_t evtchn;
  1317. #ifdef CONFIG_X86
  1318. if (unlikely(vector == XEN_NMI_VECTOR)) {
  1319. int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu),
  1320. NULL);
  1321. if (rc < 0)
  1322. printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
  1323. return;
  1324. }
  1325. #endif
  1326. evtchn = per_cpu(ipi_to_evtchn, cpu)[vector];
  1327. BUG_ON(evtchn == 0);
  1328. notify_remote_via_evtchn(evtchn);
  1329. }
  1330. struct evtchn_loop_ctrl {
  1331. ktime_t timeout;
  1332. unsigned count;
  1333. bool defer_eoi;
  1334. };
  1335. void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl)
  1336. {
  1337. struct irq_info *info = evtchn_to_info(port);
  1338. struct xenbus_device *dev;
  1339. if (!info)
  1340. return;
  1341. /*
  1342. * Check for timeout every 256 events.
  1343. * We are setting the timeout value only after the first 256
  1344. * events in order to not hurt the common case of few loop
  1345. * iterations. The 256 is basically an arbitrary value.
  1346. *
  1347. * In case we are hitting the timeout we need to defer all further
  1348. * EOIs in order to ensure to leave the event handling loop rather
  1349. * sooner than later.
  1350. */
  1351. if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) {
  1352. ktime_t kt = ktime_get();
  1353. if (!ctrl->timeout) {
  1354. kt = ktime_add_ms(kt,
  1355. jiffies_to_msecs(event_loop_timeout));
  1356. ctrl->timeout = kt;
  1357. } else if (kt > ctrl->timeout) {
  1358. ctrl->defer_eoi = true;
  1359. }
  1360. }
  1361. if (xchg_acquire(&info->is_active, 1))
  1362. return;
  1363. dev = (info->type == IRQT_EVTCHN) ? info->u.interdomain : NULL;
  1364. if (dev)
  1365. atomic_inc(&dev->events);
  1366. if (ctrl->defer_eoi) {
  1367. info->eoi_cpu = smp_processor_id();
  1368. info->irq_epoch = __this_cpu_read(irq_epoch);
  1369. info->eoi_time = get_jiffies_64() + event_eoi_delay;
  1370. }
  1371. generic_handle_irq(info->irq);
  1372. }
  1373. int xen_evtchn_do_upcall(void)
  1374. {
  1375. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1376. int ret = vcpu_info->evtchn_upcall_pending ? IRQ_HANDLED : IRQ_NONE;
  1377. int cpu = smp_processor_id();
  1378. struct evtchn_loop_ctrl ctrl = { 0 };
  1379. /*
  1380. * When closing an event channel the associated IRQ must not be freed
  1381. * until all cpus have left the event handling loop. This is ensured
  1382. * by taking the rcu_read_lock() while handling events, as freeing of
  1383. * the IRQ is handled via queue_rcu_work() _after_ closing the event
  1384. * channel.
  1385. */
  1386. rcu_read_lock();
  1387. do {
  1388. vcpu_info->evtchn_upcall_pending = 0;
  1389. xen_evtchn_handle_events(cpu, &ctrl);
  1390. BUG_ON(!irqs_disabled());
  1391. virt_rmb(); /* Hypervisor can set upcall pending. */
  1392. } while (vcpu_info->evtchn_upcall_pending);
  1393. rcu_read_unlock();
  1394. /*
  1395. * Increment irq_epoch only now to defer EOIs only for
  1396. * xen_irq_lateeoi() invocations occurring from inside the loop
  1397. * above.
  1398. */
  1399. __this_cpu_inc(irq_epoch);
  1400. return ret;
  1401. }
  1402. EXPORT_SYMBOL_GPL(xen_evtchn_do_upcall);
  1403. /* Rebind a new event channel to an existing irq. */
  1404. void rebind_evtchn_irq(evtchn_port_t evtchn, int irq)
  1405. {
  1406. struct irq_info *info = info_for_irq(irq);
  1407. if (WARN_ON(!info))
  1408. return;
  1409. /* Make sure the irq is masked, since the new event channel
  1410. will also be masked. */
  1411. disable_irq(irq);
  1412. mutex_lock(&irq_mapping_update_lock);
  1413. /* After resume the irq<->evtchn mappings are all cleared out */
  1414. BUG_ON(evtchn_to_info(evtchn));
  1415. /* Expect irq to have been bound before,
  1416. so there should be a proper type */
  1417. BUG_ON(info->type == IRQT_UNBOUND);
  1418. info->irq = irq;
  1419. (void)xen_irq_info_evtchn_setup(info, evtchn, NULL);
  1420. mutex_unlock(&irq_mapping_update_lock);
  1421. bind_evtchn_to_cpu(info, info->cpu, false);
  1422. /* Unmask the event channel. */
  1423. enable_irq(irq);
  1424. }
  1425. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1426. static int xen_rebind_evtchn_to_cpu(struct irq_info *info, unsigned int tcpu)
  1427. {
  1428. struct evtchn_bind_vcpu bind_vcpu;
  1429. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1430. if (!VALID_EVTCHN(evtchn))
  1431. return -1;
  1432. if (!xen_support_evtchn_rebind())
  1433. return -1;
  1434. /* Send future instances of this interrupt to other vcpu. */
  1435. bind_vcpu.port = evtchn;
  1436. bind_vcpu.vcpu = xen_vcpu_nr(tcpu);
  1437. /*
  1438. * Mask the event while changing the VCPU binding to prevent
  1439. * it being delivered on an unexpected VCPU.
  1440. */
  1441. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1442. /*
  1443. * If this fails, it usually just indicates that we're dealing with a
  1444. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1445. * it, but don't do the xenlinux-level rebind in that case.
  1446. */
  1447. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0) {
  1448. int old_cpu = info->cpu;
  1449. bind_evtchn_to_cpu(info, tcpu, false);
  1450. if (info->type == IRQT_VIRQ) {
  1451. int virq = info->u.virq;
  1452. int irq = per_cpu(virq_to_irq, old_cpu)[virq];
  1453. per_cpu(virq_to_irq, old_cpu)[virq] = -1;
  1454. per_cpu(virq_to_irq, tcpu)[virq] = irq;
  1455. }
  1456. }
  1457. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1458. return 0;
  1459. }
  1460. /*
  1461. * Find the CPU within @dest mask which has the least number of channels
  1462. * assigned. This is not precise as the per cpu counts can be modified
  1463. * concurrently.
  1464. */
  1465. static unsigned int select_target_cpu(const struct cpumask *dest)
  1466. {
  1467. unsigned int cpu, best_cpu = UINT_MAX, minch = UINT_MAX;
  1468. for_each_cpu_and(cpu, dest, cpu_online_mask) {
  1469. unsigned int curch = atomic_read(&channels_on_cpu[cpu]);
  1470. if (curch < minch) {
  1471. minch = curch;
  1472. best_cpu = cpu;
  1473. }
  1474. }
  1475. /*
  1476. * Catch the unlikely case that dest contains no online CPUs. Can't
  1477. * recurse.
  1478. */
  1479. if (best_cpu == UINT_MAX)
  1480. return select_target_cpu(cpu_online_mask);
  1481. return best_cpu;
  1482. }
  1483. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1484. bool force)
  1485. {
  1486. unsigned int tcpu = select_target_cpu(dest);
  1487. int ret;
  1488. ret = xen_rebind_evtchn_to_cpu(info_for_irq(data->irq), tcpu);
  1489. if (!ret)
  1490. irq_data_update_effective_affinity(data, cpumask_of(tcpu));
  1491. return ret;
  1492. }
  1493. static void enable_dynirq(struct irq_data *data)
  1494. {
  1495. struct irq_info *info = info_for_irq(data->irq);
  1496. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1497. if (VALID_EVTCHN(evtchn))
  1498. do_unmask(info, EVT_MASK_REASON_EXPLICIT);
  1499. }
  1500. static void do_ack_dynirq(struct irq_info *info)
  1501. {
  1502. evtchn_port_t evtchn = info->evtchn;
  1503. if (VALID_EVTCHN(evtchn))
  1504. event_handler_exit(info);
  1505. }
  1506. static void ack_dynirq(struct irq_data *data)
  1507. {
  1508. struct irq_info *info = info_for_irq(data->irq);
  1509. if (info)
  1510. do_ack_dynirq(info);
  1511. }
  1512. static void mask_ack_dynirq(struct irq_data *data)
  1513. {
  1514. struct irq_info *info = info_for_irq(data->irq);
  1515. if (info) {
  1516. do_disable_dynirq(info);
  1517. do_ack_dynirq(info);
  1518. }
  1519. }
  1520. static void lateeoi_ack_dynirq(struct irq_data *data)
  1521. {
  1522. struct irq_info *info = info_for_irq(data->irq);
  1523. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1524. if (VALID_EVTCHN(evtchn)) {
  1525. do_mask(info, EVT_MASK_REASON_EOI_PENDING);
  1526. /*
  1527. * Don't call event_handler_exit().
  1528. * Need to keep is_active non-zero in order to ignore re-raised
  1529. * events after cpu affinity changes while a lateeoi is pending.
  1530. */
  1531. clear_evtchn(evtchn);
  1532. }
  1533. }
  1534. static void lateeoi_mask_ack_dynirq(struct irq_data *data)
  1535. {
  1536. struct irq_info *info = info_for_irq(data->irq);
  1537. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1538. if (VALID_EVTCHN(evtchn)) {
  1539. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  1540. event_handler_exit(info);
  1541. }
  1542. }
  1543. static int retrigger_dynirq(struct irq_data *data)
  1544. {
  1545. struct irq_info *info = info_for_irq(data->irq);
  1546. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1547. if (!VALID_EVTCHN(evtchn))
  1548. return 0;
  1549. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1550. set_evtchn(evtchn);
  1551. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1552. return 1;
  1553. }
  1554. static void restore_pirqs(void)
  1555. {
  1556. int pirq, rc, irq, gsi;
  1557. struct physdev_map_pirq map_irq;
  1558. struct irq_info *info;
  1559. list_for_each_entry(info, &xen_irq_list_head, list) {
  1560. if (info->type != IRQT_PIRQ)
  1561. continue;
  1562. pirq = info->u.pirq.pirq;
  1563. gsi = info->u.pirq.gsi;
  1564. irq = info->irq;
  1565. /* save/restore of PT devices doesn't work, so at this point the
  1566. * only devices present are GSI based emulated devices */
  1567. if (!gsi)
  1568. continue;
  1569. map_irq.domid = DOMID_SELF;
  1570. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1571. map_irq.index = gsi;
  1572. map_irq.pirq = pirq;
  1573. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1574. if (rc) {
  1575. pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1576. gsi, irq, pirq, rc);
  1577. xen_free_irq(info);
  1578. continue;
  1579. }
  1580. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1581. __startup_pirq(info);
  1582. }
  1583. }
  1584. static void restore_cpu_virqs(unsigned int cpu)
  1585. {
  1586. struct evtchn_bind_virq bind_virq;
  1587. evtchn_port_t evtchn;
  1588. struct irq_info *info;
  1589. int virq, irq;
  1590. for (virq = 0; virq < NR_VIRQS; virq++) {
  1591. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1592. continue;
  1593. info = info_for_irq(irq);
  1594. BUG_ON(virq_from_irq(info) != virq);
  1595. /* Get a new binding from Xen. */
  1596. bind_virq.virq = virq;
  1597. bind_virq.vcpu = xen_vcpu_nr(cpu);
  1598. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1599. &bind_virq) != 0)
  1600. BUG();
  1601. evtchn = bind_virq.port;
  1602. /* Record the new mapping. */
  1603. xen_irq_info_virq_setup(info, cpu, evtchn, virq);
  1604. /* The affinity mask is still valid */
  1605. bind_evtchn_to_cpu(info, cpu, false);
  1606. }
  1607. }
  1608. static void restore_cpu_ipis(unsigned int cpu)
  1609. {
  1610. struct evtchn_bind_ipi bind_ipi;
  1611. evtchn_port_t evtchn;
  1612. struct irq_info *info;
  1613. int ipi, irq;
  1614. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1615. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1616. continue;
  1617. info = info_for_irq(irq);
  1618. BUG_ON(ipi_from_irq(info) != ipi);
  1619. /* Get a new binding from Xen. */
  1620. bind_ipi.vcpu = xen_vcpu_nr(cpu);
  1621. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1622. &bind_ipi) != 0)
  1623. BUG();
  1624. evtchn = bind_ipi.port;
  1625. /* Record the new mapping. */
  1626. xen_irq_info_ipi_setup(info, cpu, evtchn, ipi);
  1627. /* The affinity mask is still valid */
  1628. bind_evtchn_to_cpu(info, cpu, false);
  1629. }
  1630. }
  1631. /* Clear an irq's pending state, in preparation for polling on it */
  1632. void xen_clear_irq_pending(int irq)
  1633. {
  1634. struct irq_info *info = info_for_irq(irq);
  1635. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1636. if (VALID_EVTCHN(evtchn))
  1637. event_handler_exit(info);
  1638. }
  1639. EXPORT_SYMBOL(xen_clear_irq_pending);
  1640. bool xen_test_irq_pending(int irq)
  1641. {
  1642. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1643. bool ret = false;
  1644. if (VALID_EVTCHN(evtchn))
  1645. ret = test_evtchn(evtchn);
  1646. return ret;
  1647. }
  1648. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1649. * the irq will be disabled so it won't deliver an interrupt. */
  1650. void xen_poll_irq_timeout(int irq, u64 timeout)
  1651. {
  1652. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1653. if (VALID_EVTCHN(evtchn)) {
  1654. struct sched_poll poll;
  1655. poll.nr_ports = 1;
  1656. poll.timeout = timeout;
  1657. set_xen_guest_handle(poll.ports, &evtchn);
  1658. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1659. BUG();
  1660. }
  1661. }
  1662. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1663. /* Poll waiting for an irq to become pending. In the usual case, the
  1664. * irq will be disabled so it won't deliver an interrupt. */
  1665. void xen_poll_irq(int irq)
  1666. {
  1667. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1668. }
  1669. /* Check whether the IRQ line is shared with other guests. */
  1670. int xen_test_irq_shared(int irq)
  1671. {
  1672. struct irq_info *info = info_for_irq(irq);
  1673. struct physdev_irq_status_query irq_status;
  1674. if (WARN_ON(!info))
  1675. return -ENOENT;
  1676. irq_status.irq = info->u.pirq.pirq;
  1677. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1678. return 0;
  1679. return !(irq_status.flags & XENIRQSTAT_shared);
  1680. }
  1681. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1682. void xen_irq_resume(void)
  1683. {
  1684. unsigned int cpu;
  1685. struct irq_info *info;
  1686. /* New event-channel space is not 'live' yet. */
  1687. xen_evtchn_resume();
  1688. /* No IRQ <-> event-channel mappings. */
  1689. list_for_each_entry(info, &xen_irq_list_head, list) {
  1690. /* Zap event-channel binding */
  1691. info->evtchn = 0;
  1692. /* Adjust accounting */
  1693. channels_on_cpu_dec(info);
  1694. }
  1695. clear_evtchn_to_irq_all();
  1696. for_each_possible_cpu(cpu) {
  1697. restore_cpu_virqs(cpu);
  1698. restore_cpu_ipis(cpu);
  1699. }
  1700. restore_pirqs();
  1701. }
  1702. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1703. .name = "xen-dyn",
  1704. .irq_disable = disable_dynirq,
  1705. .irq_mask = disable_dynirq,
  1706. .irq_unmask = enable_dynirq,
  1707. .irq_ack = ack_dynirq,
  1708. .irq_mask_ack = mask_ack_dynirq,
  1709. .irq_set_affinity = set_affinity_irq,
  1710. .irq_retrigger = retrigger_dynirq,
  1711. };
  1712. static struct irq_chip xen_lateeoi_chip __read_mostly = {
  1713. /* The chip name needs to contain "xen-dyn" for irqbalance to work. */
  1714. .name = "xen-dyn-lateeoi",
  1715. .irq_disable = disable_dynirq,
  1716. .irq_mask = disable_dynirq,
  1717. .irq_unmask = enable_dynirq,
  1718. .irq_ack = lateeoi_ack_dynirq,
  1719. .irq_mask_ack = lateeoi_mask_ack_dynirq,
  1720. .irq_set_affinity = set_affinity_irq,
  1721. .irq_retrigger = retrigger_dynirq,
  1722. };
  1723. static struct irq_chip xen_pirq_chip __read_mostly = {
  1724. .name = "xen-pirq",
  1725. .irq_startup = startup_pirq,
  1726. .irq_shutdown = shutdown_pirq,
  1727. .irq_enable = enable_pirq,
  1728. .irq_disable = disable_pirq,
  1729. .irq_mask = disable_dynirq,
  1730. .irq_unmask = enable_dynirq,
  1731. .irq_ack = eoi_pirq,
  1732. .irq_eoi = eoi_pirq,
  1733. .irq_mask_ack = mask_ack_pirq,
  1734. .irq_set_affinity = set_affinity_irq,
  1735. .irq_retrigger = retrigger_dynirq,
  1736. };
  1737. static struct irq_chip xen_percpu_chip __read_mostly = {
  1738. .name = "xen-percpu",
  1739. .irq_disable = disable_dynirq,
  1740. .irq_mask = disable_dynirq,
  1741. .irq_unmask = enable_dynirq,
  1742. .irq_ack = ack_dynirq,
  1743. };
  1744. #ifdef CONFIG_X86
  1745. #ifdef CONFIG_XEN_PVHVM
  1746. /* Vector callbacks are better than PCI interrupts to receive event
  1747. * channel notifications because we can receive vector callbacks on any
  1748. * vcpu and we don't need PCI support or APIC interactions. */
  1749. void xen_setup_callback_vector(void)
  1750. {
  1751. uint64_t callback_via;
  1752. if (xen_have_vector_callback) {
  1753. callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
  1754. if (xen_set_callback_via(callback_via)) {
  1755. pr_err("Request for Xen HVM callback vector failed\n");
  1756. xen_have_vector_callback = false;
  1757. }
  1758. }
  1759. }
  1760. /*
  1761. * Setup per-vCPU vector-type callbacks. If this setup is unavailable,
  1762. * fallback to the global vector-type callback.
  1763. */
  1764. static __init void xen_init_setup_upcall_vector(void)
  1765. {
  1766. if (!xen_have_vector_callback)
  1767. return;
  1768. if ((cpuid_eax(xen_cpuid_base() + 4) & XEN_HVM_CPUID_UPCALL_VECTOR) &&
  1769. !xen_set_upcall_vector(0))
  1770. xen_percpu_upcall = true;
  1771. else if (xen_feature(XENFEAT_hvm_callback_vector))
  1772. xen_setup_callback_vector();
  1773. else
  1774. xen_have_vector_callback = false;
  1775. }
  1776. int xen_set_upcall_vector(unsigned int cpu)
  1777. {
  1778. int rc;
  1779. xen_hvm_evtchn_upcall_vector_t op = {
  1780. .vector = HYPERVISOR_CALLBACK_VECTOR,
  1781. .vcpu = per_cpu(xen_vcpu_id, cpu),
  1782. };
  1783. rc = HYPERVISOR_hvm_op(HVMOP_set_evtchn_upcall_vector, &op);
  1784. if (rc)
  1785. return rc;
  1786. /* Trick toolstack to think we are enlightened. */
  1787. if (!cpu)
  1788. rc = xen_set_callback_via(1);
  1789. return rc;
  1790. }
  1791. static __init void xen_alloc_callback_vector(void)
  1792. {
  1793. if (!xen_have_vector_callback)
  1794. return;
  1795. pr_info("Xen HVM callback vector for event delivery is enabled\n");
  1796. sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_xen_hvm_callback);
  1797. }
  1798. #else
  1799. void xen_setup_callback_vector(void) {}
  1800. static inline void xen_init_setup_upcall_vector(void) {}
  1801. int xen_set_upcall_vector(unsigned int cpu) {}
  1802. static inline void xen_alloc_callback_vector(void) {}
  1803. #endif /* CONFIG_XEN_PVHVM */
  1804. #endif /* CONFIG_X86 */
  1805. bool xen_fifo_events = true;
  1806. module_param_named(fifo_events, xen_fifo_events, bool, 0);
  1807. static int xen_evtchn_cpu_prepare(unsigned int cpu)
  1808. {
  1809. int ret = 0;
  1810. xen_cpu_init_eoi(cpu);
  1811. if (evtchn_ops->percpu_init)
  1812. ret = evtchn_ops->percpu_init(cpu);
  1813. return ret;
  1814. }
  1815. static int xen_evtchn_cpu_dead(unsigned int cpu)
  1816. {
  1817. int ret = 0;
  1818. if (evtchn_ops->percpu_deinit)
  1819. ret = evtchn_ops->percpu_deinit(cpu);
  1820. return ret;
  1821. }
  1822. void __init xen_init_IRQ(void)
  1823. {
  1824. int ret = -EINVAL;
  1825. evtchn_port_t evtchn;
  1826. if (xen_fifo_events)
  1827. ret = xen_evtchn_fifo_init();
  1828. if (ret < 0) {
  1829. xen_evtchn_2l_init();
  1830. xen_fifo_events = false;
  1831. }
  1832. xen_cpu_init_eoi(smp_processor_id());
  1833. cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE,
  1834. "xen/evtchn:prepare",
  1835. xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead);
  1836. evtchn_to_irq = kzalloc_objs(*evtchn_to_irq,
  1837. EVTCHN_ROW(xen_evtchn_max_channels()));
  1838. BUG_ON(!evtchn_to_irq);
  1839. /* No event channels are 'live' right now. */
  1840. for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
  1841. mask_evtchn(evtchn);
  1842. pirq_needs_eoi = pirq_needs_eoi_flag;
  1843. #ifdef CONFIG_X86
  1844. if (xen_pv_domain()) {
  1845. if (xen_initial_domain())
  1846. pci_xen_initial_domain();
  1847. }
  1848. xen_init_setup_upcall_vector();
  1849. xen_alloc_callback_vector();
  1850. if (xen_hvm_domain()) {
  1851. native_init_IRQ();
  1852. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1853. * __acpi_register_gsi can point at the right function */
  1854. pci_xen_hvm_init();
  1855. } else {
  1856. int rc;
  1857. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1858. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1859. eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map);
  1860. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1861. if (rc != 0) {
  1862. free_page((unsigned long) pirq_eoi_map);
  1863. pirq_eoi_map = NULL;
  1864. } else
  1865. pirq_needs_eoi = pirq_check_eoi_map;
  1866. }
  1867. #endif
  1868. }