rt2880_wdt.c 4.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
  4. *
  5. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  6. * Copyright (C) 2013 John Crispin <john@phrozen.org>
  7. *
  8. * This driver was based on: drivers/watchdog/softdog.c
  9. */
  10. #include <linux/clk.h>
  11. #include <linux/reset.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/watchdog.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/mod_devicetable.h>
  18. #include <asm/mach-ralink/ralink_regs.h>
  19. #define SYSC_RSTSTAT 0x38
  20. #define WDT_RST_CAUSE BIT(1)
  21. #define RALINK_WDT_TIMEOUT 30
  22. #define RALINK_WDT_PRESCALE 65536
  23. #define TIMER_REG_TMR1LOAD 0x00
  24. #define TIMER_REG_TMR1CTL 0x08
  25. #define TMRSTAT_TMR1RST BIT(5)
  26. #define TMR1CTL_ENABLE BIT(7)
  27. #define TMR1CTL_MODE_SHIFT 4
  28. #define TMR1CTL_MODE_MASK 0x3
  29. #define TMR1CTL_MODE_FREE_RUNNING 0x0
  30. #define TMR1CTL_MODE_PERIODIC 0x1
  31. #define TMR1CTL_MODE_TIMEOUT 0x2
  32. #define TMR1CTL_MODE_WDT 0x3
  33. #define TMR1CTL_PRESCALE_MASK 0xf
  34. #define TMR1CTL_PRESCALE_65536 0xf
  35. struct rt2880_wdt_data {
  36. void __iomem *base;
  37. unsigned long freq;
  38. struct clk *clk;
  39. struct reset_control *rst;
  40. struct watchdog_device wdt;
  41. };
  42. static bool nowayout = WATCHDOG_NOWAYOUT;
  43. module_param(nowayout, bool, 0);
  44. MODULE_PARM_DESC(nowayout,
  45. "Watchdog cannot be stopped once started (default="
  46. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  47. static inline void rt_wdt_w32(void __iomem *base, unsigned int reg, u32 val)
  48. {
  49. iowrite32(val, base + reg);
  50. }
  51. static inline u32 rt_wdt_r32(void __iomem *base, unsigned int reg)
  52. {
  53. return ioread32(base + reg);
  54. }
  55. static int rt288x_wdt_ping(struct watchdog_device *w)
  56. {
  57. struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w);
  58. rt_wdt_w32(drvdata->base, TIMER_REG_TMR1LOAD, w->timeout * drvdata->freq);
  59. return 0;
  60. }
  61. static int rt288x_wdt_start(struct watchdog_device *w)
  62. {
  63. struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w);
  64. u32 t;
  65. t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
  66. t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT |
  67. TMR1CTL_PRESCALE_MASK);
  68. t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT |
  69. TMR1CTL_PRESCALE_65536);
  70. rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
  71. rt288x_wdt_ping(w);
  72. t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
  73. t |= TMR1CTL_ENABLE;
  74. rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
  75. return 0;
  76. }
  77. static int rt288x_wdt_stop(struct watchdog_device *w)
  78. {
  79. struct rt2880_wdt_data *drvdata = watchdog_get_drvdata(w);
  80. u32 t;
  81. rt288x_wdt_ping(w);
  82. t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
  83. t &= ~TMR1CTL_ENABLE;
  84. rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
  85. return 0;
  86. }
  87. static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
  88. {
  89. w->timeout = t;
  90. rt288x_wdt_ping(w);
  91. return 0;
  92. }
  93. static int rt288x_wdt_bootcause(void)
  94. {
  95. if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
  96. return WDIOF_CARDRESET;
  97. return 0;
  98. }
  99. static const struct watchdog_info rt288x_wdt_info = {
  100. .identity = "Ralink Watchdog",
  101. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  102. };
  103. static const struct watchdog_ops rt288x_wdt_ops = {
  104. .owner = THIS_MODULE,
  105. .start = rt288x_wdt_start,
  106. .stop = rt288x_wdt_stop,
  107. .ping = rt288x_wdt_ping,
  108. .set_timeout = rt288x_wdt_set_timeout,
  109. };
  110. static int rt288x_wdt_probe(struct platform_device *pdev)
  111. {
  112. struct device *dev = &pdev->dev;
  113. struct watchdog_device *wdt;
  114. struct rt2880_wdt_data *drvdata;
  115. int ret;
  116. drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
  117. if (!drvdata)
  118. return -ENOMEM;
  119. drvdata->base = devm_platform_ioremap_resource(pdev, 0);
  120. if (IS_ERR(drvdata->base))
  121. return PTR_ERR(drvdata->base);
  122. drvdata->clk = devm_clk_get(dev, NULL);
  123. if (IS_ERR(drvdata->clk))
  124. return PTR_ERR(drvdata->clk);
  125. drvdata->rst = devm_reset_control_get_exclusive(dev, NULL);
  126. if (!IS_ERR(drvdata->rst))
  127. reset_control_deassert(drvdata->rst);
  128. drvdata->freq = clk_get_rate(drvdata->clk) / RALINK_WDT_PRESCALE;
  129. wdt = &drvdata->wdt;
  130. wdt->info = &rt288x_wdt_info;
  131. wdt->ops = &rt288x_wdt_ops;
  132. wdt->min_timeout = 1;
  133. wdt->max_timeout = (0xfffful / drvdata->freq);
  134. wdt->parent = dev;
  135. wdt->bootstatus = rt288x_wdt_bootcause();
  136. watchdog_init_timeout(wdt, wdt->max_timeout, dev);
  137. watchdog_set_nowayout(wdt, nowayout);
  138. watchdog_set_drvdata(wdt, drvdata);
  139. watchdog_stop_on_reboot(wdt);
  140. ret = devm_watchdog_register_device(dev, &drvdata->wdt);
  141. if (!ret)
  142. dev_info(dev, "Initialized\n");
  143. return 0;
  144. }
  145. static const struct of_device_id rt288x_wdt_match[] = {
  146. { .compatible = "ralink,rt2880-wdt" },
  147. {},
  148. };
  149. MODULE_DEVICE_TABLE(of, rt288x_wdt_match);
  150. static struct platform_driver rt288x_wdt_driver = {
  151. .probe = rt288x_wdt_probe,
  152. .driver = {
  153. .name = KBUILD_MODNAME,
  154. .of_match_table = rt288x_wdt_match,
  155. },
  156. };
  157. module_platform_driver(rt288x_wdt_driver);
  158. MODULE_DESCRIPTION("MediaTek/Ralink RT288x/RT3xxx hardware watchdog driver");
  159. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
  160. MODULE_LICENSE("GPL v2");