bcm2835_wdt.c 6.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Watchdog driver for Broadcom BCM2835
  4. *
  5. * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
  6. * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
  7. * as a hardware reference for the Broadcom BCM2835 watchdog timer.
  8. *
  9. * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
  10. *
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/types.h>
  14. #include <linux/mfd/bcm2835-pm.h>
  15. #include <linux/module.h>
  16. #include <linux/io.h>
  17. #include <linux/watchdog.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_platform.h>
  21. #define PM_RSTC 0x1c
  22. #define PM_RSTS 0x20
  23. #define PM_WDOG 0x24
  24. #define PM_PASSWORD 0x5a000000
  25. #define PM_WDOG_TIME_SET 0x000fffff
  26. #define PM_RSTC_WRCFG_CLR 0xffffffcf
  27. #define PM_RSTS_HADWRH_SET 0x00000040
  28. #define PM_RSTC_WRCFG_SET 0x00000030
  29. #define PM_RSTC_WRCFG_FULL_RESET 0x00000020
  30. #define PM_RSTC_RESET 0x00000102
  31. /*
  32. * The Raspberry Pi firmware uses the RSTS register to know which partition
  33. * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
  34. * Partition 63 is a special partition used by the firmware to indicate halt.
  35. */
  36. #define PM_RSTS_RASPBERRYPI_HALT 0x555
  37. #define SECS_TO_WDOG_TICKS(x) ((x) << 16)
  38. #define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
  39. #define WDOG_TICKS_TO_MSECS(x) ((x) * 1000 >> 16)
  40. struct bcm2835_wdt {
  41. void __iomem *base;
  42. spinlock_t lock;
  43. };
  44. static struct bcm2835_wdt *bcm2835_power_off_wdt;
  45. static unsigned int heartbeat;
  46. static bool nowayout = WATCHDOG_NOWAYOUT;
  47. static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
  48. {
  49. uint32_t cur;
  50. cur = readl(wdt->base + PM_RSTC);
  51. return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
  52. }
  53. static int bcm2835_wdt_start(struct watchdog_device *wdog)
  54. {
  55. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  56. uint32_t cur;
  57. unsigned long flags;
  58. spin_lock_irqsave(&wdt->lock, flags);
  59. writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
  60. PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
  61. cur = readl_relaxed(wdt->base + PM_RSTC);
  62. writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
  63. PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
  64. spin_unlock_irqrestore(&wdt->lock, flags);
  65. return 0;
  66. }
  67. static int bcm2835_wdt_stop(struct watchdog_device *wdog)
  68. {
  69. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  70. writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
  71. return 0;
  72. }
  73. static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
  74. {
  75. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  76. uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
  77. return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
  78. }
  79. static void __bcm2835_restart(struct bcm2835_wdt *wdt)
  80. {
  81. u32 val;
  82. /* use a timeout of 10 ticks (~150us) */
  83. writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
  84. val = readl_relaxed(wdt->base + PM_RSTC);
  85. val &= PM_RSTC_WRCFG_CLR;
  86. val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
  87. writel_relaxed(val, wdt->base + PM_RSTC);
  88. /* No sleeping, possibly atomic. */
  89. mdelay(1);
  90. }
  91. static int bcm2835_restart(struct watchdog_device *wdog,
  92. unsigned long action, void *data)
  93. {
  94. struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
  95. __bcm2835_restart(wdt);
  96. return 0;
  97. }
  98. static const struct watchdog_ops bcm2835_wdt_ops = {
  99. .owner = THIS_MODULE,
  100. .start = bcm2835_wdt_start,
  101. .stop = bcm2835_wdt_stop,
  102. .get_timeleft = bcm2835_wdt_get_timeleft,
  103. .restart = bcm2835_restart,
  104. };
  105. static const struct watchdog_info bcm2835_wdt_info = {
  106. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
  107. WDIOF_KEEPALIVEPING,
  108. .identity = "Broadcom BCM2835 Watchdog timer",
  109. };
  110. static struct watchdog_device bcm2835_wdt_wdd = {
  111. .info = &bcm2835_wdt_info,
  112. .ops = &bcm2835_wdt_ops,
  113. .min_timeout = 1,
  114. .max_hw_heartbeat_ms = WDOG_TICKS_TO_MSECS(PM_WDOG_TIME_SET),
  115. .timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
  116. };
  117. /*
  118. * We can't really power off, but if we do the normal reset scheme, and
  119. * indicate to bootcode.bin not to reboot, then most of the chip will be
  120. * powered off.
  121. */
  122. static void bcm2835_power_off(void)
  123. {
  124. struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
  125. u32 val;
  126. /*
  127. * We set the watchdog hard reset bit here to distinguish this reset
  128. * from the normal (full) reset. bootcode.bin will not reboot after a
  129. * hard reset.
  130. */
  131. val = readl_relaxed(wdt->base + PM_RSTS);
  132. val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
  133. writel_relaxed(val, wdt->base + PM_RSTS);
  134. /* Continue with normal reset mechanism */
  135. __bcm2835_restart(wdt);
  136. }
  137. static int bcm2835_wdt_probe(struct platform_device *pdev)
  138. {
  139. struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
  140. struct device *dev = &pdev->dev;
  141. struct bcm2835_wdt *wdt;
  142. int err;
  143. wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
  144. if (!wdt)
  145. return -ENOMEM;
  146. spin_lock_init(&wdt->lock);
  147. wdt->base = pm->base;
  148. watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
  149. watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
  150. watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
  151. bcm2835_wdt_wdd.parent = dev;
  152. if (bcm2835_wdt_is_running(wdt)) {
  153. /*
  154. * The currently active timeout value (set by the
  155. * bootloader) may be different from the module
  156. * heartbeat parameter or the value in device
  157. * tree. But we just need to set WDOG_HW_RUNNING,
  158. * because then the framework will "immediately" ping
  159. * the device, updating the timeout.
  160. */
  161. set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
  162. }
  163. watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
  164. watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
  165. err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
  166. if (err)
  167. return err;
  168. if (of_device_is_system_power_controller(pdev->dev.parent->of_node)) {
  169. if (!pm_power_off) {
  170. pm_power_off = bcm2835_power_off;
  171. bcm2835_power_off_wdt = wdt;
  172. } else {
  173. dev_info(dev, "Poweroff handler already present!\n");
  174. }
  175. }
  176. dev_info(dev, "Broadcom BCM2835 watchdog timer");
  177. return 0;
  178. }
  179. static void bcm2835_wdt_remove(struct platform_device *pdev)
  180. {
  181. if (pm_power_off == bcm2835_power_off)
  182. pm_power_off = NULL;
  183. }
  184. static struct platform_driver bcm2835_wdt_driver = {
  185. .probe = bcm2835_wdt_probe,
  186. .remove = bcm2835_wdt_remove,
  187. .driver = {
  188. .name = "bcm2835-wdt",
  189. },
  190. };
  191. module_platform_driver(bcm2835_wdt_driver);
  192. module_param(heartbeat, uint, 0);
  193. MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
  194. module_param(nowayout, bool, 0);
  195. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  196. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  197. MODULE_ALIAS("platform:bcm2835-wdt");
  198. MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
  199. MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
  200. MODULE_LICENSE("GPL");