sa1100fb.c 35 KB

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  1. /*
  2. * linux/drivers/video/sa1100fb.c
  3. *
  4. * Copyright (C) 1999 Eric A. Thomas
  5. * Based on acornfb.c Copyright (C) Russell King.
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file COPYING in the main directory of this archive for
  9. * more details.
  10. *
  11. * StrongARM 1100 LCD Controller Frame Buffer Driver
  12. *
  13. * Please direct your questions and comments on this driver to the following
  14. * email address:
  15. *
  16. * linux-arm-kernel@lists.arm.linux.org.uk
  17. *
  18. * Clean patches should be sent to the ARM Linux Patch System. Please see the
  19. * following web page for more information:
  20. *
  21. * https://www.arm.linux.org.uk/developer/patches/info.shtml
  22. *
  23. * Thank you.
  24. *
  25. * Known problems:
  26. * - With the Neponset plugged into an Assabet, LCD powerdown
  27. * doesn't work (LCD stays powered up). Therefore we shouldn't
  28. * blank the screen.
  29. * - We don't limit the CPU clock rate nor the mode selection
  30. * according to the available SDRAM bandwidth.
  31. *
  32. * Other notes:
  33. * - Linear grayscale palettes and the kernel.
  34. * Such code does not belong in the kernel. The kernel frame buffer
  35. * drivers do not expect a linear colourmap, but a colourmap based on
  36. * the VT100 standard mapping.
  37. *
  38. * If your _userspace_ requires a linear colourmap, then the setup of
  39. * such a colourmap belongs _in userspace_, not in the kernel. Code
  40. * to set the colourmap correctly from user space has been sent to
  41. * David Neuer. It's around 8 lines of C code, plus another 4 to
  42. * detect if we are using grayscale.
  43. *
  44. * - The following must never be specified in a panel definition:
  45. * LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL
  46. *
  47. * - The following should be specified:
  48. * either LCCR0_Color or LCCR0_Mono
  49. * either LCCR0_Sngl or LCCR0_Dual
  50. * either LCCR0_Act or LCCR0_Pas
  51. * either LCCR3_OutEnH or LCCD3_OutEnL
  52. * either LCCR3_PixRsEdg or LCCR3_PixFlEdg
  53. * either LCCR3_ACBsDiv or LCCR3_ACBsCntOff
  54. *
  55. * Code Status:
  56. * 1999/04/01:
  57. * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
  58. * resolutions are working, but only the 8bpp mode is supported.
  59. * Changes need to be made to the palette encode and decode routines
  60. * to support 4 and 16 bpp modes.
  61. * Driver is not designed to be a module. The FrameBuffer is statically
  62. * allocated since dynamic allocation of a 300k buffer cannot be
  63. * guaranteed.
  64. *
  65. * 1999/06/17:
  66. * - FrameBuffer memory is now allocated at run-time when the
  67. * driver is initialized.
  68. *
  69. * 2000/04/10: Nicolas Pitre <nico@fluxnic.net>
  70. * - Big cleanup for dynamic selection of machine type at run time.
  71. *
  72. * 2000/07/19: Jamey Hicks <jamey@crl.dec.com>
  73. * - Support for Bitsy aka Compaq iPAQ H3600 added.
  74. *
  75. * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com>
  76. * Jeff Sutherland <jsutherland@accelent.com>
  77. * - Resolved an issue caused by a change made to the Assabet's PLD
  78. * earlier this year which broke the framebuffer driver for newer
  79. * Phase 4 Assabets. Some other parameters were changed to optimize
  80. * for the Sharp display.
  81. *
  82. * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp>
  83. * - XP860 support added
  84. *
  85. * 2000/08/19: Mark Huang <mhuang@livetoy.com>
  86. * - Allows standard options to be passed on the kernel command line
  87. * for most common passive displays.
  88. *
  89. * 2000/08/29:
  90. * - s/save_flags_cli/local_irq_save/
  91. * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller
  92. *
  93. * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl>
  94. * - Updated LART stuff. Fixed some minor bugs.
  95. *
  96. * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw>
  97. * - Pangolin support added
  98. *
  99. * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de>
  100. * - Huw Webpanel support added
  101. *
  102. * 2000/11/23: Eric Peng <ericpeng@coventive.com>
  103. * - Freebird add
  104. *
  105. * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com>
  106. * Cliff Brake <cbrake@accelent.com>
  107. * - Added PM callback
  108. *
  109. * 2001/05/26: <rmk@arm.linux.org.uk>
  110. * - Fix 16bpp so that (a) we use the right colours rather than some
  111. * totally random colour depending on what was in page 0, and (b)
  112. * we don't de-reference a NULL pointer.
  113. * - remove duplicated implementation of consistent_alloc()
  114. * - convert dma address types to dma_addr_t
  115. * - remove unused 'montype' stuff
  116. * - remove redundant zero inits of init_var after the initial
  117. * memset.
  118. * - remove allow_modeset (acornfb idea does not belong here)
  119. *
  120. * 2001/05/28: <rmk@arm.linux.org.uk>
  121. * - massive cleanup - move machine dependent data into structures
  122. * - I've left various #warnings in - if you see one, and know
  123. * the hardware concerned, please get in contact with me.
  124. *
  125. * 2001/05/31: <rmk@arm.linux.org.uk>
  126. * - Fix LCCR1 HSW value, fix all machine type specifications to
  127. * keep values in line. (Please check your machine type specs)
  128. *
  129. * 2001/06/10: <rmk@arm.linux.org.uk>
  130. * - Fiddle with the LCD controller from task context only; mainly
  131. * so that we can run with interrupts on, and sleep.
  132. * - Convert #warnings into #errors. No pain, no gain. ;)
  133. *
  134. * 2001/06/14: <rmk@arm.linux.org.uk>
  135. * - Make the palette BPS value for 12bpp come out correctly.
  136. * - Take notice of "greyscale" on any colour depth.
  137. * - Make truecolor visuals use the RGB channel encoding information.
  138. *
  139. * 2001/07/02: <rmk@arm.linux.org.uk>
  140. * - Fix colourmap problems.
  141. *
  142. * 2001/07/13: <abraham@2d3d.co.za>
  143. * - Added support for the ICP LCD-Kit01 on LART. This LCD is
  144. * manufactured by Prime View, model no V16C6448AB
  145. *
  146. * 2001/07/23: <rmk@arm.linux.org.uk>
  147. * - Hand merge version from handhelds.org CVS tree. See patch
  148. * notes for 595/1 for more information.
  149. * - Drop 12bpp (it's 16bpp with different colour register mappings).
  150. * - This hardware can not do direct colour. Therefore we don't
  151. * support it.
  152. *
  153. * 2001/07/27: <rmk@arm.linux.org.uk>
  154. * - Halve YRES on dual scan LCDs.
  155. *
  156. * 2001/08/22: <rmk@arm.linux.org.uk>
  157. * - Add b/w iPAQ pixclock value.
  158. *
  159. * 2001/10/12: <rmk@arm.linux.org.uk>
  160. * - Add patch 681/1 and clean up stork definitions.
  161. */
  162. #include <linux/module.h>
  163. #include <linux/kernel.h>
  164. #include <linux/sched.h>
  165. #include <linux/errno.h>
  166. #include <linux/string.h>
  167. #include <linux/interrupt.h>
  168. #include <linux/slab.h>
  169. #include <linux/mm.h>
  170. #include <linux/fb.h>
  171. #include <linux/delay.h>
  172. #include <linux/init.h>
  173. #include <linux/ioport.h>
  174. #include <linux/cpufreq.h>
  175. #include <linux/gpio/consumer.h>
  176. #include <linux/platform_device.h>
  177. #include <linux/dma-mapping.h>
  178. #include <linux/mutex.h>
  179. #include <linux/io.h>
  180. #include <linux/clk.h>
  181. #include <video/sa1100fb.h>
  182. #include <mach/hardware.h>
  183. #include <asm/mach-types.h>
  184. /*
  185. * Complain if VAR is out of range.
  186. */
  187. #define DEBUG_VAR 1
  188. #include "sa1100fb.h"
  189. static const struct sa1100fb_rgb rgb_4 = {
  190. .red = { .offset = 0, .length = 4, },
  191. .green = { .offset = 0, .length = 4, },
  192. .blue = { .offset = 0, .length = 4, },
  193. .transp = { .offset = 0, .length = 0, },
  194. };
  195. static const struct sa1100fb_rgb rgb_8 = {
  196. .red = { .offset = 0, .length = 8, },
  197. .green = { .offset = 0, .length = 8, },
  198. .blue = { .offset = 0, .length = 8, },
  199. .transp = { .offset = 0, .length = 0, },
  200. };
  201. static const struct sa1100fb_rgb def_rgb_16 = {
  202. .red = { .offset = 11, .length = 5, },
  203. .green = { .offset = 5, .length = 6, },
  204. .blue = { .offset = 0, .length = 5, },
  205. .transp = { .offset = 0, .length = 0, },
  206. };
  207. static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *);
  208. static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state);
  209. static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state)
  210. {
  211. unsigned long flags;
  212. local_irq_save(flags);
  213. /*
  214. * We need to handle two requests being made at the same time.
  215. * There are two important cases:
  216. * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
  217. * We must perform the unblanking, which will do our REENABLE for us.
  218. * 2. When we are blanking, but immediately unblank before we have
  219. * blanked. We do the "REENABLE" thing here as well, just to be sure.
  220. */
  221. if (fbi->task_state == C_ENABLE && state == C_REENABLE)
  222. state = (u_int) -1;
  223. if (fbi->task_state == C_DISABLE && state == C_ENABLE)
  224. state = C_REENABLE;
  225. if (state != (u_int)-1) {
  226. fbi->task_state = state;
  227. schedule_work(&fbi->task);
  228. }
  229. local_irq_restore(flags);
  230. }
  231. static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
  232. {
  233. chan &= 0xffff;
  234. chan >>= 16 - bf->length;
  235. return chan << bf->offset;
  236. }
  237. /*
  238. * Convert bits-per-pixel to a hardware palette PBS value.
  239. */
  240. static inline u_int palette_pbs(struct fb_var_screeninfo *var)
  241. {
  242. int ret = 0;
  243. switch (var->bits_per_pixel) {
  244. case 4: ret = 0 << 12; break;
  245. case 8: ret = 1 << 12; break;
  246. case 16: ret = 2 << 12; break;
  247. }
  248. return ret;
  249. }
  250. static int
  251. sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
  252. u_int trans, struct fb_info *info)
  253. {
  254. struct sa1100fb_info *fbi =
  255. container_of(info, struct sa1100fb_info, fb);
  256. u_int val, ret = 1;
  257. if (regno < fbi->palette_size) {
  258. val = ((red >> 4) & 0xf00);
  259. val |= ((green >> 8) & 0x0f0);
  260. val |= ((blue >> 12) & 0x00f);
  261. if (regno == 0)
  262. val |= palette_pbs(&fbi->fb.var);
  263. fbi->palette_cpu[regno] = val;
  264. ret = 0;
  265. }
  266. return ret;
  267. }
  268. static int
  269. sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  270. u_int trans, struct fb_info *info)
  271. {
  272. struct sa1100fb_info *fbi =
  273. container_of(info, struct sa1100fb_info, fb);
  274. unsigned int val;
  275. int ret = 1;
  276. /*
  277. * If inverse mode was selected, invert all the colours
  278. * rather than the register number. The register number
  279. * is what you poke into the framebuffer to produce the
  280. * colour you requested.
  281. */
  282. if (fbi->inf->cmap_inverse) {
  283. red = 0xffff - red;
  284. green = 0xffff - green;
  285. blue = 0xffff - blue;
  286. }
  287. /*
  288. * If greyscale is true, then we convert the RGB value
  289. * to greyscale no mater what visual we are using.
  290. */
  291. if (fbi->fb.var.grayscale)
  292. red = green = blue = (19595 * red + 38470 * green +
  293. 7471 * blue) >> 16;
  294. switch (fbi->fb.fix.visual) {
  295. case FB_VISUAL_TRUECOLOR:
  296. /*
  297. * 12 or 16-bit True Colour. We encode the RGB value
  298. * according to the RGB bitfield information.
  299. */
  300. if (regno < 16) {
  301. val = chan_to_field(red, &fbi->fb.var.red);
  302. val |= chan_to_field(green, &fbi->fb.var.green);
  303. val |= chan_to_field(blue, &fbi->fb.var.blue);
  304. fbi->pseudo_palette[regno] = val;
  305. ret = 0;
  306. }
  307. break;
  308. case FB_VISUAL_STATIC_PSEUDOCOLOR:
  309. case FB_VISUAL_PSEUDOCOLOR:
  310. ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info);
  311. break;
  312. }
  313. return ret;
  314. }
  315. #ifdef CONFIG_CPU_FREQ
  316. /*
  317. * sa1100fb_display_dma_period()
  318. * Calculate the minimum period (in picoseconds) between two DMA
  319. * requests for the LCD controller. If we hit this, it means we're
  320. * doing nothing but LCD DMA.
  321. */
  322. static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var)
  323. {
  324. /*
  325. * Period = pixclock * bits_per_byte * bytes_per_transfer
  326. * / memory_bits_per_pixel;
  327. */
  328. return var->pixclock * 8 * 16 / var->bits_per_pixel;
  329. }
  330. #endif
  331. /*
  332. * sa1100fb_check_var():
  333. * Round up in the following order: bits_per_pixel, xres,
  334. * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
  335. * bitfields, horizontal timing, vertical timing.
  336. */
  337. static int
  338. sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  339. {
  340. struct sa1100fb_info *fbi =
  341. container_of(info, struct sa1100fb_info, fb);
  342. int rgbidx;
  343. if (var->xres < MIN_XRES)
  344. var->xres = MIN_XRES;
  345. if (var->yres < MIN_YRES)
  346. var->yres = MIN_YRES;
  347. if (var->xres > fbi->inf->xres)
  348. var->xres = fbi->inf->xres;
  349. if (var->yres > fbi->inf->yres)
  350. var->yres = fbi->inf->yres;
  351. var->xres_virtual = max(var->xres_virtual, var->xres);
  352. var->yres_virtual = max(var->yres_virtual, var->yres);
  353. dev_dbg(fbi->dev, "var->bits_per_pixel=%d\n", var->bits_per_pixel);
  354. switch (var->bits_per_pixel) {
  355. case 4:
  356. rgbidx = RGB_4;
  357. break;
  358. case 8:
  359. rgbidx = RGB_8;
  360. break;
  361. case 16:
  362. rgbidx = RGB_16;
  363. break;
  364. default:
  365. return -EINVAL;
  366. }
  367. /*
  368. * Copy the RGB parameters for this display
  369. * from the machine specific parameters.
  370. */
  371. var->red = fbi->rgb[rgbidx]->red;
  372. var->green = fbi->rgb[rgbidx]->green;
  373. var->blue = fbi->rgb[rgbidx]->blue;
  374. var->transp = fbi->rgb[rgbidx]->transp;
  375. dev_dbg(fbi->dev, "RGBT length = %d:%d:%d:%d\n",
  376. var->red.length, var->green.length, var->blue.length,
  377. var->transp.length);
  378. dev_dbg(fbi->dev, "RGBT offset = %d:%d:%d:%d\n",
  379. var->red.offset, var->green.offset, var->blue.offset,
  380. var->transp.offset);
  381. #ifdef CONFIG_CPU_FREQ
  382. dev_dbg(fbi->dev, "dma period = %d ps, clock = %ld kHz\n",
  383. sa1100fb_display_dma_period(var),
  384. clk_get_rate(fbi->clk) / 1000);
  385. #endif
  386. return 0;
  387. }
  388. static void sa1100fb_set_visual(struct sa1100fb_info *fbi, u32 visual)
  389. {
  390. if (fbi->inf->set_visual)
  391. fbi->inf->set_visual(visual);
  392. }
  393. /*
  394. * sa1100fb_set_par():
  395. * Set the user defined part of the display for the specified console
  396. */
  397. static int sa1100fb_set_par(struct fb_info *info)
  398. {
  399. struct sa1100fb_info *fbi =
  400. container_of(info, struct sa1100fb_info, fb);
  401. struct fb_var_screeninfo *var = &info->var;
  402. unsigned long palette_mem_size;
  403. dev_dbg(fbi->dev, "set_par\n");
  404. if (var->bits_per_pixel == 16)
  405. fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
  406. else if (!fbi->inf->cmap_static)
  407. fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
  408. else {
  409. /*
  410. * Some people have weird ideas about wanting static
  411. * pseudocolor maps. I suspect their user space
  412. * applications are broken.
  413. */
  414. fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
  415. }
  416. fbi->fb.fix.line_length = var->xres_virtual *
  417. var->bits_per_pixel / 8;
  418. fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
  419. palette_mem_size = fbi->palette_size * sizeof(u16);
  420. dev_dbg(fbi->dev, "palette_mem_size = 0x%08lx\n", palette_mem_size);
  421. fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
  422. fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
  423. /*
  424. * Set (any) board control register to handle new color depth
  425. */
  426. sa1100fb_set_visual(fbi, fbi->fb.fix.visual);
  427. sa1100fb_activate_var(var, fbi);
  428. return 0;
  429. }
  430. #if 0
  431. static int
  432. sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
  433. struct fb_info *info)
  434. {
  435. struct sa1100fb_info *fbi = (struct sa1100fb_info *)info;
  436. /*
  437. * Make sure the user isn't doing something stupid.
  438. */
  439. if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->inf->cmap_static))
  440. return -EINVAL;
  441. return gen_set_cmap(cmap, kspc, con, info);
  442. }
  443. #endif
  444. /*
  445. * Formal definition of the VESA spec:
  446. * On
  447. * This refers to the state of the display when it is in full operation
  448. * Stand-By
  449. * This defines an optional operating state of minimal power reduction with
  450. * the shortest recovery time
  451. * Suspend
  452. * This refers to a level of power management in which substantial power
  453. * reduction is achieved by the display. The display can have a longer
  454. * recovery time from this state than from the Stand-by state
  455. * Off
  456. * This indicates that the display is consuming the lowest level of power
  457. * and is non-operational. Recovery from this state may optionally require
  458. * the user to manually power on the monitor
  459. *
  460. * Now, the fbdev driver adds an additional state, (blank), where they
  461. * turn off the video (maybe by colormap tricks), but don't mess with the
  462. * video itself: think of it semantically between on and Stand-By.
  463. *
  464. * So here's what we should do in our fbdev blank routine:
  465. *
  466. * VESA_NO_BLANKING (mode 0) Video on, front/back light on
  467. * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
  468. * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
  469. * VESA_POWERDOWN (mode 3) Video off, front/back light off
  470. *
  471. * This will match the matrox implementation.
  472. */
  473. /*
  474. * sa1100fb_blank():
  475. * Blank the display by setting all palette values to zero. Note, the
  476. * 12 and 16 bpp modes don't really use the palette, so this will not
  477. * blank the display in all modes.
  478. */
  479. static int sa1100fb_blank(int blank, struct fb_info *info)
  480. {
  481. struct sa1100fb_info *fbi =
  482. container_of(info, struct sa1100fb_info, fb);
  483. int i;
  484. dev_dbg(fbi->dev, "sa1100fb_blank: blank=%d\n", blank);
  485. switch (blank) {
  486. case FB_BLANK_POWERDOWN:
  487. case FB_BLANK_VSYNC_SUSPEND:
  488. case FB_BLANK_HSYNC_SUSPEND:
  489. case FB_BLANK_NORMAL:
  490. if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
  491. fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
  492. for (i = 0; i < fbi->palette_size; i++)
  493. sa1100fb_setpalettereg(i, 0, 0, 0, 0, info);
  494. sa1100fb_schedule_work(fbi, C_DISABLE);
  495. break;
  496. case FB_BLANK_UNBLANK:
  497. if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
  498. fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
  499. fb_set_cmap(&fbi->fb.cmap, info);
  500. sa1100fb_schedule_work(fbi, C_ENABLE);
  501. }
  502. return 0;
  503. }
  504. static int sa1100fb_mmap(struct fb_info *info,
  505. struct vm_area_struct *vma)
  506. {
  507. struct sa1100fb_info *fbi =
  508. container_of(info, struct sa1100fb_info, fb);
  509. unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
  510. vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
  511. if (off < info->fix.smem_len) {
  512. vma->vm_pgoff += 1; /* skip over the palette */
  513. return dma_mmap_wc(fbi->dev, vma, fbi->map_cpu, fbi->map_dma,
  514. fbi->map_size);
  515. }
  516. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  517. return vm_iomap_memory(vma, info->fix.mmio_start, info->fix.mmio_len);
  518. }
  519. static const struct fb_ops sa1100fb_ops = {
  520. .owner = THIS_MODULE,
  521. __FB_DEFAULT_IOMEM_OPS_RDWR,
  522. .fb_check_var = sa1100fb_check_var,
  523. .fb_set_par = sa1100fb_set_par,
  524. // .fb_set_cmap = sa1100fb_set_cmap,
  525. .fb_setcolreg = sa1100fb_setcolreg,
  526. .fb_blank = sa1100fb_blank,
  527. __FB_DEFAULT_IOMEM_OPS_DRAW,
  528. .fb_mmap = sa1100fb_mmap,
  529. };
  530. /*
  531. * Calculate the PCD value from the clock rate (in picoseconds).
  532. * We take account of the PPCR clock setting.
  533. */
  534. static inline unsigned int get_pcd(struct sa1100fb_info *fbi,
  535. unsigned int pixclock)
  536. {
  537. unsigned int pcd = clk_get_rate(fbi->clk) / 100 / 1000;
  538. pcd *= pixclock;
  539. pcd /= 10000000;
  540. return pcd + 1; /* make up for integer math truncations */
  541. }
  542. /*
  543. * sa1100fb_activate_var():
  544. * Configures LCD Controller based on entries in var parameter. Settings are
  545. * only written to the controller if changes were made.
  546. */
  547. static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi)
  548. {
  549. struct sa1100fb_lcd_reg new_regs;
  550. u_int half_screen_size, yres, pcd;
  551. u_long flags;
  552. dev_dbg(fbi->dev, "Configuring SA1100 LCD\n");
  553. dev_dbg(fbi->dev, "var: xres=%d hslen=%d lm=%d rm=%d\n",
  554. var->xres, var->hsync_len,
  555. var->left_margin, var->right_margin);
  556. dev_dbg(fbi->dev, "var: yres=%d vslen=%d um=%d bm=%d\n",
  557. var->yres, var->vsync_len,
  558. var->upper_margin, var->lower_margin);
  559. #if DEBUG_VAR
  560. if (var->xres < 16 || var->xres > 1024)
  561. dev_err(fbi->dev, "%s: invalid xres %d\n",
  562. fbi->fb.fix.id, var->xres);
  563. if (var->hsync_len < 1 || var->hsync_len > 64)
  564. dev_err(fbi->dev, "%s: invalid hsync_len %d\n",
  565. fbi->fb.fix.id, var->hsync_len);
  566. if (var->left_margin < 1 || var->left_margin > 255)
  567. dev_err(fbi->dev, "%s: invalid left_margin %d\n",
  568. fbi->fb.fix.id, var->left_margin);
  569. if (var->right_margin < 1 || var->right_margin > 255)
  570. dev_err(fbi->dev, "%s: invalid right_margin %d\n",
  571. fbi->fb.fix.id, var->right_margin);
  572. if (var->yres < 1 || var->yres > 1024)
  573. dev_err(fbi->dev, "%s: invalid yres %d\n",
  574. fbi->fb.fix.id, var->yres);
  575. if (var->vsync_len < 1 || var->vsync_len > 64)
  576. dev_err(fbi->dev, "%s: invalid vsync_len %d\n",
  577. fbi->fb.fix.id, var->vsync_len);
  578. if (var->upper_margin < 0 || var->upper_margin > 255)
  579. dev_err(fbi->dev, "%s: invalid upper_margin %d\n",
  580. fbi->fb.fix.id, var->upper_margin);
  581. if (var->lower_margin < 0 || var->lower_margin > 255)
  582. dev_err(fbi->dev, "%s: invalid lower_margin %d\n",
  583. fbi->fb.fix.id, var->lower_margin);
  584. #endif
  585. new_regs.lccr0 = fbi->inf->lccr0 |
  586. LCCR0_LEN | LCCR0_LDM | LCCR0_BAM |
  587. LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0);
  588. new_regs.lccr1 =
  589. LCCR1_DisWdth(var->xres) +
  590. LCCR1_HorSnchWdth(var->hsync_len) +
  591. LCCR1_BegLnDel(var->left_margin) +
  592. LCCR1_EndLnDel(var->right_margin);
  593. /*
  594. * If we have a dual scan LCD, then we need to halve
  595. * the YRES parameter.
  596. */
  597. yres = var->yres;
  598. if (fbi->inf->lccr0 & LCCR0_Dual)
  599. yres /= 2;
  600. new_regs.lccr2 =
  601. LCCR2_DisHght(yres) +
  602. LCCR2_VrtSnchWdth(var->vsync_len) +
  603. LCCR2_BegFrmDel(var->upper_margin) +
  604. LCCR2_EndFrmDel(var->lower_margin);
  605. pcd = get_pcd(fbi, var->pixclock);
  606. new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->inf->lccr3 |
  607. (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
  608. (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL);
  609. dev_dbg(fbi->dev, "nlccr0 = 0x%08lx\n", new_regs.lccr0);
  610. dev_dbg(fbi->dev, "nlccr1 = 0x%08lx\n", new_regs.lccr1);
  611. dev_dbg(fbi->dev, "nlccr2 = 0x%08lx\n", new_regs.lccr2);
  612. dev_dbg(fbi->dev, "nlccr3 = 0x%08lx\n", new_regs.lccr3);
  613. half_screen_size = var->bits_per_pixel;
  614. half_screen_size = half_screen_size * var->xres * var->yres / 16;
  615. /* Update shadow copy atomically */
  616. local_irq_save(flags);
  617. fbi->dbar1 = fbi->palette_dma;
  618. fbi->dbar2 = fbi->screen_dma + half_screen_size;
  619. fbi->reg_lccr0 = new_regs.lccr0;
  620. fbi->reg_lccr1 = new_regs.lccr1;
  621. fbi->reg_lccr2 = new_regs.lccr2;
  622. fbi->reg_lccr3 = new_regs.lccr3;
  623. local_irq_restore(flags);
  624. /*
  625. * Only update the registers if the controller is enabled
  626. * and something has changed.
  627. */
  628. if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 ||
  629. readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 ||
  630. readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 ||
  631. readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 ||
  632. readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 ||
  633. readl_relaxed(fbi->base + DBAR2) != fbi->dbar2)
  634. sa1100fb_schedule_work(fbi, C_REENABLE);
  635. return 0;
  636. }
  637. /*
  638. * NOTE! The following functions are purely helpers for set_ctrlr_state.
  639. * Do not call them directly; set_ctrlr_state does the correct serialisation
  640. * to ensure that things happen in the right way 100% of time time.
  641. * -- rmk
  642. */
  643. static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on)
  644. {
  645. dev_dbg(fbi->dev, "backlight o%s\n", on ? "n" : "ff");
  646. if (fbi->inf->backlight_power)
  647. fbi->inf->backlight_power(on);
  648. }
  649. static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on)
  650. {
  651. dev_dbg(fbi->dev, "LCD power o%s\n", on ? "n" : "ff");
  652. if (fbi->inf->lcd_power)
  653. fbi->inf->lcd_power(on);
  654. }
  655. static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi)
  656. {
  657. u_int mask = 0;
  658. /*
  659. * Enable GPIO<9:2> for LCD use if:
  660. * 1. Active display, or
  661. * 2. Color Dual Passive display
  662. *
  663. * see table 11.8 on page 11-27 in the SA1100 manual
  664. * -- Erik.
  665. *
  666. * SA1110 spec update nr. 25 says we can and should
  667. * clear LDD15 to 12 for 4 or 8bpp modes with active
  668. * panels.
  669. */
  670. if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color &&
  671. (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) {
  672. mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
  673. if (fbi->fb.var.bits_per_pixel > 8 ||
  674. (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual)
  675. mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12;
  676. }
  677. if (mask) {
  678. unsigned long flags;
  679. /*
  680. * SA-1100 requires the GPIO direction register set
  681. * appropriately for the alternate function. Hence
  682. * we set it here via bitmask rather than excessive
  683. * fiddling via the GPIO subsystem - and even then
  684. * we'll still have to deal with GAFR.
  685. */
  686. local_irq_save(flags);
  687. GPDR |= mask;
  688. GAFR |= mask;
  689. local_irq_restore(flags);
  690. }
  691. }
  692. static void sa1100fb_enable_controller(struct sa1100fb_info *fbi)
  693. {
  694. dev_dbg(fbi->dev, "Enabling LCD controller\n");
  695. /*
  696. * Make sure the mode bits are present in the first palette entry
  697. */
  698. fbi->palette_cpu[0] &= 0xcfff;
  699. fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var);
  700. /* enable LCD controller clock */
  701. clk_prepare_enable(fbi->clk);
  702. /* Sequence from 11.7.10 */
  703. writel_relaxed(fbi->reg_lccr3, fbi->base + LCCR3);
  704. writel_relaxed(fbi->reg_lccr2, fbi->base + LCCR2);
  705. writel_relaxed(fbi->reg_lccr1, fbi->base + LCCR1);
  706. writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0);
  707. writel_relaxed(fbi->dbar1, fbi->base + DBAR1);
  708. writel_relaxed(fbi->dbar2, fbi->base + DBAR2);
  709. writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0);
  710. if (fbi->shannon_lcden)
  711. gpiod_set_value(fbi->shannon_lcden, 1);
  712. dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1));
  713. dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2));
  714. dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0));
  715. dev_dbg(fbi->dev, "LCCR1: 0x%08x\n", readl_relaxed(fbi->base + LCCR1));
  716. dev_dbg(fbi->dev, "LCCR2: 0x%08x\n", readl_relaxed(fbi->base + LCCR2));
  717. dev_dbg(fbi->dev, "LCCR3: 0x%08x\n", readl_relaxed(fbi->base + LCCR3));
  718. }
  719. static void sa1100fb_disable_controller(struct sa1100fb_info *fbi)
  720. {
  721. DECLARE_WAITQUEUE(wait, current);
  722. u32 lccr0;
  723. dev_dbg(fbi->dev, "Disabling LCD controller\n");
  724. if (fbi->shannon_lcden)
  725. gpiod_set_value(fbi->shannon_lcden, 0);
  726. set_current_state(TASK_UNINTERRUPTIBLE);
  727. add_wait_queue(&fbi->ctrlr_wait, &wait);
  728. /* Clear LCD Status Register */
  729. writel_relaxed(~0, fbi->base + LCSR);
  730. lccr0 = readl_relaxed(fbi->base + LCCR0);
  731. lccr0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
  732. writel_relaxed(lccr0, fbi->base + LCCR0);
  733. lccr0 &= ~LCCR0_LEN; /* Disable LCD Controller */
  734. writel_relaxed(lccr0, fbi->base + LCCR0);
  735. schedule_timeout(20 * HZ / 1000);
  736. remove_wait_queue(&fbi->ctrlr_wait, &wait);
  737. /* disable LCD controller clock */
  738. clk_disable_unprepare(fbi->clk);
  739. }
  740. /*
  741. * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts.
  742. */
  743. static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id)
  744. {
  745. struct sa1100fb_info *fbi = dev_id;
  746. unsigned int lcsr = readl_relaxed(fbi->base + LCSR);
  747. if (lcsr & LCSR_LDD) {
  748. u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM;
  749. writel_relaxed(lccr0, fbi->base + LCCR0);
  750. wake_up(&fbi->ctrlr_wait);
  751. }
  752. writel_relaxed(lcsr, fbi->base + LCSR);
  753. return IRQ_HANDLED;
  754. }
  755. /*
  756. * This function must be called from task context only, since it will
  757. * sleep when disabling the LCD controller, or if we get two contending
  758. * processes trying to alter state.
  759. */
  760. static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state)
  761. {
  762. u_int old_state;
  763. mutex_lock(&fbi->ctrlr_lock);
  764. old_state = fbi->state;
  765. /*
  766. * Hack around fbcon initialisation.
  767. */
  768. if (old_state == C_STARTUP && state == C_REENABLE)
  769. state = C_ENABLE;
  770. switch (state) {
  771. case C_DISABLE_CLKCHANGE:
  772. /*
  773. * Disable controller for clock change. If the
  774. * controller is already disabled, then do nothing.
  775. */
  776. if (old_state != C_DISABLE && old_state != C_DISABLE_PM) {
  777. fbi->state = state;
  778. sa1100fb_disable_controller(fbi);
  779. }
  780. break;
  781. case C_DISABLE_PM:
  782. case C_DISABLE:
  783. /*
  784. * Disable controller
  785. */
  786. if (old_state != C_DISABLE) {
  787. fbi->state = state;
  788. __sa1100fb_backlight_power(fbi, 0);
  789. if (old_state != C_DISABLE_CLKCHANGE)
  790. sa1100fb_disable_controller(fbi);
  791. __sa1100fb_lcd_power(fbi, 0);
  792. }
  793. break;
  794. case C_ENABLE_CLKCHANGE:
  795. /*
  796. * Enable the controller after clock change. Only
  797. * do this if we were disabled for the clock change.
  798. */
  799. if (old_state == C_DISABLE_CLKCHANGE) {
  800. fbi->state = C_ENABLE;
  801. sa1100fb_enable_controller(fbi);
  802. }
  803. break;
  804. case C_REENABLE:
  805. /*
  806. * Re-enable the controller only if it was already
  807. * enabled. This is so we reprogram the control
  808. * registers.
  809. */
  810. if (old_state == C_ENABLE) {
  811. sa1100fb_disable_controller(fbi);
  812. sa1100fb_setup_gpio(fbi);
  813. sa1100fb_enable_controller(fbi);
  814. }
  815. break;
  816. case C_ENABLE_PM:
  817. /*
  818. * Re-enable the controller after PM. This is not
  819. * perfect - think about the case where we were doing
  820. * a clock change, and we suspended half-way through.
  821. */
  822. if (old_state != C_DISABLE_PM)
  823. break;
  824. fallthrough;
  825. case C_ENABLE:
  826. /*
  827. * Power up the LCD screen, enable controller, and
  828. * turn on the backlight.
  829. */
  830. if (old_state != C_ENABLE) {
  831. fbi->state = C_ENABLE;
  832. sa1100fb_setup_gpio(fbi);
  833. __sa1100fb_lcd_power(fbi, 1);
  834. sa1100fb_enable_controller(fbi);
  835. __sa1100fb_backlight_power(fbi, 1);
  836. }
  837. break;
  838. }
  839. mutex_unlock(&fbi->ctrlr_lock);
  840. }
  841. /*
  842. * Our LCD controller task (which is called when we blank or unblank)
  843. * via keventd.
  844. */
  845. static void sa1100fb_task(struct work_struct *w)
  846. {
  847. struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task);
  848. u_int state = xchg(&fbi->task_state, -1);
  849. set_ctrlr_state(fbi, state);
  850. }
  851. #ifdef CONFIG_CPU_FREQ
  852. /*
  853. * CPU clock speed change handler. We need to adjust the LCD timing
  854. * parameters when the CPU clock is adjusted by the power management
  855. * subsystem.
  856. */
  857. static int
  858. sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val,
  859. void *data)
  860. {
  861. struct sa1100fb_info *fbi = TO_INF(nb, freq_transition);
  862. u_int pcd;
  863. switch (val) {
  864. case CPUFREQ_PRECHANGE:
  865. set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
  866. break;
  867. case CPUFREQ_POSTCHANGE:
  868. pcd = get_pcd(fbi, fbi->fb.var.pixclock);
  869. fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
  870. set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
  871. break;
  872. }
  873. return 0;
  874. }
  875. #endif
  876. #ifdef CONFIG_PM
  877. /*
  878. * Power management hooks. Note that we won't be called from IRQ context,
  879. * unlike the blank functions above, so we may sleep.
  880. */
  881. static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state)
  882. {
  883. struct sa1100fb_info *fbi = platform_get_drvdata(dev);
  884. set_ctrlr_state(fbi, C_DISABLE_PM);
  885. return 0;
  886. }
  887. static int sa1100fb_resume(struct platform_device *dev)
  888. {
  889. struct sa1100fb_info *fbi = platform_get_drvdata(dev);
  890. set_ctrlr_state(fbi, C_ENABLE_PM);
  891. return 0;
  892. }
  893. #else
  894. #define sa1100fb_suspend NULL
  895. #define sa1100fb_resume NULL
  896. #endif
  897. /*
  898. * sa1100fb_map_video_memory():
  899. * Allocates the DRAM memory for the frame buffer. This buffer is
  900. * remapped into a non-cached, non-buffered, memory region to
  901. * allow palette and pixel writes to occur without flushing the
  902. * cache. Once this area is remapped, all virtual memory
  903. * access to the video memory should occur at the new region.
  904. */
  905. static int sa1100fb_map_video_memory(struct sa1100fb_info *fbi)
  906. {
  907. /*
  908. * We reserve one page for the palette, plus the size
  909. * of the framebuffer.
  910. */
  911. fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
  912. fbi->map_cpu = dma_alloc_wc(fbi->dev, fbi->map_size, &fbi->map_dma,
  913. GFP_KERNEL);
  914. if (fbi->map_cpu) {
  915. fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
  916. fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
  917. /*
  918. * FIXME: this is actually the wrong thing to place in
  919. * smem_start. But fbdev suffers from the problem that
  920. * it needs an API which doesn't exist (in this case,
  921. * dma_writecombine_mmap)
  922. */
  923. fbi->fb.fix.smem_start = fbi->screen_dma;
  924. }
  925. return fbi->map_cpu ? 0 : -ENOMEM;
  926. }
  927. /* Fake monspecs to fill in fbinfo structure */
  928. static const struct fb_monspecs monspecs = {
  929. .hfmin = 30000,
  930. .hfmax = 70000,
  931. .vfmin = 50,
  932. .vfmax = 65,
  933. };
  934. static struct sa1100fb_info *sa1100fb_init_fbinfo(struct device *dev)
  935. {
  936. struct sa1100fb_mach_info *inf = dev_get_platdata(dev);
  937. struct sa1100fb_info *fbi;
  938. unsigned i;
  939. fbi = devm_kzalloc(dev, sizeof(struct sa1100fb_info), GFP_KERNEL);
  940. if (!fbi)
  941. return NULL;
  942. fbi->dev = dev;
  943. strcpy(fbi->fb.fix.id, SA1100_NAME);
  944. fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
  945. fbi->fb.fix.type_aux = 0;
  946. fbi->fb.fix.xpanstep = 0;
  947. fbi->fb.fix.ypanstep = 0;
  948. fbi->fb.fix.ywrapstep = 0;
  949. fbi->fb.fix.accel = FB_ACCEL_NONE;
  950. fbi->fb.var.nonstd = 0;
  951. fbi->fb.var.activate = FB_ACTIVATE_NOW;
  952. fbi->fb.var.height = -1;
  953. fbi->fb.var.width = -1;
  954. fbi->fb.var.accel_flags = 0;
  955. fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;
  956. fbi->fb.fbops = &sa1100fb_ops;
  957. fbi->fb.monspecs = monspecs;
  958. fbi->fb.pseudo_palette = fbi->pseudo_palette;
  959. fbi->rgb[RGB_4] = &rgb_4;
  960. fbi->rgb[RGB_8] = &rgb_8;
  961. fbi->rgb[RGB_16] = &def_rgb_16;
  962. /*
  963. * People just don't seem to get this. We don't support
  964. * anything but correct entries now, so panic if someone
  965. * does something stupid.
  966. */
  967. if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) ||
  968. inf->pixclock == 0)
  969. panic("sa1100fb error: invalid LCCR3 fields set or zero "
  970. "pixclock.");
  971. fbi->fb.var.xres = inf->xres;
  972. fbi->fb.var.xres_virtual = inf->xres;
  973. fbi->fb.var.yres = inf->yres;
  974. fbi->fb.var.yres_virtual = inf->yres;
  975. fbi->fb.var.bits_per_pixel = inf->bpp;
  976. fbi->fb.var.pixclock = inf->pixclock;
  977. fbi->fb.var.hsync_len = inf->hsync_len;
  978. fbi->fb.var.left_margin = inf->left_margin;
  979. fbi->fb.var.right_margin = inf->right_margin;
  980. fbi->fb.var.vsync_len = inf->vsync_len;
  981. fbi->fb.var.upper_margin = inf->upper_margin;
  982. fbi->fb.var.lower_margin = inf->lower_margin;
  983. fbi->fb.var.sync = inf->sync;
  984. fbi->fb.var.grayscale = inf->cmap_greyscale;
  985. fbi->state = C_STARTUP;
  986. fbi->task_state = (u_char)-1;
  987. fbi->fb.fix.smem_len = inf->xres * inf->yres *
  988. inf->bpp / 8;
  989. fbi->inf = inf;
  990. /* Copy the RGB bitfield overrides */
  991. for (i = 0; i < NR_RGB; i++)
  992. if (inf->rgb[i])
  993. fbi->rgb[i] = inf->rgb[i];
  994. init_waitqueue_head(&fbi->ctrlr_wait);
  995. INIT_WORK(&fbi->task, sa1100fb_task);
  996. mutex_init(&fbi->ctrlr_lock);
  997. return fbi;
  998. }
  999. static int sa1100fb_probe(struct platform_device *pdev)
  1000. {
  1001. struct sa1100fb_info *fbi;
  1002. int ret, irq;
  1003. if (!dev_get_platdata(&pdev->dev)) {
  1004. dev_err(&pdev->dev, "no platform LCD data\n");
  1005. return -EINVAL;
  1006. }
  1007. irq = platform_get_irq(pdev, 0);
  1008. if (irq < 0)
  1009. return -EINVAL;
  1010. fbi = sa1100fb_init_fbinfo(&pdev->dev);
  1011. if (!fbi)
  1012. return -ENOMEM;
  1013. fbi->base = devm_platform_ioremap_resource(pdev, 0);
  1014. if (IS_ERR(fbi->base))
  1015. return PTR_ERR(fbi->base);
  1016. fbi->clk = devm_clk_get(&pdev->dev, NULL);
  1017. if (IS_ERR(fbi->clk))
  1018. return PTR_ERR(fbi->clk);
  1019. ret = devm_request_irq(&pdev->dev, irq, sa1100fb_handle_irq, 0,
  1020. "LCD", fbi);
  1021. if (ret) {
  1022. dev_err(&pdev->dev, "request_irq failed: %d\n", ret);
  1023. return ret;
  1024. }
  1025. fbi->shannon_lcden = gpiod_get_optional(&pdev->dev, "shannon-lcden",
  1026. GPIOD_OUT_LOW);
  1027. if (IS_ERR(fbi->shannon_lcden))
  1028. return PTR_ERR(fbi->shannon_lcden);
  1029. /* Initialize video memory */
  1030. ret = sa1100fb_map_video_memory(fbi);
  1031. if (ret)
  1032. return ret;
  1033. /*
  1034. * This makes sure that our colour bitfield
  1035. * descriptors are correctly initialised.
  1036. */
  1037. sa1100fb_check_var(&fbi->fb.var, &fbi->fb);
  1038. platform_set_drvdata(pdev, fbi);
  1039. ret = register_framebuffer(&fbi->fb);
  1040. if (ret < 0) {
  1041. dma_free_wc(fbi->dev, fbi->map_size, fbi->map_cpu,
  1042. fbi->map_dma);
  1043. return ret;
  1044. }
  1045. #ifdef CONFIG_CPU_FREQ
  1046. fbi->freq_transition.notifier_call = sa1100fb_freq_transition;
  1047. cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
  1048. #endif
  1049. /* This driver cannot be unloaded at the moment */
  1050. return 0;
  1051. }
  1052. static struct platform_driver sa1100fb_driver = {
  1053. .probe = sa1100fb_probe,
  1054. .suspend = sa1100fb_suspend,
  1055. .resume = sa1100fb_resume,
  1056. .driver = {
  1057. .name = "sa11x0-fb",
  1058. },
  1059. };
  1060. static int __init sa1100fb_init(void)
  1061. {
  1062. if (fb_get_options("sa1100fb", NULL))
  1063. return -ENODEV;
  1064. return platform_driver_register(&sa1100fb_driver);
  1065. }
  1066. module_init(sa1100fb_init);
  1067. MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver");
  1068. MODULE_LICENSE("GPL");