fsl_qe_udc.c 62 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * driver/usb/gadget/fsl_qe_udc.c
  4. *
  5. * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
  6. *
  7. * Xie Xiaobo <X.Xie@freescale.com>
  8. * Li Yang <leoli@freescale.com>
  9. * Based on bareboard code from Shlomi Gridish.
  10. *
  11. * Description:
  12. * Freescle QE/CPM USB Pheripheral Controller Driver
  13. * The controller can be found on MPC8360, MPC8272, and etc.
  14. * MPC8360 Rev 1.1 may need QE mircocode update
  15. */
  16. #undef USB_TRACE
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/ioport.h>
  20. #include <linux/types.h>
  21. #include <linux/errno.h>
  22. #include <linux/err.h>
  23. #include <linux/slab.h>
  24. #include <linux/list.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/io.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/of.h>
  29. #include <linux/of_address.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/dma-mapping.h>
  33. #include <linux/usb/ch9.h>
  34. #include <linux/usb/gadget.h>
  35. #include <linux/usb/otg.h>
  36. #include <soc/fsl/qe/qe.h>
  37. #include <asm/cpm.h>
  38. #include <asm/dma.h>
  39. #include <asm/reg.h>
  40. #include "fsl_qe_udc.h"
  41. #define DRIVER_DESC "Freescale QE/CPM USB Device Controller driver"
  42. #define DRIVER_AUTHOR "Xie XiaoBo"
  43. #define DRIVER_VERSION "1.0"
  44. #define DMA_ADDR_INVALID (~(dma_addr_t)0)
  45. static const char driver_name[] = "fsl_qe_udc";
  46. static const char driver_desc[] = DRIVER_DESC;
  47. /*ep name is important in gadget, it should obey the convention of ep_match()*/
  48. static const char *const ep_name[] = {
  49. "ep0-control", /* everyone has ep0 */
  50. /* 3 configurable endpoints */
  51. "ep1",
  52. "ep2",
  53. "ep3",
  54. };
  55. static const struct usb_endpoint_descriptor qe_ep0_desc = {
  56. .bLength = USB_DT_ENDPOINT_SIZE,
  57. .bDescriptorType = USB_DT_ENDPOINT,
  58. .bEndpointAddress = 0,
  59. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  60. .wMaxPacketSize = USB_MAX_CTRL_PAYLOAD,
  61. };
  62. /********************************************************************
  63. * Internal Used Function Start
  64. ********************************************************************/
  65. /*-----------------------------------------------------------------
  66. * done() - retire a request; caller blocked irqs
  67. *--------------------------------------------------------------*/
  68. static void done(struct qe_ep *ep, struct qe_req *req, int status)
  69. {
  70. struct qe_udc *udc = ep->udc;
  71. unsigned char stopped = ep->stopped;
  72. /* the req->queue pointer is used by ep_queue() func, in which
  73. * the request will be added into a udc_ep->queue 'd tail
  74. * so here the req will be dropped from the ep->queue
  75. */
  76. list_del_init(&req->queue);
  77. /* req.status should be set as -EINPROGRESS in ep_queue() */
  78. if (req->req.status == -EINPROGRESS)
  79. req->req.status = status;
  80. else
  81. status = req->req.status;
  82. if (req->mapped) {
  83. dma_unmap_single(udc->gadget.dev.parent,
  84. req->req.dma, req->req.length,
  85. ep_is_in(ep)
  86. ? DMA_TO_DEVICE
  87. : DMA_FROM_DEVICE);
  88. req->req.dma = DMA_ADDR_INVALID;
  89. req->mapped = 0;
  90. } else
  91. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  92. req->req.dma, req->req.length,
  93. ep_is_in(ep)
  94. ? DMA_TO_DEVICE
  95. : DMA_FROM_DEVICE);
  96. if (status && (status != -ESHUTDOWN))
  97. dev_vdbg(udc->dev, "complete %s req %p stat %d len %u/%u\n",
  98. ep->ep.name, &req->req, status,
  99. req->req.actual, req->req.length);
  100. /* don't modify queue heads during completion callback */
  101. ep->stopped = 1;
  102. spin_unlock(&udc->lock);
  103. usb_gadget_giveback_request(&ep->ep, &req->req);
  104. spin_lock(&udc->lock);
  105. ep->stopped = stopped;
  106. }
  107. /*-----------------------------------------------------------------
  108. * nuke(): delete all requests related to this ep
  109. *--------------------------------------------------------------*/
  110. static void nuke(struct qe_ep *ep, int status)
  111. {
  112. /* Whether this eq has request linked */
  113. while (!list_empty(&ep->queue)) {
  114. struct qe_req *req = NULL;
  115. req = list_entry(ep->queue.next, struct qe_req, queue);
  116. done(ep, req, status);
  117. }
  118. }
  119. /*---------------------------------------------------------------------------*
  120. * USB and Endpoint manipulate process, include parameter and register *
  121. *---------------------------------------------------------------------------*/
  122. /* @value: 1--set stall 0--clean stall */
  123. static int qe_eprx_stall_change(struct qe_ep *ep, int value)
  124. {
  125. u16 tem_usep;
  126. u8 epnum = ep->epnum;
  127. struct qe_udc *udc = ep->udc;
  128. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  129. tem_usep = tem_usep & ~USB_RHS_MASK;
  130. if (value == 1)
  131. tem_usep |= USB_RHS_STALL;
  132. else if (ep->dir == USB_DIR_IN)
  133. tem_usep |= USB_RHS_IGNORE_OUT;
  134. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  135. return 0;
  136. }
  137. static int qe_eptx_stall_change(struct qe_ep *ep, int value)
  138. {
  139. u16 tem_usep;
  140. u8 epnum = ep->epnum;
  141. struct qe_udc *udc = ep->udc;
  142. tem_usep = in_be16(&udc->usb_regs->usb_usep[epnum]);
  143. tem_usep = tem_usep & ~USB_THS_MASK;
  144. if (value == 1)
  145. tem_usep |= USB_THS_STALL;
  146. else if (ep->dir == USB_DIR_OUT)
  147. tem_usep |= USB_THS_IGNORE_IN;
  148. out_be16(&udc->usb_regs->usb_usep[epnum], tem_usep);
  149. return 0;
  150. }
  151. static int qe_ep0_stall(struct qe_udc *udc)
  152. {
  153. qe_eptx_stall_change(&udc->eps[0], 1);
  154. qe_eprx_stall_change(&udc->eps[0], 1);
  155. udc->ep0_state = WAIT_FOR_SETUP;
  156. udc->ep0_dir = 0;
  157. return 0;
  158. }
  159. static int qe_eprx_nack(struct qe_ep *ep)
  160. {
  161. u8 epnum = ep->epnum;
  162. struct qe_udc *udc = ep->udc;
  163. if (ep->state == EP_STATE_IDLE) {
  164. /* Set the ep's nack */
  165. clrsetbits_be16(&udc->usb_regs->usb_usep[epnum],
  166. USB_RHS_MASK, USB_RHS_NACK);
  167. /* Mask Rx and Busy interrupts */
  168. clrbits16(&udc->usb_regs->usb_usbmr,
  169. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  170. ep->state = EP_STATE_NACK;
  171. }
  172. return 0;
  173. }
  174. static int qe_eprx_normal(struct qe_ep *ep)
  175. {
  176. struct qe_udc *udc = ep->udc;
  177. if (ep->state == EP_STATE_NACK) {
  178. clrsetbits_be16(&udc->usb_regs->usb_usep[ep->epnum],
  179. USB_RTHS_MASK, USB_THS_IGNORE_IN);
  180. /* Unmask RX interrupts */
  181. out_be16(&udc->usb_regs->usb_usber,
  182. USB_E_BSY_MASK | USB_E_RXB_MASK);
  183. setbits16(&udc->usb_regs->usb_usbmr,
  184. (USB_E_RXB_MASK | USB_E_BSY_MASK));
  185. ep->state = EP_STATE_IDLE;
  186. ep->has_data = 0;
  187. }
  188. return 0;
  189. }
  190. static int qe_ep_cmd_stoptx(struct qe_ep *ep)
  191. {
  192. if (ep->udc->soc_type == PORT_CPM)
  193. cpm_command(CPM_USB_STOP_TX | (ep->epnum << CPM_USB_EP_SHIFT),
  194. CPM_USB_STOP_TX_OPCODE);
  195. else
  196. qe_issue_cmd(QE_USB_STOP_TX, QE_CR_SUBBLOCK_USB,
  197. ep->epnum, 0);
  198. return 0;
  199. }
  200. static int qe_ep_cmd_restarttx(struct qe_ep *ep)
  201. {
  202. if (ep->udc->soc_type == PORT_CPM)
  203. cpm_command(CPM_USB_RESTART_TX | (ep->epnum <<
  204. CPM_USB_EP_SHIFT), CPM_USB_RESTART_TX_OPCODE);
  205. else
  206. qe_issue_cmd(QE_USB_RESTART_TX, QE_CR_SUBBLOCK_USB,
  207. ep->epnum, 0);
  208. return 0;
  209. }
  210. static int qe_ep_flushtxfifo(struct qe_ep *ep)
  211. {
  212. struct qe_udc *udc = ep->udc;
  213. int i;
  214. i = (int)ep->epnum;
  215. qe_ep_cmd_stoptx(ep);
  216. out_8(&udc->usb_regs->usb_uscom,
  217. USB_CMD_FLUSH_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  218. out_be16(&udc->ep_param[i]->tbptr, in_be16(&udc->ep_param[i]->tbase));
  219. out_be32(&udc->ep_param[i]->tstate, 0);
  220. out_be16(&udc->ep_param[i]->tbcnt, 0);
  221. ep->c_txbd = ep->txbase;
  222. ep->n_txbd = ep->txbase;
  223. qe_ep_cmd_restarttx(ep);
  224. return 0;
  225. }
  226. static int qe_ep_filltxfifo(struct qe_ep *ep)
  227. {
  228. struct qe_udc *udc = ep->udc;
  229. out_8(&udc->usb_regs->usb_uscom,
  230. USB_CMD_STR_FIFO | (USB_CMD_EP_MASK & (ep->epnum)));
  231. return 0;
  232. }
  233. static int qe_epbds_reset(struct qe_udc *udc, int pipe_num)
  234. {
  235. struct qe_ep *ep;
  236. u32 bdring_len;
  237. struct qe_bd __iomem *bd;
  238. int i;
  239. ep = &udc->eps[pipe_num];
  240. if (ep->dir == USB_DIR_OUT)
  241. bdring_len = USB_BDRING_LEN_RX;
  242. else
  243. bdring_len = USB_BDRING_LEN;
  244. bd = ep->rxbase;
  245. for (i = 0; i < (bdring_len - 1); i++) {
  246. out_be32((u32 __iomem *)bd, R_E | R_I);
  247. bd++;
  248. }
  249. out_be32((u32 __iomem *)bd, R_E | R_I | R_W);
  250. bd = ep->txbase;
  251. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  252. out_be32(&bd->buf, 0);
  253. out_be32((u32 __iomem *)bd, 0);
  254. bd++;
  255. }
  256. out_be32((u32 __iomem *)bd, T_W);
  257. return 0;
  258. }
  259. static int qe_ep_reset(struct qe_udc *udc, int pipe_num)
  260. {
  261. struct qe_ep *ep;
  262. u16 tmpusep;
  263. ep = &udc->eps[pipe_num];
  264. tmpusep = in_be16(&udc->usb_regs->usb_usep[pipe_num]);
  265. tmpusep &= ~USB_RTHS_MASK;
  266. switch (ep->dir) {
  267. case USB_DIR_BOTH:
  268. qe_ep_flushtxfifo(ep);
  269. break;
  270. case USB_DIR_OUT:
  271. tmpusep |= USB_THS_IGNORE_IN;
  272. break;
  273. case USB_DIR_IN:
  274. qe_ep_flushtxfifo(ep);
  275. tmpusep |= USB_RHS_IGNORE_OUT;
  276. break;
  277. default:
  278. break;
  279. }
  280. out_be16(&udc->usb_regs->usb_usep[pipe_num], tmpusep);
  281. qe_epbds_reset(udc, pipe_num);
  282. return 0;
  283. }
  284. static int qe_ep_toggledata01(struct qe_ep *ep)
  285. {
  286. ep->data01 ^= 0x1;
  287. return 0;
  288. }
  289. static int qe_ep_bd_init(struct qe_udc *udc, unsigned char pipe_num)
  290. {
  291. struct qe_ep *ep = &udc->eps[pipe_num];
  292. unsigned long tmp_addr = 0;
  293. struct usb_ep_para __iomem *epparam;
  294. int i;
  295. struct qe_bd __iomem *bd;
  296. int bdring_len;
  297. if (ep->dir == USB_DIR_OUT)
  298. bdring_len = USB_BDRING_LEN_RX;
  299. else
  300. bdring_len = USB_BDRING_LEN;
  301. epparam = udc->ep_param[pipe_num];
  302. /* alloc multi-ram for BD rings and set the ep parameters */
  303. tmp_addr = cpm_muram_alloc(sizeof(struct qe_bd) * (bdring_len +
  304. USB_BDRING_LEN_TX), QE_ALIGNMENT_OF_BD);
  305. if (IS_ERR_VALUE(tmp_addr))
  306. return -ENOMEM;
  307. out_be16(&epparam->rbase, (u16)tmp_addr);
  308. out_be16(&epparam->tbase, (u16)(tmp_addr +
  309. (sizeof(struct qe_bd) * bdring_len)));
  310. out_be16(&epparam->rbptr, in_be16(&epparam->rbase));
  311. out_be16(&epparam->tbptr, in_be16(&epparam->tbase));
  312. ep->rxbase = cpm_muram_addr(tmp_addr);
  313. ep->txbase = cpm_muram_addr(tmp_addr + (sizeof(struct qe_bd)
  314. * bdring_len));
  315. ep->n_rxbd = ep->rxbase;
  316. ep->e_rxbd = ep->rxbase;
  317. ep->n_txbd = ep->txbase;
  318. ep->c_txbd = ep->txbase;
  319. ep->data01 = 0; /* data0 */
  320. /* Init TX and RX bds */
  321. bd = ep->rxbase;
  322. for (i = 0; i < bdring_len - 1; i++) {
  323. out_be32(&bd->buf, 0);
  324. out_be32((u32 __iomem *)bd, 0);
  325. bd++;
  326. }
  327. out_be32(&bd->buf, 0);
  328. out_be32((u32 __iomem *)bd, R_W);
  329. bd = ep->txbase;
  330. for (i = 0; i < USB_BDRING_LEN_TX - 1; i++) {
  331. out_be32(&bd->buf, 0);
  332. out_be32((u32 __iomem *)bd, 0);
  333. bd++;
  334. }
  335. out_be32(&bd->buf, 0);
  336. out_be32((u32 __iomem *)bd, T_W);
  337. return 0;
  338. }
  339. static int qe_ep_rxbd_update(struct qe_ep *ep)
  340. {
  341. unsigned int size;
  342. int i;
  343. unsigned int tmp;
  344. struct qe_bd __iomem *bd;
  345. unsigned int bdring_len;
  346. if (ep->rxbase == NULL)
  347. return -EINVAL;
  348. bd = ep->rxbase;
  349. ep->rxframe = kmalloc_obj(*ep->rxframe, GFP_ATOMIC);
  350. if (!ep->rxframe)
  351. return -ENOMEM;
  352. qe_frame_init(ep->rxframe);
  353. if (ep->dir == USB_DIR_OUT)
  354. bdring_len = USB_BDRING_LEN_RX;
  355. else
  356. bdring_len = USB_BDRING_LEN;
  357. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (bdring_len + 1);
  358. ep->rxbuffer = kzalloc(size, GFP_ATOMIC);
  359. if (!ep->rxbuffer) {
  360. kfree(ep->rxframe);
  361. return -ENOMEM;
  362. }
  363. ep->rxbuf_d = virt_to_phys((void *)ep->rxbuffer);
  364. if (ep->rxbuf_d == DMA_ADDR_INVALID) {
  365. ep->rxbuf_d = dma_map_single(ep->udc->gadget.dev.parent,
  366. ep->rxbuffer,
  367. size,
  368. DMA_FROM_DEVICE);
  369. ep->rxbufmap = 1;
  370. } else {
  371. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  372. ep->rxbuf_d, size,
  373. DMA_FROM_DEVICE);
  374. ep->rxbufmap = 0;
  375. }
  376. size = ep->ep.maxpacket + USB_CRC_SIZE + 2;
  377. tmp = ep->rxbuf_d;
  378. tmp = (u32)(((tmp >> 2) << 2) + 4);
  379. for (i = 0; i < bdring_len - 1; i++) {
  380. out_be32(&bd->buf, tmp);
  381. out_be32((u32 __iomem *)bd, (R_E | R_I));
  382. tmp = tmp + size;
  383. bd++;
  384. }
  385. out_be32(&bd->buf, tmp);
  386. out_be32((u32 __iomem *)bd, (R_E | R_I | R_W));
  387. return 0;
  388. }
  389. static int qe_ep_register_init(struct qe_udc *udc, unsigned char pipe_num)
  390. {
  391. struct qe_ep *ep = &udc->eps[pipe_num];
  392. struct usb_ep_para __iomem *epparam;
  393. u16 usep, logepnum;
  394. u16 tmp;
  395. u8 rtfcr = 0;
  396. epparam = udc->ep_param[pipe_num];
  397. usep = 0;
  398. logepnum = (ep->ep.desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
  399. usep |= (logepnum << USB_EPNUM_SHIFT);
  400. switch (ep->ep.desc->bmAttributes & 0x03) {
  401. case USB_ENDPOINT_XFER_BULK:
  402. usep |= USB_TRANS_BULK;
  403. break;
  404. case USB_ENDPOINT_XFER_ISOC:
  405. usep |= USB_TRANS_ISO;
  406. break;
  407. case USB_ENDPOINT_XFER_INT:
  408. usep |= USB_TRANS_INT;
  409. break;
  410. default:
  411. usep |= USB_TRANS_CTR;
  412. break;
  413. }
  414. switch (ep->dir) {
  415. case USB_DIR_OUT:
  416. usep |= USB_THS_IGNORE_IN;
  417. break;
  418. case USB_DIR_IN:
  419. usep |= USB_RHS_IGNORE_OUT;
  420. break;
  421. default:
  422. break;
  423. }
  424. out_be16(&udc->usb_regs->usb_usep[pipe_num], usep);
  425. rtfcr = 0x30;
  426. out_8(&epparam->rbmr, rtfcr);
  427. out_8(&epparam->tbmr, rtfcr);
  428. tmp = (u16)(ep->ep.maxpacket + USB_CRC_SIZE);
  429. /* MRBLR must be divisible by 4 */
  430. tmp = (u16)(((tmp >> 2) << 2) + 4);
  431. out_be16(&epparam->mrblr, tmp);
  432. return 0;
  433. }
  434. static int qe_ep_init(struct qe_udc *udc,
  435. unsigned char pipe_num,
  436. const struct usb_endpoint_descriptor *desc)
  437. {
  438. struct qe_ep *ep = &udc->eps[pipe_num];
  439. unsigned long flags;
  440. int reval = 0;
  441. u16 max = 0;
  442. max = usb_endpoint_maxp(desc);
  443. /* check the max package size validate for this endpoint */
  444. /* Refer to USB2.0 spec table 9-13,
  445. */
  446. if (pipe_num != 0) {
  447. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  448. case USB_ENDPOINT_XFER_BULK:
  449. if (strstr(ep->ep.name, "-iso")
  450. || strstr(ep->ep.name, "-int"))
  451. goto en_done;
  452. switch (udc->gadget.speed) {
  453. case USB_SPEED_HIGH:
  454. if ((max == 128) || (max == 256) || (max == 512))
  455. break;
  456. fallthrough;
  457. default:
  458. switch (max) {
  459. case 4:
  460. case 8:
  461. case 16:
  462. case 32:
  463. case 64:
  464. break;
  465. default:
  466. case USB_SPEED_LOW:
  467. goto en_done;
  468. }
  469. }
  470. break;
  471. case USB_ENDPOINT_XFER_INT:
  472. if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
  473. goto en_done;
  474. switch (udc->gadget.speed) {
  475. case USB_SPEED_HIGH:
  476. if (max <= 1024)
  477. break;
  478. fallthrough;
  479. case USB_SPEED_FULL:
  480. if (max <= 64)
  481. break;
  482. fallthrough;
  483. default:
  484. if (max <= 8)
  485. break;
  486. goto en_done;
  487. }
  488. break;
  489. case USB_ENDPOINT_XFER_ISOC:
  490. if (strstr(ep->ep.name, "-bulk")
  491. || strstr(ep->ep.name, "-int"))
  492. goto en_done;
  493. switch (udc->gadget.speed) {
  494. case USB_SPEED_HIGH:
  495. if (max <= 1024)
  496. break;
  497. fallthrough;
  498. case USB_SPEED_FULL:
  499. if (max <= 1023)
  500. break;
  501. fallthrough;
  502. default:
  503. goto en_done;
  504. }
  505. break;
  506. case USB_ENDPOINT_XFER_CONTROL:
  507. if (strstr(ep->ep.name, "-iso")
  508. || strstr(ep->ep.name, "-int"))
  509. goto en_done;
  510. switch (udc->gadget.speed) {
  511. case USB_SPEED_HIGH:
  512. case USB_SPEED_FULL:
  513. switch (max) {
  514. case 1:
  515. case 2:
  516. case 4:
  517. case 8:
  518. case 16:
  519. case 32:
  520. case 64:
  521. break;
  522. default:
  523. goto en_done;
  524. }
  525. fallthrough;
  526. case USB_SPEED_LOW:
  527. switch (max) {
  528. case 1:
  529. case 2:
  530. case 4:
  531. case 8:
  532. break;
  533. default:
  534. goto en_done;
  535. }
  536. default:
  537. goto en_done;
  538. }
  539. break;
  540. default:
  541. goto en_done;
  542. }
  543. } /* if ep0*/
  544. spin_lock_irqsave(&udc->lock, flags);
  545. /* initialize ep structure */
  546. ep->ep.maxpacket = max;
  547. ep->tm = (u8)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  548. ep->ep.desc = desc;
  549. ep->stopped = 0;
  550. ep->init = 1;
  551. if (pipe_num == 0) {
  552. ep->dir = USB_DIR_BOTH;
  553. udc->ep0_dir = USB_DIR_OUT;
  554. udc->ep0_state = WAIT_FOR_SETUP;
  555. } else {
  556. switch (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) {
  557. case USB_DIR_OUT:
  558. ep->dir = USB_DIR_OUT;
  559. break;
  560. case USB_DIR_IN:
  561. ep->dir = USB_DIR_IN;
  562. default:
  563. break;
  564. }
  565. }
  566. /* hardware special operation */
  567. qe_ep_bd_init(udc, pipe_num);
  568. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_OUT)) {
  569. reval = qe_ep_rxbd_update(ep);
  570. if (reval)
  571. goto en_done1;
  572. }
  573. if ((ep->tm == USBP_TM_CTL) || (ep->dir == USB_DIR_IN)) {
  574. ep->txframe = kmalloc_obj(*ep->txframe, GFP_ATOMIC);
  575. if (!ep->txframe)
  576. goto en_done2;
  577. qe_frame_init(ep->txframe);
  578. }
  579. qe_ep_register_init(udc, pipe_num);
  580. /* Now HW will be NAKing transfers to that EP,
  581. * until a buffer is queued to it. */
  582. spin_unlock_irqrestore(&udc->lock, flags);
  583. return 0;
  584. en_done2:
  585. kfree(ep->rxbuffer);
  586. kfree(ep->rxframe);
  587. en_done1:
  588. spin_unlock_irqrestore(&udc->lock, flags);
  589. en_done:
  590. dev_err(udc->dev, "failed to initialize %s\n", ep->ep.name);
  591. return -ENODEV;
  592. }
  593. static inline void qe_usb_enable(struct qe_udc *udc)
  594. {
  595. setbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  596. }
  597. static inline void qe_usb_disable(struct qe_udc *udc)
  598. {
  599. clrbits8(&udc->usb_regs->usb_usmod, USB_MODE_EN);
  600. }
  601. /*----------------------------------------------------------------------------*
  602. * USB and EP basic manipulate function end *
  603. *----------------------------------------------------------------------------*/
  604. /******************************************************************************
  605. UDC transmit and receive process
  606. ******************************************************************************/
  607. static void recycle_one_rxbd(struct qe_ep *ep)
  608. {
  609. u32 bdstatus;
  610. bdstatus = in_be32((u32 __iomem *)ep->e_rxbd);
  611. bdstatus = R_I | R_E | (bdstatus & R_W);
  612. out_be32((u32 __iomem *)ep->e_rxbd, bdstatus);
  613. if (bdstatus & R_W)
  614. ep->e_rxbd = ep->rxbase;
  615. else
  616. ep->e_rxbd++;
  617. }
  618. static void recycle_rxbds(struct qe_ep *ep, unsigned char stopatnext)
  619. {
  620. u32 bdstatus;
  621. struct qe_bd __iomem *bd, *nextbd;
  622. unsigned char stop = 0;
  623. nextbd = ep->n_rxbd;
  624. bd = ep->e_rxbd;
  625. bdstatus = in_be32((u32 __iomem *)bd);
  626. while (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK) && !stop) {
  627. bdstatus = R_E | R_I | (bdstatus & R_W);
  628. out_be32((u32 __iomem *)bd, bdstatus);
  629. if (bdstatus & R_W)
  630. bd = ep->rxbase;
  631. else
  632. bd++;
  633. bdstatus = in_be32((u32 __iomem *)bd);
  634. if (stopatnext && (bd == nextbd))
  635. stop = 1;
  636. }
  637. ep->e_rxbd = bd;
  638. }
  639. static void ep_recycle_rxbds(struct qe_ep *ep)
  640. {
  641. struct qe_bd __iomem *bd = ep->n_rxbd;
  642. u32 bdstatus;
  643. u8 epnum = ep->epnum;
  644. struct qe_udc *udc = ep->udc;
  645. bdstatus = in_be32((u32 __iomem *)bd);
  646. if (!(bdstatus & R_E) && !(bdstatus & BD_LENGTH_MASK)) {
  647. bd = ep->rxbase +
  648. ((in_be16(&udc->ep_param[epnum]->rbptr) -
  649. in_be16(&udc->ep_param[epnum]->rbase))
  650. >> 3);
  651. bdstatus = in_be32((u32 __iomem *)bd);
  652. if (bdstatus & R_W)
  653. bd = ep->rxbase;
  654. else
  655. bd++;
  656. ep->e_rxbd = bd;
  657. recycle_rxbds(ep, 0);
  658. ep->e_rxbd = ep->n_rxbd;
  659. } else
  660. recycle_rxbds(ep, 1);
  661. if (in_be16(&udc->usb_regs->usb_usber) & USB_E_BSY_MASK)
  662. out_be16(&udc->usb_regs->usb_usber, USB_E_BSY_MASK);
  663. if (ep->has_data <= 0 && (!list_empty(&ep->queue)))
  664. qe_eprx_normal(ep);
  665. ep->localnack = 0;
  666. }
  667. static void setup_received_handle(struct qe_udc *udc,
  668. struct usb_ctrlrequest *setup);
  669. static int qe_ep_rxframe_handle(struct qe_ep *ep);
  670. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req);
  671. /* when BD PID is setup, handle the packet */
  672. static int ep0_setup_handle(struct qe_udc *udc)
  673. {
  674. struct qe_ep *ep = &udc->eps[0];
  675. struct qe_frame *pframe;
  676. unsigned int fsize;
  677. u8 *cp;
  678. pframe = ep->rxframe;
  679. if ((frame_get_info(pframe) & PID_SETUP)
  680. && (udc->ep0_state == WAIT_FOR_SETUP)) {
  681. fsize = frame_get_length(pframe);
  682. if (unlikely(fsize != 8))
  683. return -EINVAL;
  684. cp = (u8 *)&udc->local_setup_buff;
  685. memcpy(cp, pframe->data, fsize);
  686. ep->data01 = 1;
  687. /* handle the usb command base on the usb_ctrlrequest */
  688. setup_received_handle(udc, &udc->local_setup_buff);
  689. return 0;
  690. }
  691. return -EINVAL;
  692. }
  693. static int qe_ep0_rx(struct qe_udc *udc)
  694. {
  695. struct qe_ep *ep = &udc->eps[0];
  696. struct qe_frame *pframe;
  697. struct qe_bd __iomem *bd;
  698. u32 bdstatus, length;
  699. u32 vaddr;
  700. pframe = ep->rxframe;
  701. if (ep->dir == USB_DIR_IN) {
  702. dev_err(udc->dev, "ep0 not a control endpoint\n");
  703. return -EINVAL;
  704. }
  705. bd = ep->n_rxbd;
  706. bdstatus = in_be32((u32 __iomem *)bd);
  707. length = bdstatus & BD_LENGTH_MASK;
  708. while (!(bdstatus & R_E) && length) {
  709. if ((bdstatus & R_F) && (bdstatus & R_L)
  710. && !(bdstatus & R_ERROR)) {
  711. if (length == USB_CRC_SIZE) {
  712. udc->ep0_state = WAIT_FOR_SETUP;
  713. dev_vdbg(udc->dev,
  714. "receive a ZLP in status phase\n");
  715. } else {
  716. qe_frame_clean(pframe);
  717. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  718. frame_set_data(pframe, (u8 *)vaddr);
  719. frame_set_length(pframe,
  720. (length - USB_CRC_SIZE));
  721. frame_set_status(pframe, FRAME_OK);
  722. switch (bdstatus & R_PID) {
  723. case R_PID_SETUP:
  724. frame_set_info(pframe, PID_SETUP);
  725. break;
  726. case R_PID_DATA1:
  727. frame_set_info(pframe, PID_DATA1);
  728. break;
  729. default:
  730. frame_set_info(pframe, PID_DATA0);
  731. break;
  732. }
  733. if ((bdstatus & R_PID) == R_PID_SETUP)
  734. ep0_setup_handle(udc);
  735. else
  736. qe_ep_rxframe_handle(ep);
  737. }
  738. } else {
  739. dev_err(udc->dev, "The receive frame with error!\n");
  740. }
  741. /* note: don't clear the rxbd's buffer address */
  742. recycle_one_rxbd(ep);
  743. /* Get next BD */
  744. if (bdstatus & R_W)
  745. bd = ep->rxbase;
  746. else
  747. bd++;
  748. bdstatus = in_be32((u32 __iomem *)bd);
  749. length = bdstatus & BD_LENGTH_MASK;
  750. }
  751. ep->n_rxbd = bd;
  752. return 0;
  753. }
  754. static int qe_ep_rxframe_handle(struct qe_ep *ep)
  755. {
  756. struct qe_frame *pframe;
  757. u8 framepid = 0;
  758. unsigned int fsize;
  759. u8 *cp;
  760. struct qe_req *req;
  761. pframe = ep->rxframe;
  762. if (frame_get_info(pframe) & PID_DATA1)
  763. framepid = 0x1;
  764. if (framepid != ep->data01) {
  765. dev_err(ep->udc->dev, "the data01 error!\n");
  766. return -EIO;
  767. }
  768. fsize = frame_get_length(pframe);
  769. if (list_empty(&ep->queue)) {
  770. dev_err(ep->udc->dev, "the %s have no requeue!\n", ep->name);
  771. } else {
  772. req = list_entry(ep->queue.next, struct qe_req, queue);
  773. cp = (u8 *)(req->req.buf) + req->req.actual;
  774. if (cp) {
  775. memcpy(cp, pframe->data, fsize);
  776. req->req.actual += fsize;
  777. if ((fsize < ep->ep.maxpacket) ||
  778. (req->req.actual >= req->req.length)) {
  779. if (ep->epnum == 0)
  780. ep0_req_complete(ep->udc, req);
  781. else
  782. done(ep, req, 0);
  783. if (list_empty(&ep->queue) && ep->epnum != 0)
  784. qe_eprx_nack(ep);
  785. }
  786. }
  787. }
  788. qe_ep_toggledata01(ep);
  789. return 0;
  790. }
  791. static void ep_rx_tasklet(struct tasklet_struct *t)
  792. {
  793. struct qe_udc *udc = from_tasklet(udc, t, rx_tasklet);
  794. struct qe_ep *ep;
  795. struct qe_frame *pframe;
  796. struct qe_bd __iomem *bd;
  797. unsigned long flags;
  798. u32 bdstatus, length;
  799. u32 vaddr, i;
  800. spin_lock_irqsave(&udc->lock, flags);
  801. for (i = 1; i < USB_MAX_ENDPOINTS; i++) {
  802. ep = &udc->eps[i];
  803. if (ep->dir == USB_DIR_IN || ep->enable_tasklet == 0) {
  804. dev_dbg(udc->dev,
  805. "This is a transmit ep or disable tasklet!\n");
  806. continue;
  807. }
  808. pframe = ep->rxframe;
  809. bd = ep->n_rxbd;
  810. bdstatus = in_be32((u32 __iomem *)bd);
  811. length = bdstatus & BD_LENGTH_MASK;
  812. while (!(bdstatus & R_E) && length) {
  813. if (list_empty(&ep->queue)) {
  814. qe_eprx_nack(ep);
  815. dev_dbg(udc->dev,
  816. "The rxep have noreq %d\n",
  817. ep->has_data);
  818. break;
  819. }
  820. if ((bdstatus & R_F) && (bdstatus & R_L)
  821. && !(bdstatus & R_ERROR)) {
  822. qe_frame_clean(pframe);
  823. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  824. frame_set_data(pframe, (u8 *)vaddr);
  825. frame_set_length(pframe,
  826. (length - USB_CRC_SIZE));
  827. frame_set_status(pframe, FRAME_OK);
  828. switch (bdstatus & R_PID) {
  829. case R_PID_DATA1:
  830. frame_set_info(pframe, PID_DATA1);
  831. break;
  832. case R_PID_SETUP:
  833. frame_set_info(pframe, PID_SETUP);
  834. break;
  835. default:
  836. frame_set_info(pframe, PID_DATA0);
  837. break;
  838. }
  839. /* handle the rx frame */
  840. qe_ep_rxframe_handle(ep);
  841. } else {
  842. dev_err(udc->dev,
  843. "error in received frame\n");
  844. }
  845. /* note: don't clear the rxbd's buffer address */
  846. /*clear the length */
  847. out_be32((u32 __iomem *)bd, bdstatus & BD_STATUS_MASK);
  848. ep->has_data--;
  849. if (!(ep->localnack))
  850. recycle_one_rxbd(ep);
  851. /* Get next BD */
  852. if (bdstatus & R_W)
  853. bd = ep->rxbase;
  854. else
  855. bd++;
  856. bdstatus = in_be32((u32 __iomem *)bd);
  857. length = bdstatus & BD_LENGTH_MASK;
  858. }
  859. ep->n_rxbd = bd;
  860. if (ep->localnack)
  861. ep_recycle_rxbds(ep);
  862. ep->enable_tasklet = 0;
  863. } /* for i=1 */
  864. spin_unlock_irqrestore(&udc->lock, flags);
  865. }
  866. static int qe_ep_rx(struct qe_ep *ep)
  867. {
  868. struct qe_udc *udc;
  869. struct qe_frame *pframe;
  870. struct qe_bd __iomem *bd;
  871. u16 swoffs, ucoffs, emptybds;
  872. udc = ep->udc;
  873. pframe = ep->rxframe;
  874. if (ep->dir == USB_DIR_IN) {
  875. dev_err(udc->dev, "transmit ep in rx function\n");
  876. return -EINVAL;
  877. }
  878. bd = ep->n_rxbd;
  879. swoffs = (u16)(bd - ep->rxbase);
  880. ucoffs = (u16)((in_be16(&udc->ep_param[ep->epnum]->rbptr) -
  881. in_be16(&udc->ep_param[ep->epnum]->rbase)) >> 3);
  882. if (swoffs < ucoffs)
  883. emptybds = USB_BDRING_LEN_RX - ucoffs + swoffs;
  884. else
  885. emptybds = swoffs - ucoffs;
  886. if (emptybds < MIN_EMPTY_BDS) {
  887. qe_eprx_nack(ep);
  888. ep->localnack = 1;
  889. dev_vdbg(udc->dev, "%d empty bds, send NACK\n", emptybds);
  890. }
  891. ep->has_data = USB_BDRING_LEN_RX - emptybds;
  892. if (list_empty(&ep->queue)) {
  893. qe_eprx_nack(ep);
  894. dev_vdbg(udc->dev, "The rxep have no req queued with %d BDs\n",
  895. ep->has_data);
  896. return 0;
  897. }
  898. tasklet_schedule(&udc->rx_tasklet);
  899. ep->enable_tasklet = 1;
  900. return 0;
  901. }
  902. /* send data from a frame, no matter what tx_req */
  903. static int qe_ep_tx(struct qe_ep *ep, struct qe_frame *frame)
  904. {
  905. struct qe_udc *udc = ep->udc;
  906. struct qe_bd __iomem *bd;
  907. u16 saveusbmr;
  908. u32 bdstatus, pidmask;
  909. u32 paddr;
  910. if (ep->dir == USB_DIR_OUT) {
  911. dev_err(udc->dev, "receive ep passed to tx function\n");
  912. return -EINVAL;
  913. }
  914. /* Disable the Tx interrupt */
  915. saveusbmr = in_be16(&udc->usb_regs->usb_usbmr);
  916. out_be16(&udc->usb_regs->usb_usbmr,
  917. saveusbmr & ~(USB_E_TXB_MASK | USB_E_TXE_MASK));
  918. bd = ep->n_txbd;
  919. bdstatus = in_be32((u32 __iomem *)bd);
  920. if (!(bdstatus & (T_R | BD_LENGTH_MASK))) {
  921. if (frame_get_length(frame) == 0) {
  922. frame_set_data(frame, udc->nullbuf);
  923. frame_set_length(frame, 2);
  924. frame->info |= (ZLP | NO_CRC);
  925. dev_vdbg(udc->dev, "the frame size = 0\n");
  926. }
  927. paddr = virt_to_phys((void *)frame->data);
  928. out_be32(&bd->buf, paddr);
  929. bdstatus = (bdstatus&T_W);
  930. if (!(frame_get_info(frame) & NO_CRC))
  931. bdstatus |= T_R | T_I | T_L | T_TC
  932. | frame_get_length(frame);
  933. else
  934. bdstatus |= T_R | T_I | T_L | frame_get_length(frame);
  935. /* if the packet is a ZLP in status phase */
  936. if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP))
  937. ep->data01 = 0x1;
  938. if (ep->data01) {
  939. pidmask = T_PID_DATA1;
  940. frame->info |= PID_DATA1;
  941. } else {
  942. pidmask = T_PID_DATA0;
  943. frame->info |= PID_DATA0;
  944. }
  945. bdstatus |= T_CNF;
  946. bdstatus |= pidmask;
  947. out_be32((u32 __iomem *)bd, bdstatus);
  948. qe_ep_filltxfifo(ep);
  949. /* enable the TX interrupt */
  950. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  951. qe_ep_toggledata01(ep);
  952. if (bdstatus & T_W)
  953. ep->n_txbd = ep->txbase;
  954. else
  955. ep->n_txbd++;
  956. return 0;
  957. } else {
  958. out_be16(&udc->usb_regs->usb_usbmr, saveusbmr);
  959. dev_vdbg(udc->dev, "The tx bd is not ready!\n");
  960. return -EBUSY;
  961. }
  962. }
  963. /* when a bd was transmitted, the function can
  964. * handle the tx_req, not include ep0 */
  965. static int txcomplete(struct qe_ep *ep, unsigned char restart)
  966. {
  967. if (ep->tx_req != NULL) {
  968. struct qe_req *req = ep->tx_req;
  969. unsigned zlp = 0, last_len = 0;
  970. last_len = min_t(unsigned, req->req.length - ep->sent,
  971. ep->ep.maxpacket);
  972. if (!restart) {
  973. int asent = ep->last;
  974. ep->sent += asent;
  975. ep->last -= asent;
  976. } else {
  977. ep->last = 0;
  978. }
  979. /* zlp needed when req->re.zero is set */
  980. if (req->req.zero) {
  981. if (last_len == 0 ||
  982. (req->req.length % ep->ep.maxpacket) != 0)
  983. zlp = 0;
  984. else
  985. zlp = 1;
  986. } else
  987. zlp = 0;
  988. /* a request already were transmitted completely */
  989. if (((ep->tx_req->req.length - ep->sent) <= 0) && !zlp) {
  990. done(ep, ep->tx_req, 0);
  991. ep->tx_req = NULL;
  992. ep->last = 0;
  993. ep->sent = 0;
  994. }
  995. }
  996. /* we should gain a new tx_req fot this endpoint */
  997. if (ep->tx_req == NULL) {
  998. if (!list_empty(&ep->queue)) {
  999. ep->tx_req = list_entry(ep->queue.next, struct qe_req,
  1000. queue);
  1001. ep->last = 0;
  1002. ep->sent = 0;
  1003. }
  1004. }
  1005. return 0;
  1006. }
  1007. /* give a frame and a tx_req, send some data */
  1008. static int qe_usb_senddata(struct qe_ep *ep, struct qe_frame *frame)
  1009. {
  1010. unsigned int size;
  1011. u8 *buf;
  1012. qe_frame_clean(frame);
  1013. size = min_t(u32, (ep->tx_req->req.length - ep->sent),
  1014. ep->ep.maxpacket);
  1015. buf = (u8 *)ep->tx_req->req.buf + ep->sent;
  1016. if (buf && size) {
  1017. ep->last = size;
  1018. ep->tx_req->req.actual += size;
  1019. frame_set_data(frame, buf);
  1020. frame_set_length(frame, size);
  1021. frame_set_status(frame, FRAME_OK);
  1022. frame_set_info(frame, 0);
  1023. return qe_ep_tx(ep, frame);
  1024. }
  1025. return -EIO;
  1026. }
  1027. /* give a frame struct,send a ZLP */
  1028. static int sendnulldata(struct qe_ep *ep, struct qe_frame *frame, uint infor)
  1029. {
  1030. struct qe_udc *udc = ep->udc;
  1031. if (frame == NULL)
  1032. return -ENODEV;
  1033. qe_frame_clean(frame);
  1034. frame_set_data(frame, (u8 *)udc->nullbuf);
  1035. frame_set_length(frame, 2);
  1036. frame_set_status(frame, FRAME_OK);
  1037. frame_set_info(frame, (ZLP | NO_CRC | infor));
  1038. return qe_ep_tx(ep, frame);
  1039. }
  1040. static int frame_create_tx(struct qe_ep *ep, struct qe_frame *frame)
  1041. {
  1042. struct qe_req *req = ep->tx_req;
  1043. int reval;
  1044. if (req == NULL)
  1045. return -ENODEV;
  1046. if ((req->req.length - ep->sent) > 0)
  1047. reval = qe_usb_senddata(ep, frame);
  1048. else
  1049. reval = sendnulldata(ep, frame, 0);
  1050. return reval;
  1051. }
  1052. /* if direction is DIR_IN, the status is Device->Host
  1053. * if direction is DIR_OUT, the status transaction is Device<-Host
  1054. * in status phase, udc create a request and gain status */
  1055. static int ep0_prime_status(struct qe_udc *udc, int direction)
  1056. {
  1057. struct qe_ep *ep = &udc->eps[0];
  1058. if (direction == USB_DIR_IN) {
  1059. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1060. udc->ep0_dir = USB_DIR_IN;
  1061. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1062. } else {
  1063. udc->ep0_dir = USB_DIR_OUT;
  1064. udc->ep0_state = WAIT_FOR_OUT_STATUS;
  1065. }
  1066. return 0;
  1067. }
  1068. /* a request complete in ep0, whether gadget request or udc request */
  1069. static void ep0_req_complete(struct qe_udc *udc, struct qe_req *req)
  1070. {
  1071. struct qe_ep *ep = &udc->eps[0];
  1072. /* because usb and ep's status already been set in ch9setaddress() */
  1073. switch (udc->ep0_state) {
  1074. case DATA_STATE_XMIT:
  1075. done(ep, req, 0);
  1076. /* receive status phase */
  1077. if (ep0_prime_status(udc, USB_DIR_OUT))
  1078. qe_ep0_stall(udc);
  1079. break;
  1080. case DATA_STATE_NEED_ZLP:
  1081. done(ep, req, 0);
  1082. udc->ep0_state = WAIT_FOR_SETUP;
  1083. break;
  1084. case DATA_STATE_RECV:
  1085. done(ep, req, 0);
  1086. /* send status phase */
  1087. if (ep0_prime_status(udc, USB_DIR_IN))
  1088. qe_ep0_stall(udc);
  1089. break;
  1090. case WAIT_FOR_OUT_STATUS:
  1091. done(ep, req, 0);
  1092. udc->ep0_state = WAIT_FOR_SETUP;
  1093. break;
  1094. case WAIT_FOR_SETUP:
  1095. dev_vdbg(udc->dev, "Unexpected interrupt\n");
  1096. break;
  1097. default:
  1098. qe_ep0_stall(udc);
  1099. break;
  1100. }
  1101. }
  1102. static int ep0_txcomplete(struct qe_ep *ep, unsigned char restart)
  1103. {
  1104. struct qe_req *tx_req = NULL;
  1105. struct qe_frame *frame = ep->txframe;
  1106. if ((frame_get_info(frame) & (ZLP | NO_REQ)) == (ZLP | NO_REQ)) {
  1107. if (!restart)
  1108. ep->udc->ep0_state = WAIT_FOR_SETUP;
  1109. else
  1110. sendnulldata(ep, ep->txframe, SETUP_STATUS | NO_REQ);
  1111. return 0;
  1112. }
  1113. tx_req = ep->tx_req;
  1114. if (tx_req != NULL) {
  1115. if (!restart) {
  1116. int asent = ep->last;
  1117. ep->sent += asent;
  1118. ep->last -= asent;
  1119. } else {
  1120. ep->last = 0;
  1121. }
  1122. /* a request already were transmitted completely */
  1123. if ((ep->tx_req->req.length - ep->sent) <= 0) {
  1124. ep->tx_req->req.actual = (unsigned int)ep->sent;
  1125. ep0_req_complete(ep->udc, ep->tx_req);
  1126. ep->tx_req = NULL;
  1127. ep->last = 0;
  1128. ep->sent = 0;
  1129. }
  1130. } else {
  1131. dev_vdbg(ep->udc->dev, "the ep0_controller have no req\n");
  1132. }
  1133. return 0;
  1134. }
  1135. static int ep0_txframe_handle(struct qe_ep *ep)
  1136. {
  1137. /* if have error, transmit again */
  1138. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1139. qe_ep_flushtxfifo(ep);
  1140. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1141. if (frame_get_info(ep->txframe) & PID_DATA0)
  1142. ep->data01 = 0;
  1143. else
  1144. ep->data01 = 1;
  1145. ep0_txcomplete(ep, 1);
  1146. } else
  1147. ep0_txcomplete(ep, 0);
  1148. frame_create_tx(ep, ep->txframe);
  1149. return 0;
  1150. }
  1151. static int qe_ep0_txconf(struct qe_ep *ep)
  1152. {
  1153. struct qe_bd __iomem *bd;
  1154. struct qe_frame *pframe;
  1155. u32 bdstatus;
  1156. bd = ep->c_txbd;
  1157. bdstatus = in_be32((u32 __iomem *)bd);
  1158. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1159. pframe = ep->txframe;
  1160. /* clear and recycle the BD */
  1161. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1162. out_be32(&bd->buf, 0);
  1163. if (bdstatus & T_W)
  1164. ep->c_txbd = ep->txbase;
  1165. else
  1166. ep->c_txbd++;
  1167. if (ep->c_txbd == ep->n_txbd) {
  1168. if (bdstatus & DEVICE_T_ERROR) {
  1169. frame_set_status(pframe, FRAME_ERROR);
  1170. if (bdstatus & T_TO)
  1171. pframe->status |= TX_ER_TIMEOUT;
  1172. if (bdstatus & T_UN)
  1173. pframe->status |= TX_ER_UNDERUN;
  1174. }
  1175. ep0_txframe_handle(ep);
  1176. }
  1177. bd = ep->c_txbd;
  1178. bdstatus = in_be32((u32 __iomem *)bd);
  1179. }
  1180. return 0;
  1181. }
  1182. static int ep_txframe_handle(struct qe_ep *ep)
  1183. {
  1184. if (frame_get_status(ep->txframe) & FRAME_ERROR) {
  1185. qe_ep_flushtxfifo(ep);
  1186. dev_vdbg(ep->udc->dev, "The EP0 transmit data have error!\n");
  1187. if (frame_get_info(ep->txframe) & PID_DATA0)
  1188. ep->data01 = 0;
  1189. else
  1190. ep->data01 = 1;
  1191. txcomplete(ep, 1);
  1192. } else
  1193. txcomplete(ep, 0);
  1194. frame_create_tx(ep, ep->txframe); /* send the data */
  1195. return 0;
  1196. }
  1197. /* confirm the already transmitted bd */
  1198. static int qe_ep_txconf(struct qe_ep *ep)
  1199. {
  1200. struct qe_bd __iomem *bd;
  1201. struct qe_frame *pframe = NULL;
  1202. u32 bdstatus;
  1203. unsigned char breakonrxinterrupt = 0;
  1204. bd = ep->c_txbd;
  1205. bdstatus = in_be32((u32 __iomem *)bd);
  1206. while (!(bdstatus & T_R) && (bdstatus & ~T_W)) {
  1207. pframe = ep->txframe;
  1208. if (bdstatus & DEVICE_T_ERROR) {
  1209. frame_set_status(pframe, FRAME_ERROR);
  1210. if (bdstatus & T_TO)
  1211. pframe->status |= TX_ER_TIMEOUT;
  1212. if (bdstatus & T_UN)
  1213. pframe->status |= TX_ER_UNDERUN;
  1214. }
  1215. /* clear and recycle the BD */
  1216. out_be32((u32 __iomem *)bd, bdstatus & T_W);
  1217. out_be32(&bd->buf, 0);
  1218. if (bdstatus & T_W)
  1219. ep->c_txbd = ep->txbase;
  1220. else
  1221. ep->c_txbd++;
  1222. /* handle the tx frame */
  1223. ep_txframe_handle(ep);
  1224. bd = ep->c_txbd;
  1225. bdstatus = in_be32((u32 __iomem *)bd);
  1226. }
  1227. if (breakonrxinterrupt)
  1228. return -EIO;
  1229. else
  1230. return 0;
  1231. }
  1232. /* Add a request in queue, and try to transmit a packet */
  1233. static int ep_req_send(struct qe_ep *ep, struct qe_req *req)
  1234. {
  1235. int reval = 0;
  1236. if (ep->tx_req == NULL) {
  1237. ep->sent = 0;
  1238. ep->last = 0;
  1239. txcomplete(ep, 0); /* can gain a new tx_req */
  1240. reval = frame_create_tx(ep, ep->txframe);
  1241. }
  1242. return reval;
  1243. }
  1244. /* Maybe this is a good ideal */
  1245. static int ep_req_rx(struct qe_ep *ep, struct qe_req *req)
  1246. {
  1247. struct qe_udc *udc = ep->udc;
  1248. struct qe_frame *pframe = NULL;
  1249. struct qe_bd __iomem *bd;
  1250. u32 bdstatus, length;
  1251. u32 vaddr, fsize;
  1252. u8 *cp;
  1253. u8 finish_req = 0;
  1254. u8 framepid;
  1255. if (list_empty(&ep->queue)) {
  1256. dev_vdbg(udc->dev, "the req already finish!\n");
  1257. return 0;
  1258. }
  1259. pframe = ep->rxframe;
  1260. bd = ep->n_rxbd;
  1261. bdstatus = in_be32((u32 __iomem *)bd);
  1262. length = bdstatus & BD_LENGTH_MASK;
  1263. while (!(bdstatus & R_E) && length) {
  1264. if (finish_req)
  1265. break;
  1266. if ((bdstatus & R_F) && (bdstatus & R_L)
  1267. && !(bdstatus & R_ERROR)) {
  1268. qe_frame_clean(pframe);
  1269. vaddr = (u32)phys_to_virt(in_be32(&bd->buf));
  1270. frame_set_data(pframe, (u8 *)vaddr);
  1271. frame_set_length(pframe, (length - USB_CRC_SIZE));
  1272. frame_set_status(pframe, FRAME_OK);
  1273. switch (bdstatus & R_PID) {
  1274. case R_PID_DATA1:
  1275. frame_set_info(pframe, PID_DATA1); break;
  1276. default:
  1277. frame_set_info(pframe, PID_DATA0); break;
  1278. }
  1279. /* handle the rx frame */
  1280. if (frame_get_info(pframe) & PID_DATA1)
  1281. framepid = 0x1;
  1282. else
  1283. framepid = 0;
  1284. if (framepid != ep->data01) {
  1285. dev_vdbg(udc->dev, "the data01 error!\n");
  1286. } else {
  1287. fsize = frame_get_length(pframe);
  1288. cp = (u8 *)(req->req.buf) + req->req.actual;
  1289. if (cp) {
  1290. memcpy(cp, pframe->data, fsize);
  1291. req->req.actual += fsize;
  1292. if ((fsize < ep->ep.maxpacket)
  1293. || (req->req.actual >=
  1294. req->req.length)) {
  1295. finish_req = 1;
  1296. done(ep, req, 0);
  1297. if (list_empty(&ep->queue))
  1298. qe_eprx_nack(ep);
  1299. }
  1300. }
  1301. qe_ep_toggledata01(ep);
  1302. }
  1303. } else {
  1304. dev_err(udc->dev, "The receive frame with error!\n");
  1305. }
  1306. /* note: don't clear the rxbd's buffer address *
  1307. * only Clear the length */
  1308. out_be32((u32 __iomem *)bd, (bdstatus & BD_STATUS_MASK));
  1309. ep->has_data--;
  1310. /* Get next BD */
  1311. if (bdstatus & R_W)
  1312. bd = ep->rxbase;
  1313. else
  1314. bd++;
  1315. bdstatus = in_be32((u32 __iomem *)bd);
  1316. length = bdstatus & BD_LENGTH_MASK;
  1317. }
  1318. ep->n_rxbd = bd;
  1319. ep_recycle_rxbds(ep);
  1320. return 0;
  1321. }
  1322. /* only add the request in queue */
  1323. static int ep_req_receive(struct qe_ep *ep, struct qe_req *req)
  1324. {
  1325. if (ep->state == EP_STATE_NACK) {
  1326. if (ep->has_data <= 0) {
  1327. /* Enable rx and unmask rx interrupt */
  1328. qe_eprx_normal(ep);
  1329. } else {
  1330. /* Copy the exist BD data */
  1331. ep_req_rx(ep, req);
  1332. }
  1333. }
  1334. return 0;
  1335. }
  1336. /********************************************************************
  1337. Internal Used Function End
  1338. ********************************************************************/
  1339. /*-----------------------------------------------------------------------
  1340. Endpoint Management Functions For Gadget
  1341. -----------------------------------------------------------------------*/
  1342. static int qe_ep_enable(struct usb_ep *_ep,
  1343. const struct usb_endpoint_descriptor *desc)
  1344. {
  1345. struct qe_udc *udc;
  1346. struct qe_ep *ep;
  1347. int retval = 0;
  1348. unsigned char epnum;
  1349. ep = container_of(_ep, struct qe_ep, ep);
  1350. /* catch various bogus parameters */
  1351. if (!_ep || !desc || _ep->name == ep_name[0] ||
  1352. (desc->bDescriptorType != USB_DT_ENDPOINT))
  1353. return -EINVAL;
  1354. udc = ep->udc;
  1355. if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
  1356. return -ESHUTDOWN;
  1357. epnum = (u8)desc->bEndpointAddress & 0xF;
  1358. retval = qe_ep_init(udc, epnum, desc);
  1359. if (retval != 0) {
  1360. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1361. dev_dbg(udc->dev, "enable ep%d failed\n", ep->epnum);
  1362. return -EINVAL;
  1363. }
  1364. dev_dbg(udc->dev, "enable ep%d successful\n", ep->epnum);
  1365. return 0;
  1366. }
  1367. static int qe_ep_disable(struct usb_ep *_ep)
  1368. {
  1369. struct qe_udc *udc;
  1370. struct qe_ep *ep;
  1371. unsigned long flags;
  1372. unsigned int size;
  1373. ep = container_of(_ep, struct qe_ep, ep);
  1374. udc = ep->udc;
  1375. if (!_ep || !ep->ep.desc) {
  1376. dev_dbg(udc->dev, "%s not enabled\n", _ep ? ep->ep.name : NULL);
  1377. return -EINVAL;
  1378. }
  1379. spin_lock_irqsave(&udc->lock, flags);
  1380. /* Nuke all pending requests (does flush) */
  1381. nuke(ep, -ESHUTDOWN);
  1382. ep->ep.desc = NULL;
  1383. ep->stopped = 1;
  1384. ep->tx_req = NULL;
  1385. qe_ep_reset(udc, ep->epnum);
  1386. spin_unlock_irqrestore(&udc->lock, flags);
  1387. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  1388. if (ep->dir == USB_DIR_OUT)
  1389. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1390. (USB_BDRING_LEN_RX + 1);
  1391. else
  1392. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) *
  1393. (USB_BDRING_LEN + 1);
  1394. if (ep->dir != USB_DIR_IN) {
  1395. kfree(ep->rxframe);
  1396. if (ep->rxbufmap) {
  1397. dma_unmap_single(udc->gadget.dev.parent,
  1398. ep->rxbuf_d, size,
  1399. DMA_FROM_DEVICE);
  1400. ep->rxbuf_d = DMA_ADDR_INVALID;
  1401. } else {
  1402. dma_sync_single_for_cpu(
  1403. udc->gadget.dev.parent,
  1404. ep->rxbuf_d, size,
  1405. DMA_FROM_DEVICE);
  1406. }
  1407. kfree(ep->rxbuffer);
  1408. }
  1409. if (ep->dir != USB_DIR_OUT)
  1410. kfree(ep->txframe);
  1411. dev_dbg(udc->dev, "disabled %s OK\n", _ep->name);
  1412. return 0;
  1413. }
  1414. static struct usb_request *qe_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  1415. {
  1416. struct qe_req *req;
  1417. req = kzalloc_obj(*req, gfp_flags);
  1418. if (!req)
  1419. return NULL;
  1420. req->req.dma = DMA_ADDR_INVALID;
  1421. INIT_LIST_HEAD(&req->queue);
  1422. return &req->req;
  1423. }
  1424. static void qe_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1425. {
  1426. struct qe_req *req;
  1427. req = container_of(_req, struct qe_req, req);
  1428. if (_req)
  1429. kfree(req);
  1430. }
  1431. static int __qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req)
  1432. {
  1433. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1434. struct qe_req *req = container_of(_req, struct qe_req, req);
  1435. struct qe_udc *udc;
  1436. int reval;
  1437. udc = ep->udc;
  1438. /* catch various bogus parameters */
  1439. if (!_req || !req->req.complete || !req->req.buf
  1440. || !list_empty(&req->queue)) {
  1441. dev_dbg(udc->dev, "bad params\n");
  1442. return -EINVAL;
  1443. }
  1444. if (!_ep || (!ep->ep.desc && ep_index(ep))) {
  1445. dev_dbg(udc->dev, "bad ep\n");
  1446. return -EINVAL;
  1447. }
  1448. if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
  1449. return -ESHUTDOWN;
  1450. req->ep = ep;
  1451. /* map virtual address to hardware */
  1452. if (req->req.dma == DMA_ADDR_INVALID) {
  1453. req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
  1454. req->req.buf,
  1455. req->req.length,
  1456. ep_is_in(ep)
  1457. ? DMA_TO_DEVICE :
  1458. DMA_FROM_DEVICE);
  1459. req->mapped = 1;
  1460. } else {
  1461. dma_sync_single_for_device(ep->udc->gadget.dev.parent,
  1462. req->req.dma, req->req.length,
  1463. ep_is_in(ep)
  1464. ? DMA_TO_DEVICE :
  1465. DMA_FROM_DEVICE);
  1466. req->mapped = 0;
  1467. }
  1468. req->req.status = -EINPROGRESS;
  1469. req->req.actual = 0;
  1470. list_add_tail(&req->queue, &ep->queue);
  1471. dev_vdbg(udc->dev, "gadget have request in %s! %d\n",
  1472. ep->name, req->req.length);
  1473. /* push the request to device */
  1474. if (ep_is_in(ep))
  1475. reval = ep_req_send(ep, req);
  1476. /* EP0 */
  1477. if (ep_index(ep) == 0 && req->req.length > 0) {
  1478. if (ep_is_in(ep))
  1479. udc->ep0_state = DATA_STATE_XMIT;
  1480. else
  1481. udc->ep0_state = DATA_STATE_RECV;
  1482. }
  1483. if (ep->dir == USB_DIR_OUT)
  1484. reval = ep_req_receive(ep, req);
  1485. return 0;
  1486. }
  1487. /* queues (submits) an I/O request to an endpoint */
  1488. static int qe_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
  1489. gfp_t gfp_flags)
  1490. {
  1491. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1492. struct qe_udc *udc = ep->udc;
  1493. unsigned long flags;
  1494. int ret;
  1495. spin_lock_irqsave(&udc->lock, flags);
  1496. ret = __qe_ep_queue(_ep, _req);
  1497. spin_unlock_irqrestore(&udc->lock, flags);
  1498. return ret;
  1499. }
  1500. /* dequeues (cancels, unlinks) an I/O request from an endpoint */
  1501. static int qe_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1502. {
  1503. struct qe_ep *ep = container_of(_ep, struct qe_ep, ep);
  1504. struct qe_req *req = NULL;
  1505. struct qe_req *iter;
  1506. unsigned long flags;
  1507. if (!_ep || !_req)
  1508. return -EINVAL;
  1509. spin_lock_irqsave(&ep->udc->lock, flags);
  1510. /* make sure it's actually queued on this endpoint */
  1511. list_for_each_entry(iter, &ep->queue, queue) {
  1512. if (&iter->req != _req)
  1513. continue;
  1514. req = iter;
  1515. break;
  1516. }
  1517. if (!req) {
  1518. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1519. return -EINVAL;
  1520. }
  1521. done(ep, req, -ECONNRESET);
  1522. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1523. return 0;
  1524. }
  1525. /*-----------------------------------------------------------------
  1526. * modify the endpoint halt feature
  1527. * @ep: the non-isochronous endpoint being stalled
  1528. * @value: 1--set halt 0--clear halt
  1529. * Returns zero, or a negative error code.
  1530. *----------------------------------------------------------------*/
  1531. static int qe_ep_set_halt(struct usb_ep *_ep, int value)
  1532. {
  1533. struct qe_ep *ep;
  1534. unsigned long flags;
  1535. int status = -EOPNOTSUPP;
  1536. struct qe_udc *udc;
  1537. ep = container_of(_ep, struct qe_ep, ep);
  1538. if (!_ep || !ep->ep.desc) {
  1539. status = -EINVAL;
  1540. goto out;
  1541. }
  1542. udc = ep->udc;
  1543. /* Attempt to halt IN ep will fail if any transfer requests
  1544. * are still queue */
  1545. if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
  1546. status = -EAGAIN;
  1547. goto out;
  1548. }
  1549. status = 0;
  1550. spin_lock_irqsave(&ep->udc->lock, flags);
  1551. qe_eptx_stall_change(ep, value);
  1552. qe_eprx_stall_change(ep, value);
  1553. spin_unlock_irqrestore(&ep->udc->lock, flags);
  1554. if (ep->epnum == 0) {
  1555. udc->ep0_state = WAIT_FOR_SETUP;
  1556. udc->ep0_dir = 0;
  1557. }
  1558. /* set data toggle to DATA0 on clear halt */
  1559. if (value == 0)
  1560. ep->data01 = 0;
  1561. out:
  1562. dev_vdbg(udc->dev, "%s %s halt stat %d\n", ep->ep.name,
  1563. value ? "set" : "clear", status);
  1564. return status;
  1565. }
  1566. static const struct usb_ep_ops qe_ep_ops = {
  1567. .enable = qe_ep_enable,
  1568. .disable = qe_ep_disable,
  1569. .alloc_request = qe_alloc_request,
  1570. .free_request = qe_free_request,
  1571. .queue = qe_ep_queue,
  1572. .dequeue = qe_ep_dequeue,
  1573. .set_halt = qe_ep_set_halt,
  1574. };
  1575. /*------------------------------------------------------------------------
  1576. Gadget Driver Layer Operations
  1577. ------------------------------------------------------------------------*/
  1578. /* Get the current frame number */
  1579. static int qe_get_frame(struct usb_gadget *gadget)
  1580. {
  1581. struct qe_udc *udc = container_of(gadget, struct qe_udc, gadget);
  1582. u16 tmp;
  1583. tmp = in_be16(&udc->usb_param->frame_n);
  1584. if (tmp & 0x8000)
  1585. return tmp & 0x07ff;
  1586. return -EINVAL;
  1587. }
  1588. static int fsl_qe_start(struct usb_gadget *gadget,
  1589. struct usb_gadget_driver *driver);
  1590. static int fsl_qe_stop(struct usb_gadget *gadget);
  1591. /* defined in usb_gadget.h */
  1592. static const struct usb_gadget_ops qe_gadget_ops = {
  1593. .get_frame = qe_get_frame,
  1594. .udc_start = fsl_qe_start,
  1595. .udc_stop = fsl_qe_stop,
  1596. };
  1597. /*-------------------------------------------------------------------------
  1598. USB ep0 Setup process in BUS Enumeration
  1599. -------------------------------------------------------------------------*/
  1600. static int udc_reset_ep_queue(struct qe_udc *udc, u8 pipe)
  1601. {
  1602. struct qe_ep *ep = &udc->eps[pipe];
  1603. nuke(ep, -ECONNRESET);
  1604. ep->tx_req = NULL;
  1605. return 0;
  1606. }
  1607. static int reset_queues(struct qe_udc *udc)
  1608. {
  1609. u8 pipe;
  1610. for (pipe = 0; pipe < USB_MAX_ENDPOINTS; pipe++)
  1611. udc_reset_ep_queue(udc, pipe);
  1612. /* report disconnect; the driver is already quiesced */
  1613. spin_unlock(&udc->lock);
  1614. usb_gadget_udc_reset(&udc->gadget, udc->driver);
  1615. spin_lock(&udc->lock);
  1616. return 0;
  1617. }
  1618. static void ch9setaddress(struct qe_udc *udc, u16 value, u16 index,
  1619. u16 length)
  1620. {
  1621. /* Save the new address to device struct */
  1622. udc->device_address = (u8) value;
  1623. /* Update usb state */
  1624. udc->usb_state = USB_STATE_ADDRESS;
  1625. /* Status phase , send a ZLP */
  1626. if (ep0_prime_status(udc, USB_DIR_IN))
  1627. qe_ep0_stall(udc);
  1628. }
  1629. static void ownercomplete(struct usb_ep *_ep, struct usb_request *_req)
  1630. {
  1631. struct qe_req *req = container_of(_req, struct qe_req, req);
  1632. req->req.buf = NULL;
  1633. kfree(req);
  1634. }
  1635. static void ch9getstatus(struct qe_udc *udc, u8 request_type, u16 value,
  1636. u16 index, u16 length)
  1637. {
  1638. u16 usb_status = 0;
  1639. struct qe_req *req;
  1640. struct qe_ep *ep;
  1641. int status = 0;
  1642. ep = &udc->eps[0];
  1643. if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  1644. /* Get device status */
  1645. usb_status = 1 << USB_DEVICE_SELF_POWERED;
  1646. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
  1647. /* Get interface status */
  1648. /* We don't have interface information in udc driver */
  1649. usb_status = 0;
  1650. } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
  1651. /* Get endpoint status */
  1652. int pipe = index & USB_ENDPOINT_NUMBER_MASK;
  1653. if (pipe >= USB_MAX_ENDPOINTS)
  1654. goto stall;
  1655. struct qe_ep *target_ep = &udc->eps[pipe];
  1656. u16 usep;
  1657. /* stall if endpoint doesn't exist */
  1658. if (!target_ep->ep.desc)
  1659. goto stall;
  1660. usep = in_be16(&udc->usb_regs->usb_usep[pipe]);
  1661. if (index & USB_DIR_IN) {
  1662. if (target_ep->dir != USB_DIR_IN)
  1663. goto stall;
  1664. if ((usep & USB_THS_MASK) == USB_THS_STALL)
  1665. usb_status = 1 << USB_ENDPOINT_HALT;
  1666. } else {
  1667. if (target_ep->dir != USB_DIR_OUT)
  1668. goto stall;
  1669. if ((usep & USB_RHS_MASK) == USB_RHS_STALL)
  1670. usb_status = 1 << USB_ENDPOINT_HALT;
  1671. }
  1672. }
  1673. req = container_of(qe_alloc_request(&ep->ep, GFP_KERNEL),
  1674. struct qe_req, req);
  1675. req->req.length = 2;
  1676. req->req.buf = udc->statusbuf;
  1677. *(u16 *)req->req.buf = cpu_to_le16(usb_status);
  1678. req->req.status = -EINPROGRESS;
  1679. req->req.actual = 0;
  1680. req->req.complete = ownercomplete;
  1681. udc->ep0_dir = USB_DIR_IN;
  1682. /* data phase */
  1683. status = __qe_ep_queue(&ep->ep, &req->req);
  1684. if (status == 0)
  1685. return;
  1686. stall:
  1687. dev_err(udc->dev, "Can't respond to getstatus request \n");
  1688. qe_ep0_stall(udc);
  1689. }
  1690. /* only handle the setup request, suppose the device in normal status */
  1691. static void setup_received_handle(struct qe_udc *udc,
  1692. struct usb_ctrlrequest *setup)
  1693. {
  1694. /* Fix Endian (udc->local_setup_buff is cpu Endian now)*/
  1695. u16 wValue = le16_to_cpu(setup->wValue);
  1696. u16 wIndex = le16_to_cpu(setup->wIndex);
  1697. u16 wLength = le16_to_cpu(setup->wLength);
  1698. /* clear the previous request in the ep0 */
  1699. udc_reset_ep_queue(udc, 0);
  1700. if (setup->bRequestType & USB_DIR_IN)
  1701. udc->ep0_dir = USB_DIR_IN;
  1702. else
  1703. udc->ep0_dir = USB_DIR_OUT;
  1704. switch (setup->bRequest) {
  1705. case USB_REQ_GET_STATUS:
  1706. /* Data+Status phase form udc */
  1707. if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
  1708. != (USB_DIR_IN | USB_TYPE_STANDARD))
  1709. break;
  1710. ch9getstatus(udc, setup->bRequestType, wValue, wIndex,
  1711. wLength);
  1712. return;
  1713. case USB_REQ_SET_ADDRESS:
  1714. /* Status phase from udc */
  1715. if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD |
  1716. USB_RECIP_DEVICE))
  1717. break;
  1718. ch9setaddress(udc, wValue, wIndex, wLength);
  1719. return;
  1720. case USB_REQ_CLEAR_FEATURE:
  1721. case USB_REQ_SET_FEATURE:
  1722. /* Requests with no data phase, status phase from udc */
  1723. if ((setup->bRequestType & USB_TYPE_MASK)
  1724. != USB_TYPE_STANDARD)
  1725. break;
  1726. if ((setup->bRequestType & USB_RECIP_MASK)
  1727. == USB_RECIP_ENDPOINT) {
  1728. int pipe = wIndex & USB_ENDPOINT_NUMBER_MASK;
  1729. struct qe_ep *ep;
  1730. if (wValue != 0 || wLength != 0
  1731. || pipe >= USB_MAX_ENDPOINTS)
  1732. break;
  1733. ep = &udc->eps[pipe];
  1734. spin_unlock(&udc->lock);
  1735. qe_ep_set_halt(&ep->ep,
  1736. (setup->bRequest == USB_REQ_SET_FEATURE)
  1737. ? 1 : 0);
  1738. spin_lock(&udc->lock);
  1739. }
  1740. ep0_prime_status(udc, USB_DIR_IN);
  1741. return;
  1742. default:
  1743. break;
  1744. }
  1745. if (wLength) {
  1746. /* Data phase from gadget, status phase from udc */
  1747. if (setup->bRequestType & USB_DIR_IN) {
  1748. udc->ep0_state = DATA_STATE_XMIT;
  1749. udc->ep0_dir = USB_DIR_IN;
  1750. } else {
  1751. udc->ep0_state = DATA_STATE_RECV;
  1752. udc->ep0_dir = USB_DIR_OUT;
  1753. }
  1754. spin_unlock(&udc->lock);
  1755. if (udc->driver->setup(&udc->gadget,
  1756. &udc->local_setup_buff) < 0)
  1757. qe_ep0_stall(udc);
  1758. spin_lock(&udc->lock);
  1759. } else {
  1760. /* No data phase, IN status from gadget */
  1761. udc->ep0_dir = USB_DIR_IN;
  1762. spin_unlock(&udc->lock);
  1763. if (udc->driver->setup(&udc->gadget,
  1764. &udc->local_setup_buff) < 0)
  1765. qe_ep0_stall(udc);
  1766. spin_lock(&udc->lock);
  1767. udc->ep0_state = DATA_STATE_NEED_ZLP;
  1768. }
  1769. }
  1770. /*-------------------------------------------------------------------------
  1771. USB Interrupt handlers
  1772. -------------------------------------------------------------------------*/
  1773. static void suspend_irq(struct qe_udc *udc)
  1774. {
  1775. udc->resume_state = udc->usb_state;
  1776. udc->usb_state = USB_STATE_SUSPENDED;
  1777. /* report suspend to the driver ,serial.c not support this*/
  1778. if (udc->driver->suspend)
  1779. udc->driver->suspend(&udc->gadget);
  1780. }
  1781. static void resume_irq(struct qe_udc *udc)
  1782. {
  1783. udc->usb_state = udc->resume_state;
  1784. udc->resume_state = 0;
  1785. /* report resume to the driver , serial.c not support this*/
  1786. if (udc->driver->resume)
  1787. udc->driver->resume(&udc->gadget);
  1788. }
  1789. static void idle_irq(struct qe_udc *udc)
  1790. {
  1791. u8 usbs;
  1792. usbs = in_8(&udc->usb_regs->usb_usbs);
  1793. if (usbs & USB_IDLE_STATUS_MASK) {
  1794. if ((udc->usb_state) != USB_STATE_SUSPENDED)
  1795. suspend_irq(udc);
  1796. } else {
  1797. if (udc->usb_state == USB_STATE_SUSPENDED)
  1798. resume_irq(udc);
  1799. }
  1800. }
  1801. static int reset_irq(struct qe_udc *udc)
  1802. {
  1803. unsigned char i;
  1804. if (udc->usb_state == USB_STATE_DEFAULT)
  1805. return 0;
  1806. qe_usb_disable(udc);
  1807. out_8(&udc->usb_regs->usb_usadr, 0);
  1808. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1809. if (udc->eps[i].init)
  1810. qe_ep_reset(udc, i);
  1811. }
  1812. reset_queues(udc);
  1813. udc->usb_state = USB_STATE_DEFAULT;
  1814. udc->ep0_state = WAIT_FOR_SETUP;
  1815. udc->ep0_dir = USB_DIR_OUT;
  1816. qe_usb_enable(udc);
  1817. return 0;
  1818. }
  1819. static int bsy_irq(struct qe_udc *udc)
  1820. {
  1821. return 0;
  1822. }
  1823. static int txe_irq(struct qe_udc *udc)
  1824. {
  1825. return 0;
  1826. }
  1827. /* ep0 tx interrupt also in here */
  1828. static int tx_irq(struct qe_udc *udc)
  1829. {
  1830. struct qe_ep *ep;
  1831. struct qe_bd __iomem *bd;
  1832. int i, res = 0;
  1833. if ((udc->usb_state == USB_STATE_ADDRESS)
  1834. && (in_8(&udc->usb_regs->usb_usadr) == 0))
  1835. out_8(&udc->usb_regs->usb_usadr, udc->device_address);
  1836. for (i = (USB_MAX_ENDPOINTS-1); ((i >= 0) && (res == 0)); i--) {
  1837. ep = &udc->eps[i];
  1838. if (ep && ep->init && (ep->dir != USB_DIR_OUT)) {
  1839. bd = ep->c_txbd;
  1840. if (!(in_be32((u32 __iomem *)bd) & T_R)
  1841. && (in_be32(&bd->buf))) {
  1842. /* confirm the transmitted bd */
  1843. if (ep->epnum == 0)
  1844. res = qe_ep0_txconf(ep);
  1845. else
  1846. res = qe_ep_txconf(ep);
  1847. }
  1848. }
  1849. }
  1850. return res;
  1851. }
  1852. /* setup packet's rx is handle in the function too */
  1853. static void rx_irq(struct qe_udc *udc)
  1854. {
  1855. struct qe_ep *ep;
  1856. struct qe_bd __iomem *bd;
  1857. int i;
  1858. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1859. ep = &udc->eps[i];
  1860. if (ep && ep->init && (ep->dir != USB_DIR_IN)) {
  1861. bd = ep->n_rxbd;
  1862. if (!(in_be32((u32 __iomem *)bd) & R_E)
  1863. && (in_be32(&bd->buf))) {
  1864. if (ep->epnum == 0) {
  1865. qe_ep0_rx(udc);
  1866. } else {
  1867. /*non-setup package receive*/
  1868. qe_ep_rx(ep);
  1869. }
  1870. }
  1871. }
  1872. }
  1873. }
  1874. static irqreturn_t qe_udc_irq(int irq, void *_udc)
  1875. {
  1876. struct qe_udc *udc = (struct qe_udc *)_udc;
  1877. u16 irq_src;
  1878. irqreturn_t status = IRQ_NONE;
  1879. unsigned long flags;
  1880. spin_lock_irqsave(&udc->lock, flags);
  1881. irq_src = in_be16(&udc->usb_regs->usb_usber) &
  1882. in_be16(&udc->usb_regs->usb_usbmr);
  1883. /* Clear notification bits */
  1884. out_be16(&udc->usb_regs->usb_usber, irq_src);
  1885. /* USB Interrupt */
  1886. if (irq_src & USB_E_IDLE_MASK) {
  1887. idle_irq(udc);
  1888. irq_src &= ~USB_E_IDLE_MASK;
  1889. status = IRQ_HANDLED;
  1890. }
  1891. if (irq_src & USB_E_TXB_MASK) {
  1892. tx_irq(udc);
  1893. irq_src &= ~USB_E_TXB_MASK;
  1894. status = IRQ_HANDLED;
  1895. }
  1896. if (irq_src & USB_E_RXB_MASK) {
  1897. rx_irq(udc);
  1898. irq_src &= ~USB_E_RXB_MASK;
  1899. status = IRQ_HANDLED;
  1900. }
  1901. if (irq_src & USB_E_RESET_MASK) {
  1902. reset_irq(udc);
  1903. irq_src &= ~USB_E_RESET_MASK;
  1904. status = IRQ_HANDLED;
  1905. }
  1906. if (irq_src & USB_E_BSY_MASK) {
  1907. bsy_irq(udc);
  1908. irq_src &= ~USB_E_BSY_MASK;
  1909. status = IRQ_HANDLED;
  1910. }
  1911. if (irq_src & USB_E_TXE_MASK) {
  1912. txe_irq(udc);
  1913. irq_src &= ~USB_E_TXE_MASK;
  1914. status = IRQ_HANDLED;
  1915. }
  1916. spin_unlock_irqrestore(&udc->lock, flags);
  1917. return status;
  1918. }
  1919. /*-------------------------------------------------------------------------
  1920. Gadget driver probe and unregister.
  1921. --------------------------------------------------------------------------*/
  1922. static int fsl_qe_start(struct usb_gadget *gadget,
  1923. struct usb_gadget_driver *driver)
  1924. {
  1925. struct qe_udc *udc;
  1926. unsigned long flags;
  1927. udc = container_of(gadget, struct qe_udc, gadget);
  1928. /* lock is needed but whether should use this lock or another */
  1929. spin_lock_irqsave(&udc->lock, flags);
  1930. /* hook up the driver */
  1931. udc->driver = driver;
  1932. udc->gadget.speed = driver->max_speed;
  1933. /* Enable IRQ reg and Set usbcmd reg EN bit */
  1934. qe_usb_enable(udc);
  1935. out_be16(&udc->usb_regs->usb_usber, 0xffff);
  1936. out_be16(&udc->usb_regs->usb_usbmr, USB_E_DEFAULT_DEVICE);
  1937. udc->usb_state = USB_STATE_ATTACHED;
  1938. udc->ep0_state = WAIT_FOR_SETUP;
  1939. udc->ep0_dir = USB_DIR_OUT;
  1940. spin_unlock_irqrestore(&udc->lock, flags);
  1941. return 0;
  1942. }
  1943. static int fsl_qe_stop(struct usb_gadget *gadget)
  1944. {
  1945. struct qe_udc *udc;
  1946. struct qe_ep *loop_ep;
  1947. unsigned long flags;
  1948. udc = container_of(gadget, struct qe_udc, gadget);
  1949. /* stop usb controller, disable intr */
  1950. qe_usb_disable(udc);
  1951. /* in fact, no needed */
  1952. udc->usb_state = USB_STATE_ATTACHED;
  1953. udc->ep0_state = WAIT_FOR_SETUP;
  1954. udc->ep0_dir = 0;
  1955. /* stand operation */
  1956. spin_lock_irqsave(&udc->lock, flags);
  1957. udc->gadget.speed = USB_SPEED_UNKNOWN;
  1958. nuke(&udc->eps[0], -ESHUTDOWN);
  1959. list_for_each_entry(loop_ep, &udc->gadget.ep_list, ep.ep_list)
  1960. nuke(loop_ep, -ESHUTDOWN);
  1961. spin_unlock_irqrestore(&udc->lock, flags);
  1962. udc->driver = NULL;
  1963. return 0;
  1964. }
  1965. /* udc structure's alloc and setup, include ep-param alloc */
  1966. static struct qe_udc *qe_udc_config(struct platform_device *ofdev)
  1967. {
  1968. struct qe_udc *udc;
  1969. struct device_node *np = ofdev->dev.of_node;
  1970. unsigned long tmp_addr = 0;
  1971. struct usb_device_para __iomem *usbpram;
  1972. unsigned int i;
  1973. u64 size;
  1974. u32 offset;
  1975. udc = kzalloc_obj(*udc);
  1976. if (!udc)
  1977. goto cleanup;
  1978. udc->dev = &ofdev->dev;
  1979. /* get default address of usb parameter in MURAM from device tree */
  1980. offset = *of_get_address(np, 1, &size, NULL);
  1981. udc->usb_param = cpm_muram_addr(offset);
  1982. memset_io(udc->usb_param, 0, size);
  1983. usbpram = udc->usb_param;
  1984. out_be16(&usbpram->frame_n, 0);
  1985. out_be32(&usbpram->rstate, 0);
  1986. tmp_addr = cpm_muram_alloc((USB_MAX_ENDPOINTS *
  1987. sizeof(struct usb_ep_para)),
  1988. USB_EP_PARA_ALIGNMENT);
  1989. if (IS_ERR_VALUE(tmp_addr))
  1990. goto cleanup;
  1991. for (i = 0; i < USB_MAX_ENDPOINTS; i++) {
  1992. out_be16(&usbpram->epptr[i], (u16)tmp_addr);
  1993. udc->ep_param[i] = cpm_muram_addr(tmp_addr);
  1994. tmp_addr += 32;
  1995. }
  1996. memset_io(udc->ep_param[0], 0,
  1997. USB_MAX_ENDPOINTS * sizeof(struct usb_ep_para));
  1998. udc->resume_state = USB_STATE_NOTATTACHED;
  1999. udc->usb_state = USB_STATE_POWERED;
  2000. udc->ep0_dir = 0;
  2001. spin_lock_init(&udc->lock);
  2002. return udc;
  2003. cleanup:
  2004. kfree(udc);
  2005. return NULL;
  2006. }
  2007. /* USB Controller register init */
  2008. static int qe_udc_reg_init(struct qe_udc *udc)
  2009. {
  2010. struct usb_ctlr __iomem *qe_usbregs;
  2011. qe_usbregs = udc->usb_regs;
  2012. /* Spec says that we must enable the USB controller to change mode. */
  2013. out_8(&qe_usbregs->usb_usmod, 0x01);
  2014. /* Mode changed, now disable it, since muram isn't initialized yet. */
  2015. out_8(&qe_usbregs->usb_usmod, 0x00);
  2016. /* Initialize the rest. */
  2017. out_be16(&qe_usbregs->usb_usbmr, 0);
  2018. out_8(&qe_usbregs->usb_uscom, 0);
  2019. out_be16(&qe_usbregs->usb_usber, USBER_ALL_CLEAR);
  2020. return 0;
  2021. }
  2022. static int qe_ep_config(struct qe_udc *udc, unsigned char pipe_num)
  2023. {
  2024. struct qe_ep *ep = &udc->eps[pipe_num];
  2025. ep->udc = udc;
  2026. strcpy(ep->name, ep_name[pipe_num]);
  2027. ep->ep.name = ep_name[pipe_num];
  2028. if (pipe_num == 0) {
  2029. ep->ep.caps.type_control = true;
  2030. } else {
  2031. ep->ep.caps.type_iso = true;
  2032. ep->ep.caps.type_bulk = true;
  2033. ep->ep.caps.type_int = true;
  2034. }
  2035. ep->ep.caps.dir_in = true;
  2036. ep->ep.caps.dir_out = true;
  2037. ep->ep.ops = &qe_ep_ops;
  2038. ep->stopped = 1;
  2039. usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
  2040. ep->ep.desc = NULL;
  2041. ep->dir = 0xff;
  2042. ep->epnum = (u8)pipe_num;
  2043. ep->sent = 0;
  2044. ep->last = 0;
  2045. ep->init = 0;
  2046. ep->rxframe = NULL;
  2047. ep->txframe = NULL;
  2048. ep->tx_req = NULL;
  2049. ep->state = EP_STATE_IDLE;
  2050. ep->has_data = 0;
  2051. /* the queue lists any req for this ep */
  2052. INIT_LIST_HEAD(&ep->queue);
  2053. /* gagdet.ep_list used for ep_autoconfig so no ep0*/
  2054. if (pipe_num != 0)
  2055. list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
  2056. ep->gadget = &udc->gadget;
  2057. return 0;
  2058. }
  2059. /*-----------------------------------------------------------------------
  2060. * UDC device Driver operation functions *
  2061. *----------------------------------------------------------------------*/
  2062. static void qe_udc_release(struct device *dev)
  2063. {
  2064. struct qe_udc *udc = container_of(dev, struct qe_udc, gadget.dev);
  2065. int i;
  2066. complete(udc->done);
  2067. cpm_muram_free(cpm_muram_offset(udc->ep_param[0]));
  2068. for (i = 0; i < USB_MAX_ENDPOINTS; i++)
  2069. udc->ep_param[i] = NULL;
  2070. kfree(udc);
  2071. }
  2072. /* Driver probe functions */
  2073. static const struct of_device_id qe_udc_match[];
  2074. static int qe_udc_probe(struct platform_device *ofdev)
  2075. {
  2076. struct qe_udc *udc;
  2077. struct device_node *np = ofdev->dev.of_node;
  2078. struct qe_ep *ep;
  2079. unsigned int ret = 0;
  2080. unsigned int i;
  2081. const void *prop;
  2082. prop = of_get_property(np, "mode", NULL);
  2083. if (!prop || strcmp(prop, "peripheral"))
  2084. return -ENODEV;
  2085. /* Initialize the udc structure including QH member and other member */
  2086. udc = qe_udc_config(ofdev);
  2087. if (!udc) {
  2088. dev_err(&ofdev->dev, "failed to initialize\n");
  2089. return -ENOMEM;
  2090. }
  2091. udc->soc_type = (unsigned long)device_get_match_data(&ofdev->dev);
  2092. udc->usb_regs = of_iomap(np, 0);
  2093. if (!udc->usb_regs) {
  2094. ret = -ENOMEM;
  2095. goto err1;
  2096. }
  2097. /* initialize usb hw reg except for regs for EP,
  2098. * leave usbintr reg untouched*/
  2099. qe_udc_reg_init(udc);
  2100. /* here comes the stand operations for probe
  2101. * set the qe_udc->gadget.xxx */
  2102. udc->gadget.ops = &qe_gadget_ops;
  2103. /* gadget.ep0 is a pointer */
  2104. udc->gadget.ep0 = &udc->eps[0].ep;
  2105. INIT_LIST_HEAD(&udc->gadget.ep_list);
  2106. /* modify in register gadget process */
  2107. udc->gadget.speed = USB_SPEED_UNKNOWN;
  2108. /* name: Identifies the controller hardware type. */
  2109. udc->gadget.name = driver_name;
  2110. udc->gadget.dev.parent = &ofdev->dev;
  2111. /* initialize qe_ep struct */
  2112. for (i = 0; i < USB_MAX_ENDPOINTS ; i++) {
  2113. /* because the ep type isn't decide here so
  2114. * qe_ep_init() should be called in ep_enable() */
  2115. /* setup the qe_ep struct and link ep.ep.list
  2116. * into gadget.ep_list */
  2117. qe_ep_config(udc, (unsigned char)i);
  2118. }
  2119. /* ep0 initialization in here */
  2120. ret = qe_ep_init(udc, 0, &qe_ep0_desc);
  2121. if (ret)
  2122. goto err2;
  2123. /* create a buf for ZLP send, need to remain zeroed */
  2124. udc->nullbuf = devm_kzalloc(&ofdev->dev, 256, GFP_KERNEL);
  2125. if (udc->nullbuf == NULL) {
  2126. ret = -ENOMEM;
  2127. goto err3;
  2128. }
  2129. /* buffer for data of get_status request */
  2130. udc->statusbuf = devm_kzalloc(&ofdev->dev, 2, GFP_KERNEL);
  2131. if (udc->statusbuf == NULL) {
  2132. ret = -ENOMEM;
  2133. goto err3;
  2134. }
  2135. udc->nullp = virt_to_phys((void *)udc->nullbuf);
  2136. if (udc->nullp == DMA_ADDR_INVALID) {
  2137. udc->nullp = dma_map_single(
  2138. udc->gadget.dev.parent,
  2139. udc->nullbuf,
  2140. 256,
  2141. DMA_TO_DEVICE);
  2142. udc->nullmap = 1;
  2143. } else {
  2144. dma_sync_single_for_device(udc->gadget.dev.parent,
  2145. udc->nullp, 256,
  2146. DMA_TO_DEVICE);
  2147. }
  2148. tasklet_setup(&udc->rx_tasklet, ep_rx_tasklet);
  2149. /* request irq and disable DR */
  2150. udc->usb_irq = irq_of_parse_and_map(np, 0);
  2151. if (!udc->usb_irq) {
  2152. ret = -EINVAL;
  2153. goto err_noirq;
  2154. }
  2155. ret = request_irq(udc->usb_irq, qe_udc_irq, 0,
  2156. driver_name, udc);
  2157. if (ret) {
  2158. dev_err(udc->dev, "cannot request irq %d err %d\n",
  2159. udc->usb_irq, ret);
  2160. goto err4;
  2161. }
  2162. ret = usb_add_gadget_udc_release(&ofdev->dev, &udc->gadget,
  2163. qe_udc_release);
  2164. if (ret)
  2165. goto err5;
  2166. platform_set_drvdata(ofdev, udc);
  2167. dev_info(udc->dev,
  2168. "%s USB controller initialized as device\n",
  2169. (udc->soc_type == PORT_QE) ? "QE" : "CPM");
  2170. return 0;
  2171. err5:
  2172. free_irq(udc->usb_irq, udc);
  2173. err4:
  2174. irq_dispose_mapping(udc->usb_irq);
  2175. err_noirq:
  2176. if (udc->nullmap) {
  2177. dma_unmap_single(udc->gadget.dev.parent,
  2178. udc->nullp, 256,
  2179. DMA_TO_DEVICE);
  2180. udc->nullp = DMA_ADDR_INVALID;
  2181. } else {
  2182. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2183. udc->nullp, 256,
  2184. DMA_TO_DEVICE);
  2185. }
  2186. err3:
  2187. ep = &udc->eps[0];
  2188. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2189. kfree(ep->rxframe);
  2190. kfree(ep->rxbuffer);
  2191. kfree(ep->txframe);
  2192. err2:
  2193. iounmap(udc->usb_regs);
  2194. err1:
  2195. kfree(udc);
  2196. return ret;
  2197. }
  2198. #ifdef CONFIG_PM
  2199. static int qe_udc_suspend(struct platform_device *dev, pm_message_t state)
  2200. {
  2201. return -ENOTSUPP;
  2202. }
  2203. static int qe_udc_resume(struct platform_device *dev)
  2204. {
  2205. return -ENOTSUPP;
  2206. }
  2207. #endif
  2208. static void qe_udc_remove(struct platform_device *ofdev)
  2209. {
  2210. struct qe_udc *udc = platform_get_drvdata(ofdev);
  2211. struct qe_ep *ep;
  2212. unsigned int size;
  2213. DECLARE_COMPLETION_ONSTACK(done);
  2214. usb_del_gadget_udc(&udc->gadget);
  2215. udc->done = &done;
  2216. tasklet_disable(&udc->rx_tasklet);
  2217. if (udc->nullmap) {
  2218. dma_unmap_single(udc->gadget.dev.parent,
  2219. udc->nullp, 256,
  2220. DMA_TO_DEVICE);
  2221. udc->nullp = DMA_ADDR_INVALID;
  2222. } else {
  2223. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2224. udc->nullp, 256,
  2225. DMA_TO_DEVICE);
  2226. }
  2227. ep = &udc->eps[0];
  2228. cpm_muram_free(cpm_muram_offset(ep->rxbase));
  2229. size = (ep->ep.maxpacket + USB_CRC_SIZE + 2) * (USB_BDRING_LEN + 1);
  2230. kfree(ep->rxframe);
  2231. if (ep->rxbufmap) {
  2232. dma_unmap_single(udc->gadget.dev.parent,
  2233. ep->rxbuf_d, size,
  2234. DMA_FROM_DEVICE);
  2235. ep->rxbuf_d = DMA_ADDR_INVALID;
  2236. } else {
  2237. dma_sync_single_for_cpu(udc->gadget.dev.parent,
  2238. ep->rxbuf_d, size,
  2239. DMA_FROM_DEVICE);
  2240. }
  2241. kfree(ep->rxbuffer);
  2242. kfree(ep->txframe);
  2243. free_irq(udc->usb_irq, udc);
  2244. irq_dispose_mapping(udc->usb_irq);
  2245. tasklet_kill(&udc->rx_tasklet);
  2246. iounmap(udc->usb_regs);
  2247. /* wait for release() of gadget.dev to free udc */
  2248. wait_for_completion(&done);
  2249. }
  2250. /*-------------------------------------------------------------------------*/
  2251. static const struct of_device_id qe_udc_match[] = {
  2252. {
  2253. .compatible = "fsl,mpc8323-qe-usb",
  2254. .data = (void *)PORT_QE,
  2255. },
  2256. {
  2257. .compatible = "fsl,mpc8360-qe-usb",
  2258. .data = (void *)PORT_QE,
  2259. },
  2260. {
  2261. .compatible = "fsl,mpc8272-cpm-usb",
  2262. .data = (void *)PORT_CPM,
  2263. },
  2264. {},
  2265. };
  2266. MODULE_DEVICE_TABLE(of, qe_udc_match);
  2267. static struct platform_driver udc_driver = {
  2268. .driver = {
  2269. .name = driver_name,
  2270. .of_match_table = qe_udc_match,
  2271. },
  2272. .probe = qe_udc_probe,
  2273. .remove = qe_udc_remove,
  2274. #ifdef CONFIG_PM
  2275. .suspend = qe_udc_suspend,
  2276. .resume = qe_udc_resume,
  2277. #endif
  2278. };
  2279. module_platform_driver(udc_driver);
  2280. MODULE_DESCRIPTION(DRIVER_DESC);
  2281. MODULE_AUTHOR(DRIVER_AUTHOR);
  2282. MODULE_LICENSE("GPL");