dwc3-exynos.c 6.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dwc3-exynos.c - Samsung Exynos DWC3 Specific Glue layer
  4. *
  5. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  6. * http://www.samsung.com
  7. *
  8. * Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/slab.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/clk.h>
  15. #include <linux/of.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/regulator/consumer.h>
  18. #define DWC3_EXYNOS_MAX_CLOCKS 4
  19. struct dwc3_exynos_driverdata {
  20. const char *clk_names[DWC3_EXYNOS_MAX_CLOCKS];
  21. int num_clks;
  22. int suspend_clk_idx;
  23. };
  24. struct dwc3_exynos {
  25. struct device *dev;
  26. const char **clk_names;
  27. struct clk *clks[DWC3_EXYNOS_MAX_CLOCKS];
  28. int num_clks;
  29. int suspend_clk_idx;
  30. struct regulator *vdd33;
  31. struct regulator *vdd10;
  32. };
  33. static int dwc3_exynos_probe(struct platform_device *pdev)
  34. {
  35. struct dwc3_exynos *exynos;
  36. struct device *dev = &pdev->dev;
  37. struct device_node *node = dev->of_node;
  38. const struct dwc3_exynos_driverdata *driver_data;
  39. int i, ret;
  40. exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
  41. if (!exynos)
  42. return -ENOMEM;
  43. driver_data = of_device_get_match_data(dev);
  44. exynos->dev = dev;
  45. exynos->num_clks = driver_data->num_clks;
  46. exynos->clk_names = (const char **)driver_data->clk_names;
  47. exynos->suspend_clk_idx = driver_data->suspend_clk_idx;
  48. platform_set_drvdata(pdev, exynos);
  49. for (i = 0; i < exynos->num_clks; i++) {
  50. exynos->clks[i] = devm_clk_get(dev, exynos->clk_names[i]);
  51. if (IS_ERR(exynos->clks[i])) {
  52. dev_err(dev, "failed to get clock: %s\n",
  53. exynos->clk_names[i]);
  54. return PTR_ERR(exynos->clks[i]);
  55. }
  56. }
  57. for (i = 0; i < exynos->num_clks; i++) {
  58. ret = clk_prepare_enable(exynos->clks[i]);
  59. if (ret) {
  60. while (i-- > 0)
  61. clk_disable_unprepare(exynos->clks[i]);
  62. return ret;
  63. }
  64. }
  65. if (exynos->suspend_clk_idx >= 0)
  66. clk_prepare_enable(exynos->clks[exynos->suspend_clk_idx]);
  67. exynos->vdd33 = devm_regulator_get(dev, "vdd33");
  68. if (IS_ERR(exynos->vdd33)) {
  69. ret = PTR_ERR(exynos->vdd33);
  70. goto vdd33_err;
  71. }
  72. ret = regulator_enable(exynos->vdd33);
  73. if (ret) {
  74. dev_err(dev, "Failed to enable VDD33 supply\n");
  75. goto vdd33_err;
  76. }
  77. exynos->vdd10 = devm_regulator_get(dev, "vdd10");
  78. if (IS_ERR(exynos->vdd10)) {
  79. ret = PTR_ERR(exynos->vdd10);
  80. goto vdd10_err;
  81. }
  82. ret = regulator_enable(exynos->vdd10);
  83. if (ret) {
  84. dev_err(dev, "Failed to enable VDD10 supply\n");
  85. goto vdd10_err;
  86. }
  87. if (node) {
  88. ret = of_platform_populate(node, NULL, NULL, dev);
  89. if (ret) {
  90. dev_err(dev, "failed to add dwc3 core\n");
  91. goto populate_err;
  92. }
  93. } else {
  94. dev_err(dev, "no device node, failed to add dwc3 core\n");
  95. ret = -ENODEV;
  96. goto populate_err;
  97. }
  98. return 0;
  99. populate_err:
  100. regulator_disable(exynos->vdd10);
  101. vdd10_err:
  102. regulator_disable(exynos->vdd33);
  103. vdd33_err:
  104. for (i = exynos->num_clks - 1; i >= 0; i--)
  105. clk_disable_unprepare(exynos->clks[i]);
  106. if (exynos->suspend_clk_idx >= 0)
  107. clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
  108. return ret;
  109. }
  110. static void dwc3_exynos_remove(struct platform_device *pdev)
  111. {
  112. struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
  113. int i;
  114. of_platform_depopulate(&pdev->dev);
  115. for (i = exynos->num_clks - 1; i >= 0; i--)
  116. clk_disable_unprepare(exynos->clks[i]);
  117. if (exynos->suspend_clk_idx >= 0)
  118. clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
  119. regulator_disable(exynos->vdd33);
  120. regulator_disable(exynos->vdd10);
  121. }
  122. static const struct dwc3_exynos_driverdata exynos2200_drvdata = {
  123. .clk_names = { "link_aclk" },
  124. .num_clks = 1,
  125. .suspend_clk_idx = -1,
  126. };
  127. static const struct dwc3_exynos_driverdata exynos5250_drvdata = {
  128. .clk_names = { "usbdrd30" },
  129. .num_clks = 1,
  130. .suspend_clk_idx = -1,
  131. };
  132. static const struct dwc3_exynos_driverdata exynos5433_drvdata = {
  133. .clk_names = { "aclk", "susp_clk", "pipe_pclk", "phyclk" },
  134. .num_clks = 4,
  135. .suspend_clk_idx = 1,
  136. };
  137. static const struct dwc3_exynos_driverdata exynos7_drvdata = {
  138. .clk_names = { "usbdrd30", "usbdrd30_susp_clk", "usbdrd30_axius_clk" },
  139. .num_clks = 3,
  140. .suspend_clk_idx = 1,
  141. };
  142. static const struct dwc3_exynos_driverdata exynos7870_drvdata = {
  143. .clk_names = { "bus_early", "ref", "ctrl" },
  144. .num_clks = 3,
  145. .suspend_clk_idx = -1,
  146. };
  147. static const struct dwc3_exynos_driverdata exynos850_drvdata = {
  148. .clk_names = { "bus_early", "ref" },
  149. .num_clks = 2,
  150. .suspend_clk_idx = -1,
  151. };
  152. static const struct dwc3_exynos_driverdata gs101_drvdata = {
  153. .clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" },
  154. .num_clks = 4,
  155. .suspend_clk_idx = 1,
  156. };
  157. static const struct dwc3_exynos_driverdata exynosautov920_drvdata = {
  158. .clk_names = { "ref", "susp_clk"},
  159. .num_clks = 2,
  160. .suspend_clk_idx = 1,
  161. };
  162. static const struct of_device_id exynos_dwc3_match[] = {
  163. {
  164. .compatible = "samsung,exynos2200-dwusb3",
  165. .data = &exynos2200_drvdata,
  166. }, {
  167. .compatible = "samsung,exynos5250-dwusb3",
  168. .data = &exynos5250_drvdata,
  169. }, {
  170. .compatible = "samsung,exynos5433-dwusb3",
  171. .data = &exynos5433_drvdata,
  172. }, {
  173. .compatible = "samsung,exynos7-dwusb3",
  174. .data = &exynos7_drvdata,
  175. }, {
  176. .compatible = "samsung,exynos7870-dwusb3",
  177. .data = &exynos7870_drvdata,
  178. }, {
  179. .compatible = "samsung,exynos850-dwusb3",
  180. .data = &exynos850_drvdata,
  181. }, {
  182. .compatible = "samsung,exynosautov920-dwusb3",
  183. .data = &exynosautov920_drvdata,
  184. }, {
  185. .compatible = "google,gs101-dwusb3",
  186. .data = &gs101_drvdata,
  187. }, {
  188. }
  189. };
  190. MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
  191. static int dwc3_exynos_suspend(struct device *dev)
  192. {
  193. struct dwc3_exynos *exynos = dev_get_drvdata(dev);
  194. int i;
  195. for (i = exynos->num_clks - 1; i >= 0; i--)
  196. clk_disable_unprepare(exynos->clks[i]);
  197. regulator_disable(exynos->vdd33);
  198. regulator_disable(exynos->vdd10);
  199. return 0;
  200. }
  201. static int dwc3_exynos_resume(struct device *dev)
  202. {
  203. struct dwc3_exynos *exynos = dev_get_drvdata(dev);
  204. int i, ret;
  205. ret = regulator_enable(exynos->vdd33);
  206. if (ret) {
  207. dev_err(dev, "Failed to enable VDD33 supply\n");
  208. return ret;
  209. }
  210. ret = regulator_enable(exynos->vdd10);
  211. if (ret) {
  212. dev_err(dev, "Failed to enable VDD10 supply\n");
  213. return ret;
  214. }
  215. for (i = 0; i < exynos->num_clks; i++) {
  216. ret = clk_prepare_enable(exynos->clks[i]);
  217. if (ret) {
  218. while (i-- > 0)
  219. clk_disable_unprepare(exynos->clks[i]);
  220. return ret;
  221. }
  222. }
  223. return 0;
  224. }
  225. static DEFINE_SIMPLE_DEV_PM_OPS(dwc3_exynos_dev_pm_ops,
  226. dwc3_exynos_suspend, dwc3_exynos_resume);
  227. static struct platform_driver dwc3_exynos_driver = {
  228. .probe = dwc3_exynos_probe,
  229. .remove = dwc3_exynos_remove,
  230. .driver = {
  231. .name = "exynos-dwc3",
  232. .of_match_table = exynos_dwc3_match,
  233. .pm = pm_sleep_ptr(&dwc3_exynos_dev_pm_ops),
  234. },
  235. };
  236. module_platform_driver(dwc3_exynos_driver);
  237. MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
  238. MODULE_LICENSE("GPL v2");
  239. MODULE_DESCRIPTION("DesignWare USB3 Exynos Glue Layer");