Kconfig 6.7 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config USB_DWC3
  3. tristate "DesignWare USB3 DRD Core Support"
  4. depends on (USB || USB_GADGET) && HAS_DMA
  5. depends on (EXTCON || EXTCON=n)
  6. select USB_XHCI_PLATFORM if USB_XHCI_HCD
  7. select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
  8. help
  9. Say Y or M here if your system has a Dual Role SuperSpeed
  10. USB controller based on the DesignWare USB3 IP Core.
  11. If you choose to build this driver as a dynamically linked
  12. module, the module will be called dwc3.ko.
  13. if USB_DWC3
  14. config USB_DWC3_ULPI
  15. bool "Register ULPI PHY Interface"
  16. depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
  17. help
  18. Select this if you have ULPI type PHY attached to your DWC3
  19. controller.
  20. choice
  21. prompt "DWC3 Mode Selection"
  22. default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
  23. default USB_DWC3_HOST if (USB && !USB_GADGET)
  24. default USB_DWC3_GADGET if (!USB && USB_GADGET)
  25. config USB_DWC3_HOST
  26. bool "Host only mode"
  27. depends on USB=y || USB=USB_DWC3
  28. help
  29. Select this when you want to use DWC3 in host mode only,
  30. thereby the gadget feature will be regressed.
  31. config USB_DWC3_GADGET
  32. bool "Gadget only mode"
  33. depends on USB_GADGET=y || USB_GADGET=USB_DWC3
  34. help
  35. Select this when you want to use DWC3 in gadget mode only,
  36. thereby the host feature will be regressed.
  37. config USB_DWC3_DUAL_ROLE
  38. bool "Dual Role mode"
  39. depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
  40. help
  41. This is the default mode of working of DWC3 controller where
  42. both host and gadget features are enabled.
  43. endchoice
  44. comment "Platform Glue Driver Support"
  45. config USB_DWC3_OMAP
  46. tristate "Texas Instruments OMAP5 and similar Platforms"
  47. depends on ARCH_OMAP2PLUS || COMPILE_TEST
  48. depends on EXTCON || !EXTCON
  49. depends on OF
  50. default USB_DWC3
  51. help
  52. Some platforms from Texas Instruments like OMAP5, DRA7xxx and
  53. AM437x use this IP for USB2/3 functionality.
  54. Say 'Y' or 'M' here if you have one such device
  55. config USB_DWC3_EXYNOS
  56. tristate "Samsung Exynos SoC Platform"
  57. depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
  58. default USB_DWC3
  59. help
  60. Recent Samsung Exynos SoCs (Exynos5250, Exynos5410, Exynos542x,
  61. Exynos5800, Exynos5433, Exynos7) ship with one DesignWare Core USB3
  62. IP inside, say 'Y' or 'M' if you have one such device.
  63. config USB_DWC3_PCI
  64. tristate "PCIe-based Platforms"
  65. depends on USB_PCI && ACPI
  66. default USB_DWC3
  67. help
  68. If you're using the DesignWare Core IP with a PCIe (but not HAPS
  69. platform), please say 'Y' or 'M' here.
  70. config USB_DWC3_HAPS
  71. tristate "Synopsys PCIe-based HAPS Platforms"
  72. depends on USB_PCI
  73. default USB_DWC3
  74. help
  75. If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
  76. platform, please say 'Y' or 'M' here.
  77. config USB_DWC3_KEYSTONE
  78. tristate "Texas Instruments Keystone2/AM654 Platforms"
  79. depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
  80. default USB_DWC3
  81. help
  82. Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
  83. Say 'Y' or 'M' here if you have one such device
  84. config USB_DWC3_MESON_G12A
  85. tristate "Amlogic Meson G12A Platforms"
  86. depends on OF && COMMON_CLK
  87. depends on ARCH_MESON || COMPILE_TEST
  88. default USB_DWC3
  89. select USB_ROLE_SWITCH
  90. select REGMAP_MMIO
  91. help
  92. Support USB2/3 functionality in Amlogic G12A platforms.
  93. Say 'Y' or 'M' if you have one such device.
  94. config USB_DWC3_OF_SIMPLE
  95. tristate "Generic OF Simple Glue Layer"
  96. depends on OF && COMMON_CLK
  97. default USB_DWC3
  98. help
  99. Support USB2/3 functionality in simple SoC integrations.
  100. Currently supports Xilinx and Qualcomm DWC USB3 IP.
  101. Say 'Y' or 'M' if you have one such device.
  102. config USB_DWC3_ST
  103. tristate "STMicroelectronics Platforms"
  104. depends on (ARCH_STI || COMPILE_TEST) && OF
  105. default USB_DWC3
  106. help
  107. STMicroelectronics SoCs with one DesignWare Core USB3 IP
  108. inside (i.e. STiH407).
  109. Say 'Y' or 'M' if you have one such device.
  110. config USB_DWC3_QCOM
  111. tristate "Qualcomm Platform"
  112. depends on ARCH_QCOM || COMPILE_TEST
  113. depends on EXTCON || !EXTCON
  114. depends on OF
  115. default USB_DWC3
  116. help
  117. Some Qualcomm SoCs use DesignWare Core IP for USB2/3
  118. functionality.
  119. This driver also handles Qscratch wrapper which is needed
  120. for peripheral mode support.
  121. Say 'Y' or 'M' if you have one such device.
  122. config USB_DWC3_IMX8MP
  123. tristate "NXP iMX8MP Platform"
  124. depends on OF && COMMON_CLK
  125. depends on (ARCH_MXC && ARM64) || COMPILE_TEST
  126. default USB_DWC3
  127. help
  128. NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
  129. functionality.
  130. Say 'Y' or 'M' if you have one such device.
  131. config USB_DWC3_XILINX
  132. tristate "Xilinx Platforms"
  133. depends on (ARCH_ZYNQMP || COMPILE_TEST) && OF
  134. default USB_DWC3
  135. help
  136. Support Xilinx SoCs with DesignWare Core USB3 IP.
  137. This driver handles ZynqMP SoC operations.
  138. Say 'Y' or 'M' if you have one such device.
  139. config USB_DWC3_AM62
  140. tristate "Texas Instruments AM62 Platforms"
  141. depends on ARCH_K3 || COMPILE_TEST
  142. default USB_DWC3
  143. help
  144. Support TI's AM62 platforms with DesignWare Core USB3 IP.
  145. The Designware Core USB3 IP is programmed to operate in
  146. in USB 2.0 mode only.
  147. Say 'Y' or 'M' here if you have one such device
  148. config USB_DWC3_OCTEON
  149. tristate "Cavium Octeon Platforms"
  150. depends on CAVIUM_OCTEON_SOC || COMPILE_TEST
  151. default USB_DWC3
  152. help
  153. Support Cavium Octeon platforms with DesignWare Core USB3 IP.
  154. Only the host mode is currently supported.
  155. Say 'Y' or 'M' here if you have one such device.
  156. config USB_DWC3_RTK
  157. tristate "Realtek DWC3 Platform Driver"
  158. depends on OF && ARCH_REALTEK
  159. default USB_DWC3
  160. select USB_ROLE_SWITCH
  161. help
  162. RTK DHC RTD SoCs with DesignWare Core USB3 IP inside,
  163. and IP Core configured for USB 2.0 and USB 3.0 in host
  164. or dual-role mode.
  165. Say 'Y' or 'M' if you have such device.
  166. config USB_DWC3_GENERIC_PLAT
  167. tristate "DWC3 Generic Platform Driver"
  168. depends on OF && COMMON_CLK
  169. default USB_DWC3
  170. help
  171. Support USB3 functionality in simple SoC integrations.
  172. Currently supports SpacemiT DWC USB3. Platforms using
  173. dwc3-of-simple can easily switch to dwc3-generic by flattening
  174. the dwc3 child node in the device tree.
  175. Say 'Y' or 'M' here if your platform integrates DWC3 in a similar way.
  176. config USB_DWC3_APPLE
  177. tristate "Apple Silicon DWC3 Platform Driver"
  178. depends on OF && ARCH_APPLE
  179. default USB_DWC3
  180. select USB_ROLE_SWITCH
  181. help
  182. Support Apple Silicon SoCs with DesignWare Core USB3 IP.
  183. The DesignWare Core USB3 IP has to be used in dual-role
  184. mode on these machines.
  185. Say 'Y' or 'M' if you have such device.
  186. config USB_DWC3_GOOGLE
  187. tristate "Google Platform"
  188. help
  189. Support the DesignWare Core USB3 IP found on Google Tensor SoCs,
  190. starting with the G5 generation (Laguna). This driver includes
  191. support for hibernation in host mode.
  192. Say 'Y' or 'M' if you have one such device.
  193. To compile this driver as a module, choose M here: the
  194. module will be called dwc3-google.ko.
  195. endif