sprd_serial.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/console.h>
  7. #include <linux/delay.h>
  8. #include <linux/dmaengine.h>
  9. #include <linux/dma-mapping.h>
  10. #include <linux/dma/sprd-dma.h>
  11. #include <linux/io.h>
  12. #include <linux/ioport.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/serial_core.h>
  18. #include <linux/serial.h>
  19. #include <linux/slab.h>
  20. #include <linux/tty.h>
  21. #include <linux/tty_flip.h>
  22. /* device name */
  23. #define UART_NR_MAX 8
  24. #define SPRD_TTY_NAME "ttyS"
  25. #define SPRD_FIFO_SIZE 128
  26. #define SPRD_DEF_RATE 26000000
  27. #define SPRD_BAUD_IO_LIMIT 3000000
  28. #define SPRD_TIMEOUT 256000
  29. /* the offset of serial registers and BITs for them */
  30. /* data registers */
  31. #define SPRD_TXD 0x0000
  32. #define SPRD_RXD 0x0004
  33. /* line status register and its BITs */
  34. #define SPRD_LSR 0x0008
  35. #define SPRD_LSR_OE BIT(4)
  36. #define SPRD_LSR_FE BIT(3)
  37. #define SPRD_LSR_PE BIT(2)
  38. #define SPRD_LSR_BI BIT(7)
  39. #define SPRD_LSR_TX_OVER BIT(15)
  40. /* data number in TX and RX fifo */
  41. #define SPRD_STS1 0x000C
  42. #define SPRD_RX_FIFO_CNT_MASK GENMASK(7, 0)
  43. #define SPRD_TX_FIFO_CNT_MASK GENMASK(15, 8)
  44. /* interrupt enable register and its BITs */
  45. #define SPRD_IEN 0x0010
  46. #define SPRD_IEN_RX_FULL BIT(0)
  47. #define SPRD_IEN_TX_EMPTY BIT(1)
  48. #define SPRD_IEN_BREAK_DETECT BIT(7)
  49. #define SPRD_IEN_TIMEOUT BIT(13)
  50. #define SPRD_IEN_DATA_TIMEOUT BIT(17)
  51. /* interrupt clear register */
  52. #define SPRD_ICLR 0x0014
  53. #define SPRD_ICLR_TIMEOUT BIT(13)
  54. #define SPRD_ICLR_DATA_TIMEOUT BIT(17)
  55. /* line control register */
  56. #define SPRD_LCR 0x0018
  57. #define SPRD_LCR_STOP_1BIT 0x10
  58. #define SPRD_LCR_STOP_2BIT 0x30
  59. #define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3))
  60. #define SPRD_LCR_DATA_LEN5 0x0
  61. #define SPRD_LCR_DATA_LEN6 0x4
  62. #define SPRD_LCR_DATA_LEN7 0x8
  63. #define SPRD_LCR_DATA_LEN8 0xc
  64. #define SPRD_LCR_PARITY (BIT(0) | BIT(1))
  65. #define SPRD_LCR_PARITY_EN 0x2
  66. #define SPRD_LCR_EVEN_PAR 0x0
  67. #define SPRD_LCR_ODD_PAR 0x1
  68. /* control register 1 */
  69. #define SPRD_CTL1 0x001C
  70. #define SPRD_DMA_EN BIT(15)
  71. #define SPRD_LOOPBACK_EN BIT(14)
  72. #define RX_HW_FLOW_CTL_THLD BIT(6)
  73. #define RX_HW_FLOW_CTL_EN BIT(7)
  74. #define TX_HW_FLOW_CTL_EN BIT(8)
  75. #define RX_TOUT_THLD_DEF 0x3E00
  76. #define RX_HFC_THLD_DEF 0x40
  77. /* fifo threshold register */
  78. #define SPRD_CTL2 0x0020
  79. #define THLD_TX_EMPTY 0x40
  80. #define THLD_TX_EMPTY_SHIFT 8
  81. #define THLD_RX_FULL 0x40
  82. #define THLD_RX_FULL_MASK GENMASK(6, 0)
  83. /* config baud rate register */
  84. #define SPRD_CLKD0 0x0024
  85. #define SPRD_CLKD0_MASK GENMASK(15, 0)
  86. #define SPRD_CLKD1 0x0028
  87. #define SPRD_CLKD1_MASK GENMASK(20, 16)
  88. #define SPRD_CLKD1_SHIFT 16
  89. /* interrupt mask status register */
  90. #define SPRD_IMSR 0x002C
  91. #define SPRD_IMSR_RX_FIFO_FULL BIT(0)
  92. #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
  93. #define SPRD_IMSR_BREAK_DETECT BIT(7)
  94. #define SPRD_IMSR_TIMEOUT BIT(13)
  95. #define SPRD_IMSR_DATA_TIMEOUT BIT(17)
  96. #define SPRD_DEFAULT_SOURCE_CLK 26000000
  97. #define SPRD_RX_DMA_STEP 1
  98. #define SPRD_RX_FIFO_FULL 1
  99. #define SPRD_TX_FIFO_FULL 0x20
  100. #define SPRD_UART_RX_SIZE (UART_XMIT_SIZE / 4)
  101. struct sprd_uart_dma {
  102. struct dma_chan *chn;
  103. unsigned char *virt;
  104. dma_addr_t phys_addr;
  105. dma_cookie_t cookie;
  106. u32 trans_len;
  107. bool enable;
  108. };
  109. struct sprd_uart_data {
  110. unsigned int timeout_ien;
  111. unsigned int timeout_iclr;
  112. unsigned int timeout_imsr;
  113. };
  114. struct sprd_uart_port {
  115. struct uart_port port;
  116. char name[16];
  117. struct clk *clk;
  118. struct sprd_uart_dma tx_dma;
  119. struct sprd_uart_dma rx_dma;
  120. dma_addr_t pos;
  121. unsigned char *rx_buf_tail;
  122. const struct sprd_uart_data *pdata;
  123. };
  124. static struct sprd_uart_port *sprd_port[UART_NR_MAX];
  125. static int sprd_ports_num;
  126. static int sprd_start_dma_rx(struct uart_port *port);
  127. static int sprd_tx_dma_config(struct uart_port *port);
  128. static const struct sprd_uart_data sc9836_data = {
  129. .timeout_ien = SPRD_IEN_TIMEOUT,
  130. .timeout_iclr = SPRD_ICLR_TIMEOUT,
  131. .timeout_imsr = SPRD_IMSR_TIMEOUT,
  132. };
  133. static const struct sprd_uart_data sc9632_data = {
  134. .timeout_ien = SPRD_IEN_DATA_TIMEOUT,
  135. .timeout_iclr = SPRD_ICLR_DATA_TIMEOUT,
  136. .timeout_imsr = SPRD_IMSR_DATA_TIMEOUT,
  137. };
  138. static inline unsigned int serial_in(struct uart_port *port,
  139. unsigned int offset)
  140. {
  141. return readl_relaxed(port->membase + offset);
  142. }
  143. static inline void serial_out(struct uart_port *port, unsigned int offset,
  144. int value)
  145. {
  146. writel_relaxed(value, port->membase + offset);
  147. }
  148. static unsigned int sprd_tx_empty(struct uart_port *port)
  149. {
  150. if (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
  151. return 0;
  152. else
  153. return TIOCSER_TEMT;
  154. }
  155. static unsigned int sprd_get_mctrl(struct uart_port *port)
  156. {
  157. return TIOCM_DSR | TIOCM_CTS;
  158. }
  159. static void sprd_set_mctrl(struct uart_port *port, unsigned int mctrl)
  160. {
  161. u32 val = serial_in(port, SPRD_CTL1);
  162. if (mctrl & TIOCM_LOOP)
  163. val |= SPRD_LOOPBACK_EN;
  164. else
  165. val &= ~SPRD_LOOPBACK_EN;
  166. serial_out(port, SPRD_CTL1, val);
  167. }
  168. static void sprd_stop_rx(struct uart_port *port)
  169. {
  170. struct sprd_uart_port *sp =
  171. container_of(port, struct sprd_uart_port, port);
  172. unsigned int ien, iclr;
  173. if (sp->rx_dma.enable)
  174. dmaengine_terminate_all(sp->rx_dma.chn);
  175. iclr = serial_in(port, SPRD_ICLR);
  176. ien = serial_in(port, SPRD_IEN);
  177. ien &= ~(SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT);
  178. iclr |= SPRD_IEN_RX_FULL | SPRD_IEN_BREAK_DETECT;
  179. serial_out(port, SPRD_IEN, ien);
  180. serial_out(port, SPRD_ICLR, iclr);
  181. }
  182. static void sprd_uart_dma_enable(struct uart_port *port, bool enable)
  183. {
  184. u32 val = serial_in(port, SPRD_CTL1);
  185. if (enable)
  186. val |= SPRD_DMA_EN;
  187. else
  188. val &= ~SPRD_DMA_EN;
  189. serial_out(port, SPRD_CTL1, val);
  190. }
  191. static void sprd_stop_tx_dma(struct uart_port *port)
  192. {
  193. struct sprd_uart_port *sp =
  194. container_of(port, struct sprd_uart_port, port);
  195. struct dma_tx_state state;
  196. u32 trans_len;
  197. dmaengine_pause(sp->tx_dma.chn);
  198. dmaengine_tx_status(sp->tx_dma.chn, sp->tx_dma.cookie, &state);
  199. if (state.residue) {
  200. trans_len = state.residue - sp->tx_dma.phys_addr;
  201. uart_xmit_advance(port, trans_len);
  202. dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
  203. sp->tx_dma.trans_len, DMA_TO_DEVICE);
  204. }
  205. dmaengine_terminate_all(sp->tx_dma.chn);
  206. sp->tx_dma.trans_len = 0;
  207. }
  208. static int sprd_tx_buf_remap(struct uart_port *port)
  209. {
  210. struct sprd_uart_port *sp =
  211. container_of(port, struct sprd_uart_port, port);
  212. struct tty_port *tport = &port->state->port;
  213. unsigned char *tail;
  214. sp->tx_dma.trans_len = kfifo_out_linear_ptr(&tport->xmit_fifo, &tail,
  215. UART_XMIT_SIZE);
  216. sp->tx_dma.phys_addr = dma_map_single(port->dev, tail,
  217. sp->tx_dma.trans_len,
  218. DMA_TO_DEVICE);
  219. return dma_mapping_error(port->dev, sp->tx_dma.phys_addr);
  220. }
  221. static void sprd_complete_tx_dma(void *data)
  222. {
  223. struct uart_port *port = (struct uart_port *)data;
  224. struct sprd_uart_port *sp =
  225. container_of(port, struct sprd_uart_port, port);
  226. struct tty_port *tport = &port->state->port;
  227. unsigned long flags;
  228. uart_port_lock_irqsave(port, &flags);
  229. dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
  230. sp->tx_dma.trans_len, DMA_TO_DEVICE);
  231. uart_xmit_advance(port, sp->tx_dma.trans_len);
  232. if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
  233. uart_write_wakeup(port);
  234. if (kfifo_is_empty(&tport->xmit_fifo) || sprd_tx_buf_remap(port) ||
  235. sprd_tx_dma_config(port))
  236. sp->tx_dma.trans_len = 0;
  237. uart_port_unlock_irqrestore(port, flags);
  238. }
  239. static int sprd_uart_dma_submit(struct uart_port *port,
  240. struct sprd_uart_dma *ud, u32 trans_len,
  241. enum dma_transfer_direction direction,
  242. dma_async_tx_callback callback)
  243. {
  244. struct dma_async_tx_descriptor *dma_des;
  245. unsigned long flags;
  246. flags = SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE,
  247. SPRD_DMA_NO_TRG,
  248. SPRD_DMA_FRAG_REQ,
  249. SPRD_DMA_TRANS_INT);
  250. dma_des = dmaengine_prep_slave_single(ud->chn, ud->phys_addr, trans_len,
  251. direction, flags);
  252. if (!dma_des)
  253. return -ENODEV;
  254. dma_des->callback = callback;
  255. dma_des->callback_param = port;
  256. ud->cookie = dmaengine_submit(dma_des);
  257. if (dma_submit_error(ud->cookie))
  258. return dma_submit_error(ud->cookie);
  259. dma_async_issue_pending(ud->chn);
  260. return 0;
  261. }
  262. static int sprd_tx_dma_config(struct uart_port *port)
  263. {
  264. struct sprd_uart_port *sp =
  265. container_of(port, struct sprd_uart_port, port);
  266. u32 burst = sp->tx_dma.trans_len > SPRD_TX_FIFO_FULL ?
  267. SPRD_TX_FIFO_FULL : sp->tx_dma.trans_len;
  268. int ret;
  269. struct dma_slave_config cfg = {
  270. .dst_addr = port->mapbase + SPRD_TXD,
  271. .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
  272. .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
  273. .src_maxburst = burst,
  274. };
  275. ret = dmaengine_slave_config(sp->tx_dma.chn, &cfg);
  276. if (ret < 0)
  277. return ret;
  278. return sprd_uart_dma_submit(port, &sp->tx_dma, sp->tx_dma.trans_len,
  279. DMA_MEM_TO_DEV, sprd_complete_tx_dma);
  280. }
  281. static void sprd_start_tx_dma(struct uart_port *port)
  282. {
  283. struct sprd_uart_port *sp =
  284. container_of(port, struct sprd_uart_port, port);
  285. struct tty_port *tport = &port->state->port;
  286. if (port->x_char) {
  287. serial_out(port, SPRD_TXD, port->x_char);
  288. port->icount.tx++;
  289. port->x_char = 0;
  290. return;
  291. }
  292. if (kfifo_is_empty(&tport->xmit_fifo) || uart_tx_stopped(port)) {
  293. sprd_stop_tx_dma(port);
  294. return;
  295. }
  296. if (sp->tx_dma.trans_len)
  297. return;
  298. if (sprd_tx_buf_remap(port) || sprd_tx_dma_config(port))
  299. sp->tx_dma.trans_len = 0;
  300. }
  301. static void sprd_rx_full_thld(struct uart_port *port, u32 thld)
  302. {
  303. u32 val = serial_in(port, SPRD_CTL2);
  304. val &= ~THLD_RX_FULL_MASK;
  305. val |= thld & THLD_RX_FULL_MASK;
  306. serial_out(port, SPRD_CTL2, val);
  307. }
  308. static int sprd_rx_alloc_buf(struct sprd_uart_port *sp)
  309. {
  310. sp->rx_dma.virt = dma_alloc_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
  311. &sp->rx_dma.phys_addr, GFP_KERNEL);
  312. if (!sp->rx_dma.virt)
  313. return -ENOMEM;
  314. return 0;
  315. }
  316. static void sprd_rx_free_buf(struct sprd_uart_port *sp)
  317. {
  318. if (sp->rx_dma.virt)
  319. dma_free_coherent(sp->port.dev, SPRD_UART_RX_SIZE,
  320. sp->rx_dma.virt, sp->rx_dma.phys_addr);
  321. sp->rx_dma.virt = NULL;
  322. }
  323. static int sprd_rx_dma_config(struct uart_port *port, u32 burst)
  324. {
  325. struct sprd_uart_port *sp =
  326. container_of(port, struct sprd_uart_port, port);
  327. struct dma_slave_config cfg = {
  328. .src_addr = port->mapbase + SPRD_RXD,
  329. .src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
  330. .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE,
  331. .src_maxburst = burst,
  332. };
  333. return dmaengine_slave_config(sp->rx_dma.chn, &cfg);
  334. }
  335. static void sprd_uart_dma_rx(struct uart_port *port)
  336. {
  337. struct sprd_uart_port *sp =
  338. container_of(port, struct sprd_uart_port, port);
  339. struct tty_port *tty = &port->state->port;
  340. port->icount.rx += sp->rx_dma.trans_len;
  341. tty_insert_flip_string(tty, sp->rx_buf_tail, sp->rx_dma.trans_len);
  342. tty_flip_buffer_push(tty);
  343. }
  344. static void sprd_uart_dma_irq(struct uart_port *port)
  345. {
  346. struct sprd_uart_port *sp =
  347. container_of(port, struct sprd_uart_port, port);
  348. struct dma_tx_state state;
  349. enum dma_status status;
  350. status = dmaengine_tx_status(sp->rx_dma.chn,
  351. sp->rx_dma.cookie, &state);
  352. if (status == DMA_ERROR)
  353. sprd_stop_rx(port);
  354. if (!state.residue && sp->pos == sp->rx_dma.phys_addr)
  355. return;
  356. if (!state.residue) {
  357. sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
  358. sp->rx_dma.phys_addr - sp->pos;
  359. sp->pos = sp->rx_dma.phys_addr;
  360. } else {
  361. sp->rx_dma.trans_len = state.residue - sp->pos;
  362. sp->pos = state.residue;
  363. }
  364. sprd_uart_dma_rx(port);
  365. sp->rx_buf_tail += sp->rx_dma.trans_len;
  366. }
  367. static void sprd_complete_rx_dma(void *data)
  368. {
  369. struct uart_port *port = (struct uart_port *)data;
  370. struct sprd_uart_port *sp =
  371. container_of(port, struct sprd_uart_port, port);
  372. struct dma_tx_state state;
  373. enum dma_status status;
  374. unsigned long flags;
  375. uart_port_lock_irqsave(port, &flags);
  376. status = dmaengine_tx_status(sp->rx_dma.chn,
  377. sp->rx_dma.cookie, &state);
  378. if (status != DMA_COMPLETE) {
  379. sprd_stop_rx(port);
  380. uart_port_unlock_irqrestore(port, flags);
  381. return;
  382. }
  383. if (sp->pos != sp->rx_dma.phys_addr) {
  384. sp->rx_dma.trans_len = SPRD_UART_RX_SIZE +
  385. sp->rx_dma.phys_addr - sp->pos;
  386. sprd_uart_dma_rx(port);
  387. sp->rx_buf_tail += sp->rx_dma.trans_len;
  388. }
  389. if (sprd_start_dma_rx(port))
  390. sprd_stop_rx(port);
  391. uart_port_unlock_irqrestore(port, flags);
  392. }
  393. static int sprd_start_dma_rx(struct uart_port *port)
  394. {
  395. struct sprd_uart_port *sp =
  396. container_of(port, struct sprd_uart_port, port);
  397. int ret;
  398. if (!sp->rx_dma.enable)
  399. return 0;
  400. sp->pos = sp->rx_dma.phys_addr;
  401. sp->rx_buf_tail = sp->rx_dma.virt;
  402. sprd_rx_full_thld(port, SPRD_RX_FIFO_FULL);
  403. ret = sprd_rx_dma_config(port, SPRD_RX_DMA_STEP);
  404. if (ret)
  405. return ret;
  406. return sprd_uart_dma_submit(port, &sp->rx_dma, SPRD_UART_RX_SIZE,
  407. DMA_DEV_TO_MEM, sprd_complete_rx_dma);
  408. }
  409. static void sprd_release_dma(struct uart_port *port)
  410. {
  411. struct sprd_uart_port *sp =
  412. container_of(port, struct sprd_uart_port, port);
  413. sprd_uart_dma_enable(port, false);
  414. if (sp->rx_dma.enable)
  415. dma_release_channel(sp->rx_dma.chn);
  416. if (sp->tx_dma.enable)
  417. dma_release_channel(sp->tx_dma.chn);
  418. sp->tx_dma.enable = false;
  419. sp->rx_dma.enable = false;
  420. }
  421. static void sprd_request_dma(struct uart_port *port)
  422. {
  423. struct sprd_uart_port *sp =
  424. container_of(port, struct sprd_uart_port, port);
  425. sp->tx_dma.enable = true;
  426. sp->rx_dma.enable = true;
  427. sp->tx_dma.chn = dma_request_chan(port->dev, "tx");
  428. if (IS_ERR(sp->tx_dma.chn)) {
  429. dev_err(port->dev, "request TX DMA channel failed, ret = %ld\n",
  430. PTR_ERR(sp->tx_dma.chn));
  431. sp->tx_dma.enable = false;
  432. }
  433. sp->rx_dma.chn = dma_request_chan(port->dev, "rx");
  434. if (IS_ERR(sp->rx_dma.chn)) {
  435. dev_err(port->dev, "request RX DMA channel failed, ret = %ld\n",
  436. PTR_ERR(sp->rx_dma.chn));
  437. sp->rx_dma.enable = false;
  438. }
  439. }
  440. static void sprd_stop_tx(struct uart_port *port)
  441. {
  442. struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
  443. port);
  444. unsigned int ien, iclr;
  445. if (sp->tx_dma.enable) {
  446. sprd_stop_tx_dma(port);
  447. return;
  448. }
  449. iclr = serial_in(port, SPRD_ICLR);
  450. ien = serial_in(port, SPRD_IEN);
  451. iclr |= SPRD_IEN_TX_EMPTY;
  452. ien &= ~SPRD_IEN_TX_EMPTY;
  453. serial_out(port, SPRD_IEN, ien);
  454. serial_out(port, SPRD_ICLR, iclr);
  455. }
  456. static void sprd_start_tx(struct uart_port *port)
  457. {
  458. struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
  459. port);
  460. unsigned int ien;
  461. if (sp->tx_dma.enable) {
  462. sprd_start_tx_dma(port);
  463. return;
  464. }
  465. ien = serial_in(port, SPRD_IEN);
  466. if (!(ien & SPRD_IEN_TX_EMPTY)) {
  467. ien |= SPRD_IEN_TX_EMPTY;
  468. serial_out(port, SPRD_IEN, ien);
  469. }
  470. }
  471. /* The Sprd serial does not support this function. */
  472. static void sprd_break_ctl(struct uart_port *port, int break_state)
  473. {
  474. /* nothing to do */
  475. }
  476. static int handle_lsr_errors(struct uart_port *port,
  477. u8 *flag,
  478. unsigned int *lsr)
  479. {
  480. int ret = 0;
  481. /* statistics */
  482. if (*lsr & SPRD_LSR_BI) {
  483. *lsr &= ~(SPRD_LSR_FE | SPRD_LSR_PE);
  484. port->icount.brk++;
  485. ret = uart_handle_break(port);
  486. if (ret)
  487. return ret;
  488. } else if (*lsr & SPRD_LSR_PE)
  489. port->icount.parity++;
  490. else if (*lsr & SPRD_LSR_FE)
  491. port->icount.frame++;
  492. if (*lsr & SPRD_LSR_OE)
  493. port->icount.overrun++;
  494. /* mask off conditions which should be ignored */
  495. *lsr &= port->read_status_mask;
  496. if (*lsr & SPRD_LSR_BI)
  497. *flag = TTY_BREAK;
  498. else if (*lsr & SPRD_LSR_PE)
  499. *flag = TTY_PARITY;
  500. else if (*lsr & SPRD_LSR_FE)
  501. *flag = TTY_FRAME;
  502. return ret;
  503. }
  504. static inline void sprd_rx(struct uart_port *port)
  505. {
  506. struct sprd_uart_port *sp = container_of(port, struct sprd_uart_port,
  507. port);
  508. struct tty_port *tty = &port->state->port;
  509. unsigned int lsr, max_count = SPRD_TIMEOUT;
  510. u8 ch, flag;
  511. if (sp->rx_dma.enable) {
  512. sprd_uart_dma_irq(port);
  513. return;
  514. }
  515. while ((serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK) &&
  516. max_count--) {
  517. lsr = serial_in(port, SPRD_LSR);
  518. ch = serial_in(port, SPRD_RXD);
  519. flag = TTY_NORMAL;
  520. port->icount.rx++;
  521. if (lsr & (SPRD_LSR_BI | SPRD_LSR_PE |
  522. SPRD_LSR_FE | SPRD_LSR_OE))
  523. if (handle_lsr_errors(port, &flag, &lsr))
  524. continue;
  525. if (uart_handle_sysrq_char(port, ch))
  526. continue;
  527. uart_insert_char(port, lsr, SPRD_LSR_OE, ch, flag);
  528. }
  529. tty_flip_buffer_push(tty);
  530. }
  531. static inline void sprd_tx(struct uart_port *port)
  532. {
  533. u8 ch;
  534. uart_port_tx_limited(port, ch, THLD_TX_EMPTY,
  535. true,
  536. serial_out(port, SPRD_TXD, ch),
  537. ({}));
  538. }
  539. /* this handles the interrupt from one port */
  540. static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
  541. {
  542. struct uart_port *port = dev_id;
  543. unsigned int ims;
  544. struct sprd_uart_port *sp =
  545. container_of(port, struct sprd_uart_port, port);
  546. uart_port_lock(port);
  547. ims = serial_in(port, SPRD_IMSR);
  548. if (!ims) {
  549. uart_port_unlock(port);
  550. return IRQ_NONE;
  551. }
  552. if (ims & sp->pdata->timeout_imsr)
  553. serial_out(port, SPRD_ICLR, sp->pdata->timeout_iclr);
  554. if (ims & SPRD_IMSR_BREAK_DETECT)
  555. serial_out(port, SPRD_ICLR, SPRD_IMSR_BREAK_DETECT);
  556. if (ims & (SPRD_IMSR_RX_FIFO_FULL | SPRD_IMSR_BREAK_DETECT |
  557. sp->pdata->timeout_imsr))
  558. sprd_rx(port);
  559. if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
  560. sprd_tx(port);
  561. uart_port_unlock(port);
  562. return IRQ_HANDLED;
  563. }
  564. static void sprd_uart_dma_startup(struct uart_port *port,
  565. struct sprd_uart_port *sp)
  566. {
  567. int ret;
  568. sprd_request_dma(port);
  569. if (!(sp->rx_dma.enable || sp->tx_dma.enable))
  570. return;
  571. ret = sprd_start_dma_rx(port);
  572. if (ret) {
  573. sp->rx_dma.enable = false;
  574. dma_release_channel(sp->rx_dma.chn);
  575. dev_warn(port->dev, "fail to start RX dma mode\n");
  576. }
  577. sprd_uart_dma_enable(port, true);
  578. }
  579. static int sprd_startup(struct uart_port *port)
  580. {
  581. int ret = 0;
  582. unsigned int ien, fc;
  583. unsigned int timeout;
  584. struct sprd_uart_port *sp;
  585. unsigned long flags;
  586. serial_out(port, SPRD_CTL2,
  587. THLD_TX_EMPTY << THLD_TX_EMPTY_SHIFT | THLD_RX_FULL);
  588. /* clear rx fifo */
  589. timeout = SPRD_TIMEOUT;
  590. while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)
  591. serial_in(port, SPRD_RXD);
  592. /* clear tx fifo */
  593. timeout = SPRD_TIMEOUT;
  594. while (timeout-- && serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
  595. cpu_relax();
  596. /* clear interrupt */
  597. serial_out(port, SPRD_IEN, 0);
  598. serial_out(port, SPRD_ICLR, ~0);
  599. /* allocate irq */
  600. sp = container_of(port, struct sprd_uart_port, port);
  601. snprintf(sp->name, sizeof(sp->name), "sprd_serial%d", port->line);
  602. sprd_uart_dma_startup(port, sp);
  603. ret = devm_request_irq(port->dev, port->irq, sprd_handle_irq,
  604. IRQF_SHARED, sp->name, port);
  605. if (ret) {
  606. dev_err(port->dev, "fail to request serial irq %d, ret=%d\n",
  607. port->irq, ret);
  608. return ret;
  609. }
  610. fc = serial_in(port, SPRD_CTL1);
  611. fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
  612. serial_out(port, SPRD_CTL1, fc);
  613. /* enable interrupt */
  614. uart_port_lock_irqsave(port, &flags);
  615. ien = serial_in(port, SPRD_IEN);
  616. ien |= SPRD_IEN_BREAK_DETECT | sp->pdata->timeout_ien;
  617. if (!sp->rx_dma.enable)
  618. ien |= SPRD_IEN_RX_FULL;
  619. serial_out(port, SPRD_IEN, ien);
  620. uart_port_unlock_irqrestore(port, flags);
  621. return 0;
  622. }
  623. static void sprd_shutdown(struct uart_port *port)
  624. {
  625. sprd_release_dma(port);
  626. serial_out(port, SPRD_IEN, 0);
  627. serial_out(port, SPRD_ICLR, ~0);
  628. devm_free_irq(port->dev, port->irq, port);
  629. }
  630. static void sprd_set_termios(struct uart_port *port, struct ktermios *termios,
  631. const struct ktermios *old)
  632. {
  633. unsigned int baud, quot;
  634. unsigned int lcr = 0, fc;
  635. unsigned long flags;
  636. /* ask the core to calculate the divisor for us */
  637. baud = uart_get_baud_rate(port, termios, old, 0, SPRD_BAUD_IO_LIMIT);
  638. quot = port->uartclk / baud;
  639. /* set data length */
  640. switch (termios->c_cflag & CSIZE) {
  641. case CS5:
  642. lcr |= SPRD_LCR_DATA_LEN5;
  643. break;
  644. case CS6:
  645. lcr |= SPRD_LCR_DATA_LEN6;
  646. break;
  647. case CS7:
  648. lcr |= SPRD_LCR_DATA_LEN7;
  649. break;
  650. case CS8:
  651. default:
  652. lcr |= SPRD_LCR_DATA_LEN8;
  653. break;
  654. }
  655. /* calculate stop bits */
  656. lcr &= ~(SPRD_LCR_STOP_1BIT | SPRD_LCR_STOP_2BIT);
  657. if (termios->c_cflag & CSTOPB)
  658. lcr |= SPRD_LCR_STOP_2BIT;
  659. else
  660. lcr |= SPRD_LCR_STOP_1BIT;
  661. /* calculate parity */
  662. lcr &= ~SPRD_LCR_PARITY;
  663. termios->c_cflag &= ~CMSPAR; /* no support mark/space */
  664. if (termios->c_cflag & PARENB) {
  665. lcr |= SPRD_LCR_PARITY_EN;
  666. if (termios->c_cflag & PARODD)
  667. lcr |= SPRD_LCR_ODD_PAR;
  668. else
  669. lcr |= SPRD_LCR_EVEN_PAR;
  670. }
  671. uart_port_lock_irqsave(port, &flags);
  672. /* update the per-port timeout */
  673. uart_update_timeout(port, termios->c_cflag, baud);
  674. port->read_status_mask = SPRD_LSR_OE;
  675. if (termios->c_iflag & INPCK)
  676. port->read_status_mask |= SPRD_LSR_FE | SPRD_LSR_PE;
  677. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  678. port->read_status_mask |= SPRD_LSR_BI;
  679. /* characters to ignore */
  680. port->ignore_status_mask = 0;
  681. if (termios->c_iflag & IGNPAR)
  682. port->ignore_status_mask |= SPRD_LSR_PE | SPRD_LSR_FE;
  683. if (termios->c_iflag & IGNBRK) {
  684. port->ignore_status_mask |= SPRD_LSR_BI;
  685. /*
  686. * If we're ignoring parity and break indicators,
  687. * ignore overruns too (for real raw support).
  688. */
  689. if (termios->c_iflag & IGNPAR)
  690. port->ignore_status_mask |= SPRD_LSR_OE;
  691. }
  692. /* flow control */
  693. fc = serial_in(port, SPRD_CTL1);
  694. fc &= ~(RX_HW_FLOW_CTL_THLD | RX_HW_FLOW_CTL_EN | TX_HW_FLOW_CTL_EN);
  695. if (termios->c_cflag & CRTSCTS) {
  696. fc |= RX_HW_FLOW_CTL_THLD;
  697. fc |= RX_HW_FLOW_CTL_EN;
  698. fc |= TX_HW_FLOW_CTL_EN;
  699. }
  700. /* clock divider bit0~bit15 */
  701. serial_out(port, SPRD_CLKD0, quot & SPRD_CLKD0_MASK);
  702. /* clock divider bit16~bit20 */
  703. serial_out(port, SPRD_CLKD1,
  704. (quot & SPRD_CLKD1_MASK) >> SPRD_CLKD1_SHIFT);
  705. serial_out(port, SPRD_LCR, lcr);
  706. fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
  707. serial_out(port, SPRD_CTL1, fc);
  708. uart_port_unlock_irqrestore(port, flags);
  709. /* Don't rewrite B0 */
  710. if (tty_termios_baud_rate(termios))
  711. tty_termios_encode_baud_rate(termios, baud, baud);
  712. }
  713. static const char *sprd_type(struct uart_port *port)
  714. {
  715. return "SPX";
  716. }
  717. static void sprd_release_port(struct uart_port *port)
  718. {
  719. /* nothing to do */
  720. }
  721. static int sprd_request_port(struct uart_port *port)
  722. {
  723. return 0;
  724. }
  725. static void sprd_config_port(struct uart_port *port, int flags)
  726. {
  727. if (flags & UART_CONFIG_TYPE)
  728. port->type = PORT_SPRD;
  729. }
  730. static int sprd_verify_port(struct uart_port *port, struct serial_struct *ser)
  731. {
  732. if (ser->type != PORT_SPRD)
  733. return -EINVAL;
  734. if (port->irq != ser->irq)
  735. return -EINVAL;
  736. if (port->iotype != ser->io_type)
  737. return -EINVAL;
  738. return 0;
  739. }
  740. static void sprd_pm(struct uart_port *port, unsigned int state,
  741. unsigned int oldstate)
  742. {
  743. struct sprd_uart_port *sup =
  744. container_of(port, struct sprd_uart_port, port);
  745. switch (state) {
  746. case UART_PM_STATE_ON:
  747. clk_prepare_enable(sup->clk);
  748. break;
  749. case UART_PM_STATE_OFF:
  750. clk_disable_unprepare(sup->clk);
  751. break;
  752. }
  753. }
  754. #ifdef CONFIG_CONSOLE_POLL
  755. static int sprd_poll_init(struct uart_port *port)
  756. {
  757. if (port->state->pm_state != UART_PM_STATE_ON) {
  758. sprd_pm(port, UART_PM_STATE_ON, 0);
  759. port->state->pm_state = UART_PM_STATE_ON;
  760. }
  761. return 0;
  762. }
  763. static int sprd_poll_get_char(struct uart_port *port)
  764. {
  765. while (!(serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK))
  766. cpu_relax();
  767. return serial_in(port, SPRD_RXD);
  768. }
  769. static void sprd_poll_put_char(struct uart_port *port, unsigned char ch)
  770. {
  771. while (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK)
  772. cpu_relax();
  773. serial_out(port, SPRD_TXD, ch);
  774. }
  775. #endif
  776. static const struct uart_ops serial_sprd_ops = {
  777. .tx_empty = sprd_tx_empty,
  778. .get_mctrl = sprd_get_mctrl,
  779. .set_mctrl = sprd_set_mctrl,
  780. .stop_tx = sprd_stop_tx,
  781. .start_tx = sprd_start_tx,
  782. .stop_rx = sprd_stop_rx,
  783. .break_ctl = sprd_break_ctl,
  784. .startup = sprd_startup,
  785. .shutdown = sprd_shutdown,
  786. .set_termios = sprd_set_termios,
  787. .type = sprd_type,
  788. .release_port = sprd_release_port,
  789. .request_port = sprd_request_port,
  790. .config_port = sprd_config_port,
  791. .verify_port = sprd_verify_port,
  792. .pm = sprd_pm,
  793. #ifdef CONFIG_CONSOLE_POLL
  794. .poll_init = sprd_poll_init,
  795. .poll_get_char = sprd_poll_get_char,
  796. .poll_put_char = sprd_poll_put_char,
  797. #endif
  798. };
  799. #ifdef CONFIG_SERIAL_SPRD_CONSOLE
  800. static void wait_for_xmitr(struct uart_port *port)
  801. {
  802. unsigned int status, tmout = 10000;
  803. /* wait up to 10ms for the character(s) to be sent */
  804. do {
  805. status = serial_in(port, SPRD_STS1);
  806. if (--tmout == 0)
  807. break;
  808. udelay(1);
  809. } while (status & SPRD_TX_FIFO_CNT_MASK);
  810. }
  811. static void sprd_console_putchar(struct uart_port *port, unsigned char ch)
  812. {
  813. wait_for_xmitr(port);
  814. serial_out(port, SPRD_TXD, ch);
  815. }
  816. static void sprd_console_write(struct console *co, const char *s,
  817. unsigned int count)
  818. {
  819. struct uart_port *port = &sprd_port[co->index]->port;
  820. int locked = 1;
  821. unsigned long flags;
  822. if (port->sysrq)
  823. locked = 0;
  824. else if (oops_in_progress)
  825. locked = uart_port_trylock_irqsave(port, &flags);
  826. else
  827. uart_port_lock_irqsave(port, &flags);
  828. uart_console_write(port, s, count, sprd_console_putchar);
  829. /* wait for transmitter to become empty */
  830. wait_for_xmitr(port);
  831. if (locked)
  832. uart_port_unlock_irqrestore(port, flags);
  833. }
  834. static int sprd_console_setup(struct console *co, char *options)
  835. {
  836. struct sprd_uart_port *sprd_uart_port;
  837. int baud = 115200;
  838. int bits = 8;
  839. int parity = 'n';
  840. int flow = 'n';
  841. if (co->index >= UART_NR_MAX || co->index < 0)
  842. co->index = 0;
  843. sprd_uart_port = sprd_port[co->index];
  844. if (!sprd_uart_port || !sprd_uart_port->port.membase) {
  845. pr_info("serial port %d not yet initialized\n", co->index);
  846. return -ENODEV;
  847. }
  848. if (options)
  849. uart_parse_options(options, &baud, &parity, &bits, &flow);
  850. return uart_set_options(&sprd_uart_port->port, co, baud,
  851. parity, bits, flow);
  852. }
  853. static struct uart_driver sprd_uart_driver;
  854. static struct console sprd_console = {
  855. .name = SPRD_TTY_NAME,
  856. .write = sprd_console_write,
  857. .device = uart_console_device,
  858. .setup = sprd_console_setup,
  859. .flags = CON_PRINTBUFFER,
  860. .index = -1,
  861. .data = &sprd_uart_driver,
  862. };
  863. static int __init sprd_serial_console_init(void)
  864. {
  865. register_console(&sprd_console);
  866. return 0;
  867. }
  868. console_initcall(sprd_serial_console_init);
  869. #define SPRD_CONSOLE (&sprd_console)
  870. /* Support for earlycon */
  871. static void sprd_putc(struct uart_port *port, unsigned char c)
  872. {
  873. unsigned int timeout = SPRD_TIMEOUT;
  874. while (timeout-- &&
  875. !(readl(port->membase + SPRD_LSR) & SPRD_LSR_TX_OVER))
  876. cpu_relax();
  877. writeb(c, port->membase + SPRD_TXD);
  878. }
  879. static void sprd_early_write(struct console *con, const char *s, unsigned int n)
  880. {
  881. struct earlycon_device *dev = con->data;
  882. uart_console_write(&dev->port, s, n, sprd_putc);
  883. }
  884. static int __init sprd_early_console_setup(struct earlycon_device *device,
  885. const char *opt)
  886. {
  887. if (!device->port.membase)
  888. return -ENODEV;
  889. device->con->write = sprd_early_write;
  890. return 0;
  891. }
  892. OF_EARLYCON_DECLARE(sprd_serial, "sprd,sc9836-uart",
  893. sprd_early_console_setup);
  894. #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
  895. #define SPRD_CONSOLE NULL
  896. #endif
  897. static struct uart_driver sprd_uart_driver = {
  898. .owner = THIS_MODULE,
  899. .driver_name = "sprd_serial",
  900. .dev_name = SPRD_TTY_NAME,
  901. .major = 0,
  902. .minor = 0,
  903. .nr = UART_NR_MAX,
  904. .cons = SPRD_CONSOLE,
  905. };
  906. static void sprd_remove(struct platform_device *dev)
  907. {
  908. struct sprd_uart_port *sup = platform_get_drvdata(dev);
  909. if (sup) {
  910. uart_remove_one_port(&sprd_uart_driver, &sup->port);
  911. sprd_port[sup->port.line] = NULL;
  912. sprd_rx_free_buf(sup);
  913. sprd_ports_num--;
  914. }
  915. if (!sprd_ports_num)
  916. uart_unregister_driver(&sprd_uart_driver);
  917. }
  918. static bool sprd_uart_is_console(struct uart_port *uport)
  919. {
  920. struct console *cons = sprd_uart_driver.cons;
  921. if ((cons && cons->index >= 0 && cons->index == uport->line) ||
  922. of_console_check(uport->dev->of_node, SPRD_TTY_NAME, uport->line))
  923. return true;
  924. return false;
  925. }
  926. static int sprd_clk_init(struct uart_port *uport)
  927. {
  928. struct clk *clk_uart, *clk_parent;
  929. struct sprd_uart_port *u = container_of(uport, struct sprd_uart_port, port);
  930. clk_uart = devm_clk_get(uport->dev, "uart");
  931. if (IS_ERR(clk_uart)) {
  932. if (PTR_ERR(clk_uart) == -EPROBE_DEFER)
  933. return -EPROBE_DEFER;
  934. dev_warn(uport->dev, "uart%d can't get uart clock\n",
  935. uport->line);
  936. clk_uart = NULL;
  937. }
  938. clk_parent = devm_clk_get(uport->dev, "source");
  939. if (IS_ERR(clk_parent)) {
  940. if (PTR_ERR(clk_parent) == -EPROBE_DEFER)
  941. return -EPROBE_DEFER;
  942. dev_warn(uport->dev, "uart%d can't get source clock\n",
  943. uport->line);
  944. clk_parent = NULL;
  945. }
  946. if (!clk_uart || clk_set_parent(clk_uart, clk_parent))
  947. uport->uartclk = SPRD_DEFAULT_SOURCE_CLK;
  948. else
  949. uport->uartclk = clk_get_rate(clk_uart);
  950. u->clk = devm_clk_get(uport->dev, "enable");
  951. if (IS_ERR(u->clk)) {
  952. if (PTR_ERR(u->clk) == -EPROBE_DEFER)
  953. return -EPROBE_DEFER;
  954. dev_warn(uport->dev, "uart%d can't get enable clock\n",
  955. uport->line);
  956. /* To keep console alive even if the error occurred */
  957. if (!sprd_uart_is_console(uport))
  958. return PTR_ERR(u->clk);
  959. u->clk = NULL;
  960. }
  961. return 0;
  962. }
  963. static int sprd_probe(struct platform_device *pdev)
  964. {
  965. struct resource *res;
  966. struct uart_port *up;
  967. struct sprd_uart_port *sport;
  968. int irq;
  969. int index;
  970. int ret;
  971. index = of_alias_get_id(pdev->dev.of_node, "serial");
  972. if (index < 0 || index >= UART_NR_MAX) {
  973. dev_err(&pdev->dev, "got a wrong serial alias id %d\n", index);
  974. return -EINVAL;
  975. }
  976. sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
  977. if (!sport)
  978. return -ENOMEM;
  979. up = &sport->port;
  980. up->dev = &pdev->dev;
  981. up->line = index;
  982. up->type = PORT_SPRD;
  983. up->iotype = UPIO_MEM;
  984. up->uartclk = SPRD_DEF_RATE;
  985. up->fifosize = SPRD_FIFO_SIZE;
  986. up->ops = &serial_sprd_ops;
  987. up->flags = UPF_BOOT_AUTOCONF;
  988. up->has_sysrq = IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE);
  989. ret = sprd_clk_init(up);
  990. if (ret)
  991. return ret;
  992. up->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
  993. if (IS_ERR(up->membase))
  994. return PTR_ERR(up->membase);
  995. up->mapbase = res->start;
  996. sport->pdata = of_device_get_match_data(&pdev->dev);
  997. if (!sport->pdata) {
  998. dev_err(&pdev->dev, "get match data failed!\n");
  999. return -EINVAL;
  1000. }
  1001. irq = platform_get_irq(pdev, 0);
  1002. if (irq < 0)
  1003. return irq;
  1004. up->irq = irq;
  1005. /*
  1006. * Allocate one dma buffer to prepare for receive transfer, in case
  1007. * memory allocation failure at runtime.
  1008. */
  1009. ret = sprd_rx_alloc_buf(sport);
  1010. if (ret)
  1011. return ret;
  1012. if (!sprd_ports_num) {
  1013. ret = uart_register_driver(&sprd_uart_driver);
  1014. if (ret < 0) {
  1015. pr_err("Failed to register SPRD-UART driver\n");
  1016. goto free_rx_buf;
  1017. }
  1018. }
  1019. sprd_ports_num++;
  1020. sprd_port[index] = sport;
  1021. ret = uart_add_one_port(&sprd_uart_driver, up);
  1022. if (ret)
  1023. goto clean_port;
  1024. platform_set_drvdata(pdev, up);
  1025. return 0;
  1026. clean_port:
  1027. sprd_port[index] = NULL;
  1028. if (--sprd_ports_num == 0)
  1029. uart_unregister_driver(&sprd_uart_driver);
  1030. free_rx_buf:
  1031. sprd_rx_free_buf(sport);
  1032. return ret;
  1033. }
  1034. #ifdef CONFIG_PM_SLEEP
  1035. static int sprd_suspend(struct device *dev)
  1036. {
  1037. struct sprd_uart_port *sup = dev_get_drvdata(dev);
  1038. uart_suspend_port(&sprd_uart_driver, &sup->port);
  1039. return 0;
  1040. }
  1041. static int sprd_resume(struct device *dev)
  1042. {
  1043. struct sprd_uart_port *sup = dev_get_drvdata(dev);
  1044. uart_resume_port(&sprd_uart_driver, &sup->port);
  1045. return 0;
  1046. }
  1047. #endif
  1048. static SIMPLE_DEV_PM_OPS(sprd_pm_ops, sprd_suspend, sprd_resume);
  1049. static const struct of_device_id serial_ids[] = {
  1050. {.compatible = "sprd,sc9836-uart", .data = &sc9836_data},
  1051. {.compatible = "sprd,sc9632-uart", .data = &sc9632_data},
  1052. {}
  1053. };
  1054. MODULE_DEVICE_TABLE(of, serial_ids);
  1055. static struct platform_driver sprd_platform_driver = {
  1056. .probe = sprd_probe,
  1057. .remove = sprd_remove,
  1058. .driver = {
  1059. .name = "sprd_serial",
  1060. .of_match_table = serial_ids,
  1061. .pm = &sprd_pm_ops,
  1062. },
  1063. };
  1064. module_platform_driver(sprd_platform_driver);
  1065. MODULE_LICENSE("GPL v2");
  1066. MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");