max3100.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  4. *
  5. * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
  6. * to use polling for flow control. TX empty IRQ is unusable, since
  7. * writing conf clears FIFO buffer and we cannot have this interrupt
  8. * always asking us for attention.
  9. *
  10. * The initial minor number is 209 in the low-density serial port:
  11. * mknod /dev/ttyMAX0 c 204 209
  12. */
  13. #define MAX3100_MAJOR 204
  14. #define MAX3100_MINOR 209
  15. /* 4 MAX3100s should be enough for everyone */
  16. #define MAX_MAX3100 4
  17. #include <linux/bitops.h>
  18. #include <linux/container_of.h>
  19. #include <linux/delay.h>
  20. #include <linux/device.h>
  21. #include <linux/freezer.h>
  22. #include <linux/mod_devicetable.h>
  23. #include <linux/module.h>
  24. #include <linux/pm.h>
  25. #include <linux/property.h>
  26. #include <linux/serial_core.h>
  27. #include <linux/serial.h>
  28. #include <linux/slab.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/tty_flip.h>
  31. #include <linux/tty.h>
  32. #include <linux/types.h>
  33. #include <linux/unaligned.h>
  34. #define MAX3100_C (1<<14)
  35. #define MAX3100_D (0<<14)
  36. #define MAX3100_W (1<<15)
  37. #define MAX3100_RX (0<<15)
  38. #define MAX3100_WC (MAX3100_W | MAX3100_C)
  39. #define MAX3100_RC (MAX3100_RX | MAX3100_C)
  40. #define MAX3100_WD (MAX3100_W | MAX3100_D)
  41. #define MAX3100_RD (MAX3100_RX | MAX3100_D)
  42. #define MAX3100_CMD (3 << 14)
  43. #define MAX3100_T (1<<14)
  44. #define MAX3100_R (1<<15)
  45. #define MAX3100_FEN (1<<13)
  46. #define MAX3100_SHDN (1<<12)
  47. #define MAX3100_TM (1<<11)
  48. #define MAX3100_RM (1<<10)
  49. #define MAX3100_PM (1<<9)
  50. #define MAX3100_RAM (1<<8)
  51. #define MAX3100_IR (1<<7)
  52. #define MAX3100_ST (1<<6)
  53. #define MAX3100_PE (1<<5)
  54. #define MAX3100_L (1<<4)
  55. #define MAX3100_BAUD (0xf)
  56. #define MAX3100_TE (1<<10)
  57. #define MAX3100_RAFE (1<<10)
  58. #define MAX3100_RTS (1<<9)
  59. #define MAX3100_CTS (1<<9)
  60. #define MAX3100_PT (1<<8)
  61. #define MAX3100_DATA (0xff)
  62. #define MAX3100_RT (MAX3100_R | MAX3100_T)
  63. #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
  64. /* the following simulate a status reg for ignore_status_mask */
  65. #define MAX3100_STATUS_PE 1
  66. #define MAX3100_STATUS_FE 2
  67. #define MAX3100_STATUS_OE 4
  68. struct max3100_port {
  69. struct uart_port port;
  70. struct spi_device *spi;
  71. int cts; /* last CTS received for flow ctrl */
  72. int tx_empty; /* last TX empty bit */
  73. spinlock_t conf_lock; /* shared data */
  74. int conf_commit; /* need to make changes */
  75. int conf; /* configuration for the MAX31000
  76. * (bits 0-7, bits 8-11 are irqs) */
  77. int rts_commit; /* need to change rts */
  78. int rts; /* rts status */
  79. int baud; /* current baud rate */
  80. int parity; /* keeps track if we should send parity */
  81. #define MAX3100_PARITY_ON 1
  82. #define MAX3100_PARITY_ODD 2
  83. #define MAX3100_7BIT 4
  84. int rx_enabled; /* if we should rx chars */
  85. int minor; /* minor number */
  86. int loopback_commit; /* need to change loopback */
  87. int loopback; /* 1 if we are in loopback mode */
  88. /* for handling irqs: need workqueue since we do spi_sync */
  89. struct workqueue_struct *workqueue;
  90. struct work_struct work;
  91. /* set to 1 to make the workhandler exit as soon as possible */
  92. int force_end_work;
  93. /* need to know we are suspending to avoid deadlock on workqueue */
  94. int suspending;
  95. struct timer_list timer;
  96. };
  97. static inline struct max3100_port *to_max3100_port(struct uart_port *port)
  98. {
  99. return container_of(port, struct max3100_port, port);
  100. }
  101. static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
  102. static DEFINE_MUTEX(max3100s_lock); /* race on probe */
  103. static int max3100_do_parity(struct max3100_port *s, u16 c)
  104. {
  105. int parity;
  106. if (s->parity & MAX3100_PARITY_ODD)
  107. parity = 1;
  108. else
  109. parity = 0;
  110. if (s->parity & MAX3100_7BIT)
  111. c &= 0x7f;
  112. else
  113. c &= 0xff;
  114. parity = parity ^ parity8(c);
  115. return parity;
  116. }
  117. static int max3100_check_parity(struct max3100_port *s, u16 c)
  118. {
  119. return max3100_do_parity(s, c) == ((c >> 8) & 1);
  120. }
  121. static void max3100_calc_parity(struct max3100_port *s, u16 *c)
  122. {
  123. if (s->parity & MAX3100_7BIT)
  124. *c &= 0x7f;
  125. else
  126. *c &= 0xff;
  127. if (s->parity & MAX3100_PARITY_ON)
  128. *c |= max3100_do_parity(s, *c) << 8;
  129. }
  130. static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
  131. {
  132. struct spi_message message;
  133. __be16 etx, erx;
  134. int status;
  135. struct spi_transfer tran = {
  136. .tx_buf = &etx,
  137. .rx_buf = &erx,
  138. .len = 2,
  139. };
  140. etx = cpu_to_be16(tx);
  141. spi_message_init(&message);
  142. spi_message_add_tail(&tran, &message);
  143. status = spi_sync(s->spi, &message);
  144. if (status) {
  145. dev_warn(&s->spi->dev, "error while calling spi_sync\n");
  146. return -EIO;
  147. }
  148. *rx = be16_to_cpu(erx);
  149. s->tx_empty = (*rx & MAX3100_T) > 0;
  150. dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
  151. return 0;
  152. }
  153. static int max3100_handlerx_unlocked(struct max3100_port *s, u16 rx)
  154. {
  155. unsigned int status = 0;
  156. int ret = 0, cts;
  157. u8 ch, flg;
  158. if (rx & MAX3100_R && s->rx_enabled) {
  159. dev_dbg(&s->spi->dev, "%s\n", __func__);
  160. ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
  161. if (rx & MAX3100_RAFE) {
  162. s->port.icount.frame++;
  163. flg = TTY_FRAME;
  164. status |= MAX3100_STATUS_FE;
  165. } else {
  166. if (s->parity & MAX3100_PARITY_ON) {
  167. if (max3100_check_parity(s, rx)) {
  168. s->port.icount.rx++;
  169. flg = TTY_NORMAL;
  170. } else {
  171. s->port.icount.parity++;
  172. flg = TTY_PARITY;
  173. status |= MAX3100_STATUS_PE;
  174. }
  175. } else {
  176. s->port.icount.rx++;
  177. flg = TTY_NORMAL;
  178. }
  179. }
  180. uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
  181. ret = 1;
  182. }
  183. cts = (rx & MAX3100_CTS) > 0;
  184. if (s->cts != cts) {
  185. s->cts = cts;
  186. uart_handle_cts_change(&s->port, cts);
  187. }
  188. return ret;
  189. }
  190. static int max3100_handlerx(struct max3100_port *s, u16 rx)
  191. {
  192. unsigned long flags;
  193. int ret;
  194. uart_port_lock_irqsave(&s->port, &flags);
  195. ret = max3100_handlerx_unlocked(s, rx);
  196. uart_port_unlock_irqrestore(&s->port, flags);
  197. return ret;
  198. }
  199. static void max3100_work(struct work_struct *w)
  200. {
  201. struct max3100_port *s = container_of(w, struct max3100_port, work);
  202. struct tty_port *tport = &s->port.state->port;
  203. unsigned char ch;
  204. int conf, cconf, cloopback, crts;
  205. int rxchars;
  206. u16 tx, rx;
  207. dev_dbg(&s->spi->dev, "%s\n", __func__);
  208. rxchars = 0;
  209. do {
  210. spin_lock(&s->conf_lock);
  211. conf = s->conf;
  212. cconf = s->conf_commit;
  213. s->conf_commit = 0;
  214. cloopback = s->loopback_commit;
  215. s->loopback_commit = 0;
  216. crts = s->rts_commit;
  217. s->rts_commit = 0;
  218. spin_unlock(&s->conf_lock);
  219. if (cconf)
  220. max3100_sr(s, MAX3100_WC | conf, &rx);
  221. if (cloopback)
  222. max3100_sr(s, 0x4001, &rx);
  223. if (crts) {
  224. max3100_sr(s, MAX3100_WD | MAX3100_TE |
  225. (s->rts ? MAX3100_RTS : 0), &rx);
  226. rxchars += max3100_handlerx(s, rx);
  227. }
  228. max3100_sr(s, MAX3100_RD, &rx);
  229. rxchars += max3100_handlerx(s, rx);
  230. if (rx & MAX3100_T) {
  231. tx = 0xffff;
  232. if (s->port.x_char) {
  233. tx = s->port.x_char;
  234. s->port.icount.tx++;
  235. s->port.x_char = 0;
  236. } else if (!uart_tx_stopped(&s->port) &&
  237. uart_fifo_get(&s->port, &ch)) {
  238. tx = ch;
  239. }
  240. if (tx != 0xffff) {
  241. max3100_calc_parity(s, &tx);
  242. tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
  243. max3100_sr(s, tx, &rx);
  244. rxchars += max3100_handlerx(s, rx);
  245. }
  246. }
  247. if (rxchars > 16) {
  248. tty_flip_buffer_push(&s->port.state->port);
  249. rxchars = 0;
  250. }
  251. if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
  252. uart_write_wakeup(&s->port);
  253. } while (!s->force_end_work &&
  254. !freezing(current) &&
  255. ((rx & MAX3100_R) ||
  256. (!kfifo_is_empty(&tport->xmit_fifo) &&
  257. !uart_tx_stopped(&s->port))));
  258. if (rxchars > 0)
  259. tty_flip_buffer_push(&s->port.state->port);
  260. }
  261. static void max3100_dowork(struct max3100_port *s)
  262. {
  263. if (!s->force_end_work && !freezing(current) && !s->suspending)
  264. queue_work(s->workqueue, &s->work);
  265. }
  266. static void max3100_timeout(struct timer_list *t)
  267. {
  268. struct max3100_port *s = timer_container_of(s, t, timer);
  269. max3100_dowork(s);
  270. mod_timer(&s->timer, jiffies + uart_poll_timeout(&s->port));
  271. }
  272. static irqreturn_t max3100_irq(int irqno, void *dev_id)
  273. {
  274. struct max3100_port *s = dev_id;
  275. dev_dbg(&s->spi->dev, "%s\n", __func__);
  276. max3100_dowork(s);
  277. return IRQ_HANDLED;
  278. }
  279. static void max3100_enable_ms(struct uart_port *port)
  280. {
  281. struct max3100_port *s = to_max3100_port(port);
  282. mod_timer(&s->timer, jiffies);
  283. dev_dbg(&s->spi->dev, "%s\n", __func__);
  284. }
  285. static void max3100_start_tx(struct uart_port *port)
  286. {
  287. struct max3100_port *s = to_max3100_port(port);
  288. dev_dbg(&s->spi->dev, "%s\n", __func__);
  289. max3100_dowork(s);
  290. }
  291. static void max3100_stop_rx(struct uart_port *port)
  292. {
  293. struct max3100_port *s = to_max3100_port(port);
  294. dev_dbg(&s->spi->dev, "%s\n", __func__);
  295. s->rx_enabled = 0;
  296. spin_lock(&s->conf_lock);
  297. s->conf &= ~MAX3100_RM;
  298. s->conf_commit = 1;
  299. spin_unlock(&s->conf_lock);
  300. max3100_dowork(s);
  301. }
  302. static unsigned int max3100_tx_empty(struct uart_port *port)
  303. {
  304. struct max3100_port *s = to_max3100_port(port);
  305. dev_dbg(&s->spi->dev, "%s\n", __func__);
  306. /* may not be truly up-to-date */
  307. max3100_dowork(s);
  308. return s->tx_empty;
  309. }
  310. static unsigned int max3100_get_mctrl(struct uart_port *port)
  311. {
  312. struct max3100_port *s = to_max3100_port(port);
  313. dev_dbg(&s->spi->dev, "%s\n", __func__);
  314. /* may not be truly up-to-date */
  315. max3100_dowork(s);
  316. /* always assert DCD and DSR since these lines are not wired */
  317. return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
  318. }
  319. static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  320. {
  321. struct max3100_port *s = to_max3100_port(port);
  322. int loopback, rts;
  323. dev_dbg(&s->spi->dev, "%s\n", __func__);
  324. loopback = (mctrl & TIOCM_LOOP) > 0;
  325. rts = (mctrl & TIOCM_RTS) > 0;
  326. spin_lock(&s->conf_lock);
  327. if (s->loopback != loopback) {
  328. s->loopback = loopback;
  329. s->loopback_commit = 1;
  330. }
  331. if (s->rts != rts) {
  332. s->rts = rts;
  333. s->rts_commit = 1;
  334. }
  335. if (s->loopback_commit || s->rts_commit)
  336. max3100_dowork(s);
  337. spin_unlock(&s->conf_lock);
  338. }
  339. static void
  340. max3100_set_termios(struct uart_port *port, struct ktermios *termios,
  341. const struct ktermios *old)
  342. {
  343. struct max3100_port *s = to_max3100_port(port);
  344. unsigned int baud = port->uartclk / 16;
  345. unsigned int baud230400 = (baud == 230400) ? 1 : 0;
  346. unsigned cflag;
  347. u32 param_new, param_mask, parity = 0;
  348. dev_dbg(&s->spi->dev, "%s\n", __func__);
  349. cflag = termios->c_cflag;
  350. param_mask = 0;
  351. baud = tty_termios_baud_rate(termios);
  352. param_new = s->conf & MAX3100_BAUD;
  353. switch (baud) {
  354. case 300:
  355. if (baud230400)
  356. baud = s->baud;
  357. else
  358. param_new = 15;
  359. break;
  360. case 600:
  361. param_new = 14 + baud230400;
  362. break;
  363. case 1200:
  364. param_new = 13 + baud230400;
  365. break;
  366. case 2400:
  367. param_new = 12 + baud230400;
  368. break;
  369. case 4800:
  370. param_new = 11 + baud230400;
  371. break;
  372. case 9600:
  373. param_new = 10 + baud230400;
  374. break;
  375. case 19200:
  376. param_new = 9 + baud230400;
  377. break;
  378. case 38400:
  379. param_new = 8 + baud230400;
  380. break;
  381. case 57600:
  382. param_new = 1 + baud230400;
  383. break;
  384. case 115200:
  385. param_new = 0 + baud230400;
  386. break;
  387. case 230400:
  388. if (baud230400)
  389. param_new = 0;
  390. else
  391. baud = s->baud;
  392. break;
  393. default:
  394. baud = s->baud;
  395. }
  396. tty_termios_encode_baud_rate(termios, baud, baud);
  397. s->baud = baud;
  398. param_mask |= MAX3100_BAUD;
  399. if ((cflag & CSIZE) == CS8) {
  400. param_new &= ~MAX3100_L;
  401. parity &= ~MAX3100_7BIT;
  402. } else {
  403. param_new |= MAX3100_L;
  404. parity |= MAX3100_7BIT;
  405. cflag = (cflag & ~CSIZE) | CS7;
  406. }
  407. param_mask |= MAX3100_L;
  408. if (cflag & CSTOPB)
  409. param_new |= MAX3100_ST;
  410. else
  411. param_new &= ~MAX3100_ST;
  412. param_mask |= MAX3100_ST;
  413. if (cflag & PARENB) {
  414. param_new |= MAX3100_PE;
  415. parity |= MAX3100_PARITY_ON;
  416. } else {
  417. param_new &= ~MAX3100_PE;
  418. parity &= ~MAX3100_PARITY_ON;
  419. }
  420. param_mask |= MAX3100_PE;
  421. if (cflag & PARODD)
  422. parity |= MAX3100_PARITY_ODD;
  423. else
  424. parity &= ~MAX3100_PARITY_ODD;
  425. /* mask termios capabilities we don't support */
  426. cflag &= ~CMSPAR;
  427. termios->c_cflag = cflag;
  428. s->port.ignore_status_mask = 0;
  429. if (termios->c_iflag & IGNPAR)
  430. s->port.ignore_status_mask |=
  431. MAX3100_STATUS_PE | MAX3100_STATUS_FE |
  432. MAX3100_STATUS_OE;
  433. timer_delete_sync(&s->timer);
  434. uart_update_timeout(port, termios->c_cflag, baud);
  435. spin_lock(&s->conf_lock);
  436. s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
  437. s->conf_commit = 1;
  438. s->parity = parity;
  439. spin_unlock(&s->conf_lock);
  440. max3100_dowork(s);
  441. if (UART_ENABLE_MS(&s->port, termios->c_cflag))
  442. max3100_enable_ms(&s->port);
  443. }
  444. static void max3100_shutdown(struct uart_port *port)
  445. {
  446. struct max3100_port *s = to_max3100_port(port);
  447. u16 rx;
  448. dev_dbg(&s->spi->dev, "%s\n", __func__);
  449. if (s->suspending)
  450. return;
  451. s->force_end_work = 1;
  452. timer_delete_sync(&s->timer);
  453. if (s->workqueue) {
  454. destroy_workqueue(s->workqueue);
  455. s->workqueue = NULL;
  456. }
  457. if (port->irq)
  458. free_irq(port->irq, s);
  459. /* set shutdown mode to save power */
  460. max3100_sr(s, MAX3100_WC | MAX3100_SHDN, &rx);
  461. }
  462. static int max3100_startup(struct uart_port *port)
  463. {
  464. struct max3100_port *s = to_max3100_port(port);
  465. char b[12];
  466. int ret;
  467. dev_dbg(&s->spi->dev, "%s\n", __func__);
  468. s->conf = MAX3100_RM;
  469. s->baud = port->uartclk / 16;
  470. s->rx_enabled = 1;
  471. if (s->suspending)
  472. return 0;
  473. s->force_end_work = 0;
  474. s->parity = 0;
  475. s->rts = 0;
  476. sprintf(b, "max3100-%d", s->minor);
  477. s->workqueue = create_freezable_workqueue(b);
  478. if (!s->workqueue) {
  479. dev_warn(&s->spi->dev, "cannot create workqueue\n");
  480. return -EBUSY;
  481. }
  482. INIT_WORK(&s->work, max3100_work);
  483. ret = request_irq(port->irq, max3100_irq, IRQF_TRIGGER_FALLING, "max3100", s);
  484. if (ret < 0) {
  485. dev_warn(&s->spi->dev, "cannot allocate irq %d\n", port->irq);
  486. port->irq = 0;
  487. destroy_workqueue(s->workqueue);
  488. s->workqueue = NULL;
  489. return -EBUSY;
  490. }
  491. s->conf_commit = 1;
  492. max3100_dowork(s);
  493. /* wait for clock to settle */
  494. msleep(50);
  495. max3100_enable_ms(&s->port);
  496. return 0;
  497. }
  498. static const char *max3100_type(struct uart_port *port)
  499. {
  500. struct max3100_port *s = to_max3100_port(port);
  501. dev_dbg(&s->spi->dev, "%s\n", __func__);
  502. return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
  503. }
  504. static void max3100_release_port(struct uart_port *port)
  505. {
  506. struct max3100_port *s = to_max3100_port(port);
  507. dev_dbg(&s->spi->dev, "%s\n", __func__);
  508. }
  509. static void max3100_config_port(struct uart_port *port, int flags)
  510. {
  511. struct max3100_port *s = to_max3100_port(port);
  512. dev_dbg(&s->spi->dev, "%s\n", __func__);
  513. if (flags & UART_CONFIG_TYPE)
  514. s->port.type = PORT_MAX3100;
  515. }
  516. static int max3100_verify_port(struct uart_port *port,
  517. struct serial_struct *ser)
  518. {
  519. struct max3100_port *s = to_max3100_port(port);
  520. int ret = -EINVAL;
  521. dev_dbg(&s->spi->dev, "%s\n", __func__);
  522. if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
  523. ret = 0;
  524. return ret;
  525. }
  526. static void max3100_stop_tx(struct uart_port *port)
  527. {
  528. struct max3100_port *s = to_max3100_port(port);
  529. dev_dbg(&s->spi->dev, "%s\n", __func__);
  530. }
  531. static int max3100_request_port(struct uart_port *port)
  532. {
  533. struct max3100_port *s = to_max3100_port(port);
  534. dev_dbg(&s->spi->dev, "%s\n", __func__);
  535. return 0;
  536. }
  537. static void max3100_break_ctl(struct uart_port *port, int break_state)
  538. {
  539. struct max3100_port *s = to_max3100_port(port);
  540. dev_dbg(&s->spi->dev, "%s\n", __func__);
  541. }
  542. static const struct uart_ops max3100_ops = {
  543. .tx_empty = max3100_tx_empty,
  544. .set_mctrl = max3100_set_mctrl,
  545. .get_mctrl = max3100_get_mctrl,
  546. .stop_tx = max3100_stop_tx,
  547. .start_tx = max3100_start_tx,
  548. .stop_rx = max3100_stop_rx,
  549. .enable_ms = max3100_enable_ms,
  550. .break_ctl = max3100_break_ctl,
  551. .startup = max3100_startup,
  552. .shutdown = max3100_shutdown,
  553. .set_termios = max3100_set_termios,
  554. .type = max3100_type,
  555. .release_port = max3100_release_port,
  556. .request_port = max3100_request_port,
  557. .config_port = max3100_config_port,
  558. .verify_port = max3100_verify_port,
  559. };
  560. static struct uart_driver max3100_uart_driver = {
  561. .owner = THIS_MODULE,
  562. .driver_name = "ttyMAX",
  563. .dev_name = "ttyMAX",
  564. .major = MAX3100_MAJOR,
  565. .minor = MAX3100_MINOR,
  566. .nr = MAX_MAX3100,
  567. };
  568. static int uart_driver_registered;
  569. static int max3100_probe(struct spi_device *spi)
  570. {
  571. struct device *dev = &spi->dev;
  572. int i, retval;
  573. u16 rx;
  574. mutex_lock(&max3100s_lock);
  575. if (!uart_driver_registered) {
  576. retval = uart_register_driver(&max3100_uart_driver);
  577. if (retval) {
  578. mutex_unlock(&max3100s_lock);
  579. return dev_err_probe(dev, retval, "Couldn't register max3100 uart driver\n");
  580. }
  581. uart_driver_registered = 1;
  582. }
  583. for (i = 0; i < MAX_MAX3100; i++)
  584. if (!max3100s[i])
  585. break;
  586. if (i == MAX_MAX3100) {
  587. mutex_unlock(&max3100s_lock);
  588. return dev_err_probe(dev, -ENOSPC, "too many MAX3100 chips\n");
  589. }
  590. max3100s[i] = kzalloc_obj(struct max3100_port);
  591. if (!max3100s[i]) {
  592. mutex_unlock(&max3100s_lock);
  593. return -ENOMEM;
  594. }
  595. max3100s[i]->spi = spi;
  596. spin_lock_init(&max3100s[i]->conf_lock);
  597. spi_set_drvdata(spi, max3100s[i]);
  598. max3100s[i]->minor = i;
  599. timer_setup(&max3100s[i]->timer, max3100_timeout, 0);
  600. dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
  601. max3100s[i]->port.irq = spi->irq;
  602. max3100s[i]->port.fifosize = 16;
  603. max3100s[i]->port.ops = &max3100_ops;
  604. max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
  605. max3100s[i]->port.line = i;
  606. max3100s[i]->port.type = PORT_MAX3100;
  607. max3100s[i]->port.dev = &spi->dev;
  608. /* Read clock frequency from a property, uart_add_one_port() will fail if it's not set */
  609. device_property_read_u32(dev, "clock-frequency", &max3100s[i]->port.uartclk);
  610. retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
  611. if (retval < 0)
  612. dev_err_probe(dev, retval, "uart_add_one_port failed for line %d\n", i);
  613. /* set shutdown mode to save power. Will be woken-up on open */
  614. max3100_sr(max3100s[i], MAX3100_WC | MAX3100_SHDN, &rx);
  615. mutex_unlock(&max3100s_lock);
  616. return 0;
  617. }
  618. static void max3100_remove(struct spi_device *spi)
  619. {
  620. struct max3100_port *s = spi_get_drvdata(spi);
  621. int i;
  622. mutex_lock(&max3100s_lock);
  623. /* find out the index for the chip we are removing */
  624. for (i = 0; i < MAX_MAX3100; i++)
  625. if (max3100s[i] == s) {
  626. dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
  627. uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
  628. kfree(max3100s[i]);
  629. max3100s[i] = NULL;
  630. break;
  631. }
  632. WARN_ON(i == MAX_MAX3100);
  633. /* check if this is the last chip we have */
  634. for (i = 0; i < MAX_MAX3100; i++)
  635. if (max3100s[i]) {
  636. mutex_unlock(&max3100s_lock);
  637. return;
  638. }
  639. pr_debug("removing max3100 driver\n");
  640. uart_unregister_driver(&max3100_uart_driver);
  641. uart_driver_registered = 0;
  642. mutex_unlock(&max3100s_lock);
  643. }
  644. static int max3100_suspend(struct device *dev)
  645. {
  646. struct max3100_port *s = dev_get_drvdata(dev);
  647. u16 rx;
  648. dev_dbg(&s->spi->dev, "%s\n", __func__);
  649. disable_irq(s->port.irq);
  650. s->suspending = 1;
  651. uart_suspend_port(&max3100_uart_driver, &s->port);
  652. /* no HW suspend, so do SW one */
  653. max3100_sr(s, MAX3100_WC | MAX3100_SHDN, &rx);
  654. return 0;
  655. }
  656. static int max3100_resume(struct device *dev)
  657. {
  658. struct max3100_port *s = dev_get_drvdata(dev);
  659. dev_dbg(&s->spi->dev, "%s\n", __func__);
  660. uart_resume_port(&max3100_uart_driver, &s->port);
  661. s->suspending = 0;
  662. enable_irq(s->port.irq);
  663. s->conf_commit = 1;
  664. if (s->workqueue)
  665. max3100_dowork(s);
  666. return 0;
  667. }
  668. static DEFINE_SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
  669. static const struct spi_device_id max3100_spi_id[] = {
  670. { "max3100" },
  671. { }
  672. };
  673. MODULE_DEVICE_TABLE(spi, max3100_spi_id);
  674. static const struct of_device_id max3100_of_match[] = {
  675. { .compatible = "maxim,max3100" },
  676. { }
  677. };
  678. MODULE_DEVICE_TABLE(of, max3100_of_match);
  679. static struct spi_driver max3100_driver = {
  680. .driver = {
  681. .name = "max3100",
  682. .of_match_table = max3100_of_match,
  683. .pm = pm_sleep_ptr(&max3100_pm_ops),
  684. },
  685. .probe = max3100_probe,
  686. .remove = max3100_remove,
  687. .id_table = max3100_spi_id,
  688. };
  689. module_spi_driver(max3100_driver);
  690. MODULE_DESCRIPTION("MAX3100 driver");
  691. MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
  692. MODULE_LICENSE("GPL");