dz.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * dz.c: Serial port driver for DECstations equipped
  4. * with the DZ chipset.
  5. *
  6. * Copyright (C) 1998 Olivier A. D. Lebaillif
  7. *
  8. * Email: olivier.lebaillif@ifrsys.com
  9. *
  10. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  11. *
  12. * [31-AUG-98] triemer
  13. * Changed IRQ to use Harald's dec internals interrupts.h
  14. * removed base_addr code - moving address assignment to setup.c
  15. * Changed name of dz_init to rs_init to be consistent with tc code
  16. * [13-NOV-98] triemer fixed code to receive characters
  17. * after patches by harald to irq code.
  18. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  19. * field from "current" - somewhere between 2.1.121 and 2.1.131
  20. Qua Jun 27 15:02:26 BRT 2001
  21. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  22. *
  23. * Parts (C) 1999 David Airlie, airlied@linux.ie
  24. * [07-SEP-99] Bugfixes
  25. *
  26. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  27. * Converted to new serial core
  28. */
  29. #undef DEBUG_DZ
  30. #include <linux/bitops.h>
  31. #include <linux/compiler.h>
  32. #include <linux/console.h>
  33. #include <linux/delay.h>
  34. #include <linux/errno.h>
  35. #include <linux/init.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/ioport.h>
  38. #include <linux/kernel.h>
  39. #include <linux/major.h>
  40. #include <linux/module.h>
  41. #include <linux/serial.h>
  42. #include <linux/serial_core.h>
  43. #include <linux/sysrq.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/atomic.h>
  47. #include <linux/io.h>
  48. #include <asm/bootinfo.h>
  49. #include <asm/dec/interrupts.h>
  50. #include <asm/dec/kn01.h>
  51. #include <asm/dec/kn02.h>
  52. #include <asm/dec/machtype.h>
  53. #include <asm/dec/prom.h>
  54. #include <asm/dec/system.h>
  55. #include "dz.h"
  56. MODULE_DESCRIPTION("DECstation DZ serial driver");
  57. MODULE_LICENSE("GPL");
  58. static char dz_name[] __initdata = "DECstation DZ serial driver version ";
  59. static char dz_version[] __initdata = "1.04";
  60. struct dz_port {
  61. struct dz_mux *mux;
  62. struct uart_port port;
  63. unsigned int cflag;
  64. };
  65. struct dz_mux {
  66. struct dz_port dport[DZ_NB_PORT];
  67. atomic_t map_guard;
  68. atomic_t irq_guard;
  69. int initialised;
  70. };
  71. static struct dz_mux dz_mux;
  72. static inline struct dz_port *to_dport(struct uart_port *uport)
  73. {
  74. return container_of(uport, struct dz_port, port);
  75. }
  76. /*
  77. * ------------------------------------------------------------
  78. * dz_in () and dz_out ()
  79. *
  80. * These routines are used to access the registers of the DZ
  81. * chip, hiding relocation differences between implementation.
  82. * ------------------------------------------------------------
  83. */
  84. static u16 dz_in(struct dz_port *dport, unsigned offset)
  85. {
  86. void __iomem *addr = dport->port.membase + offset;
  87. return readw(addr);
  88. }
  89. static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
  90. {
  91. void __iomem *addr = dport->port.membase + offset;
  92. writew(value, addr);
  93. }
  94. /*
  95. * ------------------------------------------------------------
  96. * rs_stop () and rs_start ()
  97. *
  98. * These routines are called before setting or resetting
  99. * tty->flow.stopped. They enable or disable transmitter interrupts,
  100. * as necessary.
  101. * ------------------------------------------------------------
  102. */
  103. static void dz_stop_tx(struct uart_port *uport)
  104. {
  105. struct dz_port *dport = to_dport(uport);
  106. u16 tmp, mask = 1 << dport->port.line;
  107. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  108. tmp &= ~mask; /* clear the TX flag */
  109. dz_out(dport, DZ_TCR, tmp);
  110. }
  111. static void dz_start_tx(struct uart_port *uport)
  112. {
  113. struct dz_port *dport = to_dport(uport);
  114. u16 tmp, mask = 1 << dport->port.line;
  115. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  116. tmp |= mask; /* set the TX flag */
  117. dz_out(dport, DZ_TCR, tmp);
  118. }
  119. static void dz_stop_rx(struct uart_port *uport)
  120. {
  121. struct dz_port *dport = to_dport(uport);
  122. dport->cflag &= ~DZ_RXENAB;
  123. dz_out(dport, DZ_LPR, dport->cflag);
  124. }
  125. /*
  126. * ------------------------------------------------------------
  127. *
  128. * Here start the interrupt handling routines. All of the following
  129. * subroutines are declared as inline and are folded into
  130. * dz_interrupt. They were separated out for readability's sake.
  131. *
  132. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  133. * runs with interrupts turned off. People who may want to modify
  134. * dz_interrupt() should try to keep the interrupt handler as fast as
  135. * possible. After you are done making modifications, it is not a bad
  136. * idea to do:
  137. *
  138. * make drivers/serial/dz.s
  139. *
  140. * and look at the resulting assemble code in dz.s.
  141. *
  142. * ------------------------------------------------------------
  143. */
  144. /*
  145. * ------------------------------------------------------------
  146. * receive_char ()
  147. *
  148. * This routine deals with inputs from any lines.
  149. * ------------------------------------------------------------
  150. */
  151. static inline void dz_receive_chars(struct dz_mux *mux)
  152. {
  153. struct uart_port *uport;
  154. struct dz_port *dport = &mux->dport[0];
  155. struct uart_icount *icount;
  156. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  157. u16 status;
  158. u8 ch, flag;
  159. int i;
  160. while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
  161. dport = &mux->dport[LINE(status)];
  162. uport = &dport->port;
  163. ch = UCHAR(status); /* grab the char */
  164. flag = TTY_NORMAL;
  165. icount = &uport->icount;
  166. icount->rx++;
  167. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  168. /*
  169. * There is no separate BREAK status bit, so treat
  170. * null characters with framing errors as BREAKs;
  171. * normally, otherwise. For this move the Framing
  172. * Error bit to a simulated BREAK bit.
  173. */
  174. if (!ch) {
  175. status |= (status & DZ_FERR) >>
  176. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  177. status &= ~DZ_FERR;
  178. }
  179. /* Handle SysRq/SAK & keep track of the statistics. */
  180. if (status & DZ_BREAK) {
  181. icount->brk++;
  182. if (uart_handle_break(uport))
  183. continue;
  184. } else if (status & DZ_FERR)
  185. icount->frame++;
  186. else if (status & DZ_PERR)
  187. icount->parity++;
  188. if (status & DZ_OERR)
  189. icount->overrun++;
  190. status &= uport->read_status_mask;
  191. if (status & DZ_BREAK)
  192. flag = TTY_BREAK;
  193. else if (status & DZ_FERR)
  194. flag = TTY_FRAME;
  195. else if (status & DZ_PERR)
  196. flag = TTY_PARITY;
  197. }
  198. if (uart_handle_sysrq_char(uport, ch))
  199. continue;
  200. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  201. lines_rx[LINE(status)] = 1;
  202. }
  203. for (i = 0; i < DZ_NB_PORT; i++)
  204. if (lines_rx[i])
  205. tty_flip_buffer_push(&mux->dport[i].port.state->port);
  206. }
  207. /*
  208. * ------------------------------------------------------------
  209. * transmit_char ()
  210. *
  211. * This routine deals with outputs to any lines.
  212. * ------------------------------------------------------------
  213. */
  214. static inline void dz_transmit_chars(struct dz_mux *mux)
  215. {
  216. struct dz_port *dport = &mux->dport[0];
  217. struct tty_port *tport;
  218. unsigned char tmp;
  219. u16 status;
  220. status = dz_in(dport, DZ_CSR);
  221. dport = &mux->dport[LINE(status)];
  222. tport = &dport->port.state->port;
  223. if (dport->port.x_char) { /* XON/XOFF chars */
  224. dz_out(dport, DZ_TDR, dport->port.x_char);
  225. dport->port.icount.tx++;
  226. dport->port.x_char = 0;
  227. return;
  228. }
  229. /* If nothing to do or stopped or hardware stopped. */
  230. if (uart_tx_stopped(&dport->port) ||
  231. !uart_fifo_get(&dport->port, &tmp)) {
  232. uart_port_lock(&dport->port);
  233. dz_stop_tx(&dport->port);
  234. uart_port_unlock(&dport->port);
  235. return;
  236. }
  237. /*
  238. * If something to do... (remember the dz has no output fifo,
  239. * so we go one char at a time) :-<
  240. */
  241. dz_out(dport, DZ_TDR, tmp);
  242. if (kfifo_len(&tport->xmit_fifo) < DZ_WAKEUP_CHARS)
  243. uart_write_wakeup(&dport->port);
  244. /* Are we are done. */
  245. if (kfifo_is_empty(&tport->xmit_fifo)) {
  246. uart_port_lock(&dport->port);
  247. dz_stop_tx(&dport->port);
  248. uart_port_unlock(&dport->port);
  249. }
  250. }
  251. /*
  252. * ------------------------------------------------------------
  253. * check_modem_status()
  254. *
  255. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  256. * DS 5000/200: Valid for the MODEM and PRINTER line.
  257. * ------------------------------------------------------------
  258. */
  259. static inline void check_modem_status(struct dz_port *dport)
  260. {
  261. /*
  262. * FIXME:
  263. * 1. No status change interrupt; use a timer.
  264. * 2. Handle the 3100/5000 as appropriate. --macro
  265. */
  266. u16 status;
  267. /* If not the modem line just return. */
  268. if (dport->port.line != DZ_MODEM)
  269. return;
  270. status = dz_in(dport, DZ_MSR);
  271. /* it's easy, since DSR2 is the only bit in the register */
  272. if (status)
  273. dport->port.icount.dsr++;
  274. }
  275. /*
  276. * ------------------------------------------------------------
  277. * dz_interrupt ()
  278. *
  279. * this is the main interrupt routine for the DZ chip.
  280. * It deals with the multiple ports.
  281. * ------------------------------------------------------------
  282. */
  283. static irqreturn_t dz_interrupt(int irq, void *dev_id)
  284. {
  285. struct dz_mux *mux = dev_id;
  286. struct dz_port *dport = &mux->dport[0];
  287. u16 status;
  288. /* get the reason why we just got an irq */
  289. status = dz_in(dport, DZ_CSR);
  290. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  291. dz_receive_chars(mux);
  292. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  293. dz_transmit_chars(mux);
  294. return IRQ_HANDLED;
  295. }
  296. /*
  297. * -------------------------------------------------------------------
  298. * Here ends the DZ interrupt routines.
  299. * -------------------------------------------------------------------
  300. */
  301. static unsigned int dz_get_mctrl(struct uart_port *uport)
  302. {
  303. /*
  304. * FIXME: Handle the 3100/5000 as appropriate. --macro
  305. */
  306. struct dz_port *dport = to_dport(uport);
  307. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  308. if (dport->port.line == DZ_MODEM) {
  309. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  310. mctrl &= ~TIOCM_DSR;
  311. }
  312. return mctrl;
  313. }
  314. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  315. {
  316. /*
  317. * FIXME: Handle the 3100/5000 as appropriate. --macro
  318. */
  319. struct dz_port *dport = to_dport(uport);
  320. u16 tmp;
  321. if (dport->port.line == DZ_MODEM) {
  322. tmp = dz_in(dport, DZ_TCR);
  323. if (mctrl & TIOCM_DTR)
  324. tmp &= ~DZ_MODEM_DTR;
  325. else
  326. tmp |= DZ_MODEM_DTR;
  327. dz_out(dport, DZ_TCR, tmp);
  328. }
  329. }
  330. /*
  331. * -------------------------------------------------------------------
  332. * startup ()
  333. *
  334. * various initialization tasks
  335. * -------------------------------------------------------------------
  336. */
  337. static int dz_startup(struct uart_port *uport)
  338. {
  339. struct dz_port *dport = to_dport(uport);
  340. struct dz_mux *mux = dport->mux;
  341. unsigned long flags;
  342. int irq_guard;
  343. int ret;
  344. u16 tmp;
  345. irq_guard = atomic_add_return(1, &mux->irq_guard);
  346. if (irq_guard != 1)
  347. return 0;
  348. ret = request_irq(dport->port.irq, dz_interrupt,
  349. IRQF_SHARED, "dz", mux);
  350. if (ret) {
  351. atomic_add(-1, &mux->irq_guard);
  352. printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
  353. return ret;
  354. }
  355. uart_port_lock_irqsave(&dport->port, &flags);
  356. /* Enable interrupts. */
  357. tmp = dz_in(dport, DZ_CSR);
  358. tmp |= DZ_RIE | DZ_TIE;
  359. dz_out(dport, DZ_CSR, tmp);
  360. uart_port_unlock_irqrestore(&dport->port, flags);
  361. return 0;
  362. }
  363. /*
  364. * -------------------------------------------------------------------
  365. * shutdown ()
  366. *
  367. * This routine will shutdown a serial port; interrupts are disabled, and
  368. * DTR is dropped if the hangup on close termio flag is on.
  369. * -------------------------------------------------------------------
  370. */
  371. static void dz_shutdown(struct uart_port *uport)
  372. {
  373. struct dz_port *dport = to_dport(uport);
  374. struct dz_mux *mux = dport->mux;
  375. unsigned long flags;
  376. int irq_guard;
  377. u16 tmp;
  378. uart_port_lock_irqsave(&dport->port, &flags);
  379. dz_stop_tx(&dport->port);
  380. uart_port_unlock_irqrestore(&dport->port, flags);
  381. irq_guard = atomic_add_return(-1, &mux->irq_guard);
  382. if (!irq_guard) {
  383. /* Disable interrupts. */
  384. tmp = dz_in(dport, DZ_CSR);
  385. tmp &= ~(DZ_RIE | DZ_TIE);
  386. dz_out(dport, DZ_CSR, tmp);
  387. free_irq(dport->port.irq, mux);
  388. }
  389. }
  390. /*
  391. * -------------------------------------------------------------------
  392. * dz_tx_empty() -- get the transmitter empty status
  393. *
  394. * Purpose: Let user call ioctl() to get info when the UART physically
  395. * is emptied. On bus types like RS485, the transmitter must
  396. * release the bus after transmitting. This must be done when
  397. * the transmit shift register is empty, not be done when the
  398. * transmit holding register is empty. This functionality
  399. * allows an RS485 driver to be written in user space.
  400. * -------------------------------------------------------------------
  401. */
  402. static unsigned int dz_tx_empty(struct uart_port *uport)
  403. {
  404. struct dz_port *dport = to_dport(uport);
  405. unsigned short tmp, mask = 1 << dport->port.line;
  406. tmp = dz_in(dport, DZ_TCR);
  407. tmp &= mask;
  408. return tmp ? 0 : TIOCSER_TEMT;
  409. }
  410. static void dz_break_ctl(struct uart_port *uport, int break_state)
  411. {
  412. /*
  413. * FIXME: Can't access BREAK bits in TDR easily;
  414. * reuse the code for polled TX. --macro
  415. */
  416. struct dz_port *dport = to_dport(uport);
  417. unsigned long flags;
  418. unsigned short tmp, mask = 1 << dport->port.line;
  419. uart_port_lock_irqsave(uport, &flags);
  420. tmp = dz_in(dport, DZ_TCR);
  421. if (break_state)
  422. tmp |= mask;
  423. else
  424. tmp &= ~mask;
  425. dz_out(dport, DZ_TCR, tmp);
  426. uart_port_unlock_irqrestore(uport, flags);
  427. }
  428. static int dz_encode_baud_rate(unsigned int baud)
  429. {
  430. switch (baud) {
  431. case 50:
  432. return DZ_B50;
  433. case 75:
  434. return DZ_B75;
  435. case 110:
  436. return DZ_B110;
  437. case 134:
  438. return DZ_B134;
  439. case 150:
  440. return DZ_B150;
  441. case 300:
  442. return DZ_B300;
  443. case 600:
  444. return DZ_B600;
  445. case 1200:
  446. return DZ_B1200;
  447. case 1800:
  448. return DZ_B1800;
  449. case 2000:
  450. return DZ_B2000;
  451. case 2400:
  452. return DZ_B2400;
  453. case 3600:
  454. return DZ_B3600;
  455. case 4800:
  456. return DZ_B4800;
  457. case 7200:
  458. return DZ_B7200;
  459. case 9600:
  460. return DZ_B9600;
  461. default:
  462. return -1;
  463. }
  464. }
  465. static void dz_reset(struct dz_port *dport)
  466. {
  467. struct dz_mux *mux = dport->mux;
  468. if (mux->initialised)
  469. return;
  470. dz_out(dport, DZ_CSR, DZ_CLR);
  471. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  472. iob();
  473. /* Enable scanning. */
  474. dz_out(dport, DZ_CSR, DZ_MSE);
  475. mux->initialised = 1;
  476. }
  477. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  478. const struct ktermios *old_termios)
  479. {
  480. struct dz_port *dport = to_dport(uport);
  481. unsigned long flags;
  482. unsigned int cflag, baud;
  483. int bflag;
  484. cflag = dport->port.line;
  485. switch (termios->c_cflag & CSIZE) {
  486. case CS5:
  487. cflag |= DZ_CS5;
  488. break;
  489. case CS6:
  490. cflag |= DZ_CS6;
  491. break;
  492. case CS7:
  493. cflag |= DZ_CS7;
  494. break;
  495. case CS8:
  496. default:
  497. cflag |= DZ_CS8;
  498. }
  499. if (termios->c_cflag & CSTOPB)
  500. cflag |= DZ_CSTOPB;
  501. if (termios->c_cflag & PARENB)
  502. cflag |= DZ_PARENB;
  503. if (termios->c_cflag & PARODD)
  504. cflag |= DZ_PARODD;
  505. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  506. bflag = dz_encode_baud_rate(baud);
  507. if (bflag < 0) {
  508. if (old_termios) {
  509. /* Keep unchanged. */
  510. baud = tty_termios_baud_rate(old_termios);
  511. bflag = dz_encode_baud_rate(baud);
  512. }
  513. if (bflag < 0) { /* Resort to 9600. */
  514. baud = 9600;
  515. bflag = DZ_B9600;
  516. }
  517. tty_termios_encode_baud_rate(termios, baud, baud);
  518. }
  519. cflag |= bflag;
  520. if (termios->c_cflag & CREAD)
  521. cflag |= DZ_RXENAB;
  522. uart_port_lock_irqsave(&dport->port, &flags);
  523. uart_update_timeout(uport, termios->c_cflag, baud);
  524. dz_out(dport, DZ_LPR, cflag);
  525. dport->cflag = cflag;
  526. /* setup accept flag */
  527. dport->port.read_status_mask = DZ_OERR;
  528. if (termios->c_iflag & INPCK)
  529. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  530. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  531. dport->port.read_status_mask |= DZ_BREAK;
  532. /* characters to ignore */
  533. uport->ignore_status_mask = 0;
  534. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  535. dport->port.ignore_status_mask |= DZ_OERR;
  536. if (termios->c_iflag & IGNPAR)
  537. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  538. if (termios->c_iflag & IGNBRK)
  539. dport->port.ignore_status_mask |= DZ_BREAK;
  540. uart_port_unlock_irqrestore(&dport->port, flags);
  541. }
  542. /*
  543. * Hack alert!
  544. * Required solely so that the initial PROM-based console
  545. * works undisturbed in parallel with this one.
  546. */
  547. static void dz_pm(struct uart_port *uport, unsigned int state,
  548. unsigned int oldstate)
  549. {
  550. struct dz_port *dport = to_dport(uport);
  551. unsigned long flags;
  552. uart_port_lock_irqsave(&dport->port, &flags);
  553. if (state < 3)
  554. dz_start_tx(&dport->port);
  555. else
  556. dz_stop_tx(&dport->port);
  557. uart_port_unlock_irqrestore(&dport->port, flags);
  558. }
  559. static const char *dz_type(struct uart_port *uport)
  560. {
  561. return "DZ";
  562. }
  563. static void dz_release_port(struct uart_port *uport)
  564. {
  565. struct dz_mux *mux = to_dport(uport)->mux;
  566. int map_guard;
  567. iounmap(uport->membase);
  568. uport->membase = NULL;
  569. map_guard = atomic_add_return(-1, &mux->map_guard);
  570. if (!map_guard)
  571. release_mem_region(uport->mapbase, dec_kn_slot_size);
  572. }
  573. static int dz_map_port(struct uart_port *uport)
  574. {
  575. if (!uport->membase)
  576. uport->membase = ioremap(uport->mapbase,
  577. dec_kn_slot_size);
  578. if (!uport->membase) {
  579. printk(KERN_ERR "dz: Cannot map MMIO\n");
  580. return -ENOMEM;
  581. }
  582. return 0;
  583. }
  584. static int dz_request_port(struct uart_port *uport)
  585. {
  586. struct dz_mux *mux = to_dport(uport)->mux;
  587. int map_guard;
  588. int ret;
  589. map_guard = atomic_add_return(1, &mux->map_guard);
  590. if (map_guard == 1) {
  591. if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
  592. "dz")) {
  593. atomic_add(-1, &mux->map_guard);
  594. printk(KERN_ERR
  595. "dz: Unable to reserve MMIO resource\n");
  596. return -EBUSY;
  597. }
  598. }
  599. ret = dz_map_port(uport);
  600. if (ret) {
  601. map_guard = atomic_add_return(-1, &mux->map_guard);
  602. if (!map_guard)
  603. release_mem_region(uport->mapbase, dec_kn_slot_size);
  604. return ret;
  605. }
  606. return 0;
  607. }
  608. static void dz_config_port(struct uart_port *uport, int flags)
  609. {
  610. struct dz_port *dport = to_dport(uport);
  611. if (flags & UART_CONFIG_TYPE) {
  612. if (dz_request_port(uport))
  613. return;
  614. uport->type = PORT_DZ;
  615. dz_reset(dport);
  616. }
  617. }
  618. /*
  619. * Verify the new serial_struct (for TIOCSSERIAL).
  620. */
  621. static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
  622. {
  623. int ret = 0;
  624. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  625. ret = -EINVAL;
  626. if (ser->irq != uport->irq)
  627. ret = -EINVAL;
  628. return ret;
  629. }
  630. static const struct uart_ops dz_ops = {
  631. .tx_empty = dz_tx_empty,
  632. .get_mctrl = dz_get_mctrl,
  633. .set_mctrl = dz_set_mctrl,
  634. .stop_tx = dz_stop_tx,
  635. .start_tx = dz_start_tx,
  636. .stop_rx = dz_stop_rx,
  637. .break_ctl = dz_break_ctl,
  638. .startup = dz_startup,
  639. .shutdown = dz_shutdown,
  640. .set_termios = dz_set_termios,
  641. .pm = dz_pm,
  642. .type = dz_type,
  643. .release_port = dz_release_port,
  644. .request_port = dz_request_port,
  645. .config_port = dz_config_port,
  646. .verify_port = dz_verify_port,
  647. };
  648. static void __init dz_init_ports(void)
  649. {
  650. static int first = 1;
  651. unsigned long base;
  652. int line;
  653. if (!first)
  654. return;
  655. first = 0;
  656. if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
  657. base = dec_kn_slot_base + KN01_DZ11;
  658. else
  659. base = dec_kn_slot_base + KN02_DZ11;
  660. for (line = 0; line < DZ_NB_PORT; line++) {
  661. struct dz_port *dport = &dz_mux.dport[line];
  662. struct uart_port *uport = &dport->port;
  663. dport->mux = &dz_mux;
  664. uport->irq = dec_interrupt[DEC_IRQ_DZ11];
  665. uport->fifosize = 1;
  666. uport->iotype = UPIO_MEM;
  667. uport->flags = UPF_BOOT_AUTOCONF;
  668. uport->ops = &dz_ops;
  669. uport->line = line;
  670. uport->mapbase = base;
  671. uport->has_sysrq = IS_ENABLED(CONFIG_SERIAL_DZ_CONSOLE);
  672. }
  673. }
  674. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  675. /*
  676. * -------------------------------------------------------------------
  677. * dz_console_putchar() -- transmit a character
  678. *
  679. * Polled transmission. This is tricky. We need to mask transmit
  680. * interrupts so that they do not interfere, enable the transmitter
  681. * for the line requested and then wait till the transmit scanner
  682. * requests data for this line. But it may request data for another
  683. * line first, in which case we have to disable its transmitter and
  684. * repeat waiting till our line pops up. Only then the character may
  685. * be transmitted. Finally, the state of the transmitter mask is
  686. * restored. Welcome to the world of PDP-11!
  687. * -------------------------------------------------------------------
  688. */
  689. static void dz_console_putchar(struct uart_port *uport, unsigned char ch)
  690. {
  691. struct dz_port *dport = to_dport(uport);
  692. unsigned long flags;
  693. unsigned short csr, tcr, trdy, mask;
  694. int loops = 10000;
  695. uart_port_lock_irqsave(&dport->port, &flags);
  696. csr = dz_in(dport, DZ_CSR);
  697. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  698. tcr = dz_in(dport, DZ_TCR);
  699. tcr |= 1 << dport->port.line;
  700. mask = tcr;
  701. dz_out(dport, DZ_TCR, mask);
  702. iob();
  703. uart_port_unlock_irqrestore(&dport->port, flags);
  704. do {
  705. trdy = dz_in(dport, DZ_CSR);
  706. if (!(trdy & DZ_TRDY))
  707. continue;
  708. trdy = (trdy & DZ_TLINE) >> 8;
  709. if (trdy == dport->port.line)
  710. break;
  711. mask &= ~(1 << trdy);
  712. dz_out(dport, DZ_TCR, mask);
  713. iob();
  714. udelay(2);
  715. } while (--loops);
  716. if (loops) /* Cannot send otherwise. */
  717. dz_out(dport, DZ_TDR, ch);
  718. dz_out(dport, DZ_TCR, tcr);
  719. dz_out(dport, DZ_CSR, csr);
  720. }
  721. /*
  722. * -------------------------------------------------------------------
  723. * dz_console_print ()
  724. *
  725. * dz_console_print is registered for printk.
  726. * The console must be locked when we get here.
  727. * -------------------------------------------------------------------
  728. */
  729. static void dz_console_print(struct console *co,
  730. const char *str,
  731. unsigned int count)
  732. {
  733. struct dz_port *dport = &dz_mux.dport[co->index];
  734. #ifdef DEBUG_DZ
  735. prom_printf((char *) str);
  736. #endif
  737. uart_console_write(&dport->port, str, count, dz_console_putchar);
  738. }
  739. static int __init dz_console_setup(struct console *co, char *options)
  740. {
  741. struct dz_port *dport = &dz_mux.dport[co->index];
  742. struct uart_port *uport = &dport->port;
  743. int baud = 9600;
  744. int bits = 8;
  745. int parity = 'n';
  746. int flow = 'n';
  747. int ret;
  748. ret = dz_map_port(uport);
  749. if (ret)
  750. return ret;
  751. spin_lock_init(&dport->port.lock); /* For dz_pm(). */
  752. dz_reset(dport);
  753. dz_pm(uport, 0, -1);
  754. if (options)
  755. uart_parse_options(options, &baud, &parity, &bits, &flow);
  756. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  757. }
  758. static struct uart_driver dz_reg;
  759. static struct console dz_console = {
  760. .name = "ttyS",
  761. .write = dz_console_print,
  762. .device = uart_console_device,
  763. .setup = dz_console_setup,
  764. .flags = CON_PRINTBUFFER,
  765. .index = -1,
  766. .data = &dz_reg,
  767. };
  768. static int __init dz_serial_console_init(void)
  769. {
  770. if (!IOASIC) {
  771. dz_init_ports();
  772. register_console(&dz_console);
  773. return 0;
  774. } else
  775. return -ENXIO;
  776. }
  777. console_initcall(dz_serial_console_init);
  778. #define SERIAL_DZ_CONSOLE &dz_console
  779. #else
  780. #define SERIAL_DZ_CONSOLE NULL
  781. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  782. static struct uart_driver dz_reg = {
  783. .owner = THIS_MODULE,
  784. .driver_name = "serial",
  785. .dev_name = "ttyS",
  786. .major = TTY_MAJOR,
  787. .minor = 64,
  788. .nr = DZ_NB_PORT,
  789. .cons = SERIAL_DZ_CONSOLE,
  790. };
  791. static int __init dz_init(void)
  792. {
  793. int ret, i;
  794. if (IOASIC)
  795. return -ENXIO;
  796. printk("%s%s\n", dz_name, dz_version);
  797. dz_init_ports();
  798. ret = uart_register_driver(&dz_reg);
  799. if (ret)
  800. return ret;
  801. for (i = 0; i < DZ_NB_PORT; i++)
  802. uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
  803. return 0;
  804. }
  805. module_init(dz_init);