altera_uart.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * altera_uart.c -- Altera UART driver
  4. *
  5. * Based on mcf.c -- Freescale ColdFire UART driver
  6. *
  7. * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
  8. * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
  9. * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/timer.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/module.h>
  16. #include <linux/console.h>
  17. #include <linux/tty.h>
  18. #include <linux/tty_flip.h>
  19. #include <linux/serial.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/of.h>
  23. #include <linux/io.h>
  24. #include <linux/altera_uart.h>
  25. #define SERIAL_ALTERA_MAJOR 204
  26. #define SERIAL_ALTERA_MINOR 213
  27. /*
  28. * Altera UART register definitions according to the Nios UART datasheet:
  29. * http://www.altera.com/literature/ds/ds_nios_uart.pdf
  30. */
  31. #define ALTERA_UART_SIZE 32
  32. #define ALTERA_UART_RXDATA_REG 0
  33. #define ALTERA_UART_TXDATA_REG 4
  34. #define ALTERA_UART_STATUS_REG 8
  35. #define ALTERA_UART_CONTROL_REG 12
  36. #define ALTERA_UART_DIVISOR_REG 16
  37. #define ALTERA_UART_EOP_REG 20
  38. #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
  39. #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
  40. #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
  41. #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
  42. #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
  43. #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
  44. #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
  45. #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
  46. #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
  47. #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
  48. #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
  49. #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
  50. /* Enable interrupt on... */
  51. #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
  52. #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
  53. #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
  54. #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
  55. #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
  56. #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
  57. #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
  58. #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
  59. #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
  60. #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
  61. #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
  62. #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
  63. #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
  64. /*
  65. * Local per-uart structure.
  66. */
  67. struct altera_uart {
  68. struct uart_port port;
  69. struct timer_list tmr;
  70. unsigned int sigs; /* Local copy of line sigs */
  71. unsigned short imr; /* Local IMR mirror */
  72. };
  73. static u32 altera_uart_readl(struct uart_port *port, int reg)
  74. {
  75. return readl(port->membase + (reg << port->regshift));
  76. }
  77. static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
  78. {
  79. writel(dat, port->membase + (reg << port->regshift));
  80. }
  81. static unsigned int altera_uart_tx_empty(struct uart_port *port)
  82. {
  83. return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  84. ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
  85. }
  86. static unsigned int altera_uart_get_mctrl(struct uart_port *port)
  87. {
  88. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  89. unsigned int sigs;
  90. sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  91. ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
  92. sigs |= (pp->sigs & TIOCM_RTS);
  93. return sigs;
  94. }
  95. static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
  96. {
  97. unsigned short imr = pp->imr;
  98. /*
  99. * If the device doesn't have an irq, ensure that the irq bits are
  100. * masked out to keep the irq line inactive.
  101. */
  102. if (!pp->port.irq)
  103. imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
  104. altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
  105. }
  106. static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
  107. {
  108. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  109. pp->sigs = sigs;
  110. if (sigs & TIOCM_RTS)
  111. pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
  112. else
  113. pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
  114. altera_uart_update_ctrl_reg(pp);
  115. }
  116. static void altera_uart_start_tx(struct uart_port *port)
  117. {
  118. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  119. pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
  120. altera_uart_update_ctrl_reg(pp);
  121. }
  122. static void altera_uart_stop_tx(struct uart_port *port)
  123. {
  124. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  125. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  126. altera_uart_update_ctrl_reg(pp);
  127. }
  128. static void altera_uart_stop_rx(struct uart_port *port)
  129. {
  130. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  131. pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
  132. altera_uart_update_ctrl_reg(pp);
  133. }
  134. static void altera_uart_break_ctl(struct uart_port *port, int break_state)
  135. {
  136. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  137. unsigned long flags;
  138. uart_port_lock_irqsave(port, &flags);
  139. if (break_state == -1)
  140. pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
  141. else
  142. pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
  143. altera_uart_update_ctrl_reg(pp);
  144. uart_port_unlock_irqrestore(port, flags);
  145. }
  146. static void altera_uart_set_termios(struct uart_port *port,
  147. struct ktermios *termios,
  148. const struct ktermios *old)
  149. {
  150. unsigned long flags;
  151. unsigned int baud, baudclk;
  152. baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
  153. baudclk = port->uartclk / baud;
  154. if (old)
  155. tty_termios_copy_hw(termios, old);
  156. tty_termios_encode_baud_rate(termios, baud, baud);
  157. uart_port_lock_irqsave(port, &flags);
  158. uart_update_timeout(port, termios->c_cflag, baud);
  159. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  160. uart_port_unlock_irqrestore(port, flags);
  161. /*
  162. * FIXME: port->read_status_mask and port->ignore_status_mask
  163. * need to be initialized based on termios settings for
  164. * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
  165. */
  166. }
  167. static void altera_uart_rx_chars(struct uart_port *port)
  168. {
  169. unsigned short status;
  170. u8 ch, flag;
  171. while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
  172. ALTERA_UART_STATUS_RRDY_MSK) {
  173. ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  174. flag = TTY_NORMAL;
  175. port->icount.rx++;
  176. if (status & ALTERA_UART_STATUS_E_MSK) {
  177. altera_uart_writel(port, status,
  178. ALTERA_UART_STATUS_REG);
  179. if (status & ALTERA_UART_STATUS_BRK_MSK) {
  180. port->icount.brk++;
  181. if (uart_handle_break(port))
  182. continue;
  183. } else if (status & ALTERA_UART_STATUS_PE_MSK) {
  184. port->icount.parity++;
  185. } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
  186. port->icount.overrun++;
  187. } else if (status & ALTERA_UART_STATUS_FE_MSK) {
  188. port->icount.frame++;
  189. }
  190. status &= port->read_status_mask;
  191. if (status & ALTERA_UART_STATUS_BRK_MSK)
  192. flag = TTY_BREAK;
  193. else if (status & ALTERA_UART_STATUS_PE_MSK)
  194. flag = TTY_PARITY;
  195. else if (status & ALTERA_UART_STATUS_FE_MSK)
  196. flag = TTY_FRAME;
  197. }
  198. if (uart_handle_sysrq_char(port, ch))
  199. continue;
  200. uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
  201. flag);
  202. }
  203. tty_flip_buffer_push(&port->state->port);
  204. }
  205. static void altera_uart_tx_chars(struct uart_port *port)
  206. {
  207. u8 ch;
  208. uart_port_tx(port, ch,
  209. altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  210. ALTERA_UART_STATUS_TRDY_MSK,
  211. altera_uart_writel(port, ch, ALTERA_UART_TXDATA_REG));
  212. }
  213. static irqreturn_t altera_uart_interrupt(int irq, void *data)
  214. {
  215. struct uart_port *port = data;
  216. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  217. unsigned long flags;
  218. unsigned int isr;
  219. isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
  220. uart_port_lock_irqsave(port, &flags);
  221. if (isr & ALTERA_UART_STATUS_RRDY_MSK)
  222. altera_uart_rx_chars(port);
  223. if (isr & ALTERA_UART_STATUS_TRDY_MSK)
  224. altera_uart_tx_chars(port);
  225. uart_port_unlock_irqrestore(port, flags);
  226. return IRQ_RETVAL(isr);
  227. }
  228. static void altera_uart_timer(struct timer_list *t)
  229. {
  230. struct altera_uart *pp = timer_container_of(pp, t, tmr);
  231. struct uart_port *port = &pp->port;
  232. altera_uart_interrupt(0, port);
  233. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  234. }
  235. static void altera_uart_config_port(struct uart_port *port, int flags)
  236. {
  237. port->type = PORT_ALTERA_UART;
  238. /* Clear mask, so no surprise interrupts. */
  239. altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
  240. /* Clear status register */
  241. altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
  242. }
  243. static int altera_uart_startup(struct uart_port *port)
  244. {
  245. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  246. unsigned long flags;
  247. if (!port->irq) {
  248. timer_setup(&pp->tmr, altera_uart_timer, 0);
  249. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  250. } else {
  251. int ret;
  252. ret = request_irq(port->irq, altera_uart_interrupt, 0,
  253. dev_name(port->dev), port);
  254. if (ret) {
  255. dev_err(port->dev, "unable to attach Altera UART %d interrupt vector=%d\n",
  256. port->line, port->irq);
  257. return ret;
  258. }
  259. }
  260. uart_port_lock_irqsave(port, &flags);
  261. /* Enable RX interrupts now */
  262. pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
  263. altera_uart_update_ctrl_reg(pp);
  264. uart_port_unlock_irqrestore(port, flags);
  265. return 0;
  266. }
  267. static void altera_uart_shutdown(struct uart_port *port)
  268. {
  269. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  270. unsigned long flags;
  271. uart_port_lock_irqsave(port, &flags);
  272. /* Disable all interrupts now */
  273. pp->imr = 0;
  274. altera_uart_update_ctrl_reg(pp);
  275. uart_port_unlock_irqrestore(port, flags);
  276. if (port->irq)
  277. free_irq(port->irq, port);
  278. else
  279. timer_delete_sync(&pp->tmr);
  280. }
  281. static const char *altera_uart_type(struct uart_port *port)
  282. {
  283. return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
  284. }
  285. static int altera_uart_request_port(struct uart_port *port)
  286. {
  287. /* UARTs always present */
  288. return 0;
  289. }
  290. static void altera_uart_release_port(struct uart_port *port)
  291. {
  292. /* Nothing to release... */
  293. }
  294. static int altera_uart_verify_port(struct uart_port *port,
  295. struct serial_struct *ser)
  296. {
  297. if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
  298. return -EINVAL;
  299. return 0;
  300. }
  301. #ifdef CONFIG_CONSOLE_POLL
  302. static int altera_uart_poll_get_char(struct uart_port *port)
  303. {
  304. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  305. ALTERA_UART_STATUS_RRDY_MSK))
  306. cpu_relax();
  307. return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  308. }
  309. static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
  310. {
  311. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  312. ALTERA_UART_STATUS_TRDY_MSK))
  313. cpu_relax();
  314. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  315. }
  316. #endif
  317. /*
  318. * Define the basic serial functions we support.
  319. */
  320. static const struct uart_ops altera_uart_ops = {
  321. .tx_empty = altera_uart_tx_empty,
  322. .get_mctrl = altera_uart_get_mctrl,
  323. .set_mctrl = altera_uart_set_mctrl,
  324. .start_tx = altera_uart_start_tx,
  325. .stop_tx = altera_uart_stop_tx,
  326. .stop_rx = altera_uart_stop_rx,
  327. .break_ctl = altera_uart_break_ctl,
  328. .startup = altera_uart_startup,
  329. .shutdown = altera_uart_shutdown,
  330. .set_termios = altera_uart_set_termios,
  331. .type = altera_uart_type,
  332. .request_port = altera_uart_request_port,
  333. .release_port = altera_uart_release_port,
  334. .config_port = altera_uart_config_port,
  335. .verify_port = altera_uart_verify_port,
  336. #ifdef CONFIG_CONSOLE_POLL
  337. .poll_get_char = altera_uart_poll_get_char,
  338. .poll_put_char = altera_uart_poll_put_char,
  339. #endif
  340. };
  341. static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
  342. #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
  343. static void altera_uart_console_putc(struct uart_port *port, unsigned char c)
  344. {
  345. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  346. ALTERA_UART_STATUS_TRDY_MSK))
  347. cpu_relax();
  348. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  349. }
  350. static void altera_uart_console_write(struct console *co, const char *s,
  351. unsigned int count)
  352. {
  353. struct uart_port *port = &(altera_uart_ports + co->index)->port;
  354. uart_console_write(port, s, count, altera_uart_console_putc);
  355. }
  356. static int __init altera_uart_console_setup(struct console *co, char *options)
  357. {
  358. struct uart_port *port;
  359. int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
  360. int bits = 8;
  361. int parity = 'n';
  362. int flow = 'n';
  363. if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  364. return -EINVAL;
  365. port = &altera_uart_ports[co->index].port;
  366. if (!port->membase)
  367. return -ENODEV;
  368. if (options)
  369. uart_parse_options(options, &baud, &parity, &bits, &flow);
  370. return uart_set_options(port, co, baud, parity, bits, flow);
  371. }
  372. static struct uart_driver altera_uart_driver;
  373. static struct console altera_uart_console = {
  374. .name = "ttyAL",
  375. .write = altera_uart_console_write,
  376. .device = uart_console_device,
  377. .setup = altera_uart_console_setup,
  378. .flags = CON_PRINTBUFFER,
  379. .index = -1,
  380. .data = &altera_uart_driver,
  381. };
  382. static int __init altera_uart_console_init(void)
  383. {
  384. register_console(&altera_uart_console);
  385. return 0;
  386. }
  387. console_initcall(altera_uart_console_init);
  388. #define ALTERA_UART_CONSOLE (&altera_uart_console)
  389. static void altera_uart_earlycon_write(struct console *co, const char *s,
  390. unsigned int count)
  391. {
  392. struct earlycon_device *dev = co->data;
  393. uart_console_write(&dev->port, s, count, altera_uart_console_putc);
  394. }
  395. static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
  396. const char *options)
  397. {
  398. struct uart_port *port = &dev->port;
  399. if (!port->membase)
  400. return -ENODEV;
  401. /* Enable RX interrupts now */
  402. altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
  403. ALTERA_UART_CONTROL_REG);
  404. if (dev->baud) {
  405. unsigned int baudclk = port->uartclk / dev->baud;
  406. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  407. }
  408. dev->con->write = altera_uart_earlycon_write;
  409. return 0;
  410. }
  411. OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
  412. #else
  413. #define ALTERA_UART_CONSOLE NULL
  414. #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
  415. /*
  416. * Define the altera_uart UART driver structure.
  417. */
  418. static struct uart_driver altera_uart_driver = {
  419. .owner = THIS_MODULE,
  420. .driver_name = KBUILD_MODNAME,
  421. .dev_name = "ttyAL",
  422. .major = SERIAL_ALTERA_MAJOR,
  423. .minor = SERIAL_ALTERA_MINOR,
  424. .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
  425. .cons = ALTERA_UART_CONSOLE,
  426. };
  427. static int altera_uart_probe(struct platform_device *pdev)
  428. {
  429. struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
  430. struct uart_port *port;
  431. struct resource *res_mem;
  432. int i = pdev->id;
  433. int ret;
  434. /* if id is -1 scan for a free id and use that one */
  435. if (i == -1) {
  436. for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
  437. if (altera_uart_ports[i].port.mapbase == 0)
  438. break;
  439. }
  440. if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  441. return -EINVAL;
  442. port = &altera_uart_ports[i].port;
  443. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  444. if (res_mem)
  445. port->mapbase = res_mem->start;
  446. else if (platp)
  447. port->mapbase = platp->mapbase;
  448. else
  449. return -EINVAL;
  450. ret = platform_get_irq_optional(pdev, 0);
  451. if (ret < 0 && ret != -ENXIO)
  452. return ret;
  453. if (ret > 0)
  454. port->irq = ret;
  455. else if (platp)
  456. port->irq = platp->irq;
  457. /* Check platform data first so we can override device node data */
  458. if (platp)
  459. port->uartclk = platp->uartclk;
  460. else {
  461. ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  462. &port->uartclk);
  463. if (ret)
  464. return ret;
  465. }
  466. port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
  467. if (!port->membase)
  468. return -ENOMEM;
  469. if (platp)
  470. port->regshift = platp->bus_shift;
  471. else
  472. port->regshift = 0;
  473. port->line = i;
  474. port->type = PORT_ALTERA_UART;
  475. port->iotype = SERIAL_IO_MEM;
  476. port->ops = &altera_uart_ops;
  477. port->flags = UPF_BOOT_AUTOCONF;
  478. port->dev = &pdev->dev;
  479. platform_set_drvdata(pdev, port);
  480. uart_add_one_port(&altera_uart_driver, port);
  481. return 0;
  482. }
  483. static void altera_uart_remove(struct platform_device *pdev)
  484. {
  485. struct uart_port *port = platform_get_drvdata(pdev);
  486. if (port) {
  487. uart_remove_one_port(&altera_uart_driver, port);
  488. port->mapbase = 0;
  489. iounmap(port->membase);
  490. }
  491. }
  492. #ifdef CONFIG_OF
  493. static const struct of_device_id altera_uart_match[] = {
  494. { .compatible = "ALTR,uart-1.0", },
  495. { .compatible = "altr,uart-1.0", },
  496. {},
  497. };
  498. MODULE_DEVICE_TABLE(of, altera_uart_match);
  499. #endif /* CONFIG_OF */
  500. static struct platform_driver altera_uart_platform_driver = {
  501. .probe = altera_uart_probe,
  502. .remove = altera_uart_remove,
  503. .driver = {
  504. .name = KBUILD_MODNAME,
  505. .of_match_table = of_match_ptr(altera_uart_match),
  506. },
  507. };
  508. static int __init altera_uart_init(void)
  509. {
  510. int rc;
  511. rc = uart_register_driver(&altera_uart_driver);
  512. if (rc)
  513. return rc;
  514. rc = platform_driver_register(&altera_uart_platform_driver);
  515. if (rc)
  516. uart_unregister_driver(&altera_uart_driver);
  517. return rc;
  518. }
  519. static void __exit altera_uart_exit(void)
  520. {
  521. platform_driver_unregister(&altera_uart_platform_driver);
  522. uart_unregister_driver(&altera_uart_driver);
  523. }
  524. module_init(altera_uart_init);
  525. module_exit(altera_uart_exit);
  526. MODULE_DESCRIPTION("Altera UART driver");
  527. MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
  528. MODULE_LICENSE("GPL");
  529. MODULE_ALIAS("platform:" KBUILD_MODNAME);
  530. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);