8250_tegra.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Serial Port driver for Tegra devices
  4. *
  5. * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
  6. */
  7. #include <linux/acpi.h>
  8. #include <linux/clk.h>
  9. #include <linux/console.h>
  10. #include <linux/delay.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/reset.h>
  15. #include <linux/slab.h>
  16. #include "8250.h"
  17. struct tegra_uart {
  18. struct clk *clk;
  19. struct reset_control *rst;
  20. int line;
  21. };
  22. static void tegra_uart_handle_break(struct uart_port *p)
  23. {
  24. unsigned int status, tmout = 10000;
  25. while (1) {
  26. status = p->serial_in(p, UART_LSR);
  27. if (!(status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)))
  28. break;
  29. p->serial_in(p, UART_RX);
  30. if (--tmout == 0)
  31. break;
  32. udelay(1);
  33. }
  34. }
  35. static int tegra_uart_probe(struct platform_device *pdev)
  36. {
  37. struct uart_8250_port port8250;
  38. struct tegra_uart *uart;
  39. struct uart_port *port;
  40. struct resource *res;
  41. int ret;
  42. uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
  43. if (!uart)
  44. return -ENOMEM;
  45. memset(&port8250, 0, sizeof(port8250));
  46. port = &port8250.port;
  47. spin_lock_init(&port->lock);
  48. port->flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  49. port->type = PORT_TEGRA;
  50. port->dev = &pdev->dev;
  51. port->handle_break = tegra_uart_handle_break;
  52. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  53. if (!res)
  54. return -ENODEV;
  55. port->membase = devm_ioremap(&pdev->dev, res->start,
  56. resource_size(res));
  57. if (!port->membase)
  58. return -ENOMEM;
  59. port->mapbase = res->start;
  60. port->mapsize = resource_size(res);
  61. ret = uart_read_port_properties(port);
  62. if (ret)
  63. return ret;
  64. port->iotype = UPIO_MEM32;
  65. port->regshift = 2;
  66. uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
  67. if (IS_ERR(uart->rst))
  68. return PTR_ERR(uart->rst);
  69. if (!port->uartclk) {
  70. uart->clk = devm_clk_get(&pdev->dev, NULL);
  71. if (IS_ERR(uart->clk)) {
  72. dev_err(&pdev->dev, "failed to get clock!\n");
  73. return -ENODEV;
  74. }
  75. ret = clk_prepare_enable(uart->clk);
  76. if (ret < 0)
  77. return ret;
  78. port->uartclk = clk_get_rate(uart->clk);
  79. }
  80. ret = reset_control_deassert(uart->rst);
  81. if (ret)
  82. goto err_clkdisable;
  83. ret = serial8250_register_8250_port(&port8250);
  84. if (ret < 0)
  85. goto err_ctrl_assert;
  86. platform_set_drvdata(pdev, uart);
  87. uart->line = ret;
  88. return 0;
  89. err_ctrl_assert:
  90. reset_control_assert(uart->rst);
  91. err_clkdisable:
  92. clk_disable_unprepare(uart->clk);
  93. return ret;
  94. }
  95. static void tegra_uart_remove(struct platform_device *pdev)
  96. {
  97. struct tegra_uart *uart = platform_get_drvdata(pdev);
  98. serial8250_unregister_port(uart->line);
  99. reset_control_assert(uart->rst);
  100. clk_disable_unprepare(uart->clk);
  101. }
  102. #ifdef CONFIG_PM_SLEEP
  103. static int tegra_uart_suspend(struct device *dev)
  104. {
  105. struct tegra_uart *uart = dev_get_drvdata(dev);
  106. struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
  107. struct uart_port *port = &port8250->port;
  108. serial8250_suspend_port(uart->line);
  109. if (!uart_console(port) || console_suspend_enabled)
  110. clk_disable_unprepare(uart->clk);
  111. return 0;
  112. }
  113. static int tegra_uart_resume(struct device *dev)
  114. {
  115. struct tegra_uart *uart = dev_get_drvdata(dev);
  116. struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
  117. struct uart_port *port = &port8250->port;
  118. if (!uart_console(port) || console_suspend_enabled)
  119. clk_prepare_enable(uart->clk);
  120. serial8250_resume_port(uart->line);
  121. return 0;
  122. }
  123. #endif
  124. static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend,
  125. tegra_uart_resume);
  126. static const struct of_device_id tegra_uart_of_match[] = {
  127. { .compatible = "nvidia,tegra20-uart", },
  128. { },
  129. };
  130. MODULE_DEVICE_TABLE(of, tegra_uart_of_match);
  131. static const struct acpi_device_id tegra_uart_acpi_match[] __maybe_unused = {
  132. { "NVDA0100", 0 },
  133. { },
  134. };
  135. MODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match);
  136. static struct platform_driver tegra_uart_driver = {
  137. .driver = {
  138. .name = "tegra-uart",
  139. .pm = &tegra_uart_pm_ops,
  140. .of_match_table = tegra_uart_of_match,
  141. .acpi_match_table = ACPI_PTR(tegra_uart_acpi_match),
  142. },
  143. .probe = tegra_uart_probe,
  144. .remove = tegra_uart_remove,
  145. };
  146. module_platform_driver(tegra_uart_driver);
  147. MODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>");
  148. MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver");
  149. MODULE_LICENSE("GPL v2");