8250_mid.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
  4. *
  5. * Copyright (C) 2015 Intel Corporation
  6. * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
  7. */
  8. #include <linux/bitops.h>
  9. #include <linux/module.h>
  10. #include <linux/pci.h>
  11. #include <linux/rational.h>
  12. #include <linux/dma/hsu.h>
  13. #include "8250.h"
  14. #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
  15. #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
  16. #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
  17. #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
  18. #define PCI_DEVICE_ID_INTEL_CDF_UART 0x18d8
  19. #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
  20. /* Intel MID Specific registers */
  21. #define INTEL_MID_UART_FISR 0x08
  22. #define INTEL_MID_UART_PS 0x30
  23. #define INTEL_MID_UART_MUL 0x34
  24. #define INTEL_MID_UART_DIV 0x38
  25. struct mid8250;
  26. struct mid8250_board {
  27. unsigned long freq;
  28. unsigned int base_baud;
  29. unsigned int bar;
  30. int (*setup)(struct mid8250 *, struct uart_port *p);
  31. void (*exit)(struct mid8250 *);
  32. };
  33. struct mid8250 {
  34. int line;
  35. int dma_index;
  36. struct pci_dev *dma_dev;
  37. struct uart_8250_dma dma;
  38. struct mid8250_board *board;
  39. struct hsu_dma_chip dma_chip;
  40. };
  41. /*****************************************************************************/
  42. static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
  43. {
  44. struct pci_dev *pdev = to_pci_dev(p->dev);
  45. switch (pdev->device) {
  46. case PCI_DEVICE_ID_INTEL_PNW_UART1:
  47. mid->dma_index = 0;
  48. break;
  49. case PCI_DEVICE_ID_INTEL_PNW_UART2:
  50. mid->dma_index = 1;
  51. break;
  52. case PCI_DEVICE_ID_INTEL_PNW_UART3:
  53. mid->dma_index = 2;
  54. break;
  55. default:
  56. return -EINVAL;
  57. }
  58. mid->dma_dev = pci_get_slot(pdev->bus,
  59. PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
  60. return 0;
  61. }
  62. static void pnw_exit(struct mid8250 *mid)
  63. {
  64. pci_dev_put(mid->dma_dev);
  65. }
  66. static int tng_handle_irq(struct uart_port *p)
  67. {
  68. struct mid8250 *mid = p->private_data;
  69. struct uart_8250_port *up = up_to_u8250p(p);
  70. struct hsu_dma_chip *chip;
  71. u32 status;
  72. int ret = 0;
  73. int err;
  74. chip = pci_get_drvdata(mid->dma_dev);
  75. /* Rx DMA */
  76. err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
  77. if (err > 0) {
  78. serial8250_rx_dma_flush(up);
  79. ret |= 1;
  80. } else if (err == 0)
  81. ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
  82. /* Tx DMA */
  83. err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
  84. if (err > 0)
  85. ret |= 1;
  86. else if (err == 0)
  87. ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
  88. /* UART */
  89. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  90. return IRQ_RETVAL(ret);
  91. }
  92. static int tng_setup(struct mid8250 *mid, struct uart_port *p)
  93. {
  94. struct pci_dev *pdev = to_pci_dev(p->dev);
  95. int index = PCI_FUNC(pdev->devfn);
  96. /*
  97. * Device 0000:00:04.0 is not a real HSU port. It provides a global
  98. * register set for all HSU ports, although it has the same PCI ID.
  99. * Skip it here.
  100. */
  101. if (index-- == 0)
  102. return -ENODEV;
  103. mid->dma_index = index;
  104. mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
  105. p->handle_irq = tng_handle_irq;
  106. return 0;
  107. }
  108. static void tng_exit(struct mid8250 *mid)
  109. {
  110. pci_dev_put(mid->dma_dev);
  111. }
  112. static int dnv_handle_irq(struct uart_port *p)
  113. {
  114. struct mid8250 *mid = p->private_data;
  115. struct uart_8250_port *up = up_to_u8250p(p);
  116. unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
  117. u32 status;
  118. int ret = 0;
  119. int err;
  120. if (fisr & BIT(2)) {
  121. err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
  122. if (err > 0) {
  123. serial8250_rx_dma_flush(up);
  124. ret |= 1;
  125. } else if (err == 0)
  126. ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
  127. }
  128. if (fisr & BIT(1)) {
  129. err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
  130. if (err > 0)
  131. ret |= 1;
  132. else if (err == 0)
  133. ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
  134. }
  135. if (fisr & BIT(0))
  136. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  137. return IRQ_RETVAL(ret);
  138. }
  139. #define DNV_DMA_CHAN_OFFSET 0x80
  140. static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
  141. {
  142. struct hsu_dma_chip *chip = &mid->dma_chip;
  143. struct pci_dev *pdev = to_pci_dev(p->dev);
  144. int ret;
  145. pci_set_master(pdev);
  146. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  147. if (ret < 0)
  148. return ret;
  149. p->irq = pci_irq_vector(pdev, 0);
  150. chip->dev = &pdev->dev;
  151. chip->irq = pci_irq_vector(pdev, 0);
  152. chip->regs = p->membase;
  153. chip->length = pci_resource_len(pdev, mid->board->bar);
  154. chip->offset = DNV_DMA_CHAN_OFFSET;
  155. /* Falling back to PIO mode if DMA probing fails */
  156. ret = hsu_dma_probe(chip);
  157. if (ret)
  158. return 0;
  159. mid->dma_dev = pdev;
  160. p->handle_irq = dnv_handle_irq;
  161. return 0;
  162. }
  163. static void dnv_exit(struct mid8250 *mid)
  164. {
  165. if (!mid->dma_dev)
  166. return;
  167. hsu_dma_remove(&mid->dma_chip);
  168. }
  169. /*****************************************************************************/
  170. static void mid8250_set_termios(struct uart_port *p, struct ktermios *termios,
  171. const struct ktermios *old)
  172. {
  173. unsigned int baud = tty_termios_baud_rate(termios);
  174. struct mid8250 *mid = p->private_data;
  175. unsigned short ps = 16;
  176. unsigned long fuart = baud * ps;
  177. unsigned long w = BIT(24) - 1;
  178. unsigned long mul, div;
  179. /* Gracefully handle the B0 case: fall back to B9600 */
  180. fuart = fuart ? fuart : 9600 * 16;
  181. if (mid->board->freq < fuart) {
  182. /* Find prescaler value that satisfies Fuart < Fref */
  183. if (mid->board->freq > baud)
  184. ps = mid->board->freq / baud; /* baud rate too high */
  185. else
  186. ps = 1; /* PLL case */
  187. fuart = baud * ps;
  188. } else {
  189. /* Get Fuart closer to Fref */
  190. fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
  191. }
  192. rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
  193. p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
  194. writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
  195. writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
  196. writel(div, p->membase + INTEL_MID_UART_DIV);
  197. serial8250_do_set_termios(p, termios, old);
  198. }
  199. static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
  200. {
  201. struct hsu_dma_slave *s = param;
  202. if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
  203. return false;
  204. chan->private = s;
  205. return true;
  206. }
  207. static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
  208. {
  209. struct uart_8250_dma *dma = &mid->dma;
  210. struct device *dev = port->port.dev;
  211. struct hsu_dma_slave *rx_param;
  212. struct hsu_dma_slave *tx_param;
  213. if (!mid->dma_dev)
  214. return 0;
  215. rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
  216. if (!rx_param)
  217. return -ENOMEM;
  218. tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
  219. if (!tx_param)
  220. return -ENOMEM;
  221. rx_param->chan_id = mid->dma_index * 2 + 1;
  222. tx_param->chan_id = mid->dma_index * 2;
  223. dma->rxconf.src_maxburst = 64;
  224. dma->txconf.dst_maxburst = 64;
  225. rx_param->dma_dev = &mid->dma_dev->dev;
  226. tx_param->dma_dev = &mid->dma_dev->dev;
  227. dma->fn = mid8250_dma_filter;
  228. dma->rx_param = rx_param;
  229. dma->tx_param = tx_param;
  230. port->dma = dma;
  231. return 0;
  232. }
  233. static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  234. {
  235. struct uart_8250_port uart;
  236. struct mid8250 *mid;
  237. int ret;
  238. ret = pcim_enable_device(pdev);
  239. if (ret)
  240. return ret;
  241. mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
  242. if (!mid)
  243. return -ENOMEM;
  244. mid->board = (struct mid8250_board *)id->driver_data;
  245. memset(&uart, 0, sizeof(struct uart_8250_port));
  246. uart.port.dev = &pdev->dev;
  247. uart.port.irq = pdev->irq;
  248. uart.port.private_data = mid;
  249. uart.port.type = PORT_16750;
  250. uart.port.iotype = UPIO_MEM;
  251. uart.port.uartclk = mid->board->base_baud * 16;
  252. uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  253. uart.port.set_termios = mid8250_set_termios;
  254. uart.port.mapbase = pci_resource_start(pdev, mid->board->bar);
  255. uart.port.membase = pcim_iomap(pdev, mid->board->bar, 0);
  256. if (!uart.port.membase)
  257. return -ENOMEM;
  258. ret = mid->board->setup(mid, &uart.port);
  259. if (ret)
  260. return ret;
  261. ret = mid8250_dma_setup(mid, &uart);
  262. if (ret)
  263. goto err;
  264. ret = serial8250_register_8250_port(&uart);
  265. if (ret < 0)
  266. goto err;
  267. mid->line = ret;
  268. pci_set_drvdata(pdev, mid);
  269. return 0;
  270. err:
  271. mid->board->exit(mid);
  272. return ret;
  273. }
  274. static void mid8250_remove(struct pci_dev *pdev)
  275. {
  276. struct mid8250 *mid = pci_get_drvdata(pdev);
  277. serial8250_unregister_port(mid->line);
  278. mid->board->exit(mid);
  279. }
  280. static const struct mid8250_board pnw_board = {
  281. .freq = 50000000,
  282. .base_baud = 115200,
  283. .bar = 0,
  284. .setup = pnw_setup,
  285. .exit = pnw_exit,
  286. };
  287. static const struct mid8250_board tng_board = {
  288. .freq = 38400000,
  289. .base_baud = 1843200,
  290. .bar = 0,
  291. .setup = tng_setup,
  292. .exit = tng_exit,
  293. };
  294. static const struct mid8250_board dnv_board = {
  295. .freq = 133333333,
  296. .base_baud = 115200,
  297. .bar = 1,
  298. .setup = dnv_setup,
  299. .exit = dnv_exit,
  300. };
  301. static const struct pci_device_id pci_ids[] = {
  302. { PCI_DEVICE_DATA(INTEL, PNW_UART1, &pnw_board) },
  303. { PCI_DEVICE_DATA(INTEL, PNW_UART2, &pnw_board) },
  304. { PCI_DEVICE_DATA(INTEL, PNW_UART3, &pnw_board) },
  305. { PCI_DEVICE_DATA(INTEL, TNG_UART, &tng_board) },
  306. { PCI_DEVICE_DATA(INTEL, CDF_UART, &dnv_board) },
  307. { PCI_DEVICE_DATA(INTEL, DNV_UART, &dnv_board) },
  308. { }
  309. };
  310. MODULE_DEVICE_TABLE(pci, pci_ids);
  311. static struct pci_driver mid8250_pci_driver = {
  312. .name = "8250_mid",
  313. .id_table = pci_ids,
  314. .probe = mid8250_probe,
  315. .remove = mid8250_remove,
  316. };
  317. module_pci_driver(mid8250_pci_driver);
  318. MODULE_AUTHOR("Intel Corporation");
  319. MODULE_LICENSE("GPL v2");
  320. MODULE_DESCRIPTION("Intel MID UART driver");