8250_fsl.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Freescale 16550 UART "driver", Copyright (C) 2011 Paul Gortmaker.
  4. * Copyright 2020 NXP
  5. * Copyright 2020 Puresoftware Ltd.
  6. *
  7. * This isn't a full driver; it just provides an alternate IRQ
  8. * handler to deal with an errata and provide ACPI wrapper.
  9. * Everything else is just using the bog standard 8250 support.
  10. *
  11. * We follow code flow of serial8250_default_handle_irq() but add
  12. * a check for a break and insert a dummy read on the Rx for the
  13. * immediately following IRQ event.
  14. *
  15. * We re-use the already existing "bug handling" lsr_saved_flags
  16. * field to carry the "what we just did" information from the one
  17. * IRQ event to the next one.
  18. */
  19. #include <linux/acpi.h>
  20. #include <linux/serial_reg.h>
  21. #include <linux/serial_8250.h>
  22. #include "8250.h"
  23. int fsl8250_handle_irq(struct uart_port *port)
  24. {
  25. unsigned long flags;
  26. u16 lsr, orig_lsr;
  27. unsigned int iir;
  28. struct uart_8250_port *up = up_to_u8250p(port);
  29. uart_port_lock_irqsave(&up->port, &flags);
  30. iir = serial_port_in(port, UART_IIR);
  31. if (iir & UART_IIR_NO_INT) {
  32. uart_port_unlock_irqrestore(&up->port, flags);
  33. return 0;
  34. }
  35. /*
  36. * For a single break the hardware reports LSR.BI for each character
  37. * time. This is described in the MPC8313E chip errata as "General17".
  38. * A typical break has a duration of 0.3s, with a 115200n8 configuration
  39. * that (theoretically) corresponds to ~3500 interrupts in these 0.3s.
  40. * In practise it's less (around 500) because of hardware
  41. * and software latencies. The workaround recommended by the vendor is
  42. * to read the RX register (to clear LSR.DR and thus prevent a FIFO
  43. * aging interrupt). To prevent the irq from retriggering LSR must not be
  44. * read. (This would clear LSR.BI, hardware would reassert the BI event
  45. * immediately and interrupt the CPU again. The hardware clears LSR.BI
  46. * when the next valid char is read.)
  47. */
  48. if (unlikely((iir & UART_IIR_ID) == UART_IIR_RLSI &&
  49. (up->lsr_saved_flags & UART_LSR_BI))) {
  50. up->lsr_saved_flags &= ~UART_LSR_BI;
  51. serial_port_in(port, UART_RX);
  52. uart_port_unlock_irqrestore(&up->port, flags);
  53. return 1;
  54. }
  55. lsr = orig_lsr = serial_port_in(port, UART_LSR);
  56. /* Process incoming characters first */
  57. if ((lsr & (UART_LSR_DR | UART_LSR_BI)) &&
  58. (up->ier & (UART_IER_RLSI | UART_IER_RDI))) {
  59. lsr = serial8250_rx_chars(up, lsr);
  60. }
  61. /* Stop processing interrupts on input overrun */
  62. if ((orig_lsr & UART_LSR_OE) && (up->overrun_backoff_time_ms > 0)) {
  63. unsigned long delay;
  64. up->ier = serial_port_in(port, UART_IER);
  65. if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) {
  66. port->ops->stop_rx(port);
  67. } else {
  68. /* Keep restarting the timer until
  69. * the input overrun subsides.
  70. */
  71. cancel_delayed_work(&up->overrun_backoff);
  72. }
  73. delay = msecs_to_jiffies(up->overrun_backoff_time_ms);
  74. schedule_delayed_work(&up->overrun_backoff, delay);
  75. }
  76. serial8250_modem_status(up);
  77. if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI))
  78. serial8250_tx_chars(up);
  79. up->lsr_saved_flags |= orig_lsr & UART_LSR_BI;
  80. uart_unlock_and_check_sysrq_irqrestore(&up->port, flags);
  81. return 1;
  82. }
  83. EXPORT_SYMBOL_GPL(fsl8250_handle_irq);
  84. #ifdef CONFIG_ACPI
  85. struct fsl8250_data {
  86. int line;
  87. };
  88. static int fsl8250_acpi_probe(struct platform_device *pdev)
  89. {
  90. struct fsl8250_data *data;
  91. struct uart_8250_port port8250;
  92. struct device *dev = &pdev->dev;
  93. struct resource *regs;
  94. int ret, irq;
  95. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  96. if (!regs) {
  97. dev_err(dev, "no registers defined\n");
  98. return -EINVAL;
  99. }
  100. irq = platform_get_irq(pdev, 0);
  101. if (irq < 0)
  102. return irq;
  103. memset(&port8250, 0, sizeof(port8250));
  104. ret = device_property_read_u32(dev, "clock-frequency",
  105. &port8250.port.uartclk);
  106. if (ret)
  107. return ret;
  108. spin_lock_init(&port8250.port.lock);
  109. port8250.port.mapbase = regs->start;
  110. port8250.port.irq = irq;
  111. port8250.port.handle_irq = fsl8250_handle_irq;
  112. port8250.port.type = PORT_16550A;
  113. port8250.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF
  114. | UPF_FIXED_PORT | UPF_IOREMAP
  115. | UPF_FIXED_TYPE;
  116. port8250.port.dev = dev;
  117. port8250.port.mapsize = resource_size(regs);
  118. port8250.port.iotype = UPIO_MEM;
  119. port8250.port.irqflags = IRQF_SHARED;
  120. port8250.port.membase = devm_ioremap(dev, port8250.port.mapbase,
  121. port8250.port.mapsize);
  122. if (!port8250.port.membase)
  123. return -ENOMEM;
  124. data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
  125. if (!data)
  126. return -ENOMEM;
  127. data->line = serial8250_register_8250_port(&port8250);
  128. if (data->line < 0)
  129. return data->line;
  130. platform_set_drvdata(pdev, data);
  131. return 0;
  132. }
  133. static void fsl8250_acpi_remove(struct platform_device *pdev)
  134. {
  135. struct fsl8250_data *data = platform_get_drvdata(pdev);
  136. serial8250_unregister_port(data->line);
  137. }
  138. static const struct acpi_device_id fsl_8250_acpi_id[] = {
  139. { "NXP0018", 0 },
  140. { },
  141. };
  142. MODULE_DEVICE_TABLE(acpi, fsl_8250_acpi_id);
  143. static struct platform_driver fsl8250_platform_driver = {
  144. .driver = {
  145. .name = "fsl-16550-uart",
  146. .acpi_match_table = ACPI_PTR(fsl_8250_acpi_id),
  147. },
  148. .probe = fsl8250_acpi_probe,
  149. .remove = fsl8250_acpi_remove,
  150. };
  151. module_platform_driver(fsl8250_platform_driver);
  152. #endif
  153. MODULE_LICENSE("GPL");
  154. MODULE_DESCRIPTION("Handling of Freescale specific 8250 variants");