quirks.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Thunderbolt driver - quirks
  4. *
  5. * Copyright (c) 2020 Mario Limonciello <mario.limonciello@dell.com>
  6. */
  7. #include "tb.h"
  8. static void quirk_force_power_link(struct tb_switch *sw)
  9. {
  10. sw->quirks |= QUIRK_FORCE_POWER_LINK_CONTROLLER;
  11. tb_sw_dbg(sw, "forcing power to link controller\n");
  12. }
  13. static void quirk_dp_credit_allocation(struct tb_switch *sw)
  14. {
  15. if (sw->credit_allocation && sw->min_dp_main_credits == 56) {
  16. sw->min_dp_main_credits = 18;
  17. tb_sw_dbg(sw, "quirked DP main: %u\n", sw->min_dp_main_credits);
  18. }
  19. }
  20. static void quirk_clx_disable(struct tb_switch *sw)
  21. {
  22. sw->quirks |= QUIRK_NO_CLX;
  23. tb_sw_dbg(sw, "disabling CL states\n");
  24. }
  25. static void quirk_usb3_maximum_bandwidth(struct tb_switch *sw)
  26. {
  27. struct tb_port *port;
  28. if (tb_switch_is_icm(sw))
  29. return;
  30. tb_switch_for_each_port(sw, port) {
  31. if (!tb_port_is_usb3_down(port))
  32. continue;
  33. port->max_bw = 16376;
  34. tb_port_dbg(port, "USB3 maximum bandwidth limited to %u Mb/s\n",
  35. port->max_bw);
  36. }
  37. }
  38. static void quirk_block_rpm_in_redrive(struct tb_switch *sw)
  39. {
  40. sw->quirks |= QUIRK_KEEP_POWER_IN_DP_REDRIVE;
  41. tb_sw_dbg(sw, "preventing runtime PM in DP redrive mode\n");
  42. }
  43. struct tb_quirk {
  44. u16 hw_vendor_id;
  45. u16 hw_device_id;
  46. u16 vendor;
  47. u16 device;
  48. void (*hook)(struct tb_switch *sw);
  49. };
  50. static const struct tb_quirk tb_quirks[] = {
  51. /* Dell WD19TB supports self-authentication on unplug */
  52. { 0x0000, 0x0000, 0x00d4, 0xb070, quirk_force_power_link },
  53. { 0x0000, 0x0000, 0x00d4, 0xb071, quirk_force_power_link },
  54. /*
  55. * Intel Goshen Ridge NVM 27 and before report wrong number of
  56. * DP buffers.
  57. */
  58. { 0x8087, 0x0b26, 0x0000, 0x0000, quirk_dp_credit_allocation },
  59. /*
  60. * Limit the maximum USB3 bandwidth for the following Intel USB4
  61. * host routers due to a hardware issue.
  62. */
  63. { 0x8087, PCI_DEVICE_ID_INTEL_ADL_NHI0, 0x0000, 0x0000,
  64. quirk_usb3_maximum_bandwidth },
  65. { 0x8087, PCI_DEVICE_ID_INTEL_ADL_NHI1, 0x0000, 0x0000,
  66. quirk_usb3_maximum_bandwidth },
  67. { 0x8087, PCI_DEVICE_ID_INTEL_RPL_NHI0, 0x0000, 0x0000,
  68. quirk_usb3_maximum_bandwidth },
  69. { 0x8087, PCI_DEVICE_ID_INTEL_RPL_NHI1, 0x0000, 0x0000,
  70. quirk_usb3_maximum_bandwidth },
  71. { 0x8087, PCI_DEVICE_ID_INTEL_MTL_M_NHI0, 0x0000, 0x0000,
  72. quirk_usb3_maximum_bandwidth },
  73. { 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI0, 0x0000, 0x0000,
  74. quirk_usb3_maximum_bandwidth },
  75. { 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI1, 0x0000, 0x0000,
  76. quirk_usb3_maximum_bandwidth },
  77. { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI, 0x0000, 0x0000,
  78. quirk_usb3_maximum_bandwidth },
  79. { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI, 0x0000, 0x0000,
  80. quirk_usb3_maximum_bandwidth },
  81. { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE, 0x0000, 0x0000,
  82. quirk_usb3_maximum_bandwidth },
  83. { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE, 0x0000, 0x0000,
  84. quirk_usb3_maximum_bandwidth },
  85. /*
  86. * Block Runtime PM in DP redrive mode for Intel Barlow Ridge host
  87. * controllers.
  88. */
  89. { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI, 0x0000, 0x0000,
  90. quirk_block_rpm_in_redrive },
  91. { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI, 0x0000, 0x0000,
  92. quirk_block_rpm_in_redrive },
  93. /*
  94. * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms.
  95. */
  96. { 0x0438, 0x0208, 0x0000, 0x0000, quirk_clx_disable },
  97. { 0x0438, 0x0209, 0x0000, 0x0000, quirk_clx_disable },
  98. { 0x0438, 0x020a, 0x0000, 0x0000, quirk_clx_disable },
  99. { 0x0438, 0x020b, 0x0000, 0x0000, quirk_clx_disable },
  100. };
  101. /**
  102. * tb_check_quirks() - Check for quirks to apply
  103. * @sw: Thunderbolt switch
  104. *
  105. * Apply any quirks for the Thunderbolt controller.
  106. */
  107. void tb_check_quirks(struct tb_switch *sw)
  108. {
  109. int i;
  110. for (i = 0; i < ARRAY_SIZE(tb_quirks); i++) {
  111. const struct tb_quirk *q = &tb_quirks[i];
  112. if (q->hw_vendor_id && q->hw_vendor_id != sw->config.vendor_id)
  113. continue;
  114. if (q->hw_device_id && q->hw_device_id != sw->config.device_id)
  115. continue;
  116. if (q->vendor && q->vendor != sw->vendor)
  117. continue;
  118. if (q->device && q->device != sw->device)
  119. continue;
  120. tb_sw_dbg(sw, "running %ps\n", q->hook);
  121. q->hook(sw);
  122. }
  123. }