sun8i_thermal.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Thermal sensor driver for Allwinner SOC
  4. * Copyright (C) 2019 Yangtao Li
  5. *
  6. * Based on the work of Icenowy Zheng <icenowy@aosc.io>
  7. * Based on the work of Ondrej Jirman <megous@megous.com>
  8. * Based on the work of Josef Gajdusek <atx@atx.name>
  9. */
  10. #include <linux/bitmap.h>
  11. #include <linux/cleanup.h>
  12. #include <linux/clk.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/module.h>
  16. #include <linux/nvmem-consumer.h>
  17. #include <linux/of.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regmap.h>
  21. #include <linux/reset.h>
  22. #include <linux/slab.h>
  23. #include <linux/thermal.h>
  24. #include "thermal_hwmon.h"
  25. #define MAX_SENSOR_NUM 4
  26. #define FT_TEMP_MASK GENMASK(11, 0)
  27. #define TEMP_CALIB_MASK GENMASK(11, 0)
  28. #define CALIBRATE_DEFAULT 0x800
  29. #define SUN8I_THS_CTRL0 0x00
  30. #define SUN8I_THS_CTRL2 0x40
  31. #define SUN8I_THS_IC 0x44
  32. #define SUN8I_THS_IS 0x48
  33. #define SUN8I_THS_MFC 0x70
  34. #define SUN8I_THS_TEMP_CALIB 0x74
  35. #define SUN8I_THS_TEMP_DATA 0x80
  36. #define SUN50I_THS_CTRL0 0x00
  37. #define SUN50I_H6_THS_ENABLE 0x04
  38. #define SUN50I_H6_THS_PC 0x08
  39. #define SUN50I_H6_THS_DIC 0x10
  40. #define SUN50I_H6_THS_DIS 0x20
  41. #define SUN50I_H6_THS_MFC 0x30
  42. #define SUN50I_H6_THS_TEMP_CALIB 0xa0
  43. #define SUN50I_H6_THS_TEMP_DATA 0xc0
  44. #define SUN8I_THS_CTRL0_T_ACQ0(x) (GENMASK(15, 0) & (x))
  45. #define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16)
  46. #define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8)
  47. #define SUN50I_THS_CTRL0_T_ACQ(x) (GENMASK(15, 0) & ((x) - 1))
  48. #define SUN50I_THS_CTRL0_T_SAMPLE_PER(x) ((GENMASK(15, 0) & ((x) - 1)) << 16)
  49. #define SUN50I_THS_FILTER_EN BIT(2)
  50. #define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
  51. #define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12)
  52. #define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x)
  53. struct tsensor {
  54. struct ths_device *tmdev;
  55. struct thermal_zone_device *tzd;
  56. int id;
  57. };
  58. struct ths_thermal_chip {
  59. bool has_mod_clk;
  60. bool has_bus_clk_reset;
  61. bool needs_sram;
  62. int sensor_num;
  63. int offset;
  64. int scale;
  65. int ft_deviation;
  66. int temp_data_base;
  67. int (*calibrate)(struct ths_device *tmdev,
  68. u16 *caldata, int callen);
  69. int (*init)(struct ths_device *tmdev);
  70. unsigned long (*irq_ack)(struct ths_device *tmdev);
  71. int (*calc_temp)(struct ths_device *tmdev,
  72. int id, int reg);
  73. };
  74. struct ths_device {
  75. const struct ths_thermal_chip *chip;
  76. struct device *dev;
  77. struct regmap *regmap;
  78. struct regmap_field *sram_regmap_field;
  79. struct reset_control *reset;
  80. struct clk *bus_clk;
  81. struct clk *mod_clk;
  82. struct tsensor sensor[MAX_SENSOR_NUM];
  83. };
  84. /* The H616 needs to have a bit 16 in the SRAM control register cleared. */
  85. static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16);
  86. /* Temp Unit: millidegree Celsius */
  87. static int sun8i_ths_calc_temp(struct ths_device *tmdev,
  88. int id, int reg)
  89. {
  90. return tmdev->chip->offset - (reg * tmdev->chip->scale / 10);
  91. }
  92. static int sun50i_h5_calc_temp(struct ths_device *tmdev,
  93. int id, int reg)
  94. {
  95. if (reg >= 0x500)
  96. return -1191 * reg / 10 + 223000;
  97. else if (!id)
  98. return -1452 * reg / 10 + 259000;
  99. else
  100. return -1590 * reg / 10 + 276000;
  101. }
  102. static int sun8i_ths_get_temp(struct thermal_zone_device *tz, int *temp)
  103. {
  104. struct tsensor *s = thermal_zone_device_priv(tz);
  105. struct ths_device *tmdev = s->tmdev;
  106. int val = 0;
  107. regmap_read(tmdev->regmap, tmdev->chip->temp_data_base +
  108. 0x4 * s->id, &val);
  109. /* ths have no data yet */
  110. if (!val)
  111. return -EAGAIN;
  112. *temp = tmdev->chip->calc_temp(tmdev, s->id, val);
  113. /*
  114. * According to the original sdk, there are some platforms(rarely)
  115. * that add a fixed offset value after calculating the temperature
  116. * value. We can't simply put it on the formula for calculating the
  117. * temperature above, because the formula for calculating the
  118. * temperature above is also used when the sensor is calibrated. If
  119. * do this, the correct calibration formula is hard to know.
  120. */
  121. *temp += tmdev->chip->ft_deviation;
  122. return 0;
  123. }
  124. static const struct thermal_zone_device_ops ths_ops = {
  125. .get_temp = sun8i_ths_get_temp,
  126. };
  127. static const struct regmap_config config = {
  128. .reg_bits = 32,
  129. .val_bits = 32,
  130. .reg_stride = 4,
  131. .fast_io = true,
  132. .max_register = 0xfc,
  133. };
  134. static unsigned long sun8i_h3_irq_ack(struct ths_device *tmdev)
  135. {
  136. unsigned long irq_bitmap = 0;
  137. int i, state;
  138. regmap_read(tmdev->regmap, SUN8I_THS_IS, &state);
  139. for (i = 0; i < tmdev->chip->sensor_num; i++) {
  140. if (state & SUN8I_THS_DATA_IRQ_STS(i)) {
  141. regmap_write(tmdev->regmap, SUN8I_THS_IS,
  142. SUN8I_THS_DATA_IRQ_STS(i));
  143. bitmap_set(&irq_bitmap, i, 1);
  144. }
  145. }
  146. return irq_bitmap;
  147. }
  148. static unsigned long sun50i_h6_irq_ack(struct ths_device *tmdev)
  149. {
  150. unsigned long irq_bitmap = 0;
  151. int i, state;
  152. regmap_read(tmdev->regmap, SUN50I_H6_THS_DIS, &state);
  153. for (i = 0; i < tmdev->chip->sensor_num; i++) {
  154. if (state & SUN50I_H6_THS_DATA_IRQ_STS(i)) {
  155. regmap_write(tmdev->regmap, SUN50I_H6_THS_DIS,
  156. SUN50I_H6_THS_DATA_IRQ_STS(i));
  157. bitmap_set(&irq_bitmap, i, 1);
  158. }
  159. }
  160. return irq_bitmap;
  161. }
  162. static irqreturn_t sun8i_irq_thread(int irq, void *data)
  163. {
  164. struct ths_device *tmdev = data;
  165. unsigned long irq_bitmap = tmdev->chip->irq_ack(tmdev);
  166. int i;
  167. for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) {
  168. /* We allow some zones to not register. */
  169. if (IS_ERR(tmdev->sensor[i].tzd))
  170. continue;
  171. thermal_zone_device_update(tmdev->sensor[i].tzd,
  172. THERMAL_EVENT_UNSPECIFIED);
  173. }
  174. return IRQ_HANDLED;
  175. }
  176. static int sun8i_h3_ths_calibrate(struct ths_device *tmdev,
  177. u16 *caldata, int callen)
  178. {
  179. int i;
  180. if (!caldata[0] || callen < 2 * tmdev->chip->sensor_num)
  181. return -EINVAL;
  182. for (i = 0; i < tmdev->chip->sensor_num; i++) {
  183. int offset = (i % 2) << 4;
  184. regmap_update_bits(tmdev->regmap,
  185. SUN8I_THS_TEMP_CALIB + (4 * (i >> 1)),
  186. TEMP_CALIB_MASK << offset,
  187. caldata[i] << offset);
  188. }
  189. return 0;
  190. }
  191. static int sun50i_h6_ths_calibrate(struct ths_device *tmdev,
  192. u16 *caldata, int callen)
  193. {
  194. struct device *dev = tmdev->dev;
  195. int i, ft_temp;
  196. if (!caldata[0])
  197. return -EINVAL;
  198. /*
  199. * efuse layout:
  200. *
  201. * 0 11 16 27 32 43 48 57
  202. * +----------+-----------+-----------+-----------+
  203. * | temp | |sensor0| |sensor1| |sensor2| |
  204. * +----------+-----------+-----------+-----------+
  205. * ^ ^ ^
  206. * | | |
  207. * | | sensor3[11:8]
  208. * | sensor3[7:4]
  209. * sensor3[3:0]
  210. *
  211. * The calibration data on the H6 is the ambient temperature and
  212. * sensor values that are filled during the factory test stage.
  213. *
  214. * The unit of stored FT temperature is 0.1 degree celsius.
  215. *
  216. * We need to calculate a delta between measured and caluclated
  217. * register values and this will become a calibration offset.
  218. */
  219. ft_temp = (caldata[0] & FT_TEMP_MASK) * 100;
  220. for (i = 0; i < tmdev->chip->sensor_num; i++) {
  221. int sensor_reg, sensor_temp, cdata, offset;
  222. if (i == 3)
  223. sensor_reg = (caldata[1] >> 12)
  224. | ((caldata[2] >> 12) << 4)
  225. | ((caldata[3] >> 12) << 8);
  226. else
  227. sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK;
  228. sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg);
  229. /*
  230. * Calibration data is CALIBRATE_DEFAULT - (calculated
  231. * temperature from sensor reading at factory temperature
  232. * minus actual factory temperature) * 14.88 (scale from
  233. * temperature to register values)
  234. */
  235. cdata = CALIBRATE_DEFAULT -
  236. ((sensor_temp - ft_temp) * 10 / tmdev->chip->scale);
  237. if (cdata & ~TEMP_CALIB_MASK) {
  238. /*
  239. * Calibration value more than 12-bit, but calibration
  240. * register is 12-bit. In this case, ths hardware can
  241. * still work without calibration, although the data
  242. * won't be so accurate.
  243. */
  244. dev_warn(dev, "sensor%d is not calibrated.\n", i);
  245. continue;
  246. }
  247. offset = (i % 2) * 16;
  248. regmap_update_bits(tmdev->regmap,
  249. SUN50I_H6_THS_TEMP_CALIB + (i / 2 * 4),
  250. TEMP_CALIB_MASK << offset,
  251. cdata << offset);
  252. }
  253. return 0;
  254. }
  255. static int sun8i_ths_calibrate(struct ths_device *tmdev)
  256. {
  257. struct nvmem_cell *calcell;
  258. struct device *dev = tmdev->dev;
  259. u16 *caldata;
  260. size_t callen;
  261. int ret = 0;
  262. calcell = nvmem_cell_get(dev, "calibration");
  263. if (IS_ERR(calcell)) {
  264. if (PTR_ERR(calcell) == -EPROBE_DEFER)
  265. return -EPROBE_DEFER;
  266. /*
  267. * Even if the external calibration data stored in sid is
  268. * not accessible, the THS hardware can still work, although
  269. * the data won't be so accurate.
  270. *
  271. * The default value of calibration register is 0x800 for
  272. * every sensor, and the calibration value is usually 0x7xx
  273. * or 0x8xx, so they won't be away from the default value
  274. * for a lot.
  275. *
  276. * So here we do not return error if the calibration data is
  277. * not available, except the probe needs deferring.
  278. */
  279. goto out;
  280. }
  281. caldata = nvmem_cell_read(calcell, &callen);
  282. if (IS_ERR(caldata)) {
  283. ret = PTR_ERR(caldata);
  284. goto out;
  285. }
  286. tmdev->chip->calibrate(tmdev, caldata, callen);
  287. kfree(caldata);
  288. out:
  289. if (!IS_ERR(calcell))
  290. nvmem_cell_put(calcell);
  291. return ret;
  292. }
  293. static void sun8i_ths_reset_control_assert(void *data)
  294. {
  295. reset_control_assert(data);
  296. }
  297. static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node)
  298. {
  299. struct platform_device *sram_pdev;
  300. struct regmap *regmap = NULL;
  301. struct device_node *sram_node __free(device_node) =
  302. of_parse_phandle(node, "allwinner,sram", 0);
  303. if (!sram_node)
  304. return ERR_PTR(-ENODEV);
  305. sram_pdev = of_find_device_by_node(sram_node);
  306. if (!sram_pdev) {
  307. /* platform device might not be probed yet */
  308. return ERR_PTR(-EPROBE_DEFER);
  309. }
  310. /* If no regmap is found then the other device driver is at fault */
  311. regmap = dev_get_regmap(&sram_pdev->dev, NULL);
  312. if (!regmap)
  313. regmap = ERR_PTR(-EINVAL);
  314. platform_device_put(sram_pdev);
  315. return regmap;
  316. }
  317. static int sun8i_ths_resource_init(struct ths_device *tmdev)
  318. {
  319. struct device *dev = tmdev->dev;
  320. struct platform_device *pdev = to_platform_device(dev);
  321. void __iomem *base;
  322. int ret;
  323. base = devm_platform_ioremap_resource(pdev, 0);
  324. if (IS_ERR(base))
  325. return PTR_ERR(base);
  326. tmdev->regmap = devm_regmap_init_mmio(dev, base, &config);
  327. if (IS_ERR(tmdev->regmap))
  328. return PTR_ERR(tmdev->regmap);
  329. if (tmdev->chip->has_bus_clk_reset) {
  330. tmdev->reset = devm_reset_control_get(dev, NULL);
  331. if (IS_ERR(tmdev->reset))
  332. return PTR_ERR(tmdev->reset);
  333. ret = reset_control_deassert(tmdev->reset);
  334. if (ret)
  335. return ret;
  336. ret = devm_add_action_or_reset(dev, sun8i_ths_reset_control_assert,
  337. tmdev->reset);
  338. if (ret)
  339. return ret;
  340. tmdev->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus");
  341. if (IS_ERR(tmdev->bus_clk))
  342. return PTR_ERR(tmdev->bus_clk);
  343. }
  344. if (tmdev->chip->has_mod_clk) {
  345. tmdev->mod_clk = devm_clk_get_enabled(&pdev->dev, "mod");
  346. if (IS_ERR(tmdev->mod_clk))
  347. return PTR_ERR(tmdev->mod_clk);
  348. }
  349. ret = clk_set_rate(tmdev->mod_clk, 24000000);
  350. if (ret)
  351. return ret;
  352. if (tmdev->chip->needs_sram) {
  353. struct regmap *regmap;
  354. regmap = sun8i_ths_get_sram_regmap(dev->of_node);
  355. if (IS_ERR(regmap))
  356. return PTR_ERR(regmap);
  357. tmdev->sram_regmap_field = devm_regmap_field_alloc(dev,
  358. regmap,
  359. sun8i_ths_sram_reg_field);
  360. if (IS_ERR(tmdev->sram_regmap_field))
  361. return PTR_ERR(tmdev->sram_regmap_field);
  362. }
  363. ret = sun8i_ths_calibrate(tmdev);
  364. if (ret)
  365. return ret;
  366. return 0;
  367. }
  368. static int sun8i_h3_thermal_init(struct ths_device *tmdev)
  369. {
  370. int val;
  371. /* average over 4 samples */
  372. regmap_write(tmdev->regmap, SUN8I_THS_MFC,
  373. SUN50I_THS_FILTER_EN |
  374. SUN50I_THS_FILTER_TYPE(1));
  375. /*
  376. * clkin = 24MHz
  377. * filter_samples = 4
  378. * period = 0.25s
  379. *
  380. * x = period * clkin / 4096 / filter_samples - 1
  381. * = 365
  382. */
  383. val = GENMASK(7 + tmdev->chip->sensor_num, 8);
  384. regmap_write(tmdev->regmap, SUN8I_THS_IC,
  385. SUN50I_H6_THS_PC_TEMP_PERIOD(365) | val);
  386. /*
  387. * T_acq = 20us
  388. * clkin = 24MHz
  389. *
  390. * x = T_acq * clkin - 1
  391. * = 479
  392. */
  393. regmap_write(tmdev->regmap, SUN8I_THS_CTRL0,
  394. SUN8I_THS_CTRL0_T_ACQ0(479));
  395. val = GENMASK(tmdev->chip->sensor_num - 1, 0);
  396. regmap_write(tmdev->regmap, SUN8I_THS_CTRL2,
  397. SUN8I_THS_CTRL2_T_ACQ1(479) | val);
  398. return 0;
  399. }
  400. static int sun50i_h6_thermal_init(struct ths_device *tmdev)
  401. {
  402. int val;
  403. /* The H616 needs to have a bit in the SRAM control register cleared. */
  404. if (tmdev->sram_regmap_field)
  405. regmap_field_write(tmdev->sram_regmap_field, 0);
  406. /*
  407. * The manual recommends an overall sample frequency of 50 KHz (20us,
  408. * 480 cycles at 24 MHz), which provides plenty of time for both the
  409. * acquisition time (>24 cycles) and the actual conversion time
  410. * (>14 cycles).
  411. * The lower half of the CTRL register holds the "acquire time", in
  412. * clock cycles, which the manual recommends to be 2us:
  413. * 24MHz * 2us = 48 cycles.
  414. * The high half of THS_CTRL encodes the sample frequency, in clock
  415. * cycles: 24MHz * 20us = 480 cycles.
  416. * This is explained in the H616 manual, but apparently wrongly
  417. * described in the H6 manual, although the BSP code does the same
  418. * for both SoCs.
  419. */
  420. regmap_write(tmdev->regmap, SUN50I_THS_CTRL0,
  421. SUN50I_THS_CTRL0_T_ACQ(48) |
  422. SUN50I_THS_CTRL0_T_SAMPLE_PER(480));
  423. /* average over 4 samples */
  424. regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC,
  425. SUN50I_THS_FILTER_EN |
  426. SUN50I_THS_FILTER_TYPE(1));
  427. /*
  428. * clkin = 24MHz
  429. * filter_samples = 4
  430. * period = 0.25s
  431. *
  432. * x = period * clkin / 4096 / filter_samples - 1
  433. * = 365
  434. */
  435. regmap_write(tmdev->regmap, SUN50I_H6_THS_PC,
  436. SUN50I_H6_THS_PC_TEMP_PERIOD(365));
  437. /* enable sensor */
  438. val = GENMASK(tmdev->chip->sensor_num - 1, 0);
  439. regmap_write(tmdev->regmap, SUN50I_H6_THS_ENABLE, val);
  440. /* thermal data interrupt enable */
  441. val = GENMASK(tmdev->chip->sensor_num - 1, 0);
  442. regmap_write(tmdev->regmap, SUN50I_H6_THS_DIC, val);
  443. return 0;
  444. }
  445. static int sun8i_ths_register(struct ths_device *tmdev)
  446. {
  447. int i;
  448. for (i = 0; i < tmdev->chip->sensor_num; i++) {
  449. tmdev->sensor[i].tmdev = tmdev;
  450. tmdev->sensor[i].id = i;
  451. tmdev->sensor[i].tzd =
  452. devm_thermal_of_zone_register(tmdev->dev,
  453. i,
  454. &tmdev->sensor[i],
  455. &ths_ops);
  456. /*
  457. * If an individual zone fails to register for reasons
  458. * other than probe deferral (eg, a bad DT) then carry
  459. * on, other zones might register successfully.
  460. */
  461. if (IS_ERR(tmdev->sensor[i].tzd)) {
  462. if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER)
  463. return PTR_ERR(tmdev->sensor[i].tzd);
  464. continue;
  465. }
  466. devm_thermal_add_hwmon_sysfs(tmdev->dev, tmdev->sensor[i].tzd);
  467. }
  468. return 0;
  469. }
  470. static int sun8i_ths_probe(struct platform_device *pdev)
  471. {
  472. struct ths_device *tmdev;
  473. struct device *dev = &pdev->dev;
  474. int ret, irq;
  475. tmdev = devm_kzalloc(dev, sizeof(*tmdev), GFP_KERNEL);
  476. if (!tmdev)
  477. return -ENOMEM;
  478. tmdev->dev = dev;
  479. tmdev->chip = of_device_get_match_data(&pdev->dev);
  480. if (!tmdev->chip)
  481. return -EINVAL;
  482. ret = sun8i_ths_resource_init(tmdev);
  483. if (ret)
  484. return ret;
  485. irq = platform_get_irq(pdev, 0);
  486. if (irq < 0)
  487. return irq;
  488. ret = tmdev->chip->init(tmdev);
  489. if (ret)
  490. return ret;
  491. ret = sun8i_ths_register(tmdev);
  492. if (ret)
  493. return ret;
  494. /*
  495. * Avoid entering the interrupt handler, the thermal device is not
  496. * registered yet, we deffer the registration of the interrupt to
  497. * the end.
  498. */
  499. ret = devm_request_threaded_irq(dev, irq, NULL,
  500. sun8i_irq_thread,
  501. IRQF_ONESHOT, "ths", tmdev);
  502. if (ret)
  503. return ret;
  504. return 0;
  505. }
  506. static const struct ths_thermal_chip sun8i_a83t_ths = {
  507. .sensor_num = 3,
  508. .scale = 705,
  509. .offset = 191668,
  510. .temp_data_base = SUN8I_THS_TEMP_DATA,
  511. .calibrate = sun8i_h3_ths_calibrate,
  512. .init = sun8i_h3_thermal_init,
  513. .irq_ack = sun8i_h3_irq_ack,
  514. .calc_temp = sun8i_ths_calc_temp,
  515. };
  516. static const struct ths_thermal_chip sun8i_h3_ths = {
  517. .sensor_num = 1,
  518. .scale = 1211,
  519. .offset = 217000,
  520. .has_mod_clk = true,
  521. .has_bus_clk_reset = true,
  522. .temp_data_base = SUN8I_THS_TEMP_DATA,
  523. .calibrate = sun8i_h3_ths_calibrate,
  524. .init = sun8i_h3_thermal_init,
  525. .irq_ack = sun8i_h3_irq_ack,
  526. .calc_temp = sun8i_ths_calc_temp,
  527. };
  528. static const struct ths_thermal_chip sun8i_r40_ths = {
  529. .sensor_num = 2,
  530. .offset = 251086,
  531. .scale = 1130,
  532. .has_mod_clk = true,
  533. .has_bus_clk_reset = true,
  534. .temp_data_base = SUN8I_THS_TEMP_DATA,
  535. .calibrate = sun8i_h3_ths_calibrate,
  536. .init = sun8i_h3_thermal_init,
  537. .irq_ack = sun8i_h3_irq_ack,
  538. .calc_temp = sun8i_ths_calc_temp,
  539. };
  540. static const struct ths_thermal_chip sun50i_a64_ths = {
  541. .sensor_num = 3,
  542. .offset = 260890,
  543. .scale = 1170,
  544. .has_mod_clk = true,
  545. .has_bus_clk_reset = true,
  546. .temp_data_base = SUN8I_THS_TEMP_DATA,
  547. .calibrate = sun8i_h3_ths_calibrate,
  548. .init = sun8i_h3_thermal_init,
  549. .irq_ack = sun8i_h3_irq_ack,
  550. .calc_temp = sun8i_ths_calc_temp,
  551. };
  552. static const struct ths_thermal_chip sun50i_a100_ths = {
  553. .sensor_num = 3,
  554. .has_bus_clk_reset = true,
  555. .ft_deviation = 8000,
  556. .offset = 187744,
  557. .scale = 672,
  558. .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
  559. .calibrate = sun50i_h6_ths_calibrate,
  560. .init = sun50i_h6_thermal_init,
  561. .irq_ack = sun50i_h6_irq_ack,
  562. .calc_temp = sun8i_ths_calc_temp,
  563. };
  564. static const struct ths_thermal_chip sun50i_h5_ths = {
  565. .sensor_num = 2,
  566. .has_mod_clk = true,
  567. .has_bus_clk_reset = true,
  568. .temp_data_base = SUN8I_THS_TEMP_DATA,
  569. .calibrate = sun8i_h3_ths_calibrate,
  570. .init = sun8i_h3_thermal_init,
  571. .irq_ack = sun8i_h3_irq_ack,
  572. .calc_temp = sun50i_h5_calc_temp,
  573. };
  574. static const struct ths_thermal_chip sun50i_h6_ths = {
  575. .sensor_num = 2,
  576. .has_bus_clk_reset = true,
  577. .ft_deviation = 7000,
  578. .offset = 187744,
  579. .scale = 672,
  580. .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
  581. .calibrate = sun50i_h6_ths_calibrate,
  582. .init = sun50i_h6_thermal_init,
  583. .irq_ack = sun50i_h6_irq_ack,
  584. .calc_temp = sun8i_ths_calc_temp,
  585. };
  586. static const struct ths_thermal_chip sun20i_d1_ths = {
  587. .sensor_num = 1,
  588. .has_bus_clk_reset = true,
  589. .offset = 188552,
  590. .scale = 673,
  591. .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
  592. .calibrate = sun50i_h6_ths_calibrate,
  593. .init = sun50i_h6_thermal_init,
  594. .irq_ack = sun50i_h6_irq_ack,
  595. .calc_temp = sun8i_ths_calc_temp,
  596. };
  597. static const struct ths_thermal_chip sun50i_h616_ths = {
  598. .sensor_num = 4,
  599. .has_bus_clk_reset = true,
  600. .needs_sram = true,
  601. .ft_deviation = 8000,
  602. .offset = 263655,
  603. .scale = 810,
  604. .temp_data_base = SUN50I_H6_THS_TEMP_DATA,
  605. .calibrate = sun50i_h6_ths_calibrate,
  606. .init = sun50i_h6_thermal_init,
  607. .irq_ack = sun50i_h6_irq_ack,
  608. .calc_temp = sun8i_ths_calc_temp,
  609. };
  610. static const struct of_device_id of_ths_match[] = {
  611. { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths },
  612. { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths },
  613. { .compatible = "allwinner,sun8i-r40-ths", .data = &sun8i_r40_ths },
  614. { .compatible = "allwinner,sun50i-a64-ths", .data = &sun50i_a64_ths },
  615. { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths },
  616. { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths },
  617. { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths },
  618. { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths },
  619. { .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths },
  620. { /* sentinel */ },
  621. };
  622. MODULE_DEVICE_TABLE(of, of_ths_match);
  623. static struct platform_driver ths_driver = {
  624. .probe = sun8i_ths_probe,
  625. .driver = {
  626. .name = "sun8i-thermal",
  627. .of_match_table = of_ths_match,
  628. },
  629. };
  630. module_platform_driver(ths_driver);
  631. MODULE_DESCRIPTION("Thermal sensor driver for Allwinner SOC");
  632. MODULE_LICENSE("GPL v2");