Kconfig 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. # SPDX-License-Identifier: GPL-2.0-only
  2. config INTEL_POWERCLAMP
  3. tristate "Intel PowerClamp idle injection driver"
  4. depends on X86
  5. depends on CPU_SUP_INTEL
  6. depends on CPU_IDLE
  7. select POWERCAP
  8. select IDLE_INJECT
  9. help
  10. Enable this to enable Intel PowerClamp idle injection driver. This
  11. enforce idle time which results in more package C-state residency. The
  12. user interface is exposed via generic thermal framework.
  13. config X86_THERMAL_VECTOR
  14. def_bool y
  15. depends on X86 && CPU_SUP_INTEL && X86_LOCAL_APIC
  16. config INTEL_TCC
  17. bool
  18. depends on X86
  19. config X86_PKG_TEMP_THERMAL
  20. tristate "X86 package temperature thermal driver"
  21. depends on X86_THERMAL_VECTOR && NET
  22. select THERMAL_NETLINK
  23. select INTEL_TCC
  24. default m
  25. help
  26. Enable this to register CPU digital sensor for package temperature as
  27. thermal zone. Each package will have its own thermal zone. There are
  28. two trip points which can be set by user to get notifications via thermal
  29. notification methods.
  30. config INTEL_SOC_DTS_IOSF_CORE
  31. tristate
  32. depends on X86 && PCI
  33. select IOSF_MBI
  34. select INTEL_TCC
  35. help
  36. This is becoming a common feature for Intel SoCs to expose the additional
  37. digital temperature sensors (DTSs) using side band interface (IOSF). This
  38. implements the common set of helper functions to register, get temperature
  39. and get/set thresholds on DTSs.
  40. config INTEL_SOC_DTS_THERMAL
  41. tristate "Intel SoCs DTS thermal driver"
  42. depends on X86_64 && PCI && ACPI && NET
  43. select INT340X_THERMAL
  44. select INTEL_SOC_DTS_IOSF_CORE
  45. help
  46. Enable this to register Intel SoCs (e.g. Bay Trail) platform digital
  47. temperature sensor (DTS). These SoCs have two additional DTSs in
  48. addition to DTSs on CPU cores. Each DTS will be registered as a
  49. thermal zone. There are two trip points. One of the trip point can
  50. be set by user mode programs to get notifications via Linux thermal
  51. notification methods.The other trip is a critical trip point, which
  52. was set by the driver based on the TJ MAX temperature.
  53. config INTEL_QUARK_DTS_THERMAL
  54. tristate "Intel Quark DTS thermal driver"
  55. depends on X86_INTEL_QUARK
  56. help
  57. Enable this to register Intel Quark SoC (e.g. X1000) platform digital
  58. temperature sensor (DTS). For X1000 SoC, it has one on-die DTS.
  59. The DTS will be registered as a thermal zone. There are two trip points:
  60. hot & critical. The critical trip point default value is set by
  61. underlying BIOS/Firmware.
  62. menu "ACPI INT340X thermal drivers"
  63. source "drivers/thermal/intel/int340x_thermal/Kconfig"
  64. endmenu
  65. config INTEL_BXT_PMIC_THERMAL
  66. tristate "Intel Broxton PMIC thermal driver"
  67. depends on X86 && INTEL_SOC_PMIC_BXTWC
  68. select REGMAP
  69. help
  70. Select this driver for Intel Broxton PMIC with ADC channels monitoring
  71. system temperature measurements and alerts.
  72. This driver is used for monitoring the ADC channels of PMIC and handles
  73. the alert trip point interrupts and notifies the thermal framework with
  74. the trip point and temperature details of the zone.
  75. config INTEL_PCH_THERMAL
  76. tristate "Intel PCH Thermal Reporting Driver"
  77. depends on X86 && PCI
  78. select ACPI_THERMAL_LIB if ACPI
  79. help
  80. Enable this to support thermal reporting on certain intel PCHs.
  81. Thermal reporting device will provide temperature reading,
  82. programmable trip points and other information.
  83. config INTEL_TCC_COOLING
  84. tristate "Intel TCC offset cooling Driver"
  85. depends on X86
  86. select INTEL_TCC
  87. help
  88. Enable this to support system cooling by adjusting the effective TCC
  89. activation temperature via the TCC Offset register, which is widely
  90. supported on modern Intel platforms.
  91. Note that, on different platforms, the behavior might be different
  92. on how fast the setting takes effect, and how much the CPU frequency
  93. is reduced.
  94. config INTEL_HFI_THERMAL
  95. bool "Intel Hardware Feedback Interface"
  96. depends on NET
  97. depends on CPU_SUP_INTEL
  98. depends on X86_THERMAL_VECTOR
  99. select THERMAL_NETLINK
  100. help
  101. Select this option to enable the Hardware Feedback Interface. If
  102. selected, hardware provides guidance to the operating system on
  103. the performance and energy efficiency capabilities of each CPU.
  104. These capabilities may change as a result of changes in the operating
  105. conditions of the system such power and thermal limits. If selected,
  106. the kernel relays updates in CPUs' capabilities to userspace.