driver_gpio.c 12 KB

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  1. /*
  2. * Sonics Silicon Backplane
  3. * GPIO driver
  4. *
  5. * Copyright 2011, Broadcom Corporation
  6. * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
  7. *
  8. * Licensed under the GNU/GPL. See COPYING for details.
  9. */
  10. #include "ssb_private.h"
  11. #include <linux/gpio/driver.h>
  12. #include <linux/irq.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/irqdomain.h>
  15. #include <linux/export.h>
  16. #include <linux/ssb/ssb.h>
  17. /**************************************************
  18. * Shared
  19. **************************************************/
  20. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  21. static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
  22. {
  23. struct ssb_bus *bus = gpiochip_get_data(chip);
  24. if (bus->bustype == SSB_BUSTYPE_SSB)
  25. return irq_find_mapping(bus->irq_domain, gpio);
  26. else
  27. return -EINVAL;
  28. }
  29. #endif
  30. /**************************************************
  31. * ChipCommon
  32. **************************************************/
  33. static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned int gpio)
  34. {
  35. struct ssb_bus *bus = gpiochip_get_data(chip);
  36. return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
  37. }
  38. static int ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned int gpio,
  39. int value)
  40. {
  41. struct ssb_bus *bus = gpiochip_get_data(chip);
  42. ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
  43. return 0;
  44. }
  45. static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
  46. unsigned int gpio)
  47. {
  48. struct ssb_bus *bus = gpiochip_get_data(chip);
  49. ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
  50. return 0;
  51. }
  52. static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
  53. unsigned int gpio, int value)
  54. {
  55. struct ssb_bus *bus = gpiochip_get_data(chip);
  56. ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
  57. ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
  58. return 0;
  59. }
  60. static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned int gpio)
  61. {
  62. struct ssb_bus *bus = gpiochip_get_data(chip);
  63. ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
  64. /* clear pulldown */
  65. ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
  66. /* Set pullup */
  67. ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
  68. return 0;
  69. }
  70. static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned int gpio)
  71. {
  72. struct ssb_bus *bus = gpiochip_get_data(chip);
  73. /* clear pullup */
  74. ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
  75. }
  76. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  77. static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
  78. {
  79. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  80. int gpio = irqd_to_hwirq(d);
  81. ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
  82. }
  83. static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
  84. {
  85. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  86. int gpio = irqd_to_hwirq(d);
  87. u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
  88. ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
  89. ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
  90. }
  91. static struct irq_chip ssb_gpio_irq_chipco_chip = {
  92. .name = "SSB-GPIO-CC",
  93. .irq_mask = ssb_gpio_irq_chipco_mask,
  94. .irq_unmask = ssb_gpio_irq_chipco_unmask,
  95. };
  96. static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
  97. {
  98. struct ssb_bus *bus = dev_id;
  99. struct ssb_chipcommon *chipco = &bus->chipco;
  100. u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
  101. u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
  102. u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
  103. unsigned long irqs = (val ^ pol) & mask;
  104. int gpio;
  105. if (!irqs)
  106. return IRQ_NONE;
  107. for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
  108. generic_handle_domain_irq_safe(bus->irq_domain, gpio);
  109. ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
  110. return IRQ_HANDLED;
  111. }
  112. static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
  113. {
  114. struct ssb_chipcommon *chipco = &bus->chipco;
  115. struct gpio_chip *chip = &bus->gpio;
  116. int gpio, hwirq, err;
  117. if (bus->bustype != SSB_BUSTYPE_SSB)
  118. return 0;
  119. bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops,
  120. chipco);
  121. if (!bus->irq_domain) {
  122. err = -ENODEV;
  123. goto err_irq_domain;
  124. }
  125. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  126. int irq = irq_create_mapping(bus->irq_domain, gpio);
  127. irq_set_chip_data(irq, bus);
  128. irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
  129. handle_simple_irq);
  130. }
  131. hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
  132. err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
  133. "gpio", bus);
  134. if (err)
  135. goto err_req_irq;
  136. ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
  137. chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
  138. return 0;
  139. err_req_irq:
  140. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  141. int irq = irq_find_mapping(bus->irq_domain, gpio);
  142. irq_dispose_mapping(irq);
  143. }
  144. irq_domain_remove(bus->irq_domain);
  145. err_irq_domain:
  146. return err;
  147. }
  148. static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
  149. {
  150. struct ssb_chipcommon *chipco = &bus->chipco;
  151. struct gpio_chip *chip = &bus->gpio;
  152. int gpio;
  153. if (bus->bustype != SSB_BUSTYPE_SSB)
  154. return;
  155. chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
  156. free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
  157. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  158. int irq = irq_find_mapping(bus->irq_domain, gpio);
  159. irq_dispose_mapping(irq);
  160. }
  161. irq_domain_remove(bus->irq_domain);
  162. }
  163. #else
  164. static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
  165. {
  166. return 0;
  167. }
  168. static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
  169. {
  170. }
  171. #endif
  172. static int ssb_gpio_chipco_init(struct ssb_bus *bus)
  173. {
  174. struct gpio_chip *chip = &bus->gpio;
  175. int err;
  176. chip->label = "ssb_chipco_gpio";
  177. chip->owner = THIS_MODULE;
  178. chip->request = ssb_gpio_chipco_request;
  179. chip->free = ssb_gpio_chipco_free;
  180. chip->get = ssb_gpio_chipco_get_value;
  181. chip->set = ssb_gpio_chipco_set_value;
  182. chip->direction_input = ssb_gpio_chipco_direction_input;
  183. chip->direction_output = ssb_gpio_chipco_direction_output;
  184. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  185. chip->to_irq = ssb_gpio_to_irq;
  186. #endif
  187. chip->ngpio = 16;
  188. /* There is just one SoC in one device and its GPIO addresses should be
  189. * deterministic to address them more easily. The other buses could get
  190. * a random base number.
  191. */
  192. if (bus->bustype == SSB_BUSTYPE_SSB)
  193. chip->base = 0;
  194. else
  195. chip->base = -1;
  196. err = ssb_gpio_irq_chipco_domain_init(bus);
  197. if (err)
  198. return err;
  199. err = gpiochip_add_data(chip, bus);
  200. if (err) {
  201. ssb_gpio_irq_chipco_domain_exit(bus);
  202. return err;
  203. }
  204. return 0;
  205. }
  206. /**************************************************
  207. * EXTIF
  208. **************************************************/
  209. #ifdef CONFIG_SSB_DRIVER_EXTIF
  210. static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned int gpio)
  211. {
  212. struct ssb_bus *bus = gpiochip_get_data(chip);
  213. return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
  214. }
  215. static int ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned int gpio,
  216. int value)
  217. {
  218. struct ssb_bus *bus = gpiochip_get_data(chip);
  219. ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
  220. return 0;
  221. }
  222. static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
  223. unsigned int gpio)
  224. {
  225. struct ssb_bus *bus = gpiochip_get_data(chip);
  226. ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
  227. return 0;
  228. }
  229. static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
  230. unsigned int gpio, int value)
  231. {
  232. struct ssb_bus *bus = gpiochip_get_data(chip);
  233. ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
  234. ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
  235. return 0;
  236. }
  237. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  238. static void ssb_gpio_irq_extif_mask(struct irq_data *d)
  239. {
  240. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  241. int gpio = irqd_to_hwirq(d);
  242. ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
  243. }
  244. static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
  245. {
  246. struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
  247. int gpio = irqd_to_hwirq(d);
  248. u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
  249. ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
  250. ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
  251. }
  252. static struct irq_chip ssb_gpio_irq_extif_chip = {
  253. .name = "SSB-GPIO-EXTIF",
  254. .irq_mask = ssb_gpio_irq_extif_mask,
  255. .irq_unmask = ssb_gpio_irq_extif_unmask,
  256. };
  257. static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
  258. {
  259. struct ssb_bus *bus = dev_id;
  260. struct ssb_extif *extif = &bus->extif;
  261. u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
  262. u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
  263. u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
  264. unsigned long irqs = (val ^ pol) & mask;
  265. int gpio;
  266. if (!irqs)
  267. return IRQ_NONE;
  268. for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
  269. generic_handle_domain_irq_safe(bus->irq_domain, gpio);
  270. ssb_extif_gpio_polarity(extif, irqs, val & irqs);
  271. return IRQ_HANDLED;
  272. }
  273. static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
  274. {
  275. struct ssb_extif *extif = &bus->extif;
  276. struct gpio_chip *chip = &bus->gpio;
  277. int gpio, hwirq, err;
  278. if (bus->bustype != SSB_BUSTYPE_SSB)
  279. return 0;
  280. bus->irq_domain = irq_domain_create_linear(NULL, chip->ngpio, &irq_domain_simple_ops,
  281. extif);
  282. if (!bus->irq_domain) {
  283. err = -ENODEV;
  284. goto err_irq_domain;
  285. }
  286. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  287. int irq = irq_create_mapping(bus->irq_domain, gpio);
  288. irq_set_chip_data(irq, bus);
  289. irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
  290. handle_simple_irq);
  291. }
  292. hwirq = ssb_mips_irq(bus->extif.dev) + 2;
  293. err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
  294. "gpio", bus);
  295. if (err)
  296. goto err_req_irq;
  297. ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
  298. return 0;
  299. err_req_irq:
  300. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  301. int irq = irq_find_mapping(bus->irq_domain, gpio);
  302. irq_dispose_mapping(irq);
  303. }
  304. irq_domain_remove(bus->irq_domain);
  305. err_irq_domain:
  306. return err;
  307. }
  308. static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
  309. {
  310. struct ssb_extif *extif = &bus->extif;
  311. struct gpio_chip *chip = &bus->gpio;
  312. int gpio;
  313. if (bus->bustype != SSB_BUSTYPE_SSB)
  314. return;
  315. free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
  316. for (gpio = 0; gpio < chip->ngpio; gpio++) {
  317. int irq = irq_find_mapping(bus->irq_domain, gpio);
  318. irq_dispose_mapping(irq);
  319. }
  320. irq_domain_remove(bus->irq_domain);
  321. }
  322. #else
  323. static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
  324. {
  325. return 0;
  326. }
  327. static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
  328. {
  329. }
  330. #endif
  331. static int ssb_gpio_extif_init(struct ssb_bus *bus)
  332. {
  333. struct gpio_chip *chip = &bus->gpio;
  334. int err;
  335. chip->label = "ssb_extif_gpio";
  336. chip->owner = THIS_MODULE;
  337. chip->get = ssb_gpio_extif_get_value;
  338. chip->set = ssb_gpio_extif_set_value;
  339. chip->direction_input = ssb_gpio_extif_direction_input;
  340. chip->direction_output = ssb_gpio_extif_direction_output;
  341. #if IS_ENABLED(CONFIG_SSB_EMBEDDED)
  342. chip->to_irq = ssb_gpio_to_irq;
  343. #endif
  344. chip->ngpio = 5;
  345. /* There is just one SoC in one device and its GPIO addresses should be
  346. * deterministic to address them more easily. The other buses could get
  347. * a random base number.
  348. */
  349. if (bus->bustype == SSB_BUSTYPE_SSB)
  350. chip->base = 0;
  351. else
  352. chip->base = -1;
  353. err = ssb_gpio_irq_extif_domain_init(bus);
  354. if (err)
  355. return err;
  356. err = gpiochip_add_data(chip, bus);
  357. if (err) {
  358. ssb_gpio_irq_extif_domain_exit(bus);
  359. return err;
  360. }
  361. return 0;
  362. }
  363. #else
  364. static int ssb_gpio_extif_init(struct ssb_bus *bus)
  365. {
  366. return -ENOTSUPP;
  367. }
  368. #endif
  369. /**************************************************
  370. * Init
  371. **************************************************/
  372. int ssb_gpio_init(struct ssb_bus *bus)
  373. {
  374. if (ssb_chipco_available(&bus->chipco))
  375. return ssb_gpio_chipco_init(bus);
  376. else if (ssb_extif_available(&bus->extif))
  377. return ssb_gpio_extif_init(bus);
  378. return -1;
  379. }
  380. int ssb_gpio_unregister(struct ssb_bus *bus)
  381. {
  382. if (ssb_chipco_available(&bus->chipco) ||
  383. ssb_extif_available(&bus->extif)) {
  384. gpiochip_remove(&bus->gpio);
  385. return 0;
  386. }
  387. return -1;
  388. }