bus.c 51 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
  2. // Copyright(c) 2015-17 Intel Corporation.
  3. #include <linux/acpi.h>
  4. #include <linux/delay.h>
  5. #include <linux/mod_devicetable.h>
  6. #include <linux/pm_runtime.h>
  7. #include <linux/soundwire/sdw_registers.h>
  8. #include <linux/soundwire/sdw.h>
  9. #include <linux/soundwire/sdw_type.h>
  10. #include <linux/string_choices.h>
  11. #include "bus.h"
  12. #include "irq.h"
  13. #include "sysfs_local.h"
  14. static DEFINE_IDA(sdw_bus_ida);
  15. static int sdw_get_id(struct sdw_bus *bus)
  16. {
  17. int rc = ida_alloc(&sdw_bus_ida, GFP_KERNEL);
  18. if (rc < 0)
  19. return rc;
  20. bus->id = rc;
  21. if (bus->controller_id == -1)
  22. bus->controller_id = rc;
  23. return 0;
  24. }
  25. /**
  26. * sdw_bus_master_add() - add a bus Master instance
  27. * @bus: bus instance
  28. * @parent: parent device
  29. * @fwnode: firmware node handle
  30. *
  31. * Initializes the bus instance, read properties and create child
  32. * devices.
  33. */
  34. int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
  35. struct fwnode_handle *fwnode)
  36. {
  37. struct sdw_master_prop *prop = NULL;
  38. int ret;
  39. if (!parent) {
  40. pr_err("SoundWire parent device is not set\n");
  41. return -ENODEV;
  42. }
  43. ret = sdw_get_id(bus);
  44. if (ret < 0) {
  45. dev_err(parent, "Failed to get bus id\n");
  46. return ret;
  47. }
  48. ida_init(&bus->slave_ida);
  49. ret = sdw_master_device_add(bus, parent, fwnode);
  50. if (ret < 0) {
  51. dev_err(parent, "Failed to add master device at link %d\n",
  52. bus->link_id);
  53. return ret;
  54. }
  55. if (!bus->ops) {
  56. dev_err(bus->dev, "SoundWire Bus ops are not set\n");
  57. return -EINVAL;
  58. }
  59. if (!bus->compute_params) {
  60. dev_err(bus->dev,
  61. "Bandwidth allocation not configured, compute_params no set\n");
  62. return -EINVAL;
  63. }
  64. /*
  65. * Give each bus_lock and msg_lock a unique key so that lockdep won't
  66. * trigger a deadlock warning when the locks of several buses are
  67. * grabbed during configuration of a multi-bus stream.
  68. */
  69. lockdep_register_key(&bus->msg_lock_key);
  70. __mutex_init(&bus->msg_lock, "msg_lock", &bus->msg_lock_key);
  71. lockdep_register_key(&bus->bus_lock_key);
  72. __mutex_init(&bus->bus_lock, "bus_lock", &bus->bus_lock_key);
  73. INIT_LIST_HEAD(&bus->slaves);
  74. INIT_LIST_HEAD(&bus->m_rt_list);
  75. /*
  76. * Initialize multi_link flag
  77. */
  78. bus->multi_link = false;
  79. if (bus->ops->read_prop) {
  80. ret = bus->ops->read_prop(bus);
  81. if (ret < 0) {
  82. dev_err(bus->dev,
  83. "Bus read properties failed:%d\n", ret);
  84. return ret;
  85. }
  86. }
  87. sdw_bus_debugfs_init(bus);
  88. /*
  89. * Device numbers in SoundWire are 0 through 15. Enumeration device
  90. * number (0), Broadcast device number (15), Group numbers (12 and
  91. * 13) and Master device number (14) are not used for assignment so
  92. * mask these and other higher bits.
  93. */
  94. /* Set higher order bits */
  95. *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
  96. /* Set enumeration device number and broadcast device number */
  97. set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
  98. set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
  99. /* Set group device numbers and master device number */
  100. set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
  101. set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
  102. set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
  103. ret = sdw_irq_create(bus, fwnode);
  104. if (ret)
  105. return ret;
  106. /*
  107. * SDW is an enumerable bus, but devices can be powered off. So,
  108. * they won't be able to report as present.
  109. *
  110. * Create Slave devices based on Slaves described in
  111. * the respective firmware (ACPI/DT)
  112. */
  113. if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
  114. ret = sdw_acpi_find_slaves(bus);
  115. else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
  116. ret = sdw_of_find_slaves(bus);
  117. else
  118. ret = -ENOTSUPP; /* No ACPI/DT so error out */
  119. if (ret < 0) {
  120. dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
  121. sdw_irq_delete(bus);
  122. return ret;
  123. }
  124. /*
  125. * Initialize clock values based on Master properties. The max
  126. * frequency is read from max_clk_freq property. Current assumption
  127. * is that the bus will start at highest clock frequency when
  128. * powered on.
  129. *
  130. * Default active bank will be 0 as out of reset the Slaves have
  131. * to start with bank 0 (Table 40 of Spec)
  132. */
  133. prop = &bus->prop;
  134. bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
  135. bus->params.curr_dr_freq = bus->params.max_dr_freq;
  136. bus->params.curr_bank = SDW_BANK0;
  137. bus->params.next_bank = SDW_BANK1;
  138. return 0;
  139. }
  140. EXPORT_SYMBOL(sdw_bus_master_add);
  141. static int sdw_delete_slave(struct device *dev, void *data)
  142. {
  143. struct sdw_slave *slave = dev_to_sdw_dev(dev);
  144. struct sdw_bus *bus = slave->bus;
  145. pm_runtime_disable(dev);
  146. sdw_slave_debugfs_exit(slave);
  147. mutex_lock(&bus->bus_lock);
  148. if (slave->dev_num) { /* clear dev_num if assigned */
  149. clear_bit(slave->dev_num, bus->assigned);
  150. if (bus->ops && bus->ops->put_device_num)
  151. bus->ops->put_device_num(bus, slave);
  152. }
  153. list_del_init(&slave->node);
  154. mutex_unlock(&bus->bus_lock);
  155. device_unregister(dev);
  156. return 0;
  157. }
  158. /**
  159. * sdw_bus_master_delete() - delete the bus master instance
  160. * @bus: bus to be deleted
  161. *
  162. * Remove the instance, delete the child devices.
  163. */
  164. void sdw_bus_master_delete(struct sdw_bus *bus)
  165. {
  166. device_for_each_child(bus->dev, NULL, sdw_delete_slave);
  167. sdw_irq_delete(bus);
  168. sdw_master_device_del(bus);
  169. sdw_bus_debugfs_exit(bus);
  170. lockdep_unregister_key(&bus->bus_lock_key);
  171. lockdep_unregister_key(&bus->msg_lock_key);
  172. ida_free(&sdw_bus_ida, bus->id);
  173. }
  174. EXPORT_SYMBOL(sdw_bus_master_delete);
  175. /*
  176. * SDW IO Calls
  177. */
  178. static inline int find_response_code(enum sdw_command_response resp)
  179. {
  180. switch (resp) {
  181. case SDW_CMD_OK:
  182. return 0;
  183. case SDW_CMD_IGNORED:
  184. return -ENODATA;
  185. case SDW_CMD_TIMEOUT:
  186. return -ETIMEDOUT;
  187. default:
  188. return -EIO;
  189. }
  190. }
  191. static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  192. {
  193. int retry = bus->prop.err_threshold;
  194. enum sdw_command_response resp;
  195. int ret = 0, i;
  196. for (i = 0; i <= retry; i++) {
  197. resp = bus->ops->xfer_msg(bus, msg);
  198. ret = find_response_code(resp);
  199. /* if cmd is ok or ignored return */
  200. if (ret == 0 || ret == -ENODATA)
  201. return ret;
  202. }
  203. return ret;
  204. }
  205. static inline int do_transfer_defer(struct sdw_bus *bus,
  206. struct sdw_msg *msg)
  207. {
  208. struct sdw_defer *defer = &bus->defer_msg;
  209. int retry = bus->prop.err_threshold;
  210. enum sdw_command_response resp;
  211. int ret = 0, i;
  212. defer->msg = msg;
  213. defer->length = msg->len;
  214. init_completion(&defer->complete);
  215. for (i = 0; i <= retry; i++) {
  216. resp = bus->ops->xfer_msg_defer(bus);
  217. ret = find_response_code(resp);
  218. /* if cmd is ok or ignored return */
  219. if (ret == 0 || ret == -ENODATA)
  220. return ret;
  221. }
  222. return ret;
  223. }
  224. static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
  225. {
  226. int ret;
  227. ret = do_transfer(bus, msg);
  228. if (ret != 0 && ret != -ENODATA)
  229. dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n",
  230. msg->dev_num, ret,
  231. str_write_read(msg->flags & SDW_MSG_FLAG_WRITE),
  232. msg->addr, msg->len);
  233. return ret;
  234. }
  235. /**
  236. * sdw_transfer() - Synchronous transfer message to a SDW Slave device
  237. * @bus: SDW bus
  238. * @msg: SDW message to be xfered
  239. */
  240. int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
  241. {
  242. int ret;
  243. mutex_lock(&bus->msg_lock);
  244. ret = sdw_transfer_unlocked(bus, msg);
  245. mutex_unlock(&bus->msg_lock);
  246. return ret;
  247. }
  248. /**
  249. * sdw_show_ping_status() - Direct report of PING status, to be used by Peripheral drivers
  250. * @bus: SDW bus
  251. * @sync_delay: Delay before reading status
  252. */
  253. void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay)
  254. {
  255. u32 status;
  256. if (!bus->ops->read_ping_status)
  257. return;
  258. /*
  259. * wait for peripheral to sync if desired. 10-15ms should be more than
  260. * enough in most cases.
  261. */
  262. if (sync_delay)
  263. usleep_range(10000, 15000);
  264. mutex_lock(&bus->msg_lock);
  265. status = bus->ops->read_ping_status(bus);
  266. mutex_unlock(&bus->msg_lock);
  267. if (!status)
  268. dev_warn(bus->dev, "%s: no peripherals attached\n", __func__);
  269. else
  270. dev_dbg(bus->dev, "PING status: %#x\n", status);
  271. }
  272. EXPORT_SYMBOL(sdw_show_ping_status);
  273. /**
  274. * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
  275. * @bus: SDW bus
  276. * @msg: SDW message to be xfered
  277. *
  278. * Caller needs to hold the msg_lock lock while calling this
  279. */
  280. int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg)
  281. {
  282. int ret;
  283. if (!bus->ops->xfer_msg_defer)
  284. return -ENOTSUPP;
  285. ret = do_transfer_defer(bus, msg);
  286. if (ret != 0 && ret != -ENODATA)
  287. dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
  288. msg->dev_num, ret);
  289. return ret;
  290. }
  291. int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
  292. u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
  293. {
  294. memset(msg, 0, sizeof(*msg));
  295. msg->addr = addr; /* addr is 16 bit and truncated here */
  296. msg->len = count;
  297. msg->dev_num = dev_num;
  298. msg->flags = flags;
  299. msg->buf = buf;
  300. if (addr < SDW_REG_NO_PAGE) /* no paging area */
  301. return 0;
  302. if (addr >= SDW_REG_MAX) { /* illegal addr */
  303. pr_err("SDW: Invalid address %x passed\n", addr);
  304. return -EINVAL;
  305. }
  306. if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
  307. if (slave && !slave->prop.paging_support)
  308. return 0;
  309. /* no need for else as that will fall-through to paging */
  310. }
  311. /* paging mandatory */
  312. if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
  313. pr_err("SDW: Invalid device for paging :%d\n", dev_num);
  314. return -EINVAL;
  315. }
  316. if (!slave) {
  317. pr_err("SDW: No slave for paging addr\n");
  318. return -EINVAL;
  319. }
  320. if (!slave->prop.paging_support) {
  321. dev_err(&slave->dev,
  322. "address %x needs paging but no support\n", addr);
  323. return -EINVAL;
  324. }
  325. msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
  326. msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
  327. msg->addr |= BIT(15);
  328. msg->page = true;
  329. return 0;
  330. }
  331. /*
  332. * Read/Write IO functions.
  333. */
  334. static int sdw_ntransfer_no_pm(struct sdw_slave *slave, u32 addr, u8 flags,
  335. size_t count, u8 *val)
  336. {
  337. struct sdw_msg msg;
  338. size_t size;
  339. int ret;
  340. while (count) {
  341. // Only handle bytes up to next page boundary
  342. size = min_t(size_t, count, (SDW_REGADDR + 1) - (addr & SDW_REGADDR));
  343. ret = sdw_fill_msg(&msg, slave, addr, size, slave->dev_num, flags, val);
  344. if (ret < 0)
  345. return ret;
  346. ret = sdw_transfer(slave->bus, &msg);
  347. if (ret < 0 && !slave->is_mockup_device)
  348. return ret;
  349. addr += size;
  350. val += size;
  351. count -= size;
  352. }
  353. return 0;
  354. }
  355. /**
  356. * sdw_nread_no_pm() - Read "n" contiguous SDW Slave registers with no PM
  357. * @slave: SDW Slave
  358. * @addr: Register address
  359. * @count: length
  360. * @val: Buffer for values to be read
  361. *
  362. * Note that if the message crosses a page boundary each page will be
  363. * transferred under a separate invocation of the msg_lock.
  364. */
  365. int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  366. {
  367. return sdw_ntransfer_no_pm(slave, addr, SDW_MSG_FLAG_READ, count, val);
  368. }
  369. EXPORT_SYMBOL(sdw_nread_no_pm);
  370. /**
  371. * sdw_nwrite_no_pm() - Write "n" contiguous SDW Slave registers with no PM
  372. * @slave: SDW Slave
  373. * @addr: Register address
  374. * @count: length
  375. * @val: Buffer for values to be written
  376. *
  377. * Note that if the message crosses a page boundary each page will be
  378. * transferred under a separate invocation of the msg_lock.
  379. */
  380. int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
  381. {
  382. return sdw_ntransfer_no_pm(slave, addr, SDW_MSG_FLAG_WRITE, count, (u8 *)val);
  383. }
  384. EXPORT_SYMBOL(sdw_nwrite_no_pm);
  385. /**
  386. * sdw_write_no_pm() - Write a SDW Slave register with no PM
  387. * @slave: SDW Slave
  388. * @addr: Register address
  389. * @value: Register value
  390. */
  391. int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
  392. {
  393. return sdw_nwrite_no_pm(slave, addr, 1, &value);
  394. }
  395. EXPORT_SYMBOL(sdw_write_no_pm);
  396. static int
  397. sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
  398. {
  399. struct sdw_msg msg;
  400. u8 buf;
  401. int ret;
  402. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  403. SDW_MSG_FLAG_READ, &buf);
  404. if (ret < 0)
  405. return ret;
  406. ret = sdw_transfer(bus, &msg);
  407. if (ret < 0)
  408. return ret;
  409. return buf;
  410. }
  411. static int
  412. sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
  413. {
  414. struct sdw_msg msg;
  415. int ret;
  416. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  417. SDW_MSG_FLAG_WRITE, &value);
  418. if (ret < 0)
  419. return ret;
  420. return sdw_transfer(bus, &msg);
  421. }
  422. int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
  423. {
  424. struct sdw_msg msg;
  425. u8 buf;
  426. int ret;
  427. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  428. SDW_MSG_FLAG_READ, &buf);
  429. if (ret < 0)
  430. return ret;
  431. ret = sdw_transfer_unlocked(bus, &msg);
  432. if (ret < 0)
  433. return ret;
  434. return buf;
  435. }
  436. EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
  437. int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
  438. {
  439. struct sdw_msg msg;
  440. int ret;
  441. ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
  442. SDW_MSG_FLAG_WRITE, &value);
  443. if (ret < 0)
  444. return ret;
  445. return sdw_transfer_unlocked(bus, &msg);
  446. }
  447. EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
  448. /**
  449. * sdw_read_no_pm() - Read a SDW Slave register with no PM
  450. * @slave: SDW Slave
  451. * @addr: Register address
  452. */
  453. int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
  454. {
  455. u8 buf;
  456. int ret;
  457. ret = sdw_nread_no_pm(slave, addr, 1, &buf);
  458. if (ret < 0)
  459. return ret;
  460. else
  461. return buf;
  462. }
  463. EXPORT_SYMBOL(sdw_read_no_pm);
  464. int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
  465. {
  466. int tmp;
  467. tmp = sdw_read_no_pm(slave, addr);
  468. if (tmp < 0)
  469. return tmp;
  470. tmp = (tmp & ~mask) | val;
  471. return sdw_write_no_pm(slave, addr, tmp);
  472. }
  473. EXPORT_SYMBOL(sdw_update_no_pm);
  474. /* Read-Modify-Write Slave register */
  475. int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
  476. {
  477. int tmp;
  478. tmp = sdw_read(slave, addr);
  479. if (tmp < 0)
  480. return tmp;
  481. tmp = (tmp & ~mask) | val;
  482. return sdw_write(slave, addr, tmp);
  483. }
  484. EXPORT_SYMBOL(sdw_update);
  485. /**
  486. * sdw_nread() - Read "n" contiguous SDW Slave registers
  487. * @slave: SDW Slave
  488. * @addr: Register address
  489. * @count: length
  490. * @val: Buffer for values to be read
  491. *
  492. * This version of the function will take a PM reference to the slave
  493. * device.
  494. * Note that if the message crosses a page boundary each page will be
  495. * transferred under a separate invocation of the msg_lock.
  496. */
  497. int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
  498. {
  499. int ret;
  500. ret = pm_runtime_get_sync(&slave->dev);
  501. if (ret < 0 && ret != -EACCES) {
  502. pm_runtime_put_noidle(&slave->dev);
  503. return ret;
  504. }
  505. ret = sdw_nread_no_pm(slave, addr, count, val);
  506. pm_runtime_mark_last_busy(&slave->dev);
  507. pm_runtime_put(&slave->dev);
  508. return ret;
  509. }
  510. EXPORT_SYMBOL(sdw_nread);
  511. /**
  512. * sdw_nwrite() - Write "n" contiguous SDW Slave registers
  513. * @slave: SDW Slave
  514. * @addr: Register address
  515. * @count: length
  516. * @val: Buffer for values to be written
  517. *
  518. * This version of the function will take a PM reference to the slave
  519. * device.
  520. * Note that if the message crosses a page boundary each page will be
  521. * transferred under a separate invocation of the msg_lock.
  522. */
  523. int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
  524. {
  525. int ret;
  526. ret = pm_runtime_get_sync(&slave->dev);
  527. if (ret < 0 && ret != -EACCES) {
  528. pm_runtime_put_noidle(&slave->dev);
  529. return ret;
  530. }
  531. ret = sdw_nwrite_no_pm(slave, addr, count, val);
  532. pm_runtime_mark_last_busy(&slave->dev);
  533. pm_runtime_put(&slave->dev);
  534. return ret;
  535. }
  536. EXPORT_SYMBOL(sdw_nwrite);
  537. /**
  538. * sdw_read() - Read a SDW Slave register
  539. * @slave: SDW Slave
  540. * @addr: Register address
  541. *
  542. * This version of the function will take a PM reference to the slave
  543. * device.
  544. */
  545. int sdw_read(struct sdw_slave *slave, u32 addr)
  546. {
  547. u8 buf;
  548. int ret;
  549. ret = sdw_nread(slave, addr, 1, &buf);
  550. if (ret < 0)
  551. return ret;
  552. return buf;
  553. }
  554. EXPORT_SYMBOL(sdw_read);
  555. /**
  556. * sdw_write() - Write a SDW Slave register
  557. * @slave: SDW Slave
  558. * @addr: Register address
  559. * @value: Register value
  560. *
  561. * This version of the function will take a PM reference to the slave
  562. * device.
  563. */
  564. int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
  565. {
  566. return sdw_nwrite(slave, addr, 1, &value);
  567. }
  568. EXPORT_SYMBOL(sdw_write);
  569. /*
  570. * SDW alert handling
  571. */
  572. /* called with bus_lock held */
  573. static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
  574. {
  575. struct sdw_slave *slave;
  576. list_for_each_entry(slave, &bus->slaves, node) {
  577. if (slave->dev_num == i)
  578. return slave;
  579. }
  580. return NULL;
  581. }
  582. int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
  583. {
  584. if (slave->id.mfg_id != id.mfg_id ||
  585. slave->id.part_id != id.part_id ||
  586. slave->id.class_id != id.class_id ||
  587. (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
  588. slave->id.unique_id != id.unique_id))
  589. return -ENODEV;
  590. return 0;
  591. }
  592. EXPORT_SYMBOL(sdw_compare_devid);
  593. /* called with bus_lock held */
  594. static int sdw_get_device_num(struct sdw_slave *slave)
  595. {
  596. struct sdw_bus *bus = slave->bus;
  597. int bit;
  598. if (bus->ops && bus->ops->get_device_num) {
  599. bit = bus->ops->get_device_num(bus, slave);
  600. if (bit < 0)
  601. goto err;
  602. } else {
  603. bit = find_first_zero_bit(bus->assigned, SDW_MAX_DEVICES);
  604. if (bit == SDW_MAX_DEVICES) {
  605. bit = -ENODEV;
  606. goto err;
  607. }
  608. }
  609. /*
  610. * Do not update dev_num in Slave data structure here,
  611. * Update once program dev_num is successful
  612. */
  613. set_bit(bit, bus->assigned);
  614. err:
  615. return bit;
  616. }
  617. static int sdw_assign_device_num(struct sdw_slave *slave)
  618. {
  619. struct sdw_bus *bus = slave->bus;
  620. struct device *dev = bus->dev;
  621. int ret;
  622. /* check first if device number is assigned, if so reuse that */
  623. if (!slave->dev_num) {
  624. if (!slave->dev_num_sticky) {
  625. int dev_num;
  626. mutex_lock(&slave->bus->bus_lock);
  627. dev_num = sdw_get_device_num(slave);
  628. mutex_unlock(&slave->bus->bus_lock);
  629. if (dev_num < 0) {
  630. dev_err(dev, "Get dev_num failed: %d\n", dev_num);
  631. return dev_num;
  632. }
  633. slave->dev_num_sticky = dev_num;
  634. } else {
  635. dev_dbg(dev, "Slave already registered, reusing dev_num: %d\n",
  636. slave->dev_num_sticky);
  637. }
  638. }
  639. /* Clear the slave->dev_num to transfer message on device 0 */
  640. slave->dev_num = 0;
  641. ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, slave->dev_num_sticky);
  642. if (ret < 0) {
  643. dev_err(dev, "Program device_num %d failed: %d\n",
  644. slave->dev_num_sticky, ret);
  645. return ret;
  646. }
  647. /* After xfer of msg, restore dev_num */
  648. slave->dev_num = slave->dev_num_sticky;
  649. if (bus->ops && bus->ops->new_peripheral_assigned)
  650. bus->ops->new_peripheral_assigned(bus, slave, slave->dev_num);
  651. return 0;
  652. }
  653. void sdw_extract_slave_id(struct sdw_bus *bus,
  654. u64 addr, struct sdw_slave_id *id)
  655. {
  656. dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
  657. id->sdw_version = SDW_VERSION(addr);
  658. id->unique_id = SDW_UNIQUE_ID(addr);
  659. id->mfg_id = SDW_MFG_ID(addr);
  660. id->part_id = SDW_PART_ID(addr);
  661. id->class_id = SDW_CLASS_ID(addr);
  662. dev_dbg(bus->dev,
  663. "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n",
  664. id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version);
  665. }
  666. EXPORT_SYMBOL(sdw_extract_slave_id);
  667. bool is_clock_scaling_supported_by_slave(struct sdw_slave *slave)
  668. {
  669. /*
  670. * Dynamic scaling is a defined by SDCA. However, some devices expose the class ID but
  671. * can't support dynamic scaling. We might need a quirk to handle such devices.
  672. */
  673. return slave->id.class_id;
  674. }
  675. EXPORT_SYMBOL(is_clock_scaling_supported_by_slave);
  676. static int sdw_program_device_num(struct sdw_bus *bus, bool *programmed)
  677. {
  678. u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
  679. struct sdw_slave *slave, *_s;
  680. struct sdw_slave_id id;
  681. struct sdw_msg msg;
  682. bool found;
  683. int count = 0, ret;
  684. u64 addr;
  685. *programmed = false;
  686. /* No Slave, so use raw xfer api */
  687. ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
  688. SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
  689. if (ret < 0)
  690. return ret;
  691. do {
  692. ret = sdw_transfer(bus, &msg);
  693. if (ret == -ENODATA) { /* end of device id reads */
  694. dev_dbg(bus->dev, "No more devices to enumerate\n");
  695. ret = 0;
  696. break;
  697. }
  698. if (ret < 0) {
  699. dev_err(bus->dev, "DEVID read fail:%d\n", ret);
  700. break;
  701. }
  702. /*
  703. * Construct the addr and extract. Cast the higher shift
  704. * bits to avoid truncation due to size limit.
  705. */
  706. addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
  707. ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
  708. ((u64)buf[0] << 40);
  709. sdw_extract_slave_id(bus, addr, &id);
  710. found = false;
  711. /* Now compare with entries */
  712. list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
  713. if (sdw_compare_devid(slave, id) == 0) {
  714. found = true;
  715. /*
  716. * To prevent skipping state-machine stages don't
  717. * program a device until we've seen it UNATTACH.
  718. * Must return here because no other device on #0
  719. * can be detected until this one has been
  720. * assigned a device ID.
  721. */
  722. if (slave->status != SDW_SLAVE_UNATTACHED)
  723. return 0;
  724. /*
  725. * Assign a new dev_num to this Slave and
  726. * not mark it present. It will be marked
  727. * present after it reports ATTACHED on new
  728. * dev_num
  729. */
  730. ret = sdw_assign_device_num(slave);
  731. if (ret < 0) {
  732. dev_err(bus->dev,
  733. "Assign dev_num failed:%d\n",
  734. ret);
  735. return ret;
  736. }
  737. *programmed = true;
  738. break;
  739. }
  740. }
  741. if (!found) {
  742. /* TODO: Park this device in Group 13 */
  743. /*
  744. * add Slave device even if there is no platform
  745. * firmware description. There will be no driver probe
  746. * but the user/integration will be able to see the
  747. * device, enumeration status and device number in sysfs
  748. */
  749. sdw_slave_add(bus, &id, NULL);
  750. dev_err(bus->dev, "Slave Entry not found\n");
  751. }
  752. count++;
  753. /*
  754. * Check till error out or retry (count) exhausts.
  755. * Device can drop off and rejoin during enumeration
  756. * so count till twice the bound.
  757. */
  758. } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
  759. return ret;
  760. }
  761. static void sdw_modify_slave_status(struct sdw_slave *slave,
  762. enum sdw_slave_status status)
  763. {
  764. struct sdw_bus *bus = slave->bus;
  765. mutex_lock(&bus->bus_lock);
  766. dev_vdbg(bus->dev,
  767. "changing status slave %d status %d new status %d\n",
  768. slave->dev_num, slave->status, status);
  769. if (status == SDW_SLAVE_UNATTACHED) {
  770. dev_dbg(&slave->dev,
  771. "initializing enumeration and init completion for Slave %d\n",
  772. slave->dev_num);
  773. reinit_completion(&slave->enumeration_complete);
  774. reinit_completion(&slave->initialization_complete);
  775. } else if ((status == SDW_SLAVE_ATTACHED) &&
  776. (slave->status == SDW_SLAVE_UNATTACHED)) {
  777. dev_dbg(&slave->dev,
  778. "signaling enumeration completion for Slave %d\n",
  779. slave->dev_num);
  780. complete_all(&slave->enumeration_complete);
  781. }
  782. slave->status = status;
  783. mutex_unlock(&bus->bus_lock);
  784. }
  785. static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
  786. enum sdw_clk_stop_mode mode,
  787. enum sdw_clk_stop_type type)
  788. {
  789. int ret = 0;
  790. mutex_lock(&slave->sdw_dev_lock);
  791. if (slave->probed) {
  792. struct device *dev = &slave->dev;
  793. struct sdw_driver *drv = drv_to_sdw_driver(dev->driver);
  794. if (drv->ops && drv->ops->clk_stop)
  795. ret = drv->ops->clk_stop(slave, mode, type);
  796. }
  797. mutex_unlock(&slave->sdw_dev_lock);
  798. return ret;
  799. }
  800. static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
  801. enum sdw_clk_stop_mode mode,
  802. bool prepare)
  803. {
  804. bool wake_en;
  805. u32 val = 0;
  806. int ret;
  807. wake_en = slave->prop.wake_capable;
  808. if (prepare) {
  809. val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
  810. if (mode == SDW_CLK_STOP_MODE1)
  811. val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
  812. if (wake_en)
  813. val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
  814. } else {
  815. ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
  816. if (ret < 0) {
  817. if (ret != -ENODATA)
  818. dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret);
  819. return ret;
  820. }
  821. val = ret;
  822. val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
  823. }
  824. ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
  825. if (ret < 0 && ret != -ENODATA)
  826. dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret);
  827. return ret;
  828. }
  829. static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num, bool prepare)
  830. {
  831. int retry = bus->clk_stop_timeout;
  832. int val;
  833. do {
  834. val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT);
  835. if (val < 0) {
  836. if (val != -ENODATA)
  837. dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val);
  838. return val;
  839. }
  840. val &= SDW_SCP_STAT_CLK_STP_NF;
  841. if (!val) {
  842. dev_dbg(bus->dev, "clock stop %s done slave:%d\n",
  843. prepare ? "prepare" : "deprepare",
  844. dev_num);
  845. return 0;
  846. }
  847. usleep_range(1000, 1500);
  848. retry--;
  849. } while (retry);
  850. dev_dbg(bus->dev, "clock stop %s did not complete for slave:%d\n",
  851. prepare ? "prepare" : "deprepare",
  852. dev_num);
  853. return -ETIMEDOUT;
  854. }
  855. /**
  856. * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
  857. *
  858. * @bus: SDW bus instance
  859. *
  860. * Query Slave for clock stop mode and prepare for that mode.
  861. */
  862. int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
  863. {
  864. bool simple_clk_stop = true;
  865. struct sdw_slave *slave;
  866. bool is_slave = false;
  867. int ret = 0;
  868. /*
  869. * In order to save on transition time, prepare
  870. * each Slave and then wait for all Slave(s) to be
  871. * prepared for clock stop.
  872. * If one of the Slave devices has lost sync and
  873. * replies with Command Ignored/-ENODATA, we continue
  874. * the loop
  875. */
  876. list_for_each_entry(slave, &bus->slaves, node) {
  877. if (!slave->dev_num)
  878. continue;
  879. if (slave->status != SDW_SLAVE_ATTACHED &&
  880. slave->status != SDW_SLAVE_ALERT)
  881. continue;
  882. /* Identify if Slave(s) are available on Bus */
  883. is_slave = true;
  884. ret = sdw_slave_clk_stop_callback(slave,
  885. SDW_CLK_STOP_MODE0,
  886. SDW_CLK_PRE_PREPARE);
  887. if (ret < 0 && ret != -ENODATA) {
  888. dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret);
  889. return ret;
  890. }
  891. /* Only prepare a Slave device if needed */
  892. if (!slave->prop.simple_clk_stop_capable) {
  893. simple_clk_stop = false;
  894. ret = sdw_slave_clk_stop_prepare(slave,
  895. SDW_CLK_STOP_MODE0,
  896. true);
  897. if (ret < 0 && ret != -ENODATA) {
  898. dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret);
  899. return ret;
  900. }
  901. }
  902. }
  903. /* Skip remaining clock stop preparation if no Slave is attached */
  904. if (!is_slave)
  905. return 0;
  906. /*
  907. * Don't wait for all Slaves to be ready if they follow the simple
  908. * state machine
  909. */
  910. if (!simple_clk_stop) {
  911. ret = sdw_bus_wait_for_clk_prep_deprep(bus,
  912. SDW_BROADCAST_DEV_NUM, true);
  913. /*
  914. * if there are no Slave devices present and the reply is
  915. * Command_Ignored/-ENODATA, we don't need to continue with the
  916. * flow and can just return here. The error code is not modified
  917. * and its handling left as an exercise for the caller.
  918. */
  919. if (ret < 0)
  920. return ret;
  921. }
  922. /* Inform slaves that prep is done */
  923. list_for_each_entry(slave, &bus->slaves, node) {
  924. if (!slave->dev_num)
  925. continue;
  926. if (slave->status != SDW_SLAVE_ATTACHED &&
  927. slave->status != SDW_SLAVE_ALERT)
  928. continue;
  929. ret = sdw_slave_clk_stop_callback(slave,
  930. SDW_CLK_STOP_MODE0,
  931. SDW_CLK_POST_PREPARE);
  932. if (ret < 0 && ret != -ENODATA) {
  933. dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret);
  934. return ret;
  935. }
  936. }
  937. return 0;
  938. }
  939. EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
  940. /**
  941. * sdw_bus_clk_stop: stop bus clock
  942. *
  943. * @bus: SDW bus instance
  944. *
  945. * After preparing the Slaves for clock stop, stop the clock by broadcasting
  946. * write to SCP_CTRL register.
  947. */
  948. int sdw_bus_clk_stop(struct sdw_bus *bus)
  949. {
  950. int ret;
  951. /*
  952. * broadcast clock stop now, attached Slaves will ACK this,
  953. * unattached will ignore
  954. */
  955. ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
  956. SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
  957. if (ret < 0) {
  958. if (ret != -ENODATA)
  959. dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret);
  960. return ret;
  961. }
  962. return 0;
  963. }
  964. EXPORT_SYMBOL(sdw_bus_clk_stop);
  965. /**
  966. * sdw_bus_exit_clk_stop: Exit clock stop mode
  967. *
  968. * @bus: SDW bus instance
  969. *
  970. * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
  971. * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
  972. * back.
  973. */
  974. int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
  975. {
  976. bool simple_clk_stop = true;
  977. struct sdw_slave *slave;
  978. bool is_slave = false;
  979. int ret;
  980. /*
  981. * In order to save on transition time, de-prepare
  982. * each Slave and then wait for all Slave(s) to be
  983. * de-prepared after clock resume.
  984. */
  985. list_for_each_entry(slave, &bus->slaves, node) {
  986. if (!slave->dev_num)
  987. continue;
  988. if (slave->status != SDW_SLAVE_ATTACHED &&
  989. slave->status != SDW_SLAVE_ALERT)
  990. continue;
  991. /* Identify if Slave(s) are available on Bus */
  992. is_slave = true;
  993. ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0,
  994. SDW_CLK_PRE_DEPREPARE);
  995. if (ret < 0)
  996. dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret);
  997. /* Only de-prepare a Slave device if needed */
  998. if (!slave->prop.simple_clk_stop_capable) {
  999. simple_clk_stop = false;
  1000. ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0,
  1001. false);
  1002. if (ret < 0)
  1003. dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret);
  1004. }
  1005. }
  1006. /* Skip remaining clock stop de-preparation if no Slave is attached */
  1007. if (!is_slave)
  1008. return 0;
  1009. /*
  1010. * Don't wait for all Slaves to be ready if they follow the simple
  1011. * state machine
  1012. */
  1013. if (!simple_clk_stop) {
  1014. ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM, false);
  1015. if (ret < 0)
  1016. dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret);
  1017. }
  1018. list_for_each_entry(slave, &bus->slaves, node) {
  1019. if (!slave->dev_num)
  1020. continue;
  1021. if (slave->status != SDW_SLAVE_ATTACHED &&
  1022. slave->status != SDW_SLAVE_ALERT)
  1023. continue;
  1024. ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0,
  1025. SDW_CLK_POST_DEPREPARE);
  1026. if (ret < 0)
  1027. dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret);
  1028. }
  1029. return 0;
  1030. }
  1031. EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
  1032. int sdw_configure_dpn_intr(struct sdw_slave *slave,
  1033. int port, bool enable, int mask)
  1034. {
  1035. u32 addr;
  1036. int ret;
  1037. u8 val = 0;
  1038. if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
  1039. dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
  1040. str_on_off(enable));
  1041. mask |= SDW_DPN_INT_TEST_FAIL;
  1042. }
  1043. addr = SDW_DPN_INTMASK(port);
  1044. /* Set/Clear port ready interrupt mask */
  1045. if (enable) {
  1046. val |= mask;
  1047. val |= SDW_DPN_INT_PORT_READY;
  1048. } else {
  1049. val &= ~(mask);
  1050. val &= ~SDW_DPN_INT_PORT_READY;
  1051. }
  1052. ret = sdw_update_no_pm(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
  1053. if (ret < 0)
  1054. dev_err(&slave->dev,
  1055. "SDW_DPN_INTMASK write failed:%d\n", val);
  1056. return ret;
  1057. }
  1058. int sdw_slave_get_scale_index(struct sdw_slave *slave, u8 *base)
  1059. {
  1060. u32 mclk_freq = slave->bus->prop.mclk_freq;
  1061. u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
  1062. unsigned int scale;
  1063. u8 scale_index;
  1064. if (!mclk_freq) {
  1065. dev_err(&slave->dev,
  1066. "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
  1067. return -EINVAL;
  1068. }
  1069. /*
  1070. * map base frequency using Table 89 of SoundWire 1.2 spec.
  1071. * The order of the tests just follows the specification, this
  1072. * is not a selection between possible values or a search for
  1073. * the best value but just a mapping. Only one case per platform
  1074. * is relevant.
  1075. * Some BIOS have inconsistent values for mclk_freq but a
  1076. * correct root so we force the mclk_freq to avoid variations.
  1077. */
  1078. if (!(19200000 % mclk_freq)) {
  1079. mclk_freq = 19200000;
  1080. *base = SDW_SCP_BASE_CLOCK_19200000_HZ;
  1081. } else if (!(22579200 % mclk_freq)) {
  1082. mclk_freq = 22579200;
  1083. *base = SDW_SCP_BASE_CLOCK_22579200_HZ;
  1084. } else if (!(24576000 % mclk_freq)) {
  1085. mclk_freq = 24576000;
  1086. *base = SDW_SCP_BASE_CLOCK_24576000_HZ;
  1087. } else if (!(32000000 % mclk_freq)) {
  1088. mclk_freq = 32000000;
  1089. *base = SDW_SCP_BASE_CLOCK_32000000_HZ;
  1090. } else if (!(96000000 % mclk_freq)) {
  1091. mclk_freq = 24000000;
  1092. *base = SDW_SCP_BASE_CLOCK_24000000_HZ;
  1093. } else {
  1094. dev_err(&slave->dev,
  1095. "Unsupported clock base, mclk %d\n",
  1096. mclk_freq);
  1097. return -EINVAL;
  1098. }
  1099. if (mclk_freq % curr_freq) {
  1100. dev_err(&slave->dev,
  1101. "mclk %d is not multiple of bus curr_freq %d\n",
  1102. mclk_freq, curr_freq);
  1103. return -EINVAL;
  1104. }
  1105. scale = mclk_freq / curr_freq;
  1106. /*
  1107. * map scale to Table 90 of SoundWire 1.2 spec - and check
  1108. * that the scale is a power of two and maximum 64
  1109. */
  1110. scale_index = ilog2(scale);
  1111. if (BIT(scale_index) != scale || scale_index > 6) {
  1112. dev_err(&slave->dev,
  1113. "No match found for scale %d, bus mclk %d curr_freq %d\n",
  1114. scale, mclk_freq, curr_freq);
  1115. return -EINVAL;
  1116. }
  1117. scale_index++;
  1118. dev_dbg(&slave->dev,
  1119. "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
  1120. *base, scale_index, mclk_freq, curr_freq);
  1121. return scale_index;
  1122. }
  1123. EXPORT_SYMBOL(sdw_slave_get_scale_index);
  1124. int sdw_slave_get_current_bank(struct sdw_slave *slave)
  1125. {
  1126. int tmp;
  1127. tmp = sdw_read(slave, SDW_SCP_CTRL);
  1128. if (tmp < 0)
  1129. return tmp;
  1130. return FIELD_GET(SDW_SCP_STAT_CURR_BANK, tmp);
  1131. }
  1132. EXPORT_SYMBOL_GPL(sdw_slave_get_current_bank);
  1133. static int sdw_slave_set_frequency(struct sdw_slave *slave)
  1134. {
  1135. int scale_index;
  1136. u8 base;
  1137. int ret;
  1138. /*
  1139. * frequency base and scale registers are required for SDCA
  1140. * devices. They may also be used for 1.2+/non-SDCA devices.
  1141. * Driver can set the property directly, for now there's no
  1142. * DisCo property to discover support for the scaling registers
  1143. * from platform firmware.
  1144. */
  1145. if (!slave->id.class_id && !slave->prop.clock_reg_supported)
  1146. return 0;
  1147. scale_index = sdw_slave_get_scale_index(slave, &base);
  1148. if (scale_index < 0)
  1149. return scale_index;
  1150. ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base);
  1151. if (ret < 0) {
  1152. dev_err(&slave->dev,
  1153. "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
  1154. return ret;
  1155. }
  1156. /* initialize scale for both banks */
  1157. ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
  1158. if (ret < 0) {
  1159. dev_err(&slave->dev,
  1160. "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
  1161. return ret;
  1162. }
  1163. ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
  1164. if (ret < 0)
  1165. dev_err(&slave->dev,
  1166. "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
  1167. return ret;
  1168. }
  1169. static int sdw_initialize_slave(struct sdw_slave *slave)
  1170. {
  1171. struct sdw_slave_prop *prop = &slave->prop;
  1172. int status;
  1173. int ret;
  1174. u8 val;
  1175. ret = sdw_slave_set_frequency(slave);
  1176. if (ret < 0)
  1177. return ret;
  1178. if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) {
  1179. /* Clear bus clash interrupt before enabling interrupt mask */
  1180. status = sdw_read_no_pm(slave, SDW_SCP_INT1);
  1181. if (status < 0) {
  1182. dev_err(&slave->dev,
  1183. "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status);
  1184. return status;
  1185. }
  1186. if (status & SDW_SCP_INT1_BUS_CLASH) {
  1187. dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n");
  1188. ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH);
  1189. if (ret < 0) {
  1190. dev_err(&slave->dev,
  1191. "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret);
  1192. return ret;
  1193. }
  1194. }
  1195. }
  1196. if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) &&
  1197. !(prop->quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) {
  1198. /* Clear parity interrupt before enabling interrupt mask */
  1199. status = sdw_read_no_pm(slave, SDW_SCP_INT1);
  1200. if (status < 0) {
  1201. dev_err(&slave->dev,
  1202. "SDW_SCP_INT1 (PARITY) read failed:%d\n", status);
  1203. return status;
  1204. }
  1205. if (status & SDW_SCP_INT1_PARITY) {
  1206. dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n");
  1207. ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY);
  1208. if (ret < 0) {
  1209. dev_err(&slave->dev,
  1210. "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret);
  1211. return ret;
  1212. }
  1213. }
  1214. }
  1215. /*
  1216. * Set SCP_INT1_MASK register, typically bus clash and
  1217. * implementation-defined interrupt mask. The Parity detection
  1218. * may not always be correct on startup so its use is
  1219. * device-dependent, it might e.g. only be enabled in
  1220. * steady-state after a couple of frames.
  1221. */
  1222. val = prop->scp_int1_mask;
  1223. /* Enable SCP interrupts */
  1224. ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val);
  1225. if (ret < 0) {
  1226. dev_err(&slave->dev,
  1227. "SDW_SCP_INTMASK1 write failed:%d\n", ret);
  1228. return ret;
  1229. }
  1230. /* No need to continue if DP0 is not present */
  1231. if (!prop->dp0_prop)
  1232. return 0;
  1233. /* Enable DP0 interrupts */
  1234. val = prop->dp0_prop->imp_def_interrupts;
  1235. val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
  1236. ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val);
  1237. if (ret < 0)
  1238. dev_err(&slave->dev,
  1239. "SDW_DP0_INTMASK read failed:%d\n", ret);
  1240. return ret;
  1241. }
  1242. static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
  1243. {
  1244. u8 clear, impl_int_mask;
  1245. int status, status2, ret, count = 0;
  1246. status = sdw_read_no_pm(slave, SDW_DP0_INT);
  1247. if (status < 0) {
  1248. dev_err(&slave->dev,
  1249. "SDW_DP0_INT read failed:%d\n", status);
  1250. return status;
  1251. }
  1252. do {
  1253. clear = status & ~(SDW_DP0_INTERRUPTS | SDW_DP0_SDCA_CASCADE);
  1254. if (status & SDW_DP0_INT_TEST_FAIL) {
  1255. dev_err(&slave->dev, "Test fail for port 0\n");
  1256. clear |= SDW_DP0_INT_TEST_FAIL;
  1257. }
  1258. /*
  1259. * Assumption: PORT_READY interrupt will be received only for
  1260. * ports implementing Channel Prepare state machine (CP_SM)
  1261. */
  1262. if (status & SDW_DP0_INT_PORT_READY) {
  1263. complete(&slave->port_ready[0]);
  1264. clear |= SDW_DP0_INT_PORT_READY;
  1265. }
  1266. if (status & SDW_DP0_INT_BRA_FAILURE) {
  1267. dev_err(&slave->dev, "BRA failed\n");
  1268. clear |= SDW_DP0_INT_BRA_FAILURE;
  1269. }
  1270. impl_int_mask = SDW_DP0_INT_IMPDEF1 |
  1271. SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
  1272. if (status & impl_int_mask) {
  1273. clear |= impl_int_mask;
  1274. *slave_status = clear;
  1275. }
  1276. /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */
  1277. ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear);
  1278. if (ret < 0) {
  1279. dev_err(&slave->dev,
  1280. "SDW_DP0_INT write failed:%d\n", ret);
  1281. return ret;
  1282. }
  1283. /* Read DP0 interrupt again */
  1284. status2 = sdw_read_no_pm(slave, SDW_DP0_INT);
  1285. if (status2 < 0) {
  1286. dev_err(&slave->dev,
  1287. "SDW_DP0_INT read failed:%d\n", status2);
  1288. return status2;
  1289. }
  1290. /* filter to limit loop to interrupts identified in the first status read */
  1291. status &= status2;
  1292. count++;
  1293. /* we can get alerts while processing so keep retrying */
  1294. } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
  1295. if (count == SDW_READ_INTR_CLEAR_RETRY)
  1296. dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n");
  1297. return ret;
  1298. }
  1299. static int sdw_handle_port_interrupt(struct sdw_slave *slave,
  1300. int port, u8 *slave_status)
  1301. {
  1302. u8 clear, impl_int_mask;
  1303. int status, status2, ret, count = 0;
  1304. u32 addr;
  1305. if (port == 0)
  1306. return sdw_handle_dp0_interrupt(slave, slave_status);
  1307. addr = SDW_DPN_INT(port);
  1308. status = sdw_read_no_pm(slave, addr);
  1309. if (status < 0) {
  1310. dev_err(&slave->dev,
  1311. "SDW_DPN_INT read failed:%d\n", status);
  1312. return status;
  1313. }
  1314. do {
  1315. clear = status & ~SDW_DPN_INTERRUPTS;
  1316. if (status & SDW_DPN_INT_TEST_FAIL) {
  1317. dev_err(&slave->dev, "Test fail for port:%d\n", port);
  1318. clear |= SDW_DPN_INT_TEST_FAIL;
  1319. }
  1320. /*
  1321. * Assumption: PORT_READY interrupt will be received only
  1322. * for ports implementing CP_SM.
  1323. */
  1324. if (status & SDW_DPN_INT_PORT_READY) {
  1325. complete(&slave->port_ready[port]);
  1326. clear |= SDW_DPN_INT_PORT_READY;
  1327. }
  1328. impl_int_mask = SDW_DPN_INT_IMPDEF1 |
  1329. SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
  1330. if (status & impl_int_mask) {
  1331. clear |= impl_int_mask;
  1332. *slave_status = clear;
  1333. }
  1334. /* clear the interrupt but don't touch reserved fields */
  1335. ret = sdw_write_no_pm(slave, addr, clear);
  1336. if (ret < 0) {
  1337. dev_err(&slave->dev,
  1338. "SDW_DPN_INT write failed:%d\n", ret);
  1339. return ret;
  1340. }
  1341. /* Read DPN interrupt again */
  1342. status2 = sdw_read_no_pm(slave, addr);
  1343. if (status2 < 0) {
  1344. dev_err(&slave->dev,
  1345. "SDW_DPN_INT read failed:%d\n", status2);
  1346. return status2;
  1347. }
  1348. /* filter to limit loop to interrupts identified in the first status read */
  1349. status &= status2;
  1350. count++;
  1351. /* we can get alerts while processing so keep retrying */
  1352. } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
  1353. if (count == SDW_READ_INTR_CLEAR_RETRY)
  1354. dev_warn(&slave->dev, "Reached MAX_RETRY on port read");
  1355. return ret;
  1356. }
  1357. static int sdw_handle_slave_alerts(struct sdw_slave *slave)
  1358. {
  1359. struct sdw_slave_intr_status slave_intr;
  1360. u8 clear = 0, bit, port_status[15] = {0};
  1361. int port_num, stat, ret, count = 0;
  1362. unsigned long port;
  1363. bool slave_notify;
  1364. u8 sdca_cascade = 0;
  1365. u8 buf, buf2[2];
  1366. bool parity_check;
  1367. bool parity_quirk;
  1368. sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
  1369. ret = pm_runtime_get_sync(&slave->dev);
  1370. if (ret < 0 && ret != -EACCES) {
  1371. dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
  1372. pm_runtime_put_noidle(&slave->dev);
  1373. return ret;
  1374. }
  1375. /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
  1376. ret = sdw_read_no_pm(slave, SDW_SCP_INT1);
  1377. if (ret < 0) {
  1378. dev_err(&slave->dev,
  1379. "SDW_SCP_INT1 read failed:%d\n", ret);
  1380. goto io_err;
  1381. }
  1382. buf = ret;
  1383. ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2);
  1384. if (ret < 0) {
  1385. dev_err(&slave->dev,
  1386. "SDW_SCP_INT2/3 read failed:%d\n", ret);
  1387. goto io_err;
  1388. }
  1389. if (slave->id.class_id) {
  1390. ret = sdw_read_no_pm(slave, SDW_DP0_INT);
  1391. if (ret < 0) {
  1392. dev_err(&slave->dev,
  1393. "SDW_DP0_INT read failed:%d\n", ret);
  1394. goto io_err;
  1395. }
  1396. sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
  1397. }
  1398. do {
  1399. slave_notify = false;
  1400. /*
  1401. * Check parity, bus clash and Slave (impl defined)
  1402. * interrupt
  1403. */
  1404. if (buf & SDW_SCP_INT1_PARITY) {
  1405. parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
  1406. parity_quirk = !slave->first_interrupt_done &&
  1407. (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
  1408. if (parity_check && !parity_quirk)
  1409. dev_err(&slave->dev, "Parity error detected\n");
  1410. clear |= SDW_SCP_INT1_PARITY;
  1411. }
  1412. if (buf & SDW_SCP_INT1_BUS_CLASH) {
  1413. if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
  1414. dev_err(&slave->dev, "Bus clash detected\n");
  1415. clear |= SDW_SCP_INT1_BUS_CLASH;
  1416. }
  1417. /*
  1418. * When bus clash or parity errors are detected, such errors
  1419. * are unlikely to be recoverable errors.
  1420. * TODO: In such scenario, reset bus. Make this configurable
  1421. * via sysfs property with bus reset being the default.
  1422. */
  1423. if (buf & SDW_SCP_INT1_IMPL_DEF) {
  1424. if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
  1425. dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
  1426. slave_notify = true;
  1427. }
  1428. clear |= SDW_SCP_INT1_IMPL_DEF;
  1429. }
  1430. /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */
  1431. if (sdca_cascade)
  1432. slave_notify = true;
  1433. /* Check port 0 - 3 interrupts */
  1434. port = buf & SDW_SCP_INT1_PORT0_3;
  1435. /* To get port number corresponding to bits, shift it */
  1436. port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
  1437. for_each_set_bit(bit, &port, 8) {
  1438. sdw_handle_port_interrupt(slave, bit,
  1439. &port_status[bit]);
  1440. }
  1441. /* Check if cascade 2 interrupt is present */
  1442. if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
  1443. port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
  1444. for_each_set_bit(bit, &port, 8) {
  1445. /* scp2 ports start from 4 */
  1446. port_num = bit + 4;
  1447. sdw_handle_port_interrupt(slave,
  1448. port_num,
  1449. &port_status[port_num]);
  1450. }
  1451. }
  1452. /* now check last cascade */
  1453. if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
  1454. port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
  1455. for_each_set_bit(bit, &port, 8) {
  1456. /* scp3 ports start from 11 */
  1457. port_num = bit + 11;
  1458. sdw_handle_port_interrupt(slave,
  1459. port_num,
  1460. &port_status[port_num]);
  1461. }
  1462. }
  1463. /* Update the Slave driver */
  1464. if (slave_notify) {
  1465. if (slave->prop.use_domain_irq && slave->irq)
  1466. handle_nested_irq(slave->irq);
  1467. mutex_lock(&slave->sdw_dev_lock);
  1468. if (slave->probed) {
  1469. struct device *dev = &slave->dev;
  1470. struct sdw_driver *drv = drv_to_sdw_driver(dev->driver);
  1471. if (drv->ops && drv->ops->interrupt_callback) {
  1472. slave_intr.sdca_cascade = sdca_cascade;
  1473. slave_intr.control_port = clear;
  1474. memcpy(slave_intr.port, &port_status,
  1475. sizeof(slave_intr.port));
  1476. drv->ops->interrupt_callback(slave, &slave_intr);
  1477. }
  1478. }
  1479. mutex_unlock(&slave->sdw_dev_lock);
  1480. }
  1481. /* Ack interrupt */
  1482. ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear);
  1483. if (ret < 0) {
  1484. dev_err(&slave->dev,
  1485. "SDW_SCP_INT1 write failed:%d\n", ret);
  1486. goto io_err;
  1487. }
  1488. /* at this point all initial interrupt sources were handled */
  1489. slave->first_interrupt_done = true;
  1490. /*
  1491. * Read status again to ensure no new interrupts arrived
  1492. * while servicing interrupts.
  1493. */
  1494. ret = sdw_read_no_pm(slave, SDW_SCP_INT1);
  1495. if (ret < 0) {
  1496. dev_err(&slave->dev,
  1497. "SDW_SCP_INT1 recheck read failed:%d\n", ret);
  1498. goto io_err;
  1499. }
  1500. buf = ret;
  1501. ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2);
  1502. if (ret < 0) {
  1503. dev_err(&slave->dev,
  1504. "SDW_SCP_INT2/3 recheck read failed:%d\n", ret);
  1505. goto io_err;
  1506. }
  1507. if (slave->id.class_id) {
  1508. ret = sdw_read_no_pm(slave, SDW_DP0_INT);
  1509. if (ret < 0) {
  1510. dev_err(&slave->dev,
  1511. "SDW_DP0_INT recheck read failed:%d\n", ret);
  1512. goto io_err;
  1513. }
  1514. sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
  1515. }
  1516. /*
  1517. * Make sure no interrupts are pending
  1518. */
  1519. stat = buf || buf2[0] || buf2[1] || sdca_cascade;
  1520. /*
  1521. * Exit loop if Slave is continuously in ALERT state even
  1522. * after servicing the interrupt multiple times.
  1523. */
  1524. count++;
  1525. /* we can get alerts while processing so keep retrying */
  1526. } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
  1527. if (count == SDW_READ_INTR_CLEAR_RETRY)
  1528. dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n");
  1529. io_err:
  1530. pm_runtime_mark_last_busy(&slave->dev);
  1531. pm_runtime_put_autosuspend(&slave->dev);
  1532. return ret;
  1533. }
  1534. static int sdw_update_slave_status(struct sdw_slave *slave,
  1535. enum sdw_slave_status status)
  1536. {
  1537. int ret = 0;
  1538. mutex_lock(&slave->sdw_dev_lock);
  1539. if (slave->probed) {
  1540. struct device *dev = &slave->dev;
  1541. struct sdw_driver *drv = drv_to_sdw_driver(dev->driver);
  1542. if (drv->ops && drv->ops->update_status)
  1543. ret = drv->ops->update_status(slave, status);
  1544. }
  1545. mutex_unlock(&slave->sdw_dev_lock);
  1546. return ret;
  1547. }
  1548. /**
  1549. * sdw_handle_slave_status() - Handle Slave status
  1550. * @bus: SDW bus instance
  1551. * @status: Status for all Slave(s)
  1552. */
  1553. int sdw_handle_slave_status(struct sdw_bus *bus,
  1554. enum sdw_slave_status status[])
  1555. {
  1556. enum sdw_slave_status prev_status;
  1557. struct sdw_slave *slave;
  1558. bool attached_initializing, id_programmed;
  1559. int i, ret = 0;
  1560. /* first check if any Slaves fell off the bus */
  1561. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  1562. mutex_lock(&bus->bus_lock);
  1563. if (test_bit(i, bus->assigned) == false) {
  1564. mutex_unlock(&bus->bus_lock);
  1565. continue;
  1566. }
  1567. mutex_unlock(&bus->bus_lock);
  1568. slave = sdw_get_slave(bus, i);
  1569. if (!slave)
  1570. continue;
  1571. if (status[i] == SDW_SLAVE_UNATTACHED &&
  1572. slave->status != SDW_SLAVE_UNATTACHED) {
  1573. dev_warn(&slave->dev, "Slave %d state check1: UNATTACHED, status was %d\n",
  1574. i, slave->status);
  1575. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1576. /* Ensure driver knows that peripheral unattached */
  1577. ret = sdw_update_slave_status(slave, status[i]);
  1578. if (ret < 0)
  1579. dev_warn(&slave->dev, "Update Slave status failed:%d\n", ret);
  1580. }
  1581. }
  1582. if (status[0] == SDW_SLAVE_ATTACHED) {
  1583. dev_dbg(bus->dev, "Slave attached, programming device number\n");
  1584. /*
  1585. * Programming a device number will have side effects,
  1586. * so we deal with other devices at a later time.
  1587. * This relies on those devices reporting ATTACHED, which will
  1588. * trigger another call to this function. This will only
  1589. * happen if at least one device ID was programmed.
  1590. * Error returns from sdw_program_device_num() are currently
  1591. * ignored because there's no useful recovery that can be done.
  1592. * Returning the error here could result in the current status
  1593. * of other devices not being handled, because if no device IDs
  1594. * were programmed there's nothing to guarantee a status change
  1595. * to trigger another call to this function.
  1596. */
  1597. sdw_program_device_num(bus, &id_programmed);
  1598. if (id_programmed)
  1599. return 0;
  1600. }
  1601. /* Continue to check other slave statuses */
  1602. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  1603. mutex_lock(&bus->bus_lock);
  1604. if (test_bit(i, bus->assigned) == false) {
  1605. mutex_unlock(&bus->bus_lock);
  1606. continue;
  1607. }
  1608. mutex_unlock(&bus->bus_lock);
  1609. slave = sdw_get_slave(bus, i);
  1610. if (!slave)
  1611. continue;
  1612. attached_initializing = false;
  1613. switch (status[i]) {
  1614. case SDW_SLAVE_UNATTACHED:
  1615. if (slave->status == SDW_SLAVE_UNATTACHED)
  1616. break;
  1617. dev_warn(&slave->dev, "Slave %d state check2: UNATTACHED, status was %d\n",
  1618. i, slave->status);
  1619. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1620. break;
  1621. case SDW_SLAVE_ALERT:
  1622. ret = sdw_handle_slave_alerts(slave);
  1623. if (ret < 0)
  1624. dev_err(&slave->dev,
  1625. "Slave %d alert handling failed: %d\n",
  1626. i, ret);
  1627. break;
  1628. case SDW_SLAVE_ATTACHED:
  1629. if (slave->status == SDW_SLAVE_ATTACHED)
  1630. break;
  1631. prev_status = slave->status;
  1632. sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
  1633. if (prev_status == SDW_SLAVE_ALERT)
  1634. break;
  1635. attached_initializing = true;
  1636. ret = sdw_initialize_slave(slave);
  1637. if (ret < 0)
  1638. dev_err(&slave->dev,
  1639. "Slave %d initialization failed: %d\n",
  1640. i, ret);
  1641. break;
  1642. default:
  1643. dev_err(&slave->dev, "Invalid slave %d status:%d\n",
  1644. i, status[i]);
  1645. break;
  1646. }
  1647. ret = sdw_update_slave_status(slave, status[i]);
  1648. if (ret < 0)
  1649. dev_err(&slave->dev,
  1650. "Update Slave status failed:%d\n", ret);
  1651. if (attached_initializing) {
  1652. dev_dbg(&slave->dev,
  1653. "signaling initialization completion for Slave %d\n",
  1654. slave->dev_num);
  1655. complete_all(&slave->initialization_complete);
  1656. /*
  1657. * If the manager became pm_runtime active, the peripherals will be
  1658. * restarted and attach, but their pm_runtime status may remain
  1659. * suspended. If the 'update_slave_status' callback initiates
  1660. * any sort of deferred processing, this processing would not be
  1661. * cancelled on pm_runtime suspend.
  1662. * To avoid such zombie states, we queue a request to resume.
  1663. * This would be a no-op in case the peripheral was being resumed
  1664. * by e.g. the ALSA/ASoC framework.
  1665. */
  1666. pm_request_resume(&slave->dev);
  1667. }
  1668. }
  1669. return ret;
  1670. }
  1671. EXPORT_SYMBOL(sdw_handle_slave_status);
  1672. void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
  1673. {
  1674. struct sdw_slave *slave;
  1675. int i;
  1676. /* Check all non-zero devices */
  1677. for (i = 1; i <= SDW_MAX_DEVICES; i++) {
  1678. mutex_lock(&bus->bus_lock);
  1679. if (test_bit(i, bus->assigned) == false) {
  1680. mutex_unlock(&bus->bus_lock);
  1681. continue;
  1682. }
  1683. mutex_unlock(&bus->bus_lock);
  1684. slave = sdw_get_slave(bus, i);
  1685. if (!slave)
  1686. continue;
  1687. if (slave->status != SDW_SLAVE_UNATTACHED) {
  1688. sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1689. slave->first_interrupt_done = false;
  1690. sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED);
  1691. }
  1692. /* keep track of request, used in pm_runtime resume */
  1693. slave->unattach_request = request;
  1694. }
  1695. }
  1696. EXPORT_SYMBOL(sdw_clear_slave_status);
  1697. int sdw_bpt_send_async(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg)
  1698. {
  1699. int len = 0;
  1700. int i;
  1701. for (i = 0; i < msg->sections; i++)
  1702. len += msg->sec[i].len;
  1703. if (len > SDW_BPT_MSG_MAX_BYTES) {
  1704. dev_err(bus->dev, "Invalid BPT message length %d\n", len);
  1705. return -EINVAL;
  1706. }
  1707. /* check device is enumerated */
  1708. if (slave->dev_num == SDW_ENUM_DEV_NUM ||
  1709. slave->dev_num > SDW_MAX_DEVICES) {
  1710. dev_err(&slave->dev, "Invalid device number %d\n", slave->dev_num);
  1711. return -ENODEV;
  1712. }
  1713. /* make sure all callbacks are defined */
  1714. if (!bus->ops->bpt_send_async ||
  1715. !bus->ops->bpt_wait) {
  1716. dev_err(bus->dev, "BPT callbacks not defined\n");
  1717. return -EOPNOTSUPP;
  1718. }
  1719. return bus->ops->bpt_send_async(bus, slave, msg);
  1720. }
  1721. EXPORT_SYMBOL(sdw_bpt_send_async);
  1722. int sdw_bpt_wait(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg)
  1723. {
  1724. return bus->ops->bpt_wait(bus, slave, msg);
  1725. }
  1726. EXPORT_SYMBOL(sdw_bpt_wait);
  1727. int sdw_bpt_send_sync(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg)
  1728. {
  1729. int ret;
  1730. ret = sdw_bpt_send_async(bus, slave, msg);
  1731. if (ret < 0)
  1732. return ret;
  1733. return sdw_bpt_wait(bus, slave, msg);
  1734. }
  1735. EXPORT_SYMBOL(sdw_bpt_send_sync);