common.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2014 NVIDIA CORPORATION. All rights reserved.
  4. */
  5. #define dev_fmt(fmt) "tegra-soc: " fmt
  6. #include <linux/clk.h>
  7. #include <linux/device.h>
  8. #include <linux/export.h>
  9. #include <linux/of.h>
  10. #include <linux/pm_opp.h>
  11. #include <linux/pm_runtime.h>
  12. #include <soc/tegra/common.h>
  13. #include <soc/tegra/fuse.h>
  14. static const struct of_device_id tegra_machine_match[] = {
  15. { .compatible = "nvidia,tegra20", },
  16. { .compatible = "nvidia,tegra30", },
  17. { .compatible = "nvidia,tegra114", },
  18. { .compatible = "nvidia,tegra124", },
  19. { .compatible = "nvidia,tegra132", },
  20. { .compatible = "nvidia,tegra210", },
  21. { }
  22. };
  23. bool soc_is_tegra(void)
  24. {
  25. return of_machine_device_match(tegra_machine_match);
  26. }
  27. static int tegra_core_dev_init_opp_state(struct device *dev)
  28. {
  29. unsigned long rate;
  30. struct clk *clk;
  31. bool rpm_enabled;
  32. int err;
  33. clk = devm_clk_get(dev, NULL);
  34. if (IS_ERR(clk)) {
  35. dev_err(dev, "failed to get clk: %pe\n", clk);
  36. return PTR_ERR(clk);
  37. }
  38. rate = clk_get_rate(clk);
  39. if (!rate) {
  40. dev_err(dev, "failed to get clk rate\n");
  41. return -EINVAL;
  42. }
  43. /*
  44. * Runtime PM of the device must be enabled in order to set up
  45. * GENPD's performance properly because GENPD core checks whether
  46. * device is suspended and this check doesn't work while RPM is
  47. * disabled. This makes sure the OPP vote below gets cached in
  48. * GENPD for the device. Instead, the vote is done the next time
  49. * the device gets runtime resumed.
  50. */
  51. rpm_enabled = pm_runtime_enabled(dev);
  52. if (!rpm_enabled)
  53. pm_runtime_enable(dev);
  54. /* should never happen in practice */
  55. if (!pm_runtime_enabled(dev)) {
  56. dev_WARN(dev, "failed to enable runtime PM\n");
  57. pm_runtime_disable(dev);
  58. return -EINVAL;
  59. }
  60. /* first dummy rate-setting initializes voltage vote */
  61. err = dev_pm_opp_set_rate(dev, rate);
  62. if (!rpm_enabled)
  63. pm_runtime_disable(dev);
  64. if (err) {
  65. dev_err(dev, "failed to initialize OPP clock: %d\n", err);
  66. return err;
  67. }
  68. return 0;
  69. }
  70. /**
  71. * devm_tegra_core_dev_init_opp_table() - initialize OPP table
  72. * @dev: device for which OPP table is initialized
  73. * @params: pointer to the OPP table configuration
  74. *
  75. * This function will initialize OPP table and sync OPP state of a Tegra SoC
  76. * core device.
  77. *
  78. * Return: 0 on success or errorno.
  79. */
  80. int devm_tegra_core_dev_init_opp_table(struct device *dev,
  81. struct tegra_core_opp_params *params)
  82. {
  83. u32 hw_version;
  84. int err;
  85. /*
  86. * The clk's connection id to set is NULL and this is a NULL terminated
  87. * array, hence two NULL entries.
  88. */
  89. const char *clk_names[] = { NULL, NULL };
  90. struct dev_pm_opp_config config = {
  91. /*
  92. * For some devices we don't have any OPP table in the DT, and
  93. * in order to use the same code path for all the devices, we
  94. * create a dummy OPP table for them via this. The dummy OPP
  95. * table is only capable of doing clk_set_rate() on invocation
  96. * of dev_pm_opp_set_rate() and doesn't provide any other
  97. * functionality.
  98. */
  99. .clk_names = clk_names,
  100. };
  101. if (of_machine_is_compatible("nvidia,tegra20")) {
  102. hw_version = BIT(tegra_sku_info.soc_process_id);
  103. config.supported_hw = &hw_version;
  104. config.supported_hw_count = 1;
  105. } else if (of_machine_is_compatible("nvidia,tegra30")) {
  106. hw_version = BIT(tegra_sku_info.soc_speedo_id);
  107. config.supported_hw = &hw_version;
  108. config.supported_hw_count = 1;
  109. }
  110. err = devm_pm_opp_set_config(dev, &config);
  111. if (err) {
  112. dev_err(dev, "failed to set OPP config: %d\n", err);
  113. return err;
  114. }
  115. /*
  116. * Tegra114+ doesn't support OPP yet, return early for non tegra20/30
  117. * case.
  118. */
  119. if (!config.supported_hw)
  120. return -ENODEV;
  121. /*
  122. * Older device-trees have an empty OPP table, we will get
  123. * -ENODEV from devm_pm_opp_of_add_table() in this case.
  124. */
  125. err = devm_pm_opp_of_add_table(dev);
  126. if (err) {
  127. if (err != -ENODEV)
  128. dev_err(dev, "failed to add OPP table: %d\n", err);
  129. return err;
  130. }
  131. if (params->init_state) {
  132. err = tegra_core_dev_init_opp_state(dev);
  133. if (err)
  134. return err;
  135. }
  136. return 0;
  137. }
  138. EXPORT_SYMBOL_GPL(devm_tegra_core_dev_init_opp_table);