mailbox.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only OR MIT
  2. /*
  3. * Apple mailbox driver
  4. *
  5. * Copyright The Asahi Linux Contributors
  6. *
  7. * This driver adds support for two mailbox variants (called ASC and M3 by
  8. * Apple) found in Apple SoCs such as the M1. It consists of two FIFOs used to
  9. * exchange 64+32 bit messages between the main CPU and a co-processor.
  10. * Various coprocessors implement different IPC protocols based on these simple
  11. * messages and shared memory buffers.
  12. *
  13. * Both the main CPU and the co-processor see the same set of registers but
  14. * the first FIFO (A2I) is always used to transfer messages from the application
  15. * processor (us) to the I/O processor and the second one (I2A) for the
  16. * other direction.
  17. */
  18. #include <linux/bitfield.h>
  19. #include <linux/bits.h>
  20. #include <linux/delay.h>
  21. #include <linux/device.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/iopoll.h>
  25. #include <linux/module.h>
  26. #include <linux/of.h>
  27. #include <linux/of_platform.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/types.h>
  32. #include "mailbox.h"
  33. #define APPLE_ASC_MBOX_CONTROL_FULL BIT(16)
  34. #define APPLE_ASC_MBOX_CONTROL_EMPTY BIT(17)
  35. #define APPLE_ASC_MBOX_A2I_CONTROL 0x110
  36. #define APPLE_ASC_MBOX_A2I_SEND0 0x800
  37. #define APPLE_ASC_MBOX_A2I_SEND1 0x808
  38. #define APPLE_ASC_MBOX_A2I_RECV0 0x810
  39. #define APPLE_ASC_MBOX_A2I_RECV1 0x818
  40. #define APPLE_ASC_MBOX_I2A_CONTROL 0x114
  41. #define APPLE_ASC_MBOX_I2A_SEND0 0x820
  42. #define APPLE_ASC_MBOX_I2A_SEND1 0x828
  43. #define APPLE_ASC_MBOX_I2A_RECV0 0x830
  44. #define APPLE_ASC_MBOX_I2A_RECV1 0x838
  45. #define APPLE_T8015_MBOX_A2I_CONTROL 0x108
  46. #define APPLE_T8015_MBOX_I2A_CONTROL 0x10c
  47. #define APPLE_M3_MBOX_CONTROL_FULL BIT(16)
  48. #define APPLE_M3_MBOX_CONTROL_EMPTY BIT(17)
  49. #define APPLE_M3_MBOX_A2I_CONTROL 0x50
  50. #define APPLE_M3_MBOX_A2I_SEND0 0x60
  51. #define APPLE_M3_MBOX_A2I_SEND1 0x68
  52. #define APPLE_M3_MBOX_A2I_RECV0 0x70
  53. #define APPLE_M3_MBOX_A2I_RECV1 0x78
  54. #define APPLE_M3_MBOX_I2A_CONTROL 0x80
  55. #define APPLE_M3_MBOX_I2A_SEND0 0x90
  56. #define APPLE_M3_MBOX_I2A_SEND1 0x98
  57. #define APPLE_M3_MBOX_I2A_RECV0 0xa0
  58. #define APPLE_M3_MBOX_I2A_RECV1 0xa8
  59. #define APPLE_M3_MBOX_IRQ_ENABLE 0x48
  60. #define APPLE_M3_MBOX_IRQ_ACK 0x4c
  61. #define APPLE_M3_MBOX_IRQ_A2I_EMPTY BIT(0)
  62. #define APPLE_M3_MBOX_IRQ_A2I_NOT_EMPTY BIT(1)
  63. #define APPLE_M3_MBOX_IRQ_I2A_EMPTY BIT(2)
  64. #define APPLE_M3_MBOX_IRQ_I2A_NOT_EMPTY BIT(3)
  65. #define APPLE_MBOX_MSG1_OUTCNT GENMASK(56, 52)
  66. #define APPLE_MBOX_MSG1_INCNT GENMASK(51, 48)
  67. #define APPLE_MBOX_MSG1_OUTPTR GENMASK(47, 44)
  68. #define APPLE_MBOX_MSG1_INPTR GENMASK(43, 40)
  69. #define APPLE_MBOX_MSG1_MSG GENMASK(31, 0)
  70. #define APPLE_MBOX_TX_TIMEOUT 500
  71. struct apple_mbox_hw {
  72. unsigned int control_full;
  73. unsigned int control_empty;
  74. unsigned int a2i_control;
  75. unsigned int a2i_send0;
  76. unsigned int a2i_send1;
  77. unsigned int i2a_control;
  78. unsigned int i2a_recv0;
  79. unsigned int i2a_recv1;
  80. bool has_irq_controls;
  81. unsigned int irq_enable;
  82. unsigned int irq_ack;
  83. unsigned int irq_bit_recv_not_empty;
  84. unsigned int irq_bit_send_empty;
  85. };
  86. int apple_mbox_send(struct apple_mbox *mbox, const struct apple_mbox_msg msg,
  87. bool atomic)
  88. {
  89. unsigned long flags;
  90. int ret;
  91. u32 mbox_ctrl;
  92. long t;
  93. spin_lock_irqsave(&mbox->tx_lock, flags);
  94. mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
  95. while (mbox_ctrl & mbox->hw->control_full) {
  96. if (atomic) {
  97. ret = readl_poll_timeout_atomic(
  98. mbox->regs + mbox->hw->a2i_control, mbox_ctrl,
  99. !(mbox_ctrl & mbox->hw->control_full), 100,
  100. APPLE_MBOX_TX_TIMEOUT * 1000);
  101. if (ret) {
  102. spin_unlock_irqrestore(&mbox->tx_lock, flags);
  103. return ret;
  104. }
  105. break;
  106. }
  107. /*
  108. * The interrupt is level triggered and will keep firing as long as the
  109. * FIFO is empty. It will also keep firing if the FIFO was empty
  110. * at any point in the past until it has been acknowledged at the
  111. * mailbox level. By acknowledging it here we can ensure that we will
  112. * only get the interrupt once the FIFO has been cleared again.
  113. * If the FIFO is already empty before the ack it will fire again
  114. * immediately after the ack.
  115. */
  116. if (mbox->hw->has_irq_controls) {
  117. writel_relaxed(mbox->hw->irq_bit_send_empty,
  118. mbox->regs + mbox->hw->irq_ack);
  119. }
  120. enable_irq(mbox->irq_send_empty);
  121. reinit_completion(&mbox->tx_empty);
  122. spin_unlock_irqrestore(&mbox->tx_lock, flags);
  123. t = wait_for_completion_interruptible_timeout(
  124. &mbox->tx_empty,
  125. msecs_to_jiffies(APPLE_MBOX_TX_TIMEOUT));
  126. if (t < 0)
  127. return t;
  128. else if (t == 0)
  129. return -ETIMEDOUT;
  130. spin_lock_irqsave(&mbox->tx_lock, flags);
  131. mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->a2i_control);
  132. }
  133. writeq_relaxed(msg.msg0, mbox->regs + mbox->hw->a2i_send0);
  134. writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg.msg1),
  135. mbox->regs + mbox->hw->a2i_send1);
  136. spin_unlock_irqrestore(&mbox->tx_lock, flags);
  137. return 0;
  138. }
  139. EXPORT_SYMBOL(apple_mbox_send);
  140. static irqreturn_t apple_mbox_send_empty_irq(int irq, void *data)
  141. {
  142. struct apple_mbox *mbox = data;
  143. /*
  144. * We don't need to acknowledge the interrupt at the mailbox level
  145. * here even if supported by the hardware. It will keep firing but that
  146. * doesn't matter since it's disabled at the main interrupt controller.
  147. * apple_mbox_send will acknowledge it before enabling
  148. * it at the main controller again.
  149. */
  150. spin_lock(&mbox->tx_lock);
  151. disable_irq_nosync(mbox->irq_send_empty);
  152. complete(&mbox->tx_empty);
  153. spin_unlock(&mbox->tx_lock);
  154. return IRQ_HANDLED;
  155. }
  156. static int apple_mbox_poll_locked(struct apple_mbox *mbox)
  157. {
  158. struct apple_mbox_msg msg;
  159. int ret = 0;
  160. u32 mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->i2a_control);
  161. while (!(mbox_ctrl & mbox->hw->control_empty)) {
  162. msg.msg0 = readq_relaxed(mbox->regs + mbox->hw->i2a_recv0);
  163. msg.msg1 = FIELD_GET(
  164. APPLE_MBOX_MSG1_MSG,
  165. readq_relaxed(mbox->regs + mbox->hw->i2a_recv1));
  166. mbox->rx(mbox, msg, mbox->cookie);
  167. ret++;
  168. mbox_ctrl = readl_relaxed(mbox->regs + mbox->hw->i2a_control);
  169. }
  170. /*
  171. * The interrupt will keep firing even if there are no more messages
  172. * unless we also acknowledge it at the mailbox level here.
  173. * There's no race if a message comes in between the check in the while
  174. * loop above and the ack below: If a new messages arrives inbetween
  175. * those two the interrupt will just fire again immediately after the
  176. * ack since it's level triggered.
  177. */
  178. if (mbox->hw->has_irq_controls) {
  179. writel_relaxed(mbox->hw->irq_bit_recv_not_empty,
  180. mbox->regs + mbox->hw->irq_ack);
  181. }
  182. return ret;
  183. }
  184. static irqreturn_t apple_mbox_recv_irq(int irq, void *data)
  185. {
  186. struct apple_mbox *mbox = data;
  187. spin_lock(&mbox->rx_lock);
  188. apple_mbox_poll_locked(mbox);
  189. spin_unlock(&mbox->rx_lock);
  190. return IRQ_HANDLED;
  191. }
  192. int apple_mbox_poll(struct apple_mbox *mbox)
  193. {
  194. unsigned long flags;
  195. int ret;
  196. spin_lock_irqsave(&mbox->rx_lock, flags);
  197. ret = apple_mbox_poll_locked(mbox);
  198. spin_unlock_irqrestore(&mbox->rx_lock, flags);
  199. return ret;
  200. }
  201. EXPORT_SYMBOL(apple_mbox_poll);
  202. int apple_mbox_start(struct apple_mbox *mbox)
  203. {
  204. int ret;
  205. if (mbox->active)
  206. return 0;
  207. ret = pm_runtime_resume_and_get(mbox->dev);
  208. if (ret)
  209. return ret;
  210. /*
  211. * Only some variants of this mailbox HW provide interrupt control
  212. * at the mailbox level. We therefore need to handle enabling/disabling
  213. * interrupts at the main interrupt controller anyway for hardware that
  214. * doesn't. Just always keep the interrupts we care about enabled at
  215. * the mailbox level so that both hardware revisions behave almost
  216. * the same.
  217. */
  218. if (mbox->hw->has_irq_controls) {
  219. writel_relaxed(mbox->hw->irq_bit_recv_not_empty |
  220. mbox->hw->irq_bit_send_empty,
  221. mbox->regs + mbox->hw->irq_enable);
  222. }
  223. enable_irq(mbox->irq_recv_not_empty);
  224. mbox->active = true;
  225. return 0;
  226. }
  227. EXPORT_SYMBOL(apple_mbox_start);
  228. void apple_mbox_stop(struct apple_mbox *mbox)
  229. {
  230. if (!mbox->active)
  231. return;
  232. mbox->active = false;
  233. disable_irq(mbox->irq_recv_not_empty);
  234. pm_runtime_mark_last_busy(mbox->dev);
  235. pm_runtime_put_autosuspend(mbox->dev);
  236. }
  237. EXPORT_SYMBOL(apple_mbox_stop);
  238. struct apple_mbox *apple_mbox_get(struct device *dev, int index)
  239. {
  240. struct of_phandle_args args;
  241. struct platform_device *pdev;
  242. struct apple_mbox *mbox;
  243. int ret;
  244. ret = of_parse_phandle_with_args(dev->of_node, "mboxes", "#mbox-cells",
  245. index, &args);
  246. if (ret || !args.np)
  247. return ERR_PTR(ret);
  248. pdev = of_find_device_by_node(args.np);
  249. of_node_put(args.np);
  250. if (!pdev)
  251. return ERR_PTR(-EPROBE_DEFER);
  252. mbox = platform_get_drvdata(pdev);
  253. if (!mbox) {
  254. mbox = ERR_PTR(-EPROBE_DEFER);
  255. goto out_put_pdev;
  256. }
  257. if (!device_link_add(dev, &pdev->dev, DL_FLAG_AUTOREMOVE_CONSUMER)) {
  258. mbox = ERR_PTR(-ENODEV);
  259. goto out_put_pdev;
  260. }
  261. out_put_pdev:
  262. put_device(&pdev->dev);
  263. return mbox;
  264. }
  265. EXPORT_SYMBOL(apple_mbox_get);
  266. struct apple_mbox *apple_mbox_get_byname(struct device *dev, const char *name)
  267. {
  268. int index;
  269. index = of_property_match_string(dev->of_node, "mbox-names", name);
  270. if (index < 0)
  271. return ERR_PTR(index);
  272. return apple_mbox_get(dev, index);
  273. }
  274. EXPORT_SYMBOL(apple_mbox_get_byname);
  275. static int apple_mbox_probe(struct platform_device *pdev)
  276. {
  277. int ret;
  278. char *irqname;
  279. struct apple_mbox *mbox;
  280. struct device *dev = &pdev->dev;
  281. mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
  282. if (!mbox)
  283. return -ENOMEM;
  284. mbox->dev = &pdev->dev;
  285. mbox->hw = of_device_get_match_data(dev);
  286. if (!mbox->hw)
  287. return -EINVAL;
  288. mbox->regs = devm_platform_ioremap_resource(pdev, 0);
  289. if (IS_ERR(mbox->regs))
  290. return PTR_ERR(mbox->regs);
  291. mbox->irq_recv_not_empty =
  292. platform_get_irq_byname(pdev, "recv-not-empty");
  293. if (mbox->irq_recv_not_empty < 0)
  294. return -ENODEV;
  295. mbox->irq_send_empty = platform_get_irq_byname(pdev, "send-empty");
  296. if (mbox->irq_send_empty < 0)
  297. return -ENODEV;
  298. spin_lock_init(&mbox->rx_lock);
  299. spin_lock_init(&mbox->tx_lock);
  300. init_completion(&mbox->tx_empty);
  301. irqname = devm_kasprintf(dev, GFP_KERNEL, "%s-recv", dev_name(dev));
  302. if (!irqname)
  303. return -ENOMEM;
  304. ret = devm_request_irq(dev, mbox->irq_recv_not_empty,
  305. apple_mbox_recv_irq,
  306. IRQF_NO_AUTOEN | IRQF_NO_SUSPEND, irqname, mbox);
  307. if (ret)
  308. return ret;
  309. irqname = devm_kasprintf(dev, GFP_KERNEL, "%s-send", dev_name(dev));
  310. if (!irqname)
  311. return -ENOMEM;
  312. ret = devm_request_irq(dev, mbox->irq_send_empty,
  313. apple_mbox_send_empty_irq,
  314. IRQF_NO_AUTOEN | IRQF_NO_SUSPEND, irqname, mbox);
  315. if (ret)
  316. return ret;
  317. ret = devm_pm_runtime_enable(dev);
  318. if (ret)
  319. return ret;
  320. platform_set_drvdata(pdev, mbox);
  321. return 0;
  322. }
  323. static const struct apple_mbox_hw apple_mbox_t8015_hw = {
  324. .control_full = APPLE_ASC_MBOX_CONTROL_FULL,
  325. .control_empty = APPLE_ASC_MBOX_CONTROL_EMPTY,
  326. .a2i_control = APPLE_T8015_MBOX_A2I_CONTROL,
  327. .a2i_send0 = APPLE_ASC_MBOX_A2I_SEND0,
  328. .a2i_send1 = APPLE_ASC_MBOX_A2I_SEND1,
  329. .i2a_control = APPLE_T8015_MBOX_I2A_CONTROL,
  330. .i2a_recv0 = APPLE_ASC_MBOX_I2A_RECV0,
  331. .i2a_recv1 = APPLE_ASC_MBOX_I2A_RECV1,
  332. .has_irq_controls = false,
  333. };
  334. static const struct apple_mbox_hw apple_mbox_asc_hw = {
  335. .control_full = APPLE_ASC_MBOX_CONTROL_FULL,
  336. .control_empty = APPLE_ASC_MBOX_CONTROL_EMPTY,
  337. .a2i_control = APPLE_ASC_MBOX_A2I_CONTROL,
  338. .a2i_send0 = APPLE_ASC_MBOX_A2I_SEND0,
  339. .a2i_send1 = APPLE_ASC_MBOX_A2I_SEND1,
  340. .i2a_control = APPLE_ASC_MBOX_I2A_CONTROL,
  341. .i2a_recv0 = APPLE_ASC_MBOX_I2A_RECV0,
  342. .i2a_recv1 = APPLE_ASC_MBOX_I2A_RECV1,
  343. .has_irq_controls = false,
  344. };
  345. static const struct apple_mbox_hw apple_mbox_m3_hw = {
  346. .control_full = APPLE_M3_MBOX_CONTROL_FULL,
  347. .control_empty = APPLE_M3_MBOX_CONTROL_EMPTY,
  348. .a2i_control = APPLE_M3_MBOX_A2I_CONTROL,
  349. .a2i_send0 = APPLE_M3_MBOX_A2I_SEND0,
  350. .a2i_send1 = APPLE_M3_MBOX_A2I_SEND1,
  351. .i2a_control = APPLE_M3_MBOX_I2A_CONTROL,
  352. .i2a_recv0 = APPLE_M3_MBOX_I2A_RECV0,
  353. .i2a_recv1 = APPLE_M3_MBOX_I2A_RECV1,
  354. .has_irq_controls = true,
  355. .irq_enable = APPLE_M3_MBOX_IRQ_ENABLE,
  356. .irq_ack = APPLE_M3_MBOX_IRQ_ACK,
  357. .irq_bit_recv_not_empty = APPLE_M3_MBOX_IRQ_I2A_NOT_EMPTY,
  358. .irq_bit_send_empty = APPLE_M3_MBOX_IRQ_A2I_EMPTY,
  359. };
  360. static const struct of_device_id apple_mbox_of_match[] = {
  361. { .compatible = "apple,asc-mailbox-v4", .data = &apple_mbox_asc_hw },
  362. { .compatible = "apple,t8015-asc-mailbox", .data = &apple_mbox_t8015_hw },
  363. { .compatible = "apple,m3-mailbox-v2", .data = &apple_mbox_m3_hw },
  364. {}
  365. };
  366. MODULE_DEVICE_TABLE(of, apple_mbox_of_match);
  367. static struct platform_driver apple_mbox_driver = {
  368. .driver = {
  369. .name = "apple-mailbox",
  370. .of_match_table = apple_mbox_of_match,
  371. },
  372. .probe = apple_mbox_probe,
  373. };
  374. module_platform_driver(apple_mbox_driver);
  375. MODULE_LICENSE("Dual MIT/GPL");
  376. MODULE_AUTHOR("Sven Peter <sven@svenpeter.dev>");
  377. MODULE_DESCRIPTION("Apple Mailbox driver");