pmcraid.c 151 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  4. *
  5. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  6. * PMC-Sierra Inc
  7. *
  8. * Copyright (C) 2008, 2009 PMC Sierra Inc
  9. */
  10. #include <linux/fs.h>
  11. #include <linux/init.h>
  12. #include <linux/types.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ioport.h>
  16. #include <linux/delay.h>
  17. #include <linux/pci.h>
  18. #include <linux/wait.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/sched.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/blkdev.h>
  23. #include <linux/firmware.h>
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/hdreg.h>
  27. #include <linux/io.h>
  28. #include <linux/slab.h>
  29. #include <asm/irq.h>
  30. #include <asm/processor.h>
  31. #include <linux/libata.h>
  32. #include <linux/mutex.h>
  33. #include <linux/ktime.h>
  34. #include <scsi/scsi.h>
  35. #include <scsi/scsi_host.h>
  36. #include <scsi/scsi_device.h>
  37. #include <scsi/scsi_tcq.h>
  38. #include <scsi/scsi_eh.h>
  39. #include <scsi/scsi_cmnd.h>
  40. #include <scsi/scsicam.h>
  41. #include "pmcraid.h"
  42. /*
  43. * Module configuration parameters
  44. */
  45. static unsigned int pmcraid_debug_log;
  46. static unsigned int pmcraid_disable_aen;
  47. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  48. static unsigned int pmcraid_enable_msix;
  49. /*
  50. * Data structures to support multiple adapters by the LLD.
  51. * pmcraid_adapter_count - count of configured adapters
  52. */
  53. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  54. /*
  55. * Supporting user-level control interface through IOCTL commands.
  56. * pmcraid_major - major number to use
  57. * pmcraid_minor - minor number(s) to use
  58. */
  59. static unsigned int pmcraid_major;
  60. static const struct class pmcraid_class = {
  61. .name = PMCRAID_DEVFILE,
  62. };
  63. static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  64. /*
  65. * Module parameters
  66. */
  67. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  68. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  69. MODULE_LICENSE("GPL");
  70. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  71. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  72. MODULE_PARM_DESC(log_level,
  73. "Enables firmware error code logging, default :1 high-severity"
  74. " errors, 2: all errors including high-severity errors,"
  75. " 0: disables logging");
  76. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  77. MODULE_PARM_DESC(debug,
  78. "Enable driver verbose message logging. Set 1 to enable."
  79. "(default: 0)");
  80. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  81. MODULE_PARM_DESC(disable_aen,
  82. "Disable driver aen notifications to apps. Set 1 to disable."
  83. "(default: 0)");
  84. /* chip specific constants for PMC MaxRAID controllers (same for
  85. * 0x5220 and 0x8010
  86. */
  87. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  88. {
  89. .ioastatus = 0x0,
  90. .ioarrin = 0x00040,
  91. .mailbox = 0x7FC30,
  92. .global_intr_mask = 0x00034,
  93. .ioa_host_intr = 0x0009C,
  94. .ioa_host_intr_clr = 0x000A0,
  95. .ioa_host_msix_intr = 0x7FC40,
  96. .ioa_host_mask = 0x7FC28,
  97. .ioa_host_mask_clr = 0x7FC28,
  98. .host_ioa_intr = 0x00020,
  99. .host_ioa_intr_clr = 0x00020,
  100. .transop_timeout = 300
  101. }
  102. };
  103. /*
  104. * PCI device ids supported by pmcraid driver
  105. */
  106. static const struct pci_device_id pmcraid_pci_table[] = {
  107. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  108. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  109. },
  110. {}
  111. };
  112. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  113. /**
  114. * pmcraid_sdev_init - Prepare for commands to a device
  115. * @scsi_dev: scsi device struct
  116. *
  117. * This function is called by mid-layer prior to sending any command to the new
  118. * device. Stores resource entry details of the device in scsi_device struct.
  119. * Queuecommand uses the resource handle and other details to fill up IOARCB
  120. * while sending commands to the device.
  121. *
  122. * Return value:
  123. * 0 on success / -ENXIO if device does not exist
  124. */
  125. static int pmcraid_sdev_init(struct scsi_device *scsi_dev)
  126. {
  127. struct pmcraid_resource_entry *temp, *res = NULL;
  128. struct pmcraid_instance *pinstance;
  129. u8 target, bus, lun;
  130. unsigned long lock_flags;
  131. int rc = -ENXIO;
  132. u16 fw_version;
  133. pinstance = shost_priv(scsi_dev->host);
  134. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  135. /* Driver exposes VSET and GSCSI resources only; all other device types
  136. * are not exposed. Resource list is synchronized using resource lock
  137. * so any traversal or modifications to the list should be done inside
  138. * this lock
  139. */
  140. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  141. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  142. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  143. if (RES_IS_VSET(temp->cfg_entry)) {
  144. if (fw_version <= PMCRAID_FW_VERSION_1)
  145. target = temp->cfg_entry.unique_flags1;
  146. else
  147. target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
  148. if (target > PMCRAID_MAX_VSET_TARGETS)
  149. continue;
  150. bus = PMCRAID_VSET_BUS_ID;
  151. lun = 0;
  152. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  153. target = RES_TARGET(temp->cfg_entry.resource_address);
  154. bus = PMCRAID_PHYS_BUS_ID;
  155. lun = RES_LUN(temp->cfg_entry.resource_address);
  156. } else {
  157. continue;
  158. }
  159. if (bus == scsi_dev->channel &&
  160. target == scsi_dev->id &&
  161. lun == scsi_dev->lun) {
  162. res = temp;
  163. break;
  164. }
  165. }
  166. if (res) {
  167. res->scsi_dev = scsi_dev;
  168. scsi_dev->hostdata = res;
  169. res->change_detected = 0;
  170. atomic_set(&res->read_failures, 0);
  171. atomic_set(&res->write_failures, 0);
  172. rc = 0;
  173. }
  174. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  175. return rc;
  176. }
  177. /**
  178. * pmcraid_sdev_configure - Configures a SCSI device
  179. * @scsi_dev: scsi device struct
  180. * @lim: queue limits
  181. *
  182. * This function is executed by SCSI mid layer just after a device is first
  183. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  184. * timeout value (default 30s) will be over-written to a higher value (60s)
  185. * and max_sectors value will be over-written to 512. It also sets queue depth
  186. * to host->cmd_per_lun value
  187. *
  188. * Return value:
  189. * 0 on success
  190. */
  191. static int pmcraid_sdev_configure(struct scsi_device *scsi_dev,
  192. struct queue_limits *lim)
  193. {
  194. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  195. if (!res)
  196. return 0;
  197. /* LLD exposes VSETs and Enclosure devices only */
  198. if (RES_IS_GSCSI(res->cfg_entry) &&
  199. scsi_dev->type != TYPE_ENCLOSURE)
  200. return -ENXIO;
  201. pmcraid_info("configuring %x:%x:%x:%x\n",
  202. scsi_dev->host->unique_id,
  203. scsi_dev->channel,
  204. scsi_dev->id,
  205. (u8)scsi_dev->lun);
  206. if (RES_IS_GSCSI(res->cfg_entry)) {
  207. scsi_dev->allow_restart = 1;
  208. } else if (RES_IS_VSET(res->cfg_entry)) {
  209. scsi_dev->allow_restart = 1;
  210. blk_queue_rq_timeout(scsi_dev->request_queue,
  211. PMCRAID_VSET_IO_TIMEOUT);
  212. lim->max_hw_sectors = PMCRAID_VSET_MAX_SECTORS;
  213. }
  214. /*
  215. * We never want to report TCQ support for these types of devices.
  216. */
  217. if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
  218. scsi_dev->tagged_supported = 0;
  219. return 0;
  220. }
  221. /**
  222. * pmcraid_sdev_destroy - Unconfigure a SCSI device before removing it
  223. *
  224. * @scsi_dev: scsi device struct
  225. *
  226. * This is called by mid-layer before removing a device. Pointer assignments
  227. * done in pmcraid_sdev_init will be reset to NULL here.
  228. *
  229. * Return value
  230. * none
  231. */
  232. static void pmcraid_sdev_destroy(struct scsi_device *scsi_dev)
  233. {
  234. struct pmcraid_resource_entry *res;
  235. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  236. if (res)
  237. res->scsi_dev = NULL;
  238. scsi_dev->hostdata = NULL;
  239. }
  240. /**
  241. * pmcraid_change_queue_depth - Change the device's queue depth
  242. * @scsi_dev: scsi device struct
  243. * @depth: depth to set
  244. *
  245. * Return value
  246. * actual depth set
  247. */
  248. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
  249. {
  250. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  251. depth = PMCRAID_MAX_CMD_PER_LUN;
  252. return scsi_change_queue_depth(scsi_dev, depth);
  253. }
  254. /**
  255. * pmcraid_init_cmdblk - initializes a command block
  256. *
  257. * @cmd: pointer to struct pmcraid_cmd to be initialized
  258. * @index: if >=0 first time initialization; otherwise reinitialization
  259. *
  260. * Return Value
  261. * None
  262. */
  263. static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  264. {
  265. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  266. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  267. if (index >= 0) {
  268. /* first time initialization (called from probe) */
  269. u32 ioasa_offset =
  270. offsetof(struct pmcraid_control_block, ioasa);
  271. cmd->index = index;
  272. ioarcb->response_handle = cpu_to_le32(index << 2);
  273. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  274. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  275. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  276. } else {
  277. /* re-initialization of various lengths, called once command is
  278. * processed by IOA
  279. */
  280. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  281. ioarcb->hrrq_id = 0;
  282. ioarcb->request_flags0 = 0;
  283. ioarcb->request_flags1 = 0;
  284. ioarcb->cmd_timeout = 0;
  285. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
  286. ioarcb->ioadl_bus_addr = 0;
  287. ioarcb->ioadl_length = 0;
  288. ioarcb->data_transfer_length = 0;
  289. ioarcb->add_cmd_param_length = 0;
  290. ioarcb->add_cmd_param_offset = 0;
  291. cmd->ioa_cb->ioasa.ioasc = 0;
  292. cmd->ioa_cb->ioasa.residual_data_length = 0;
  293. cmd->time_left = 0;
  294. }
  295. cmd->cmd_done = NULL;
  296. cmd->scsi_cmd = NULL;
  297. cmd->release = 0;
  298. cmd->completion_req = 0;
  299. cmd->sense_buffer = NULL;
  300. cmd->sense_buffer_dma = 0;
  301. cmd->dma_handle = 0;
  302. timer_setup(&cmd->timer, NULL, 0);
  303. }
  304. /**
  305. * pmcraid_reinit_cmdblk - reinitialize a command block
  306. *
  307. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  308. *
  309. * Return Value
  310. * None
  311. */
  312. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  313. {
  314. pmcraid_init_cmdblk(cmd, -1);
  315. }
  316. /**
  317. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  318. * @pinstance: adapter instance structure
  319. *
  320. * Return Value:
  321. * returns pointer to cmd block or NULL if no blocks are available
  322. */
  323. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  324. struct pmcraid_instance *pinstance
  325. )
  326. {
  327. struct pmcraid_cmd *cmd = NULL;
  328. unsigned long lock_flags;
  329. /* free cmd block list is protected by free_pool_lock */
  330. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  331. if (!list_empty(&pinstance->free_cmd_pool)) {
  332. cmd = list_entry(pinstance->free_cmd_pool.next,
  333. struct pmcraid_cmd, free_list);
  334. list_del(&cmd->free_list);
  335. }
  336. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  337. /* Initialize the command block before giving it the caller */
  338. if (cmd != NULL)
  339. pmcraid_reinit_cmdblk(cmd);
  340. return cmd;
  341. }
  342. /**
  343. * pmcraid_return_cmd - return a completed command block back into free pool
  344. * @cmd: pointer to the command block
  345. *
  346. * Return Value:
  347. * nothing
  348. */
  349. static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  350. {
  351. struct pmcraid_instance *pinstance = cmd->drv_inst;
  352. unsigned long lock_flags;
  353. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  354. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  355. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  356. }
  357. /**
  358. * pmcraid_read_interrupts - reads IOA interrupts
  359. *
  360. * @pinstance: pointer to adapter instance structure
  361. *
  362. * Return value
  363. * interrupts read from IOA
  364. */
  365. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  366. {
  367. return (pinstance->interrupt_mode) ?
  368. ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
  369. ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  370. }
  371. /**
  372. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  373. *
  374. * @pinstance: pointer to per adapter instance structure
  375. * @intrs: interrupts to disable
  376. *
  377. * Return Value
  378. * None
  379. */
  380. static void pmcraid_disable_interrupts(
  381. struct pmcraid_instance *pinstance,
  382. u32 intrs
  383. )
  384. {
  385. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  386. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  387. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  388. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  389. ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  390. if (!pinstance->interrupt_mode) {
  391. iowrite32(intrs,
  392. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  393. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  394. }
  395. }
  396. /**
  397. * pmcraid_enable_interrupts - Enables specified interrupts
  398. *
  399. * @pinstance: pointer to per adapter instance structure
  400. * @intrs: interrupts to enable
  401. *
  402. * Return Value
  403. * None
  404. */
  405. static void pmcraid_enable_interrupts(
  406. struct pmcraid_instance *pinstance,
  407. u32 intrs)
  408. {
  409. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  410. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  411. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  412. if (!pinstance->interrupt_mode) {
  413. iowrite32(~intrs,
  414. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  415. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  416. }
  417. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  418. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  419. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  420. }
  421. /**
  422. * pmcraid_clr_trans_op - clear trans to op interrupt
  423. *
  424. * @pinstance: pointer to per adapter instance structure
  425. *
  426. * Return Value
  427. * None
  428. */
  429. static void pmcraid_clr_trans_op(
  430. struct pmcraid_instance *pinstance
  431. )
  432. {
  433. unsigned long lock_flags;
  434. if (!pinstance->interrupt_mode) {
  435. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  436. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  437. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  438. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  439. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  440. ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
  441. }
  442. if (pinstance->reset_cmd != NULL) {
  443. timer_delete(&pinstance->reset_cmd->timer);
  444. spin_lock_irqsave(
  445. pinstance->host->host_lock, lock_flags);
  446. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  447. spin_unlock_irqrestore(
  448. pinstance->host->host_lock, lock_flags);
  449. }
  450. }
  451. /**
  452. * pmcraid_reset_type - Determine the required reset type
  453. * @pinstance: pointer to adapter instance structure
  454. *
  455. * IOA requires hard reset if any of the following conditions is true.
  456. * 1. If HRRQ valid interrupt is not masked
  457. * 2. IOA reset alert doorbell is set
  458. * 3. If there are any error interrupts
  459. */
  460. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  461. {
  462. u32 mask;
  463. u32 intrs;
  464. u32 alerts;
  465. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  466. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  467. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  468. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  469. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  470. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  471. pmcraid_info("IOA requires hard reset\n");
  472. pinstance->ioa_hard_reset = 1;
  473. }
  474. /* If unit check is active, trigger the dump */
  475. if (intrs & INTRS_IOA_UNIT_CHECK)
  476. pinstance->ioa_unit_check = 1;
  477. }
  478. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  479. /**
  480. * pmcraid_bist_done - completion function for PCI BIST
  481. * @t: pointer to reset command
  482. * Return Value
  483. * none
  484. */
  485. static void pmcraid_bist_done(struct timer_list *t)
  486. {
  487. struct pmcraid_cmd *cmd = timer_container_of(cmd, t, timer);
  488. struct pmcraid_instance *pinstance = cmd->drv_inst;
  489. unsigned long lock_flags;
  490. int rc;
  491. u16 pci_reg;
  492. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  493. /* If PCI config space can't be accessed wait for another two secs */
  494. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  495. cmd->time_left > 0) {
  496. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  497. cmd->timer.expires = jiffies + cmd->time_left;
  498. cmd->time_left = 0;
  499. add_timer(&cmd->timer);
  500. } else {
  501. cmd->time_left = 0;
  502. pmcraid_info("BIST is complete, proceeding with reset\n");
  503. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  504. pmcraid_ioa_reset(cmd);
  505. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  506. }
  507. }
  508. /**
  509. * pmcraid_start_bist - starts BIST
  510. * @cmd: pointer to reset cmd
  511. * Return Value
  512. * none
  513. */
  514. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  515. {
  516. struct pmcraid_instance *pinstance = cmd->drv_inst;
  517. u32 doorbells, intrs;
  518. /* proceed with bist and wait for 2 seconds */
  519. iowrite32(DOORBELL_IOA_START_BIST,
  520. pinstance->int_regs.host_ioa_interrupt_reg);
  521. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  522. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  523. pmcraid_info("doorbells after start bist: %x intrs: %x\n",
  524. doorbells, intrs);
  525. cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  526. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  527. cmd->timer.function = pmcraid_bist_done;
  528. add_timer(&cmd->timer);
  529. }
  530. /**
  531. * pmcraid_reset_alert_done - completion routine for reset_alert
  532. * @t: pointer to command block used in reset sequence
  533. * Return value
  534. * None
  535. */
  536. static void pmcraid_reset_alert_done(struct timer_list *t)
  537. {
  538. struct pmcraid_cmd *cmd = timer_container_of(cmd, t, timer);
  539. struct pmcraid_instance *pinstance = cmd->drv_inst;
  540. u32 status = ioread32(pinstance->ioa_status);
  541. unsigned long lock_flags;
  542. /* if the critical operation in progress bit is set or the wait times
  543. * out, invoke reset engine to proceed with hard reset. If there is
  544. * some more time to wait, restart the timer
  545. */
  546. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  547. cmd->time_left <= 0) {
  548. pmcraid_info("critical op is reset proceeding with reset\n");
  549. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  550. pmcraid_ioa_reset(cmd);
  551. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  552. } else {
  553. pmcraid_info("critical op is not yet reset waiting again\n");
  554. /* restart timer if some more time is available to wait */
  555. cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  556. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  557. cmd->timer.function = pmcraid_reset_alert_done;
  558. add_timer(&cmd->timer);
  559. }
  560. }
  561. static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
  562. /**
  563. * pmcraid_reset_alert - alerts IOA for a possible reset
  564. * @cmd: command block to be used for reset sequence.
  565. *
  566. * Return Value
  567. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  568. * successfully written to IOA. Returns non-zero in case pci_config_space
  569. * is not accessible
  570. */
  571. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  572. {
  573. struct pmcraid_instance *pinstance = cmd->drv_inst;
  574. u32 doorbells;
  575. int rc;
  576. u16 pci_reg;
  577. /* If we are able to access IOA PCI config space, alert IOA that we are
  578. * going to reset it soon. This enables IOA to preserv persistent error
  579. * data if any. In case memory space is not accessible, proceed with
  580. * BIST or slot_reset
  581. */
  582. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  583. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  584. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  585. * reset IOA doesn't generate any interrupts when CRITICAL
  586. * OPERATION bit is reset. A timer is started to wait for this
  587. * bit to be reset.
  588. */
  589. cmd->time_left = PMCRAID_RESET_TIMEOUT;
  590. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  591. cmd->timer.function = pmcraid_reset_alert_done;
  592. add_timer(&cmd->timer);
  593. iowrite32(DOORBELL_IOA_RESET_ALERT,
  594. pinstance->int_regs.host_ioa_interrupt_reg);
  595. doorbells =
  596. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  597. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  598. } else {
  599. pmcraid_info("PCI config is not accessible starting BIST\n");
  600. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  601. pmcraid_start_bist(cmd);
  602. }
  603. }
  604. /**
  605. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  606. *
  607. * @t: pointer to command structure, that got timedout
  608. *
  609. * This function blocks host requests and initiates an adapter reset.
  610. *
  611. * Return value:
  612. * None
  613. */
  614. static void pmcraid_timeout_handler(struct timer_list *t)
  615. {
  616. struct pmcraid_cmd *cmd = timer_container_of(cmd, t, timer);
  617. struct pmcraid_instance *pinstance = cmd->drv_inst;
  618. unsigned long lock_flags;
  619. dev_info(&pinstance->pdev->dev,
  620. "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
  621. cmd->ioa_cb->ioarcb.cdb[0]);
  622. /* Command timeouts result in hard reset sequence. The command that got
  623. * timed out may be the one used as part of reset sequence. In this
  624. * case restart reset sequence using the same command block even if
  625. * reset is in progress. Otherwise fail this command and get a free
  626. * command block to restart the reset sequence.
  627. */
  628. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  629. if (!pinstance->ioa_reset_in_progress) {
  630. pinstance->ioa_reset_attempts = 0;
  631. cmd = pmcraid_get_free_cmd(pinstance);
  632. /* If we are out of command blocks, just return here itself.
  633. * Some other command's timeout handler can do the reset job
  634. */
  635. if (cmd == NULL) {
  636. spin_unlock_irqrestore(pinstance->host->host_lock,
  637. lock_flags);
  638. pmcraid_err("no free cmnd block for timeout handler\n");
  639. return;
  640. }
  641. pinstance->reset_cmd = cmd;
  642. pinstance->ioa_reset_in_progress = 1;
  643. } else {
  644. pmcraid_info("reset is already in progress\n");
  645. if (pinstance->reset_cmd != cmd) {
  646. /* This command should have been given to IOA, this
  647. * command will be completed by fail_outstanding_cmds
  648. * anyway
  649. */
  650. pmcraid_err("cmd is pending but reset in progress\n");
  651. }
  652. /* If this command was being used as part of the reset
  653. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  654. * causes fail_outstanding_commands not to return the command
  655. * block back to free pool
  656. */
  657. if (cmd == pinstance->reset_cmd)
  658. cmd->cmd_done = pmcraid_ioa_reset;
  659. }
  660. /* Notify apps of important IOA bringup/bringdown sequences */
  661. if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
  662. pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
  663. pmcraid_notify_ioastate(pinstance,
  664. PMC_DEVICE_EVENT_RESET_START);
  665. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  666. scsi_block_requests(pinstance->host);
  667. pmcraid_reset_alert(cmd);
  668. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  669. }
  670. /**
  671. * pmcraid_internal_done - completion routine for internally generated cmds
  672. *
  673. * @cmd: command that got response from IOA
  674. *
  675. * Return Value:
  676. * none
  677. */
  678. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  679. {
  680. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  681. cmd->ioa_cb->ioarcb.cdb[0],
  682. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  683. /* Some of the internal commands are sent with callers blocking for the
  684. * response. Same will be indicated as part of cmd->completion_req
  685. * field. Response path needs to wake up any waiters waiting for cmd
  686. * completion if this flag is set.
  687. */
  688. if (cmd->completion_req) {
  689. cmd->completion_req = 0;
  690. complete(&cmd->wait_for_completion);
  691. }
  692. /* most of the internal commands are completed by caller itself, so
  693. * no need to return the command block back to free pool until we are
  694. * required to do so (e.g once done with initialization).
  695. */
  696. if (cmd->release) {
  697. cmd->release = 0;
  698. pmcraid_return_cmd(cmd);
  699. }
  700. }
  701. /**
  702. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  703. *
  704. * @cmd: command that got response from IOA
  705. *
  706. * This routine is called after driver re-reads configuration table due to a
  707. * lost CCN. It returns the command block back to free pool and schedules
  708. * worker thread to add/delete devices into the system.
  709. *
  710. * Return Value:
  711. * none
  712. */
  713. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  714. {
  715. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  716. cmd->ioa_cb->ioarcb.cdb[0],
  717. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  718. if (cmd->release) {
  719. cmd->release = 0;
  720. pmcraid_return_cmd(cmd);
  721. }
  722. pmcraid_info("scheduling worker for config table reinitialization\n");
  723. schedule_work(&cmd->drv_inst->worker_q);
  724. }
  725. /**
  726. * pmcraid_erp_done - Process completion of SCSI error response from device
  727. * @cmd: pmcraid_command
  728. *
  729. * This function copies the sense buffer into the scsi_cmd struct and completes
  730. * scsi_cmd by calling scsi_done function.
  731. *
  732. * Return value:
  733. * none
  734. */
  735. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  736. {
  737. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  738. struct pmcraid_instance *pinstance = cmd->drv_inst;
  739. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  740. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  741. scsi_cmd->result |= (DID_ERROR << 16);
  742. scmd_printk(KERN_INFO, scsi_cmd,
  743. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  744. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  745. }
  746. if (cmd->sense_buffer) {
  747. dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma,
  748. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  749. cmd->sense_buffer = NULL;
  750. cmd->sense_buffer_dma = 0;
  751. }
  752. scsi_dma_unmap(scsi_cmd);
  753. pmcraid_return_cmd(cmd);
  754. scsi_done(scsi_cmd);
  755. }
  756. /**
  757. * _pmcraid_fire_command - sends an IOA command to adapter
  758. *
  759. * This function adds the given block into pending command list
  760. * and returns without waiting
  761. *
  762. * @cmd : command to be sent to the device
  763. *
  764. * Return Value
  765. * None
  766. */
  767. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  768. {
  769. struct pmcraid_instance *pinstance = cmd->drv_inst;
  770. unsigned long lock_flags;
  771. /* Add this command block to pending cmd pool. We do this prior to
  772. * writting IOARCB to ioarrin because IOA might complete the command
  773. * by the time we are about to add it to the list. Response handler
  774. * (isr/tasklet) looks for cmd block in the pending pending list.
  775. */
  776. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  777. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  778. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  779. atomic_inc(&pinstance->outstanding_cmds);
  780. /* driver writes lower 32-bit value of IOARCB address only */
  781. mb();
  782. iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
  783. }
  784. /**
  785. * pmcraid_send_cmd - fires a command to IOA
  786. *
  787. * This function also sets up timeout function, and command completion
  788. * function
  789. *
  790. * @cmd: pointer to the command block to be fired to IOA
  791. * @cmd_done: command completion function, called once IOA responds
  792. * @timeout: timeout to wait for this command completion
  793. * @timeout_func: timeout handler
  794. *
  795. * Return value
  796. * none
  797. */
  798. static void pmcraid_send_cmd(
  799. struct pmcraid_cmd *cmd,
  800. void (*cmd_done) (struct pmcraid_cmd *),
  801. unsigned long timeout,
  802. void (*timeout_func) (struct timer_list *)
  803. )
  804. {
  805. /* initialize done function */
  806. cmd->cmd_done = cmd_done;
  807. if (timeout_func) {
  808. /* setup timeout handler */
  809. cmd->timer.expires = jiffies + timeout;
  810. cmd->timer.function = timeout_func;
  811. add_timer(&cmd->timer);
  812. }
  813. /* fire the command to IOA */
  814. _pmcraid_fire_command(cmd);
  815. }
  816. /**
  817. * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
  818. * @cmd: pointer to the command block used for sending IOA shutdown command
  819. *
  820. * Return value
  821. * None
  822. */
  823. static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
  824. {
  825. struct pmcraid_instance *pinstance = cmd->drv_inst;
  826. unsigned long lock_flags;
  827. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  828. pmcraid_ioa_reset(cmd);
  829. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  830. }
  831. /**
  832. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  833. *
  834. * @cmd: pointer to the command block used as part of reset sequence
  835. *
  836. * Return Value
  837. * None
  838. */
  839. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  840. {
  841. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  842. cmd->ioa_cb->ioarcb.cdb[0],
  843. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  844. /* Note that commands sent during reset require next command to be sent
  845. * to IOA. Hence reinit the done function as well as timeout function
  846. */
  847. pmcraid_reinit_cmdblk(cmd);
  848. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  849. cmd->ioa_cb->ioarcb.resource_handle =
  850. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  851. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  852. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  853. /* fire shutdown command to hardware. */
  854. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  855. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  856. pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
  857. pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
  858. PMCRAID_SHUTDOWN_TIMEOUT,
  859. pmcraid_timeout_handler);
  860. }
  861. static void pmcraid_querycfg(struct pmcraid_cmd *);
  862. /**
  863. * pmcraid_get_fwversion_done - completion function for get_fwversion
  864. *
  865. * @cmd: pointer to command block used to send INQUIRY command
  866. *
  867. * Return Value
  868. * none
  869. */
  870. static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
  871. {
  872. struct pmcraid_instance *pinstance = cmd->drv_inst;
  873. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  874. unsigned long lock_flags;
  875. /* configuration table entry size depends on firmware version. If fw
  876. * version is not known, it is not possible to interpret IOA config
  877. * table
  878. */
  879. if (ioasc) {
  880. pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
  881. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  882. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  883. pmcraid_reset_alert(cmd);
  884. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  885. } else {
  886. pmcraid_querycfg(cmd);
  887. }
  888. }
  889. /**
  890. * pmcraid_get_fwversion - reads firmware version information
  891. *
  892. * @cmd: pointer to command block used to send INQUIRY command
  893. *
  894. * Return Value
  895. * none
  896. */
  897. static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
  898. {
  899. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  900. struct pmcraid_ioadl_desc *ioadl;
  901. struct pmcraid_instance *pinstance = cmd->drv_inst;
  902. u16 data_size = sizeof(struct pmcraid_inquiry_data);
  903. pmcraid_reinit_cmdblk(cmd);
  904. ioarcb->request_type = REQ_TYPE_SCSI;
  905. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  906. ioarcb->cdb[0] = INQUIRY;
  907. ioarcb->cdb[1] = 1;
  908. ioarcb->cdb[2] = 0xD0;
  909. ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
  910. ioarcb->cdb[4] = data_size & 0xFF;
  911. /* Since entire inquiry data it can be part of IOARCB itself
  912. */
  913. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  914. offsetof(struct pmcraid_ioarcb,
  915. add_data.u.ioadl[0]));
  916. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  917. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  918. ioarcb->request_flags0 |= NO_LINK_DESCS;
  919. ioarcb->data_transfer_length = cpu_to_le32(data_size);
  920. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  921. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  922. ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
  923. ioadl->data_len = cpu_to_le32(data_size);
  924. pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
  925. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  926. }
  927. /**
  928. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  929. * @cmd: pointer to command block to be used for identify hrrq
  930. *
  931. * Return Value
  932. * none
  933. */
  934. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  935. {
  936. struct pmcraid_instance *pinstance = cmd->drv_inst;
  937. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  938. int index = cmd->hrrq_index;
  939. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  940. __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  941. void (*done_function)(struct pmcraid_cmd *);
  942. pmcraid_reinit_cmdblk(cmd);
  943. cmd->hrrq_index = index + 1;
  944. if (cmd->hrrq_index < pinstance->num_hrrq) {
  945. done_function = pmcraid_identify_hrrq;
  946. } else {
  947. cmd->hrrq_index = 0;
  948. done_function = pmcraid_get_fwversion;
  949. }
  950. /* Initialize ioarcb */
  951. ioarcb->request_type = REQ_TYPE_IOACMD;
  952. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  953. /* initialize the hrrq number where IOA will respond to this command */
  954. ioarcb->hrrq_id = index;
  955. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  956. ioarcb->cdb[1] = index;
  957. /* IOA expects 64-bit pci address to be written in B.E format
  958. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  959. */
  960. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
  961. hrrq_addr, ioarcb->ioarcb_bus_addr, index);
  962. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  963. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  964. /* Subsequent commands require HRRQ identification to be successful.
  965. * Note that this gets called even during reset from SCSI mid-layer
  966. * or tasklet
  967. */
  968. pmcraid_send_cmd(cmd, done_function,
  969. PMCRAID_INTERNAL_TIMEOUT,
  970. pmcraid_timeout_handler);
  971. }
  972. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  973. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  974. /**
  975. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  976. *
  977. * @cmd: initialized command block pointer
  978. *
  979. * Return Value
  980. * none
  981. */
  982. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  983. {
  984. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  985. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  986. else
  987. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  988. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  989. }
  990. /**
  991. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  992. *
  993. * @pinstance: pointer to adapter instance structure
  994. * @type: HCAM type
  995. *
  996. * Return Value
  997. * pointer to initialized pmcraid_cmd structure or NULL
  998. */
  999. static struct pmcraid_cmd *pmcraid_init_hcam
  1000. (
  1001. struct pmcraid_instance *pinstance,
  1002. u8 type
  1003. )
  1004. {
  1005. struct pmcraid_cmd *cmd;
  1006. struct pmcraid_ioarcb *ioarcb;
  1007. struct pmcraid_ioadl_desc *ioadl;
  1008. struct pmcraid_hostrcb *hcam;
  1009. void (*cmd_done) (struct pmcraid_cmd *);
  1010. dma_addr_t dma;
  1011. int rcb_size;
  1012. cmd = pmcraid_get_free_cmd(pinstance);
  1013. if (!cmd) {
  1014. pmcraid_err("no free command blocks for hcam\n");
  1015. return cmd;
  1016. }
  1017. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  1018. rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
  1019. cmd_done = pmcraid_process_ccn;
  1020. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  1021. hcam = &pinstance->ccn;
  1022. } else {
  1023. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  1024. cmd_done = pmcraid_process_ldn;
  1025. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  1026. hcam = &pinstance->ldn;
  1027. }
  1028. /* initialize command pointer used for HCAM registration */
  1029. hcam->cmd = cmd;
  1030. ioarcb = &cmd->ioa_cb->ioarcb;
  1031. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1032. offsetof(struct pmcraid_ioarcb,
  1033. add_data.u.ioadl[0]));
  1034. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1035. ioadl = ioarcb->add_data.u.ioadl;
  1036. /* Initialize ioarcb */
  1037. ioarcb->request_type = REQ_TYPE_HCAM;
  1038. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  1039. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  1040. ioarcb->cdb[1] = type;
  1041. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  1042. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  1043. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  1044. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  1045. ioadl[0].data_len = cpu_to_le32(rcb_size);
  1046. ioadl[0].address = cpu_to_le64(dma);
  1047. cmd->cmd_done = cmd_done;
  1048. return cmd;
  1049. }
  1050. /**
  1051. * pmcraid_send_hcam - Send an HCAM to IOA
  1052. * @pinstance: ioa config struct
  1053. * @type: HCAM type
  1054. *
  1055. * This function will send a Host Controlled Async command to IOA.
  1056. *
  1057. * Return value:
  1058. * none
  1059. */
  1060. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  1061. {
  1062. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  1063. pmcraid_send_hcam_cmd(cmd);
  1064. }
  1065. /**
  1066. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  1067. *
  1068. * @cmd: pointer to cmd that is used as cancelling command
  1069. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  1070. */
  1071. static void pmcraid_prepare_cancel_cmd(
  1072. struct pmcraid_cmd *cmd,
  1073. struct pmcraid_cmd *cmd_to_cancel
  1074. )
  1075. {
  1076. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1077. __be64 ioarcb_addr;
  1078. /* IOARCB address of the command to be cancelled is given in
  1079. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1080. * IOARCB address are not masked.
  1081. */
  1082. ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
  1083. /* Get the resource handle to where the command to be aborted has been
  1084. * sent.
  1085. */
  1086. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  1087. ioarcb->request_type = REQ_TYPE_IOACMD;
  1088. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1089. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  1090. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1091. }
  1092. /**
  1093. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1094. *
  1095. * @cmd: command to be used as cancelling command
  1096. * @type: HCAM type
  1097. * @cmd_done: op done function for the cancelling command
  1098. */
  1099. static void pmcraid_cancel_hcam(
  1100. struct pmcraid_cmd *cmd,
  1101. u8 type,
  1102. void (*cmd_done) (struct pmcraid_cmd *)
  1103. )
  1104. {
  1105. struct pmcraid_instance *pinstance;
  1106. struct pmcraid_hostrcb *hcam;
  1107. pinstance = cmd->drv_inst;
  1108. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1109. &pinstance->ldn : &pinstance->ccn;
  1110. /* prepare for cancelling previous hcam command. If the HCAM is
  1111. * currently not pending with IOA, we would have hcam->cmd as non-null
  1112. */
  1113. if (hcam->cmd == NULL)
  1114. return;
  1115. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1116. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1117. * schedule queuecommand while we are doing this
  1118. */
  1119. pmcraid_send_cmd(cmd, cmd_done,
  1120. PMCRAID_INTERNAL_TIMEOUT,
  1121. pmcraid_timeout_handler);
  1122. }
  1123. /**
  1124. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1125. *
  1126. * @cmd: command block to be used for cancelling the HCAM
  1127. */
  1128. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1129. {
  1130. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1131. cmd->ioa_cb->ioarcb.cdb[0],
  1132. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1133. pmcraid_reinit_cmdblk(cmd);
  1134. pmcraid_cancel_hcam(cmd,
  1135. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1136. pmcraid_ioa_shutdown);
  1137. }
  1138. /**
  1139. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1140. *
  1141. * @cmd: command block to be used for cancelling the HCAM
  1142. */
  1143. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1144. {
  1145. pmcraid_cancel_hcam(cmd,
  1146. PMCRAID_HCAM_CODE_LOG_DATA,
  1147. pmcraid_cancel_ccn);
  1148. }
  1149. /**
  1150. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1151. *
  1152. * @fw_version: firmware version code
  1153. * @cfgte: pointer to configuration table entry of the resource
  1154. *
  1155. * Return value:
  1156. * true if resource can be added to midlayer, false(0) otherwise
  1157. */
  1158. static int pmcraid_expose_resource(u16 fw_version,
  1159. struct pmcraid_config_table_entry *cfgte)
  1160. {
  1161. int retval = 0;
  1162. if (cfgte->resource_type == RES_TYPE_VSET) {
  1163. if (fw_version <= PMCRAID_FW_VERSION_1)
  1164. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1165. else
  1166. retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
  1167. (cfgte->unique_flags1 & 0x80) == 0);
  1168. } else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1169. retval = (RES_BUS(cfgte->resource_address) !=
  1170. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1171. return retval;
  1172. }
  1173. /* attributes supported by pmcraid_event_family */
  1174. enum {
  1175. PMCRAID_AEN_ATTR_UNSPEC,
  1176. PMCRAID_AEN_ATTR_EVENT,
  1177. __PMCRAID_AEN_ATTR_MAX,
  1178. };
  1179. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1180. /* commands supported by pmcraid_event_family */
  1181. enum {
  1182. PMCRAID_AEN_CMD_UNSPEC,
  1183. PMCRAID_AEN_CMD_EVENT,
  1184. __PMCRAID_AEN_CMD_MAX,
  1185. };
  1186. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1187. static struct genl_multicast_group pmcraid_mcgrps[] = {
  1188. { .name = "events", /* not really used - see ID discussion below */ },
  1189. };
  1190. static struct genl_family pmcraid_event_family __ro_after_init = {
  1191. .module = THIS_MODULE,
  1192. .name = "pmcraid",
  1193. .version = 1,
  1194. .maxattr = PMCRAID_AEN_ATTR_MAX,
  1195. .mcgrps = pmcraid_mcgrps,
  1196. .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
  1197. };
  1198. /**
  1199. * pmcraid_netlink_init - registers pmcraid_event_family
  1200. *
  1201. * Return value:
  1202. * 0 if the pmcraid_event_family is successfully registered
  1203. * with netlink generic, non-zero otherwise
  1204. */
  1205. static int __init pmcraid_netlink_init(void)
  1206. {
  1207. int result;
  1208. result = genl_register_family(&pmcraid_event_family);
  1209. if (result)
  1210. return result;
  1211. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1212. pmcraid_event_family.id);
  1213. return result;
  1214. }
  1215. /**
  1216. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1217. *
  1218. * Return value:
  1219. * none
  1220. */
  1221. static void pmcraid_netlink_release(void)
  1222. {
  1223. genl_unregister_family(&pmcraid_event_family);
  1224. }
  1225. /*
  1226. * pmcraid_notify_aen - sends event msg to user space application
  1227. * @pinstance: pointer to adapter instance structure
  1228. *
  1229. * Return value:
  1230. * 0 if success, error value in case of any failure.
  1231. */
  1232. static int pmcraid_notify_aen(
  1233. struct pmcraid_instance *pinstance,
  1234. struct pmcraid_aen_msg *aen_msg,
  1235. u32 data_size)
  1236. {
  1237. struct sk_buff *skb;
  1238. void *msg_header;
  1239. u32 total_size, nla_genl_hdr_total_size;
  1240. int result;
  1241. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1242. MINOR(pinstance->cdev.dev));
  1243. aen_msg->length = data_size;
  1244. data_size += sizeof(*aen_msg);
  1245. total_size = nla_total_size(data_size);
  1246. /* Add GENL_HDR to total_size */
  1247. nla_genl_hdr_total_size =
  1248. (total_size + (GENL_HDRLEN +
  1249. ((struct genl_family *)&pmcraid_event_family)->hdrsize)
  1250. + NLMSG_HDRLEN);
  1251. skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
  1252. if (!skb) {
  1253. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1254. total_size);
  1255. return -ENOMEM;
  1256. }
  1257. /* add the genetlink message header */
  1258. msg_header = genlmsg_put(skb, 0, 0,
  1259. &pmcraid_event_family, 0,
  1260. PMCRAID_AEN_CMD_EVENT);
  1261. if (!msg_header) {
  1262. pmcraid_err("failed to copy command details\n");
  1263. nlmsg_free(skb);
  1264. return -ENOMEM;
  1265. }
  1266. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1267. if (result) {
  1268. pmcraid_err("failed to copy AEN attribute data\n");
  1269. nlmsg_free(skb);
  1270. return -EINVAL;
  1271. }
  1272. /* send genetlink multicast message to notify applications */
  1273. genlmsg_end(skb, msg_header);
  1274. result = genlmsg_multicast(&pmcraid_event_family, skb,
  1275. 0, 0, GFP_ATOMIC);
  1276. /* If there are no listeners, genlmsg_multicast may return non-zero
  1277. * value.
  1278. */
  1279. if (result)
  1280. pmcraid_info("error (%x) sending aen event message\n", result);
  1281. return result;
  1282. }
  1283. /**
  1284. * pmcraid_notify_ccn - notifies about CCN event msg to user space
  1285. * @pinstance: pointer adapter instance structure
  1286. *
  1287. * Return value:
  1288. * 0 if success, error value in case of any failure
  1289. */
  1290. static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
  1291. {
  1292. return pmcraid_notify_aen(pinstance,
  1293. pinstance->ccn.msg,
  1294. le32_to_cpu(pinstance->ccn.hcam->data_len) +
  1295. sizeof(struct pmcraid_hcam_hdr));
  1296. }
  1297. /**
  1298. * pmcraid_notify_ldn - notifies about CCN event msg to user space
  1299. * @pinstance: pointer adapter instance structure
  1300. *
  1301. * Return value:
  1302. * 0 if success, error value in case of any failure
  1303. */
  1304. static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
  1305. {
  1306. return pmcraid_notify_aen(pinstance,
  1307. pinstance->ldn.msg,
  1308. le32_to_cpu(pinstance->ldn.hcam->data_len) +
  1309. sizeof(struct pmcraid_hcam_hdr));
  1310. }
  1311. /**
  1312. * pmcraid_notify_ioastate - sends IOA state event msg to user space
  1313. * @pinstance: pointer adapter instance structure
  1314. * @evt: controller state event to be sent
  1315. *
  1316. * Return value:
  1317. * 0 if success, error value in case of any failure
  1318. */
  1319. static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
  1320. {
  1321. pinstance->scn.ioa_state = evt;
  1322. pmcraid_notify_aen(pinstance,
  1323. &pinstance->scn.msg,
  1324. sizeof(u32));
  1325. }
  1326. /**
  1327. * pmcraid_handle_config_change - Handle a config change from the adapter
  1328. * @pinstance: pointer to per adapter instance structure
  1329. *
  1330. * Return value:
  1331. * none
  1332. */
  1333. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1334. {
  1335. struct pmcraid_config_table_entry *cfg_entry;
  1336. struct pmcraid_hcam_ccn *ccn_hcam;
  1337. struct pmcraid_cmd *cmd;
  1338. struct pmcraid_cmd *cfgcmd;
  1339. struct pmcraid_resource_entry *res = NULL;
  1340. unsigned long lock_flags;
  1341. unsigned long host_lock_flags;
  1342. u32 new_entry = 1;
  1343. u32 hidden_entry = 0;
  1344. u16 fw_version;
  1345. int rc;
  1346. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1347. cfg_entry = &ccn_hcam->cfg_entry;
  1348. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  1349. pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
  1350. res: %x:%x:%x:%x\n",
  1351. le32_to_cpu(pinstance->ccn.hcam->ilid),
  1352. pinstance->ccn.hcam->op_code,
  1353. (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
  1354. ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
  1355. pinstance->ccn.hcam->notification_type,
  1356. pinstance->ccn.hcam->notification_lost,
  1357. pinstance->ccn.hcam->flags,
  1358. pinstance->host->unique_id,
  1359. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1360. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1361. RES_BUS(cfg_entry->resource_address)),
  1362. RES_IS_VSET(*cfg_entry) ?
  1363. (fw_version <= PMCRAID_FW_VERSION_1 ?
  1364. cfg_entry->unique_flags1 :
  1365. le16_to_cpu(cfg_entry->array_id) & 0xFF) :
  1366. RES_TARGET(cfg_entry->resource_address),
  1367. RES_LUN(cfg_entry->resource_address));
  1368. /* If this HCAM indicates a lost notification, read the config table */
  1369. if (pinstance->ccn.hcam->notification_lost) {
  1370. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1371. if (cfgcmd) {
  1372. pmcraid_info("lost CCN, reading config table\b");
  1373. pinstance->reinit_cfg_table = 1;
  1374. pmcraid_querycfg(cfgcmd);
  1375. } else {
  1376. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1377. }
  1378. goto out_notify_apps;
  1379. }
  1380. /* If this resource is not going to be added to mid-layer, just notify
  1381. * applications and return. If this notification is about hiding a VSET
  1382. * resource, check if it was exposed already.
  1383. */
  1384. if (pinstance->ccn.hcam->notification_type ==
  1385. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1386. cfg_entry->resource_type == RES_TYPE_VSET) {
  1387. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1388. } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
  1389. goto out_notify_apps;
  1390. }
  1391. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1392. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1393. rc = memcmp(&res->cfg_entry.resource_address,
  1394. &cfg_entry->resource_address,
  1395. sizeof(cfg_entry->resource_address));
  1396. if (!rc) {
  1397. new_entry = 0;
  1398. break;
  1399. }
  1400. }
  1401. if (new_entry) {
  1402. if (hidden_entry) {
  1403. spin_unlock_irqrestore(&pinstance->resource_lock,
  1404. lock_flags);
  1405. goto out_notify_apps;
  1406. }
  1407. /* If there are more number of resources than what driver can
  1408. * manage, do not notify the applications about the CCN. Just
  1409. * ignore this notifications and re-register the same HCAM
  1410. */
  1411. if (list_empty(&pinstance->free_res_q)) {
  1412. spin_unlock_irqrestore(&pinstance->resource_lock,
  1413. lock_flags);
  1414. pmcraid_err("too many resources attached\n");
  1415. spin_lock_irqsave(pinstance->host->host_lock,
  1416. host_lock_flags);
  1417. pmcraid_send_hcam(pinstance,
  1418. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1419. spin_unlock_irqrestore(pinstance->host->host_lock,
  1420. host_lock_flags);
  1421. return;
  1422. }
  1423. res = list_entry(pinstance->free_res_q.next,
  1424. struct pmcraid_resource_entry, queue);
  1425. list_del(&res->queue);
  1426. res->scsi_dev = NULL;
  1427. res->reset_progress = 0;
  1428. list_add_tail(&res->queue, &pinstance->used_res_q);
  1429. }
  1430. memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
  1431. if (pinstance->ccn.hcam->notification_type ==
  1432. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1433. if (res->scsi_dev) {
  1434. if (fw_version <= PMCRAID_FW_VERSION_1)
  1435. res->cfg_entry.unique_flags1 &= 0x7F;
  1436. else
  1437. res->cfg_entry.array_id &= cpu_to_le16(0xFF);
  1438. res->change_detected = RES_CHANGE_DEL;
  1439. res->cfg_entry.resource_handle =
  1440. PMCRAID_INVALID_RES_HANDLE;
  1441. schedule_work(&pinstance->worker_q);
  1442. } else {
  1443. /* This may be one of the non-exposed resources */
  1444. list_move_tail(&res->queue, &pinstance->free_res_q);
  1445. }
  1446. } else if (!res->scsi_dev) {
  1447. res->change_detected = RES_CHANGE_ADD;
  1448. schedule_work(&pinstance->worker_q);
  1449. }
  1450. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1451. out_notify_apps:
  1452. /* Notify configuration changes to registered applications.*/
  1453. if (!pmcraid_disable_aen)
  1454. pmcraid_notify_ccn(pinstance);
  1455. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1456. if (cmd)
  1457. pmcraid_send_hcam_cmd(cmd);
  1458. }
  1459. /**
  1460. * pmcraid_get_error_info - return error string for an ioasc
  1461. * @ioasc: ioasc code
  1462. * Return Value
  1463. * none
  1464. */
  1465. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1466. {
  1467. int i;
  1468. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1469. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1470. return &pmcraid_ioasc_error_table[i];
  1471. }
  1472. return NULL;
  1473. }
  1474. /**
  1475. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1476. * @ioasc: ioasc code
  1477. * @cmd: pointer to command that resulted in 'ioasc'
  1478. */
  1479. static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1480. {
  1481. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1482. if (error_info == NULL ||
  1483. cmd->drv_inst->current_log_level < error_info->log_level)
  1484. return;
  1485. /* log the error string */
  1486. pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
  1487. cmd->ioa_cb->ioarcb.cdb[0],
  1488. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  1489. ioasc, error_info->error_string);
  1490. }
  1491. /**
  1492. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1493. *
  1494. * @pinstance: pointer to per adapter instance structure
  1495. *
  1496. * Return value:
  1497. * none
  1498. */
  1499. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1500. {
  1501. struct pmcraid_hcam_ldn *hcam_ldn;
  1502. u32 ioasc;
  1503. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1504. pmcraid_info
  1505. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1506. pinstance->ldn.hcam->ilid,
  1507. pinstance->ldn.hcam->op_code,
  1508. pinstance->ldn.hcam->notification_type,
  1509. pinstance->ldn.hcam->notification_lost,
  1510. pinstance->ldn.hcam->flags,
  1511. pinstance->ldn.hcam->overlay_id);
  1512. /* log only the errors, no need to log informational log entries */
  1513. if (pinstance->ldn.hcam->notification_type !=
  1514. NOTIFICATION_TYPE_ERROR_LOG)
  1515. return;
  1516. if (pinstance->ldn.hcam->notification_lost ==
  1517. HOSTRCB_NOTIFICATIONS_LOST)
  1518. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1519. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1520. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1521. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1522. dev_info(&pinstance->pdev->dev,
  1523. "UnitAttention due to IOA Bus Reset\n");
  1524. scsi_report_bus_reset(
  1525. pinstance->host,
  1526. RES_BUS(hcam_ldn->error_log.fd_ra));
  1527. }
  1528. return;
  1529. }
  1530. /**
  1531. * pmcraid_process_ccn - Op done function for a CCN.
  1532. * @cmd: pointer to command struct
  1533. *
  1534. * This function is the op done function for a configuration
  1535. * change notification
  1536. *
  1537. * Return value:
  1538. * none
  1539. */
  1540. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1541. {
  1542. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1543. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1544. unsigned long lock_flags;
  1545. pinstance->ccn.cmd = NULL;
  1546. pmcraid_return_cmd(cmd);
  1547. /* If driver initiated IOA reset happened while this hcam was pending
  1548. * with IOA, or IOA bringdown sequence is in progress, no need to
  1549. * re-register the hcam
  1550. */
  1551. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1552. atomic_read(&pinstance->ccn.ignore) == 1) {
  1553. return;
  1554. } else if (ioasc) {
  1555. dev_info(&pinstance->pdev->dev,
  1556. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1557. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1558. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1559. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1560. } else {
  1561. pmcraid_handle_config_change(pinstance);
  1562. }
  1563. }
  1564. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1565. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
  1566. /**
  1567. * pmcraid_process_ldn - op done function for an LDN
  1568. * @cmd: pointer to command block
  1569. *
  1570. * Return value
  1571. * none
  1572. */
  1573. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1574. {
  1575. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1576. struct pmcraid_hcam_ldn *ldn_hcam =
  1577. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1578. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1579. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1580. unsigned long lock_flags;
  1581. /* return the command block back to freepool */
  1582. pinstance->ldn.cmd = NULL;
  1583. pmcraid_return_cmd(cmd);
  1584. /* If driver initiated IOA reset happened while this hcam was pending
  1585. * with IOA, no need to re-register the hcam as reset engine will do it
  1586. * once reset sequence is complete
  1587. */
  1588. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1589. atomic_read(&pinstance->ccn.ignore) == 1) {
  1590. return;
  1591. } else if (!ioasc) {
  1592. pmcraid_handle_error_log(pinstance);
  1593. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1594. spin_lock_irqsave(pinstance->host->host_lock,
  1595. lock_flags);
  1596. pmcraid_initiate_reset(pinstance);
  1597. spin_unlock_irqrestore(pinstance->host->host_lock,
  1598. lock_flags);
  1599. return;
  1600. }
  1601. if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
  1602. pinstance->timestamp_error = 1;
  1603. pmcraid_set_timestamp(cmd);
  1604. }
  1605. } else {
  1606. dev_info(&pinstance->pdev->dev,
  1607. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1608. }
  1609. /* send netlink message for HCAM notification if enabled */
  1610. if (!pmcraid_disable_aen)
  1611. pmcraid_notify_ldn(pinstance);
  1612. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1613. if (cmd)
  1614. pmcraid_send_hcam_cmd(cmd);
  1615. }
  1616. /**
  1617. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1618. *
  1619. * @pinstance: pointer per adapter instance structure
  1620. *
  1621. * Return Value
  1622. * none
  1623. */
  1624. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1625. {
  1626. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1627. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1628. }
  1629. /**
  1630. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1631. * @cmd: pointer to command used as part of reset sequence
  1632. */
  1633. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1634. {
  1635. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1636. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1637. * handling hcam response though it is not necessary. In order to
  1638. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1639. * re-send any more hcams
  1640. */
  1641. atomic_set(&pinstance->ccn.ignore, 1);
  1642. atomic_set(&pinstance->ldn.ignore, 1);
  1643. /* If adapter reset was forced as part of runtime reset sequence,
  1644. * start the reset sequence. Reset will be triggered even in case
  1645. * IOA unit_check.
  1646. */
  1647. if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
  1648. pinstance->ioa_unit_check) {
  1649. pinstance->force_ioa_reset = 0;
  1650. pinstance->ioa_unit_check = 0;
  1651. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1652. pmcraid_reset_alert(cmd);
  1653. return;
  1654. }
  1655. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1656. * one after the other. So CCN cancellation will be triggered by
  1657. * pmcraid_cancel_ldn itself.
  1658. */
  1659. pmcraid_cancel_ldn(cmd);
  1660. }
  1661. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1662. /**
  1663. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1664. * @pinstance: pointer to adapter instance structure
  1665. * Return Value
  1666. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1667. */
  1668. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1669. {
  1670. u32 intrs;
  1671. pmcraid_reinit_buffers(pinstance);
  1672. intrs = pmcraid_read_interrupts(pinstance);
  1673. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1674. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1675. if (!pinstance->interrupt_mode) {
  1676. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1677. pinstance->int_regs.
  1678. ioa_host_interrupt_mask_reg);
  1679. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1680. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1681. }
  1682. return 1;
  1683. } else {
  1684. return 0;
  1685. }
  1686. }
  1687. /**
  1688. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1689. * @cmd : pointer to reset command block
  1690. *
  1691. * Return Value
  1692. * none
  1693. */
  1694. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1695. {
  1696. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1697. u32 int_reg;
  1698. u32 doorbell;
  1699. /* There will be an interrupt when Transition to Operational bit is
  1700. * set so tasklet would execute next reset task. The timeout handler
  1701. * would re-initiate a reset
  1702. */
  1703. cmd->cmd_done = pmcraid_ioa_reset;
  1704. cmd->timer.expires = jiffies +
  1705. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1706. cmd->timer.function = pmcraid_timeout_handler;
  1707. if (!timer_pending(&cmd->timer))
  1708. add_timer(&cmd->timer);
  1709. /* Enable destructive diagnostics on IOA if it is not yet in
  1710. * operational state
  1711. */
  1712. doorbell = DOORBELL_RUNTIME_RESET |
  1713. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1714. /* Since we do RESET_ALERT and Start BIST we have to again write
  1715. * MSIX Doorbell to indicate the interrupt mode
  1716. */
  1717. if (pinstance->interrupt_mode) {
  1718. iowrite32(DOORBELL_INTR_MODE_MSIX,
  1719. pinstance->int_regs.host_ioa_interrupt_reg);
  1720. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  1721. }
  1722. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1723. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  1724. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1725. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1726. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1727. int_reg);
  1728. }
  1729. /**
  1730. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1731. *
  1732. * @pinstance: pointer to adapter instance structure
  1733. *
  1734. * Return Value
  1735. * none
  1736. */
  1737. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1738. {
  1739. pmcraid_info("%s is not yet implemented\n", __func__);
  1740. }
  1741. /**
  1742. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1743. * @pinstance: pointer to adapter instance structure
  1744. *
  1745. * This function fails all outstanding ops. If they are submitted to IOA
  1746. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1747. * otherwise just completes the commands and returns the cmd blocks to free
  1748. * pool.
  1749. *
  1750. * Return value:
  1751. * none
  1752. */
  1753. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1754. {
  1755. struct pmcraid_cmd *cmd, *temp;
  1756. unsigned long lock_flags;
  1757. /* pending command list is protected by pending_pool_lock. Its
  1758. * traversal must be done as within this lock
  1759. */
  1760. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1761. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1762. free_list) {
  1763. list_del(&cmd->free_list);
  1764. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1765. lock_flags);
  1766. cmd->ioa_cb->ioasa.ioasc =
  1767. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1768. cmd->ioa_cb->ioasa.ilid =
  1769. cpu_to_le32(PMCRAID_DRIVER_ILID);
  1770. /* In case the command timer is still running */
  1771. timer_delete(&cmd->timer);
  1772. /* If this is an IO command, complete it by invoking scsi_done
  1773. * function. If this is one of the internal commands other
  1774. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1775. * complete it
  1776. */
  1777. if (cmd->scsi_cmd) {
  1778. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1779. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1780. scsi_cmd->result |= DID_ERROR << 16;
  1781. scsi_dma_unmap(scsi_cmd);
  1782. pmcraid_return_cmd(cmd);
  1783. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1784. le32_to_cpu(resp) >> 2,
  1785. cmd->ioa_cb->ioarcb.cdb[0],
  1786. scsi_cmd->result);
  1787. scsi_done(scsi_cmd);
  1788. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1789. cmd->cmd_done == pmcraid_erp_done) {
  1790. cmd->cmd_done(cmd);
  1791. } else if (cmd->cmd_done != pmcraid_ioa_reset &&
  1792. cmd->cmd_done != pmcraid_ioa_shutdown_done) {
  1793. pmcraid_return_cmd(cmd);
  1794. }
  1795. atomic_dec(&pinstance->outstanding_cmds);
  1796. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1797. }
  1798. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1799. }
  1800. /**
  1801. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1802. *
  1803. * @cmd: pointer to the cmd block to be used for entire reset process
  1804. *
  1805. * This function executes most of the steps required for IOA reset. This gets
  1806. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1807. * 'eh_' thread. Access to variables used for controlling the reset sequence is
  1808. * synchronized using host lock. Various functions called during reset process
  1809. * would make use of a single command block, pointer to which is also stored in
  1810. * adapter instance structure.
  1811. *
  1812. * Return Value
  1813. * None
  1814. */
  1815. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1816. {
  1817. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1818. u8 reset_complete = 0;
  1819. pinstance->ioa_reset_in_progress = 1;
  1820. if (pinstance->reset_cmd != cmd) {
  1821. pmcraid_err("reset is called with different command block\n");
  1822. pinstance->reset_cmd = cmd;
  1823. }
  1824. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1825. pinstance->ioa_state, cmd);
  1826. switch (pinstance->ioa_state) {
  1827. case IOA_STATE_DEAD:
  1828. /* If IOA is offline, whatever may be the reset reason, just
  1829. * return. callers might be waiting on the reset wait_q, wake
  1830. * up them
  1831. */
  1832. pmcraid_err("IOA is offline no reset is possible\n");
  1833. reset_complete = 1;
  1834. break;
  1835. case IOA_STATE_IN_BRINGDOWN:
  1836. /* we enter here, once ioa shutdown command is processed by IOA
  1837. * Alert IOA for a possible reset. If reset alert fails, IOA
  1838. * goes through hard-reset
  1839. */
  1840. pmcraid_disable_interrupts(pinstance, ~0);
  1841. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1842. pmcraid_reset_alert(cmd);
  1843. break;
  1844. case IOA_STATE_UNKNOWN:
  1845. /* We may be called during probe or resume. Some pre-processing
  1846. * is required for prior to reset
  1847. */
  1848. scsi_block_requests(pinstance->host);
  1849. /* If asked to reset while IOA was processing responses or
  1850. * there are any error responses then IOA may require
  1851. * hard-reset.
  1852. */
  1853. if (pinstance->ioa_hard_reset == 0) {
  1854. if (ioread32(pinstance->ioa_status) &
  1855. INTRS_TRANSITION_TO_OPERATIONAL) {
  1856. pmcraid_info("sticky bit set, bring-up\n");
  1857. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1858. pmcraid_reinit_cmdblk(cmd);
  1859. pmcraid_identify_hrrq(cmd);
  1860. } else {
  1861. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1862. pmcraid_soft_reset(cmd);
  1863. }
  1864. } else {
  1865. /* Alert IOA of a possible reset and wait for critical
  1866. * operation in progress bit to reset
  1867. */
  1868. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1869. pmcraid_reset_alert(cmd);
  1870. }
  1871. break;
  1872. case IOA_STATE_IN_RESET_ALERT:
  1873. /* If critical operation in progress bit is reset or wait gets
  1874. * timed out, reset proceeds with starting BIST on the IOA.
  1875. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1876. * they are 3 or more, reset engine marks IOA dead and returns
  1877. */
  1878. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1879. pmcraid_start_bist(cmd);
  1880. break;
  1881. case IOA_STATE_IN_HARD_RESET:
  1882. pinstance->ioa_reset_attempts++;
  1883. /* retry reset if we haven't reached maximum allowed limit */
  1884. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1885. pinstance->ioa_reset_attempts = 0;
  1886. pmcraid_err("IOA didn't respond marking it as dead\n");
  1887. pinstance->ioa_state = IOA_STATE_DEAD;
  1888. if (pinstance->ioa_bringdown)
  1889. pmcraid_notify_ioastate(pinstance,
  1890. PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
  1891. else
  1892. pmcraid_notify_ioastate(pinstance,
  1893. PMC_DEVICE_EVENT_RESET_FAILED);
  1894. reset_complete = 1;
  1895. break;
  1896. }
  1897. /* Once either bist or pci reset is done, restore PCI config
  1898. * space. If this fails, proceed with hard reset again
  1899. */
  1900. pci_restore_state(pinstance->pdev);
  1901. /* fail all pending commands */
  1902. pmcraid_fail_outstanding_cmds(pinstance);
  1903. /* check if unit check is active, if so extract dump */
  1904. if (pinstance->ioa_unit_check) {
  1905. pmcraid_info("unit check is active\n");
  1906. pinstance->ioa_unit_check = 0;
  1907. pmcraid_get_dump(pinstance);
  1908. pinstance->ioa_reset_attempts--;
  1909. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1910. pmcraid_reset_alert(cmd);
  1911. break;
  1912. }
  1913. /* if the reset reason is to bring-down the ioa, we might be
  1914. * done with the reset restore pci_config_space and complete
  1915. * the reset
  1916. */
  1917. if (pinstance->ioa_bringdown) {
  1918. pmcraid_info("bringing down the adapter\n");
  1919. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1920. pinstance->ioa_bringdown = 0;
  1921. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1922. pmcraid_notify_ioastate(pinstance,
  1923. PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
  1924. reset_complete = 1;
  1925. } else {
  1926. /* bring-up IOA, so proceed with soft reset
  1927. * Reinitialize hrrq_buffers and their indices also
  1928. * enable interrupts after a pci_restore_state
  1929. */
  1930. if (pmcraid_reset_enable_ioa(pinstance)) {
  1931. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1932. pmcraid_info("bringing up the adapter\n");
  1933. pmcraid_reinit_cmdblk(cmd);
  1934. pmcraid_identify_hrrq(cmd);
  1935. } else {
  1936. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1937. pmcraid_soft_reset(cmd);
  1938. }
  1939. }
  1940. break;
  1941. case IOA_STATE_IN_SOFT_RESET:
  1942. /* TRANSITION TO OPERATIONAL is on so start initialization
  1943. * sequence
  1944. */
  1945. pmcraid_info("In softreset proceeding with bring-up\n");
  1946. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1947. /* Initialization commands start with HRRQ identification. From
  1948. * now on tasklet completes most of the commands as IOA is up
  1949. * and intrs are enabled
  1950. */
  1951. pmcraid_identify_hrrq(cmd);
  1952. break;
  1953. case IOA_STATE_IN_BRINGUP:
  1954. /* we are done with bringing up of IOA, change the ioa_state to
  1955. * operational and wake up any waiters
  1956. */
  1957. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  1958. reset_complete = 1;
  1959. break;
  1960. case IOA_STATE_OPERATIONAL:
  1961. default:
  1962. /* When IOA is operational and a reset is requested, check for
  1963. * the reset reason. If reset is to bring down IOA, unregister
  1964. * HCAMs and initiate shutdown; if adapter reset is forced then
  1965. * restart reset sequence again
  1966. */
  1967. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  1968. pinstance->force_ioa_reset == 0) {
  1969. pmcraid_notify_ioastate(pinstance,
  1970. PMC_DEVICE_EVENT_RESET_SUCCESS);
  1971. reset_complete = 1;
  1972. } else {
  1973. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  1974. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  1975. pmcraid_reinit_cmdblk(cmd);
  1976. pmcraid_unregister_hcams(cmd);
  1977. }
  1978. break;
  1979. }
  1980. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  1981. * OPERATIONAL. Reset all control variables used during reset, wake up
  1982. * any waiting threads and let the SCSI mid-layer send commands. Note
  1983. * that host_lock must be held before invoking scsi_report_bus_reset.
  1984. */
  1985. if (reset_complete) {
  1986. pinstance->ioa_reset_in_progress = 0;
  1987. pinstance->ioa_reset_attempts = 0;
  1988. pinstance->reset_cmd = NULL;
  1989. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1990. pinstance->ioa_bringdown = 0;
  1991. pmcraid_return_cmd(cmd);
  1992. /* If target state is to bring up the adapter, proceed with
  1993. * hcam registration and resource exposure to mid-layer.
  1994. */
  1995. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  1996. pmcraid_register_hcams(pinstance);
  1997. wake_up_all(&pinstance->reset_wait_q);
  1998. }
  1999. return;
  2000. }
  2001. /**
  2002. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  2003. * ISR/tasklet during error interrupts including IOA unit check. If reset
  2004. * is already in progress, it just returns, otherwise initiates IOA reset
  2005. * to bring IOA up to operational state.
  2006. *
  2007. * @pinstance: pointer to adapter instance structure
  2008. *
  2009. * Return value
  2010. * none
  2011. */
  2012. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  2013. {
  2014. struct pmcraid_cmd *cmd;
  2015. /* If the reset is already in progress, just return, otherwise start
  2016. * reset sequence and return
  2017. */
  2018. if (!pinstance->ioa_reset_in_progress) {
  2019. scsi_block_requests(pinstance->host);
  2020. cmd = pmcraid_get_free_cmd(pinstance);
  2021. if (cmd == NULL) {
  2022. pmcraid_err("no cmnd blocks for initiate_reset\n");
  2023. return;
  2024. }
  2025. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2026. pinstance->reset_cmd = cmd;
  2027. pinstance->force_ioa_reset = 1;
  2028. pmcraid_notify_ioastate(pinstance,
  2029. PMC_DEVICE_EVENT_RESET_START);
  2030. pmcraid_ioa_reset(cmd);
  2031. }
  2032. }
  2033. /**
  2034. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  2035. * or bringdown IOA
  2036. * @pinstance: pointer adapter instance structure
  2037. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  2038. * @target_state: expected target state after reset
  2039. *
  2040. * Note: This command initiates reset and waits for its completion. Hence this
  2041. * should not be called from isr/timer/tasklet functions (timeout handlers,
  2042. * error response handlers and interrupt handlers).
  2043. *
  2044. * Return Value
  2045. * 1 in case ioa_state is not target_state, 0 otherwise.
  2046. */
  2047. static int pmcraid_reset_reload(
  2048. struct pmcraid_instance *pinstance,
  2049. u8 shutdown_type,
  2050. u8 target_state
  2051. )
  2052. {
  2053. struct pmcraid_cmd *reset_cmd = NULL;
  2054. unsigned long lock_flags;
  2055. int reset = 1;
  2056. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2057. if (pinstance->ioa_reset_in_progress) {
  2058. pmcraid_info("reset_reload: reset is already in progress\n");
  2059. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2060. wait_event(pinstance->reset_wait_q,
  2061. !pinstance->ioa_reset_in_progress);
  2062. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2063. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2064. pmcraid_info("reset_reload: IOA is dead\n");
  2065. goto out_unlock;
  2066. }
  2067. if (pinstance->ioa_state == target_state) {
  2068. reset = 0;
  2069. goto out_unlock;
  2070. }
  2071. }
  2072. pmcraid_info("reset_reload: proceeding with reset\n");
  2073. scsi_block_requests(pinstance->host);
  2074. reset_cmd = pmcraid_get_free_cmd(pinstance);
  2075. if (reset_cmd == NULL) {
  2076. pmcraid_err("no free cmnd for reset_reload\n");
  2077. goto out_unlock;
  2078. }
  2079. if (shutdown_type == SHUTDOWN_NORMAL)
  2080. pinstance->ioa_bringdown = 1;
  2081. pinstance->ioa_shutdown_type = shutdown_type;
  2082. pinstance->reset_cmd = reset_cmd;
  2083. pinstance->force_ioa_reset = reset;
  2084. pmcraid_info("reset_reload: initiating reset\n");
  2085. pmcraid_ioa_reset(reset_cmd);
  2086. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2087. pmcraid_info("reset_reload: waiting for reset to complete\n");
  2088. wait_event(pinstance->reset_wait_q,
  2089. !pinstance->ioa_reset_in_progress);
  2090. pmcraid_info("reset_reload: reset is complete !!\n");
  2091. scsi_unblock_requests(pinstance->host);
  2092. return pinstance->ioa_state != target_state;
  2093. out_unlock:
  2094. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2095. return reset;
  2096. }
  2097. /**
  2098. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  2099. *
  2100. * @pinstance: pointer to adapter instance structure
  2101. *
  2102. * Return Value
  2103. * whatever is returned from pmcraid_reset_reload
  2104. */
  2105. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  2106. {
  2107. return pmcraid_reset_reload(pinstance,
  2108. SHUTDOWN_NORMAL,
  2109. IOA_STATE_UNKNOWN);
  2110. }
  2111. /**
  2112. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  2113. *
  2114. * @pinstance: pointer to adapter instance structure
  2115. *
  2116. * Return Value
  2117. * whatever is returned from pmcraid_reset_reload
  2118. */
  2119. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  2120. {
  2121. pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
  2122. return pmcraid_reset_reload(pinstance,
  2123. SHUTDOWN_NONE,
  2124. IOA_STATE_OPERATIONAL);
  2125. }
  2126. /**
  2127. * pmcraid_request_sense - Send request sense to a device
  2128. * @cmd: pmcraid command struct
  2129. *
  2130. * This function sends a request sense to a device as a result of a check
  2131. * condition. This method re-uses the same command block that failed earlier.
  2132. */
  2133. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  2134. {
  2135. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2136. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2137. struct device *dev = &cmd->drv_inst->pdev->dev;
  2138. cmd->sense_buffer = cmd->scsi_cmd->sense_buffer;
  2139. cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer,
  2140. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  2141. if (dma_mapping_error(dev, cmd->sense_buffer_dma)) {
  2142. pmcraid_err
  2143. ("couldn't allocate sense buffer for request sense\n");
  2144. pmcraid_erp_done(cmd);
  2145. return;
  2146. }
  2147. /* re-use the command block */
  2148. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  2149. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2150. ioarcb->request_flags0 = (SYNC_COMPLETE |
  2151. NO_LINK_DESCS |
  2152. INHIBIT_UL_CHECK);
  2153. ioarcb->request_type = REQ_TYPE_SCSI;
  2154. ioarcb->cdb[0] = REQUEST_SENSE;
  2155. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  2156. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2157. offsetof(struct pmcraid_ioarcb,
  2158. add_data.u.ioadl[0]));
  2159. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  2160. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2161. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  2162. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2163. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  2164. /* request sense might be called as part of error response processing
  2165. * which runs in tasklets context. It is possible that mid-layer might
  2166. * schedule queuecommand during this time, hence, writting to IOARRIN
  2167. * must be protect by host_lock
  2168. */
  2169. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2170. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2171. pmcraid_timeout_handler);
  2172. }
  2173. /**
  2174. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2175. * @cmd: command that failed
  2176. * @need_sense: true if request_sense is required after cancel all
  2177. *
  2178. * This function sends a cancel all to a device to clear the queue.
  2179. */
  2180. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense)
  2181. {
  2182. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2183. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2184. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2185. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2186. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2187. ioarcb->request_type = REQ_TYPE_IOACMD;
  2188. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2189. if (RES_IS_GSCSI(res->cfg_entry))
  2190. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2191. ioarcb->ioadl_bus_addr = 0;
  2192. ioarcb->ioadl_length = 0;
  2193. ioarcb->data_transfer_length = 0;
  2194. ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
  2195. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2196. * schedule queuecommand while we are doing this
  2197. */
  2198. pmcraid_send_cmd(cmd, need_sense ?
  2199. pmcraid_erp_done : pmcraid_request_sense,
  2200. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2201. pmcraid_timeout_handler);
  2202. }
  2203. /**
  2204. * pmcraid_frame_auto_sense: frame fixed format sense information
  2205. *
  2206. * @cmd: pointer to failing command block
  2207. *
  2208. * Return value
  2209. * none
  2210. */
  2211. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2212. {
  2213. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2214. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2215. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2216. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2217. u32 failing_lba = 0;
  2218. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2219. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2220. if (RES_IS_VSET(res->cfg_entry) &&
  2221. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2222. ioasa->u.vset.failing_lba_hi != 0) {
  2223. sense_buf[0] = 0x72;
  2224. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2225. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2226. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2227. sense_buf[7] = 12;
  2228. sense_buf[8] = 0;
  2229. sense_buf[9] = 0x0A;
  2230. sense_buf[10] = 0x80;
  2231. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2232. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2233. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2234. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2235. sense_buf[15] = failing_lba & 0x000000ff;
  2236. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2237. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2238. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2239. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2240. sense_buf[19] = failing_lba & 0x000000ff;
  2241. } else {
  2242. sense_buf[0] = 0x70;
  2243. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2244. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2245. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2246. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2247. if (RES_IS_VSET(res->cfg_entry))
  2248. failing_lba =
  2249. le32_to_cpu(ioasa->u.
  2250. vset.failing_lba_lo);
  2251. sense_buf[0] |= 0x80;
  2252. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2253. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2254. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2255. sense_buf[6] = failing_lba & 0xff;
  2256. }
  2257. sense_buf[7] = 6; /* additional length */
  2258. }
  2259. }
  2260. /**
  2261. * pmcraid_error_handler - Error response handlers for a SCSI op
  2262. * @cmd: pointer to pmcraid_cmd that has failed
  2263. *
  2264. * This function determines whether or not to initiate ERP on the affected
  2265. * device. This is called from a tasklet, which doesn't hold any locks.
  2266. *
  2267. * Return value:
  2268. * 0 it caller can complete the request, otherwise 1 where in error
  2269. * handler itself completes the request and returns the command block
  2270. * back to free-pool
  2271. */
  2272. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2273. {
  2274. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2275. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2276. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2277. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2278. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2279. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2280. bool sense_copied = false;
  2281. if (!res) {
  2282. pmcraid_info("resource pointer is NULL\n");
  2283. return 0;
  2284. }
  2285. /* If this was a SCSI read/write command keep count of errors */
  2286. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2287. atomic_inc(&res->read_failures);
  2288. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2289. atomic_inc(&res->write_failures);
  2290. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2291. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2292. pmcraid_frame_auto_sense(cmd);
  2293. }
  2294. /* Log IOASC/IOASA information based on user settings */
  2295. pmcraid_ioasc_logger(ioasc, cmd);
  2296. switch (masked_ioasc) {
  2297. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2298. scsi_cmd->result |= (DID_ABORT << 16);
  2299. break;
  2300. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2301. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2302. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2303. break;
  2304. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2305. res->sync_reqd = 1;
  2306. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2307. break;
  2308. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2309. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2310. break;
  2311. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2312. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2313. if (!res->reset_progress)
  2314. scsi_report_bus_reset(pinstance->host,
  2315. scsi_cmd->device->channel);
  2316. scsi_cmd->result |= (DID_ERROR << 16);
  2317. break;
  2318. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2319. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2320. res->sync_reqd = 1;
  2321. /* if check_condition is not active return with error otherwise
  2322. * get/frame the sense buffer
  2323. */
  2324. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2325. SAM_STAT_CHECK_CONDITION &&
  2326. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2327. return 0;
  2328. /* If we have auto sense data as part of IOASA pass it to
  2329. * mid-layer
  2330. */
  2331. if (ioasa->auto_sense_length != 0) {
  2332. short sense_len = le16_to_cpu(ioasa->auto_sense_length);
  2333. int data_size = min_t(u16, sense_len,
  2334. SCSI_SENSE_BUFFERSIZE);
  2335. memcpy(scsi_cmd->sense_buffer,
  2336. ioasa->sense_data,
  2337. data_size);
  2338. sense_copied = true;
  2339. }
  2340. if (RES_IS_GSCSI(res->cfg_entry))
  2341. pmcraid_cancel_all(cmd, sense_copied);
  2342. else if (sense_copied)
  2343. pmcraid_erp_done(cmd);
  2344. else
  2345. pmcraid_request_sense(cmd);
  2346. return 1;
  2347. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2348. break;
  2349. default:
  2350. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2351. scsi_cmd->result |= (DID_ERROR << 16);
  2352. break;
  2353. }
  2354. return 0;
  2355. }
  2356. /**
  2357. * pmcraid_reset_device - device reset handler functions
  2358. *
  2359. * @scsi_dev: scsi device struct
  2360. * @timeout: command timeout
  2361. * @modifier: reset modifier indicating the reset sequence to be performed
  2362. *
  2363. * This function issues a device reset to the affected device.
  2364. * A LUN reset will be sent to the device first. If that does
  2365. * not work, a target reset will be sent.
  2366. *
  2367. * Return value:
  2368. * SUCCESS / FAILED
  2369. */
  2370. static int pmcraid_reset_device(
  2371. struct scsi_device *scsi_dev,
  2372. unsigned long timeout,
  2373. u8 modifier)
  2374. {
  2375. struct pmcraid_cmd *cmd;
  2376. struct pmcraid_instance *pinstance;
  2377. struct pmcraid_resource_entry *res;
  2378. struct pmcraid_ioarcb *ioarcb;
  2379. unsigned long lock_flags;
  2380. u32 ioasc;
  2381. pinstance =
  2382. (struct pmcraid_instance *)scsi_dev->host->hostdata;
  2383. res = scsi_dev->hostdata;
  2384. if (!res) {
  2385. sdev_printk(KERN_ERR, scsi_dev,
  2386. "reset_device: NULL resource pointer\n");
  2387. return FAILED;
  2388. }
  2389. /* If adapter is currently going through reset/reload, return failed.
  2390. * This will force the mid-layer to call _eh_bus/host reset, which
  2391. * will then go to sleep and wait for the reset to complete
  2392. */
  2393. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2394. if (pinstance->ioa_reset_in_progress ||
  2395. pinstance->ioa_state == IOA_STATE_DEAD) {
  2396. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2397. return FAILED;
  2398. }
  2399. res->reset_progress = 1;
  2400. pmcraid_info("Resetting %s resource with addr %x\n",
  2401. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2402. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2403. le32_to_cpu(res->cfg_entry.resource_address));
  2404. /* get a free cmd block */
  2405. cmd = pmcraid_get_free_cmd(pinstance);
  2406. if (cmd == NULL) {
  2407. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2408. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2409. return FAILED;
  2410. }
  2411. ioarcb = &cmd->ioa_cb->ioarcb;
  2412. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2413. ioarcb->request_type = REQ_TYPE_IOACMD;
  2414. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2415. /* Initialize reset modifier bits */
  2416. if (modifier)
  2417. modifier = ENABLE_RESET_MODIFIER | modifier;
  2418. ioarcb->cdb[1] = modifier;
  2419. init_completion(&cmd->wait_for_completion);
  2420. cmd->completion_req = 1;
  2421. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2422. cmd->ioa_cb->ioarcb.cdb[0],
  2423. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2424. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2425. pmcraid_send_cmd(cmd,
  2426. pmcraid_internal_done,
  2427. timeout,
  2428. pmcraid_timeout_handler);
  2429. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2430. /* RESET_DEVICE command completes after all pending IOARCBs are
  2431. * completed. Once this command is completed, pmcraind_internal_done
  2432. * will wake up the 'completion' queue.
  2433. */
  2434. wait_for_completion(&cmd->wait_for_completion);
  2435. /* complete the command here itself and return the command block
  2436. * to free list
  2437. */
  2438. pmcraid_return_cmd(cmd);
  2439. res->reset_progress = 0;
  2440. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2441. /* set the return value based on the returned ioasc */
  2442. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2443. }
  2444. /**
  2445. * _pmcraid_io_done - helper for pmcraid_io_done function
  2446. *
  2447. * @cmd: pointer to pmcraid command struct
  2448. * @reslen: residual data length to be set in the ioasa
  2449. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2450. *
  2451. * This function is invoked by pmcraid_io_done to complete mid-layer
  2452. * scsi ops.
  2453. *
  2454. * Return value:
  2455. * 0 if caller is required to return it to free_pool. Returns 1 if
  2456. * caller need not worry about freeing command block as error handler
  2457. * will take care of that.
  2458. */
  2459. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2460. {
  2461. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2462. int rc = 0;
  2463. scsi_set_resid(scsi_cmd, reslen);
  2464. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2465. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2466. cmd->ioa_cb->ioarcb.cdb[0],
  2467. ioasc, scsi_cmd->result);
  2468. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2469. rc = pmcraid_error_handler(cmd);
  2470. if (rc == 0) {
  2471. scsi_dma_unmap(scsi_cmd);
  2472. scsi_done(scsi_cmd);
  2473. }
  2474. return rc;
  2475. }
  2476. /**
  2477. * pmcraid_io_done - SCSI completion function
  2478. *
  2479. * @cmd: pointer to pmcraid command struct
  2480. *
  2481. * This function is invoked by tasklet/mid-layer error handler to completing
  2482. * the SCSI ops sent from mid-layer.
  2483. *
  2484. * Return value
  2485. * none
  2486. */
  2487. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2488. {
  2489. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2490. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2491. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2492. pmcraid_return_cmd(cmd);
  2493. }
  2494. /**
  2495. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2496. *
  2497. * @cmd: command block of the command to be aborted
  2498. *
  2499. * Return Value:
  2500. * returns pointer to command structure used as cancelling cmd
  2501. */
  2502. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2503. {
  2504. struct pmcraid_cmd *cancel_cmd;
  2505. struct pmcraid_instance *pinstance;
  2506. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2507. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2508. if (cancel_cmd == NULL) {
  2509. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2510. return NULL;
  2511. }
  2512. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2513. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2514. cmd->ioa_cb->ioarcb.cdb[0],
  2515. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2516. init_completion(&cancel_cmd->wait_for_completion);
  2517. cancel_cmd->completion_req = 1;
  2518. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2519. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2520. cancel_cmd->ioa_cb->ioarcb.cdb[0],
  2521. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2522. pmcraid_send_cmd(cancel_cmd,
  2523. pmcraid_internal_done,
  2524. PMCRAID_INTERNAL_TIMEOUT,
  2525. pmcraid_timeout_handler);
  2526. return cancel_cmd;
  2527. }
  2528. /**
  2529. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2530. *
  2531. * @cancel_cmd: command block use as cancelling command
  2532. *
  2533. * Return Value:
  2534. * returns SUCCESS if ABORT TASK has good completion
  2535. * otherwise FAILED
  2536. */
  2537. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2538. {
  2539. struct pmcraid_resource_entry *res;
  2540. u32 ioasc;
  2541. wait_for_completion(&cancel_cmd->wait_for_completion);
  2542. res = cancel_cmd->res;
  2543. cancel_cmd->res = NULL;
  2544. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2545. /* If the abort task is not timed out we will get a Good completion
  2546. * as sense_key, otherwise we may get one the following responses
  2547. * due to subsequent bus reset or device reset. In case IOASC is
  2548. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2549. */
  2550. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2551. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2552. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2553. res->sync_reqd = 1;
  2554. ioasc = 0;
  2555. }
  2556. /* complete the command here itself */
  2557. pmcraid_return_cmd(cancel_cmd);
  2558. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2559. }
  2560. /**
  2561. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2562. *
  2563. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2564. * mid-layer ensures that no other commands are queued. This
  2565. * never gets called under interrupt, but a separate eh thread.
  2566. *
  2567. * Return value:
  2568. * SUCCESS / FAILED
  2569. */
  2570. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2571. {
  2572. struct pmcraid_instance *pinstance;
  2573. struct pmcraid_cmd *cmd;
  2574. struct pmcraid_resource_entry *res;
  2575. unsigned long host_lock_flags;
  2576. unsigned long pending_lock_flags;
  2577. struct pmcraid_cmd *cancel_cmd = NULL;
  2578. int cmd_found = 0;
  2579. int rc = FAILED;
  2580. pinstance =
  2581. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2582. scmd_printk(KERN_INFO, scsi_cmd,
  2583. "I/O command timed out, aborting it.\n");
  2584. res = scsi_cmd->device->hostdata;
  2585. if (res == NULL)
  2586. return rc;
  2587. /* If we are currently going through reset/reload, return failed.
  2588. * This will force the mid-layer to eventually call
  2589. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2590. * reset to complete
  2591. */
  2592. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2593. if (pinstance->ioa_reset_in_progress ||
  2594. pinstance->ioa_state == IOA_STATE_DEAD) {
  2595. spin_unlock_irqrestore(pinstance->host->host_lock,
  2596. host_lock_flags);
  2597. return rc;
  2598. }
  2599. /* loop over pending cmd list to find cmd corresponding to this
  2600. * scsi_cmd. Note that this command might not have been completed
  2601. * already. locking: all pending commands are protected with
  2602. * pending_pool_lock.
  2603. */
  2604. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2605. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2606. if (cmd->scsi_cmd == scsi_cmd) {
  2607. cmd_found = 1;
  2608. break;
  2609. }
  2610. }
  2611. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2612. pending_lock_flags);
  2613. /* If the command to be aborted was given to IOA and still pending with
  2614. * it, send ABORT_TASK to abort this and wait for its completion
  2615. */
  2616. if (cmd_found)
  2617. cancel_cmd = pmcraid_abort_cmd(cmd);
  2618. spin_unlock_irqrestore(pinstance->host->host_lock,
  2619. host_lock_flags);
  2620. if (cancel_cmd) {
  2621. cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
  2622. rc = pmcraid_abort_complete(cancel_cmd);
  2623. }
  2624. return cmd_found ? rc : SUCCESS;
  2625. }
  2626. /**
  2627. * pmcraid_eh_device_reset_handler - bus/target/device reset handler callbacks
  2628. *
  2629. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2630. *
  2631. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2632. * Since these are called from mid-layer EH thread, no other IO will be queued
  2633. * to the resource being reset. However, control path (IOCTL) may be active so
  2634. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2635. * takes care by locking/unlocking host_lock.
  2636. *
  2637. * Return value
  2638. * SUCCESS or FAILED
  2639. */
  2640. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2641. {
  2642. scmd_printk(KERN_INFO, scmd,
  2643. "resetting device due to an I/O command timeout.\n");
  2644. return pmcraid_reset_device(scmd->device,
  2645. PMCRAID_INTERNAL_TIMEOUT,
  2646. RESET_DEVICE_LUN);
  2647. }
  2648. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2649. {
  2650. struct Scsi_Host *host = scmd->device->host;
  2651. struct pmcraid_instance *pinstance =
  2652. (struct pmcraid_instance *)host->hostdata;
  2653. struct pmcraid_resource_entry *res = NULL;
  2654. struct pmcraid_resource_entry *temp;
  2655. struct scsi_device *sdev = NULL;
  2656. unsigned long lock_flags;
  2657. /*
  2658. * The reset device code insists on us passing down
  2659. * a device, so grab the first device on the bus.
  2660. */
  2661. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  2662. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  2663. if (scmd->device->channel == PMCRAID_VSET_BUS_ID &&
  2664. RES_IS_VSET(temp->cfg_entry)) {
  2665. res = temp;
  2666. break;
  2667. } else if (scmd->device->channel == PMCRAID_PHYS_BUS_ID &&
  2668. RES_IS_GSCSI(temp->cfg_entry)) {
  2669. res = temp;
  2670. break;
  2671. }
  2672. }
  2673. if (res)
  2674. sdev = res->scsi_dev;
  2675. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  2676. if (!sdev)
  2677. return FAILED;
  2678. sdev_printk(KERN_INFO, sdev,
  2679. "Doing bus reset due to an I/O command timeout.\n");
  2680. return pmcraid_reset_device(sdev,
  2681. PMCRAID_RESET_BUS_TIMEOUT,
  2682. RESET_DEVICE_BUS);
  2683. }
  2684. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2685. {
  2686. struct Scsi_Host *shost = scmd->device->host;
  2687. struct scsi_device *scsi_dev = NULL, *tmp;
  2688. int ret;
  2689. shost_for_each_device(tmp, shost) {
  2690. if ((tmp->channel == scmd->device->channel) &&
  2691. (tmp->id == scmd->device->id)) {
  2692. scsi_dev = tmp;
  2693. break;
  2694. }
  2695. }
  2696. if (!scsi_dev)
  2697. return FAILED;
  2698. sdev_printk(KERN_INFO, scsi_dev,
  2699. "Doing target reset due to an I/O command timeout.\n");
  2700. ret = pmcraid_reset_device(scsi_dev,
  2701. PMCRAID_INTERNAL_TIMEOUT,
  2702. RESET_DEVICE_TARGET);
  2703. scsi_device_put(scsi_dev);
  2704. return ret;
  2705. }
  2706. /**
  2707. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2708. *
  2709. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2710. *
  2711. * Initiates adapter reset to bring it up to operational state
  2712. *
  2713. * Return value
  2714. * SUCCESS or FAILED
  2715. */
  2716. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2717. {
  2718. unsigned long interval = 10000; /* 10 seconds interval */
  2719. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2720. struct pmcraid_instance *pinstance =
  2721. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2722. /* wait for an additional 150 seconds just in case firmware could come
  2723. * up and if it could complete all the pending commands excluding the
  2724. * two HCAM (CCN and LDN).
  2725. */
  2726. while (waits--) {
  2727. if (atomic_read(&pinstance->outstanding_cmds) <=
  2728. PMCRAID_MAX_HCAM_CMD)
  2729. return SUCCESS;
  2730. msleep(interval);
  2731. }
  2732. dev_err(&pinstance->pdev->dev,
  2733. "Adapter being reset due to an I/O command timeout.\n");
  2734. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2735. }
  2736. /**
  2737. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2738. * @cmd: pmcraid command struct
  2739. * @sgcount: count of scatter-gather elements
  2740. *
  2741. * Return value
  2742. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2743. * or external IOADLs
  2744. */
  2745. static struct pmcraid_ioadl_desc *
  2746. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2747. {
  2748. struct pmcraid_ioadl_desc *ioadl;
  2749. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2750. int ioadl_count = 0;
  2751. if (ioarcb->add_cmd_param_length)
  2752. ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
  2753. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
  2754. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2755. /* external ioadls start at offset 0x80 from control_block
  2756. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2757. * It is necessary to indicate to firmware that driver is
  2758. * using ioadls to be treated as external to IOARCB.
  2759. */
  2760. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  2761. ioarcb->ioadl_bus_addr =
  2762. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2763. offsetof(struct pmcraid_ioarcb,
  2764. add_data.u.ioadl[3]));
  2765. ioadl = &ioarcb->add_data.u.ioadl[3];
  2766. } else {
  2767. ioarcb->ioadl_bus_addr =
  2768. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2769. offsetof(struct pmcraid_ioarcb,
  2770. add_data.u.ioadl[ioadl_count]));
  2771. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2772. ioarcb->ioarcb_bus_addr |=
  2773. cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
  2774. }
  2775. return ioadl;
  2776. }
  2777. /**
  2778. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2779. * @pinstance: pointer to adapter instance structure
  2780. * @cmd: pmcraid command struct
  2781. *
  2782. * This function is invoked by queuecommand entry point while sending a command
  2783. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2784. *
  2785. * Return value:
  2786. * 0 on success or -1 on failure
  2787. */
  2788. static int pmcraid_build_ioadl(
  2789. struct pmcraid_instance *pinstance,
  2790. struct pmcraid_cmd *cmd
  2791. )
  2792. {
  2793. int i, nseg;
  2794. struct scatterlist *sglist;
  2795. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2796. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2797. struct pmcraid_ioadl_desc *ioadl;
  2798. u32 length = scsi_bufflen(scsi_cmd);
  2799. if (!length)
  2800. return 0;
  2801. nseg = scsi_dma_map(scsi_cmd);
  2802. if (nseg < 0) {
  2803. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2804. return -1;
  2805. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2806. scsi_dma_unmap(scsi_cmd);
  2807. scmd_printk(KERN_ERR, scsi_cmd,
  2808. "sg count is (%d) more than allowed!\n", nseg);
  2809. return -1;
  2810. }
  2811. /* Initialize IOARCB data transfer length fields */
  2812. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2813. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2814. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2815. ioarcb->data_transfer_length = cpu_to_le32(length);
  2816. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2817. /* Initialize IOADL descriptor addresses */
  2818. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2819. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2820. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2821. ioadl[i].flags = 0;
  2822. }
  2823. /* setup last descriptor */
  2824. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2825. return 0;
  2826. }
  2827. /**
  2828. * pmcraid_queuecommand_lck - Queue a mid-layer request
  2829. * @scsi_cmd: scsi command struct
  2830. *
  2831. * This function queues a request generated by the mid-layer. Midlayer calls
  2832. * this routine within host->lock. Some of the functions called by queuecommand
  2833. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  2834. *
  2835. * Return value:
  2836. * 0 on success
  2837. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  2838. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  2839. */
  2840. static enum scsi_qc_status pmcraid_queuecommand_lck(struct scsi_cmnd *scsi_cmd)
  2841. {
  2842. struct pmcraid_instance *pinstance;
  2843. struct pmcraid_resource_entry *res;
  2844. struct pmcraid_ioarcb *ioarcb;
  2845. enum scsi_qc_status rc = 0;
  2846. struct pmcraid_cmd *cmd;
  2847. u32 fw_version;
  2848. pinstance =
  2849. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2850. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  2851. res = scsi_cmd->device->hostdata;
  2852. scsi_cmd->result = (DID_OK << 16);
  2853. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  2854. * the command
  2855. */
  2856. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2857. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  2858. scsi_cmd->result = (DID_NO_CONNECT << 16);
  2859. scsi_done(scsi_cmd);
  2860. return 0;
  2861. }
  2862. /* If IOA reset is in progress, can't queue the commands */
  2863. if (pinstance->ioa_reset_in_progress)
  2864. return SCSI_MLQUEUE_HOST_BUSY;
  2865. /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
  2866. * the command here itself with success return
  2867. */
  2868. if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
  2869. pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
  2870. scsi_done(scsi_cmd);
  2871. return 0;
  2872. }
  2873. /* initialize the command and IOARCB to be sent to IOA */
  2874. cmd = pmcraid_get_free_cmd(pinstance);
  2875. if (cmd == NULL) {
  2876. pmcraid_err("free command block is not available\n");
  2877. return SCSI_MLQUEUE_HOST_BUSY;
  2878. }
  2879. cmd->scsi_cmd = scsi_cmd;
  2880. ioarcb = &(cmd->ioa_cb->ioarcb);
  2881. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  2882. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2883. ioarcb->request_type = REQ_TYPE_SCSI;
  2884. /* set hrrq number where the IOA should respond to. Note that all cmds
  2885. * generated internally uses hrrq_id 0, exception to this is the cmd
  2886. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  2887. * hrrq_id assigned here in queuecommand
  2888. */
  2889. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  2890. pinstance->num_hrrq;
  2891. cmd->cmd_done = pmcraid_io_done;
  2892. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  2893. if (scsi_cmd->underflow == 0)
  2894. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  2895. if (res->sync_reqd) {
  2896. ioarcb->request_flags0 |= SYNC_COMPLETE;
  2897. res->sync_reqd = 0;
  2898. }
  2899. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2900. if (scsi_cmd->flags & SCMD_TAGGED)
  2901. ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
  2902. if (RES_IS_GSCSI(res->cfg_entry))
  2903. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  2904. }
  2905. rc = pmcraid_build_ioadl(pinstance, cmd);
  2906. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  2907. le32_to_cpu(ioarcb->response_handle) >> 2,
  2908. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  2909. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  2910. PMCRAID_PHYS_BUS_ID,
  2911. RES_IS_VSET(res->cfg_entry) ?
  2912. (fw_version <= PMCRAID_FW_VERSION_1 ?
  2913. res->cfg_entry.unique_flags1 :
  2914. le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
  2915. RES_TARGET(res->cfg_entry.resource_address),
  2916. RES_LUN(res->cfg_entry.resource_address));
  2917. if (likely(rc == 0)) {
  2918. _pmcraid_fire_command(cmd);
  2919. } else {
  2920. pmcraid_err("queuecommand could not build ioadl\n");
  2921. pmcraid_return_cmd(cmd);
  2922. rc = SCSI_MLQUEUE_HOST_BUSY;
  2923. }
  2924. return rc;
  2925. }
  2926. static DEF_SCSI_QCMD(pmcraid_queuecommand)
  2927. /*
  2928. * pmcraid_open -char node "open" entry, allowed only users with admin access
  2929. */
  2930. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  2931. {
  2932. struct pmcraid_instance *pinstance;
  2933. if (!capable(CAP_SYS_ADMIN))
  2934. return -EACCES;
  2935. /* Populate adapter instance * pointer for use by ioctl */
  2936. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  2937. filep->private_data = pinstance;
  2938. return 0;
  2939. }
  2940. /*
  2941. * pmcraid_fasync - Async notifier registration from applications
  2942. *
  2943. * This function adds the calling process to a driver global queue. When an
  2944. * event occurs, SIGIO will be sent to all processes in this queue.
  2945. */
  2946. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  2947. {
  2948. struct pmcraid_instance *pinstance;
  2949. int rc;
  2950. pinstance = filep->private_data;
  2951. mutex_lock(&pinstance->aen_queue_lock);
  2952. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  2953. mutex_unlock(&pinstance->aen_queue_lock);
  2954. return rc;
  2955. }
  2956. /**
  2957. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  2958. *
  2959. * @pinstance: pointer to adapter instance structure
  2960. * @cmd: ioctl command passed in
  2961. * @buflen: length of user_buffer
  2962. * @user_buffer: user buffer pointer
  2963. *
  2964. * Return Value
  2965. * 0 in case of success, otherwise appropriate error code
  2966. */
  2967. static long pmcraid_ioctl_driver(
  2968. struct pmcraid_instance *pinstance,
  2969. unsigned int cmd,
  2970. unsigned int buflen,
  2971. void __user *user_buffer
  2972. )
  2973. {
  2974. int rc = -ENOSYS;
  2975. switch (cmd) {
  2976. case PMCRAID_IOCTL_RESET_ADAPTER:
  2977. pmcraid_reset_bringup(pinstance);
  2978. rc = 0;
  2979. break;
  2980. default:
  2981. break;
  2982. }
  2983. return rc;
  2984. }
  2985. /**
  2986. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  2987. *
  2988. * @cmd: ioctl command
  2989. * @arg: user buffer
  2990. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  2991. *
  2992. * Return Value
  2993. * negetive error code if there are access issues, otherwise zero.
  2994. * Upon success, returns ioctl header copied out of user buffer.
  2995. */
  2996. static int pmcraid_check_ioctl_buffer(
  2997. int cmd,
  2998. void __user *arg,
  2999. struct pmcraid_ioctl_header *hdr
  3000. )
  3001. {
  3002. int rc;
  3003. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3004. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3005. return -EFAULT;
  3006. }
  3007. /* check for valid driver signature */
  3008. rc = memcmp(hdr->signature,
  3009. PMCRAID_IOCTL_SIGNATURE,
  3010. sizeof(hdr->signature));
  3011. if (rc) {
  3012. pmcraid_err("signature verification failed\n");
  3013. return -EINVAL;
  3014. }
  3015. return 0;
  3016. }
  3017. /*
  3018. * pmcraid_ioctl - char node ioctl entry point
  3019. */
  3020. static long pmcraid_chr_ioctl(
  3021. struct file *filep,
  3022. unsigned int cmd,
  3023. unsigned long arg
  3024. )
  3025. {
  3026. struct pmcraid_instance *pinstance = NULL;
  3027. struct pmcraid_ioctl_header *hdr = NULL;
  3028. void __user *argp = (void __user *)arg;
  3029. int retval = -ENOTTY;
  3030. hdr = kmalloc_obj(struct pmcraid_ioctl_header);
  3031. if (!hdr) {
  3032. pmcraid_err("failed to allocate memory for ioctl header\n");
  3033. return -ENOMEM;
  3034. }
  3035. retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
  3036. if (retval) {
  3037. pmcraid_info("chr_ioctl: header check failed\n");
  3038. kfree(hdr);
  3039. return retval;
  3040. }
  3041. pinstance = filep->private_data;
  3042. if (!pinstance) {
  3043. pmcraid_info("adapter instance is not found\n");
  3044. kfree(hdr);
  3045. return -ENOTTY;
  3046. }
  3047. switch (_IOC_TYPE(cmd)) {
  3048. case PMCRAID_DRIVER_IOCTL:
  3049. arg += sizeof(struct pmcraid_ioctl_header);
  3050. retval = pmcraid_ioctl_driver(pinstance, cmd,
  3051. hdr->buffer_length, argp);
  3052. break;
  3053. default:
  3054. retval = -ENOTTY;
  3055. break;
  3056. }
  3057. kfree(hdr);
  3058. return retval;
  3059. }
  3060. /*
  3061. * File operations structure for management interface
  3062. */
  3063. static const struct file_operations pmcraid_fops = {
  3064. .owner = THIS_MODULE,
  3065. .open = pmcraid_chr_open,
  3066. .fasync = pmcraid_chr_fasync,
  3067. .unlocked_ioctl = pmcraid_chr_ioctl,
  3068. .compat_ioctl = compat_ptr_ioctl,
  3069. .llseek = noop_llseek,
  3070. };
  3071. /**
  3072. * pmcraid_show_log_level - Display adapter's error logging level
  3073. * @dev: class device struct
  3074. * @attr: unused
  3075. * @buf: buffer
  3076. *
  3077. * Return value:
  3078. * number of bytes printed to buffer
  3079. */
  3080. static ssize_t pmcraid_show_log_level(
  3081. struct device *dev,
  3082. struct device_attribute *attr,
  3083. char *buf)
  3084. {
  3085. struct Scsi_Host *shost = class_to_shost(dev);
  3086. struct pmcraid_instance *pinstance =
  3087. (struct pmcraid_instance *)shost->hostdata;
  3088. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3089. }
  3090. /**
  3091. * pmcraid_store_log_level - Change the adapter's error logging level
  3092. * @dev: class device struct
  3093. * @attr: unused
  3094. * @buf: buffer
  3095. * @count: not used
  3096. *
  3097. * Return value:
  3098. * number of bytes printed to buffer
  3099. */
  3100. static ssize_t pmcraid_store_log_level(
  3101. struct device *dev,
  3102. struct device_attribute *attr,
  3103. const char *buf,
  3104. size_t count
  3105. )
  3106. {
  3107. struct Scsi_Host *shost;
  3108. struct pmcraid_instance *pinstance;
  3109. u8 val;
  3110. if (kstrtou8(buf, 10, &val))
  3111. return -EINVAL;
  3112. /* log-level should be from 0 to 2 */
  3113. if (val > 2)
  3114. return -EINVAL;
  3115. shost = class_to_shost(dev);
  3116. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3117. pinstance->current_log_level = val;
  3118. return strlen(buf);
  3119. }
  3120. static struct device_attribute pmcraid_log_level_attr = {
  3121. .attr = {
  3122. .name = "log_level",
  3123. .mode = S_IRUGO | S_IWUSR,
  3124. },
  3125. .show = pmcraid_show_log_level,
  3126. .store = pmcraid_store_log_level,
  3127. };
  3128. /**
  3129. * pmcraid_show_drv_version - Display driver version
  3130. * @dev: class device struct
  3131. * @attr: unused
  3132. * @buf: buffer
  3133. *
  3134. * Return value:
  3135. * number of bytes printed to buffer
  3136. */
  3137. static ssize_t pmcraid_show_drv_version(
  3138. struct device *dev,
  3139. struct device_attribute *attr,
  3140. char *buf
  3141. )
  3142. {
  3143. return snprintf(buf, PAGE_SIZE, "version: %s\n",
  3144. PMCRAID_DRIVER_VERSION);
  3145. }
  3146. static struct device_attribute pmcraid_driver_version_attr = {
  3147. .attr = {
  3148. .name = "drv_version",
  3149. .mode = S_IRUGO,
  3150. },
  3151. .show = pmcraid_show_drv_version,
  3152. };
  3153. /**
  3154. * pmcraid_show_adapter_id - Display driver assigned adapter id
  3155. * @dev: class device struct
  3156. * @attr: unused
  3157. * @buf: buffer
  3158. *
  3159. * Return value:
  3160. * number of bytes printed to buffer
  3161. */
  3162. static ssize_t pmcraid_show_adapter_id(
  3163. struct device *dev,
  3164. struct device_attribute *attr,
  3165. char *buf
  3166. )
  3167. {
  3168. struct Scsi_Host *shost = class_to_shost(dev);
  3169. struct pmcraid_instance *pinstance =
  3170. (struct pmcraid_instance *)shost->hostdata;
  3171. u32 adapter_id = pci_dev_id(pinstance->pdev);
  3172. u32 aen_group = pmcraid_event_family.id;
  3173. return snprintf(buf, PAGE_SIZE,
  3174. "adapter id: %d\nminor: %d\naen group: %d\n",
  3175. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3176. }
  3177. static struct device_attribute pmcraid_adapter_id_attr = {
  3178. .attr = {
  3179. .name = "adapter_id",
  3180. .mode = S_IRUGO,
  3181. },
  3182. .show = pmcraid_show_adapter_id,
  3183. };
  3184. static struct attribute *pmcraid_host_attrs[] = {
  3185. &pmcraid_log_level_attr.attr,
  3186. &pmcraid_driver_version_attr.attr,
  3187. &pmcraid_adapter_id_attr.attr,
  3188. NULL,
  3189. };
  3190. ATTRIBUTE_GROUPS(pmcraid_host);
  3191. /* host template structure for pmcraid driver */
  3192. static const struct scsi_host_template pmcraid_host_template = {
  3193. .module = THIS_MODULE,
  3194. .name = PMCRAID_DRIVER_NAME,
  3195. .queuecommand = pmcraid_queuecommand,
  3196. .eh_abort_handler = pmcraid_eh_abort_handler,
  3197. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3198. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3199. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3200. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3201. .sdev_init = pmcraid_sdev_init,
  3202. .sdev_configure = pmcraid_sdev_configure,
  3203. .sdev_destroy = pmcraid_sdev_destroy,
  3204. .change_queue_depth = pmcraid_change_queue_depth,
  3205. .can_queue = PMCRAID_MAX_IO_CMD,
  3206. .this_id = -1,
  3207. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3208. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3209. .no_write_same = 1,
  3210. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3211. .shost_groups = pmcraid_host_groups,
  3212. .proc_name = PMCRAID_DRIVER_NAME,
  3213. };
  3214. /*
  3215. * pmcraid_isr_msix - implements MSI-X interrupt handling routine
  3216. * @irq: interrupt vector number
  3217. * @dev_id: pointer hrrq_vector
  3218. *
  3219. * Return Value
  3220. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3221. */
  3222. static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
  3223. {
  3224. struct pmcraid_isr_param *hrrq_vector;
  3225. struct pmcraid_instance *pinstance;
  3226. unsigned long lock_flags;
  3227. u32 intrs_val;
  3228. int hrrq_id;
  3229. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3230. hrrq_id = hrrq_vector->hrrq_id;
  3231. pinstance = hrrq_vector->drv_inst;
  3232. if (!hrrq_id) {
  3233. /* Read the interrupt */
  3234. intrs_val = pmcraid_read_interrupts(pinstance);
  3235. if (intrs_val &&
  3236. ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
  3237. & DOORBELL_INTR_MSIX_CLR) == 0)) {
  3238. /* Any error interrupts including unit_check,
  3239. * initiate IOA reset.In case of unit check indicate
  3240. * to reset_sequence that IOA unit checked and prepare
  3241. * for a dump during reset sequence
  3242. */
  3243. if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
  3244. if (intrs_val & INTRS_IOA_UNIT_CHECK)
  3245. pinstance->ioa_unit_check = 1;
  3246. pmcraid_err("ISR: error interrupts: %x \
  3247. initiating reset\n", intrs_val);
  3248. spin_lock_irqsave(pinstance->host->host_lock,
  3249. lock_flags);
  3250. pmcraid_initiate_reset(pinstance);
  3251. spin_unlock_irqrestore(
  3252. pinstance->host->host_lock,
  3253. lock_flags);
  3254. }
  3255. /* If interrupt was as part of the ioa initialization,
  3256. * clear it. Delete the timer and wakeup the
  3257. * reset engine to proceed with reset sequence
  3258. */
  3259. if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
  3260. pmcraid_clr_trans_op(pinstance);
  3261. /* Clear the interrupt register by writing
  3262. * to host to ioa doorbell. Once done
  3263. * FW will clear the interrupt.
  3264. */
  3265. iowrite32(DOORBELL_INTR_MSIX_CLR,
  3266. pinstance->int_regs.host_ioa_interrupt_reg);
  3267. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3268. }
  3269. }
  3270. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3271. return IRQ_HANDLED;
  3272. }
  3273. /**
  3274. * pmcraid_isr - implements legacy interrupt handling routine
  3275. *
  3276. * @irq: interrupt vector number
  3277. * @dev_id: pointer hrrq_vector
  3278. *
  3279. * Return Value
  3280. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3281. */
  3282. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3283. {
  3284. struct pmcraid_isr_param *hrrq_vector;
  3285. struct pmcraid_instance *pinstance;
  3286. u32 intrs;
  3287. unsigned long lock_flags;
  3288. int hrrq_id = 0;
  3289. /* In case of legacy interrupt mode where interrupts are shared across
  3290. * isrs, it may be possible that the current interrupt is not from IOA
  3291. */
  3292. if (!dev_id) {
  3293. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3294. return IRQ_NONE;
  3295. }
  3296. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3297. pinstance = hrrq_vector->drv_inst;
  3298. intrs = pmcraid_read_interrupts(pinstance);
  3299. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
  3300. return IRQ_NONE;
  3301. /* Any error interrupts including unit_check, initiate IOA reset.
  3302. * In case of unit check indicate to reset_sequence that IOA unit
  3303. * checked and prepare for a dump during reset sequence
  3304. */
  3305. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3306. if (intrs & INTRS_IOA_UNIT_CHECK)
  3307. pinstance->ioa_unit_check = 1;
  3308. iowrite32(intrs,
  3309. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3310. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3311. intrs);
  3312. intrs = ioread32(
  3313. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3314. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3315. pmcraid_initiate_reset(pinstance);
  3316. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3317. } else {
  3318. /* If interrupt was as part of the ioa initialization,
  3319. * clear. Delete the timer and wakeup the
  3320. * reset engine to proceed with reset sequence
  3321. */
  3322. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3323. pmcraid_clr_trans_op(pinstance);
  3324. } else {
  3325. iowrite32(intrs,
  3326. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3327. ioread32(
  3328. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3329. tasklet_schedule(
  3330. &(pinstance->isr_tasklet[hrrq_id]));
  3331. }
  3332. }
  3333. return IRQ_HANDLED;
  3334. }
  3335. /**
  3336. * pmcraid_worker_function - worker thread function
  3337. *
  3338. * @workp: pointer to struct work queue
  3339. *
  3340. * Return Value
  3341. * None
  3342. */
  3343. static void pmcraid_worker_function(struct work_struct *workp)
  3344. {
  3345. struct pmcraid_instance *pinstance;
  3346. struct pmcraid_resource_entry *res;
  3347. struct pmcraid_resource_entry *temp;
  3348. struct scsi_device *sdev;
  3349. unsigned long lock_flags;
  3350. unsigned long host_lock_flags;
  3351. u16 fw_version;
  3352. u8 bus, target, lun;
  3353. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3354. /* add resources only after host is added into system */
  3355. if (!atomic_read(&pinstance->expose_resources))
  3356. return;
  3357. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  3358. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3359. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3360. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3361. sdev = res->scsi_dev;
  3362. /* host_lock must be held before calling
  3363. * scsi_device_get
  3364. */
  3365. spin_lock_irqsave(pinstance->host->host_lock,
  3366. host_lock_flags);
  3367. if (!scsi_device_get(sdev)) {
  3368. spin_unlock_irqrestore(
  3369. pinstance->host->host_lock,
  3370. host_lock_flags);
  3371. pmcraid_info("deleting %x from midlayer\n",
  3372. res->cfg_entry.resource_address);
  3373. list_move_tail(&res->queue,
  3374. &pinstance->free_res_q);
  3375. spin_unlock_irqrestore(
  3376. &pinstance->resource_lock,
  3377. lock_flags);
  3378. scsi_remove_device(sdev);
  3379. scsi_device_put(sdev);
  3380. spin_lock_irqsave(&pinstance->resource_lock,
  3381. lock_flags);
  3382. res->change_detected = 0;
  3383. } else {
  3384. spin_unlock_irqrestore(
  3385. pinstance->host->host_lock,
  3386. host_lock_flags);
  3387. }
  3388. }
  3389. }
  3390. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3391. if (res->change_detected == RES_CHANGE_ADD) {
  3392. if (!pmcraid_expose_resource(fw_version,
  3393. &res->cfg_entry))
  3394. continue;
  3395. if (RES_IS_VSET(res->cfg_entry)) {
  3396. bus = PMCRAID_VSET_BUS_ID;
  3397. if (fw_version <= PMCRAID_FW_VERSION_1)
  3398. target = res->cfg_entry.unique_flags1;
  3399. else
  3400. target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
  3401. lun = PMCRAID_VSET_LUN_ID;
  3402. } else {
  3403. bus = PMCRAID_PHYS_BUS_ID;
  3404. target =
  3405. RES_TARGET(
  3406. res->cfg_entry.resource_address);
  3407. lun = RES_LUN(res->cfg_entry.resource_address);
  3408. }
  3409. res->change_detected = 0;
  3410. spin_unlock_irqrestore(&pinstance->resource_lock,
  3411. lock_flags);
  3412. scsi_add_device(pinstance->host, bus, target, lun);
  3413. spin_lock_irqsave(&pinstance->resource_lock,
  3414. lock_flags);
  3415. }
  3416. }
  3417. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3418. }
  3419. /**
  3420. * pmcraid_tasklet_function - Tasklet function
  3421. *
  3422. * @instance: pointer to msix param structure
  3423. *
  3424. * Return Value
  3425. * None
  3426. */
  3427. static void pmcraid_tasklet_function(unsigned long instance)
  3428. {
  3429. struct pmcraid_isr_param *hrrq_vector;
  3430. struct pmcraid_instance *pinstance;
  3431. unsigned long hrrq_lock_flags;
  3432. unsigned long pending_lock_flags;
  3433. unsigned long host_lock_flags;
  3434. spinlock_t *lockp; /* hrrq buffer lock */
  3435. int id;
  3436. u32 resp;
  3437. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3438. pinstance = hrrq_vector->drv_inst;
  3439. id = hrrq_vector->hrrq_id;
  3440. lockp = &(pinstance->hrrq_lock[id]);
  3441. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3442. * protected by its own lock. Traversals must be done within this lock
  3443. * as there may be multiple tasklets running on multiple CPUs. Note
  3444. * that the lock is held just for picking up the response handle and
  3445. * manipulating hrrq_curr/toggle_bit values.
  3446. */
  3447. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3448. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3449. while ((resp & HRRQ_TOGGLE_BIT) ==
  3450. pinstance->host_toggle_bit[id]) {
  3451. int cmd_index = resp >> 2;
  3452. struct pmcraid_cmd *cmd = NULL;
  3453. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3454. pinstance->hrrq_curr[id]++;
  3455. } else {
  3456. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3457. pinstance->host_toggle_bit[id] ^= 1u;
  3458. }
  3459. if (cmd_index >= PMCRAID_MAX_CMD) {
  3460. /* In case of invalid response handle, log message */
  3461. pmcraid_err("Invalid response handle %d\n", cmd_index);
  3462. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3463. continue;
  3464. }
  3465. cmd = pinstance->cmd_list[cmd_index];
  3466. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3467. spin_lock_irqsave(&pinstance->pending_pool_lock,
  3468. pending_lock_flags);
  3469. list_del(&cmd->free_list);
  3470. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  3471. pending_lock_flags);
  3472. timer_delete(&cmd->timer);
  3473. atomic_dec(&pinstance->outstanding_cmds);
  3474. if (cmd->cmd_done == pmcraid_ioa_reset) {
  3475. spin_lock_irqsave(pinstance->host->host_lock,
  3476. host_lock_flags);
  3477. cmd->cmd_done(cmd);
  3478. spin_unlock_irqrestore(pinstance->host->host_lock,
  3479. host_lock_flags);
  3480. } else if (cmd->cmd_done != NULL) {
  3481. cmd->cmd_done(cmd);
  3482. }
  3483. /* loop over until we are done with all responses */
  3484. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3485. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3486. }
  3487. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3488. }
  3489. /**
  3490. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  3491. * @pinstance: pointer to adapter instance structure
  3492. *
  3493. * This routine un-registers registered interrupt handler and
  3494. * also frees irqs/vectors.
  3495. *
  3496. * Return Value
  3497. * None
  3498. */
  3499. static
  3500. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  3501. {
  3502. struct pci_dev *pdev = pinstance->pdev;
  3503. int i;
  3504. for (i = 0; i < pinstance->num_hrrq; i++)
  3505. free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
  3506. pinstance->interrupt_mode = 0;
  3507. pci_free_irq_vectors(pdev);
  3508. }
  3509. /**
  3510. * pmcraid_register_interrupt_handler - registers interrupt handler
  3511. * @pinstance: pointer to per-adapter instance structure
  3512. *
  3513. * Return Value
  3514. * 0 on success, non-zero error code otherwise.
  3515. */
  3516. static int
  3517. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  3518. {
  3519. struct pci_dev *pdev = pinstance->pdev;
  3520. unsigned int irq_flag = PCI_IRQ_INTX, flag;
  3521. int num_hrrq, rc, i;
  3522. irq_handler_t isr;
  3523. if (pmcraid_enable_msix)
  3524. irq_flag |= PCI_IRQ_MSIX;
  3525. num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
  3526. irq_flag);
  3527. if (num_hrrq < 0)
  3528. return num_hrrq;
  3529. if (pdev->msix_enabled) {
  3530. flag = 0;
  3531. isr = pmcraid_isr_msix;
  3532. } else {
  3533. flag = IRQF_SHARED;
  3534. isr = pmcraid_isr;
  3535. }
  3536. for (i = 0; i < num_hrrq; i++) {
  3537. struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
  3538. vec->hrrq_id = i;
  3539. vec->drv_inst = pinstance;
  3540. rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
  3541. PMCRAID_DRIVER_NAME, vec);
  3542. if (rc)
  3543. goto out_unwind;
  3544. }
  3545. pinstance->num_hrrq = num_hrrq;
  3546. if (pdev->msix_enabled) {
  3547. pinstance->interrupt_mode = 1;
  3548. iowrite32(DOORBELL_INTR_MODE_MSIX,
  3549. pinstance->int_regs.host_ioa_interrupt_reg);
  3550. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3551. }
  3552. return 0;
  3553. out_unwind:
  3554. while (--i >= 0)
  3555. free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
  3556. pci_free_irq_vectors(pdev);
  3557. return rc;
  3558. }
  3559. /**
  3560. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  3561. * @pinstance: per adapter instance structure pointer
  3562. * @max_index: number of buffer blocks to release
  3563. *
  3564. * Return Value
  3565. * None
  3566. */
  3567. static void
  3568. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  3569. {
  3570. int i;
  3571. for (i = 0; i < max_index; i++) {
  3572. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  3573. pinstance->cmd_list[i] = NULL;
  3574. }
  3575. kmem_cache_destroy(pinstance->cmd_cachep);
  3576. pinstance->cmd_cachep = NULL;
  3577. }
  3578. /**
  3579. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  3580. * @pinstance: pointer to per adapter instance structure
  3581. * @max_index: number of buffers (from 0 onwards) to release
  3582. *
  3583. * This function assumes that the command blocks for which control blocks are
  3584. * linked are not released.
  3585. *
  3586. * Return Value
  3587. * None
  3588. */
  3589. static void
  3590. pmcraid_release_control_blocks(
  3591. struct pmcraid_instance *pinstance,
  3592. int max_index
  3593. )
  3594. {
  3595. int i;
  3596. if (pinstance->control_pool == NULL)
  3597. return;
  3598. for (i = 0; i < max_index; i++) {
  3599. dma_pool_free(pinstance->control_pool,
  3600. pinstance->cmd_list[i]->ioa_cb,
  3601. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  3602. pinstance->cmd_list[i]->ioa_cb = NULL;
  3603. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  3604. }
  3605. dma_pool_destroy(pinstance->control_pool);
  3606. pinstance->control_pool = NULL;
  3607. }
  3608. /**
  3609. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  3610. * @pinstance: pointer to per adapter instance structure
  3611. *
  3612. * Allocates memory for command blocks using kernel slab allocator.
  3613. *
  3614. * Return Value
  3615. * 0 in case of success; -ENOMEM in case of failure
  3616. */
  3617. static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  3618. {
  3619. int i;
  3620. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  3621. pinstance->host->unique_id);
  3622. pinstance->cmd_cachep = kmem_cache_create(
  3623. pinstance->cmd_pool_name,
  3624. sizeof(struct pmcraid_cmd), 0,
  3625. SLAB_HWCACHE_ALIGN, NULL);
  3626. if (!pinstance->cmd_cachep)
  3627. return -ENOMEM;
  3628. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3629. pinstance->cmd_list[i] =
  3630. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  3631. if (!pinstance->cmd_list[i]) {
  3632. pmcraid_release_cmd_blocks(pinstance, i);
  3633. return -ENOMEM;
  3634. }
  3635. }
  3636. return 0;
  3637. }
  3638. /**
  3639. * pmcraid_allocate_control_blocks - allocates memory control blocks
  3640. * @pinstance : pointer to per adapter instance structure
  3641. *
  3642. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  3643. * and IOASAs. This is called after command blocks are already allocated.
  3644. *
  3645. * Return Value
  3646. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  3647. */
  3648. static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  3649. {
  3650. int i;
  3651. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  3652. pinstance->host->unique_id);
  3653. pinstance->control_pool =
  3654. dma_pool_create(pinstance->ctl_pool_name,
  3655. &pinstance->pdev->dev,
  3656. sizeof(struct pmcraid_control_block),
  3657. PMCRAID_IOARCB_ALIGNMENT, 0);
  3658. if (!pinstance->control_pool)
  3659. return -ENOMEM;
  3660. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3661. pinstance->cmd_list[i]->ioa_cb =
  3662. dma_pool_zalloc(
  3663. pinstance->control_pool,
  3664. GFP_KERNEL,
  3665. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  3666. if (!pinstance->cmd_list[i]->ioa_cb) {
  3667. pmcraid_release_control_blocks(pinstance, i);
  3668. return -ENOMEM;
  3669. }
  3670. }
  3671. return 0;
  3672. }
  3673. /**
  3674. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  3675. * @pinstance: pointer to per adapter instance structure
  3676. * @maxindex: size of hrrq buffer pointer array
  3677. *
  3678. * Return Value
  3679. * None
  3680. */
  3681. static void
  3682. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  3683. {
  3684. int i;
  3685. for (i = 0; i < maxindex; i++) {
  3686. dma_free_coherent(&pinstance->pdev->dev,
  3687. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  3688. pinstance->hrrq_start[i],
  3689. pinstance->hrrq_start_bus_addr[i]);
  3690. /* reset pointers and toggle bit to zeros */
  3691. pinstance->hrrq_start[i] = NULL;
  3692. pinstance->hrrq_start_bus_addr[i] = 0;
  3693. pinstance->host_toggle_bit[i] = 0;
  3694. }
  3695. }
  3696. /**
  3697. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  3698. * @pinstance: pointer to per adapter instance structure
  3699. *
  3700. * Return value
  3701. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  3702. */
  3703. static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  3704. {
  3705. int i, buffer_size;
  3706. buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  3707. for (i = 0; i < pinstance->num_hrrq; i++) {
  3708. pinstance->hrrq_start[i] =
  3709. dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,
  3710. &pinstance->hrrq_start_bus_addr[i],
  3711. GFP_KERNEL);
  3712. if (!pinstance->hrrq_start[i]) {
  3713. pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
  3714. i);
  3715. pmcraid_release_host_rrqs(pinstance, i);
  3716. return -ENOMEM;
  3717. }
  3718. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  3719. pinstance->hrrq_end[i] =
  3720. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  3721. pinstance->host_toggle_bit[i] = 1;
  3722. spin_lock_init(&pinstance->hrrq_lock[i]);
  3723. }
  3724. return 0;
  3725. }
  3726. /**
  3727. * pmcraid_release_hcams - release HCAM buffers
  3728. *
  3729. * @pinstance: pointer to per adapter instance structure
  3730. *
  3731. * Return value
  3732. * none
  3733. */
  3734. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  3735. {
  3736. if (pinstance->ccn.msg != NULL) {
  3737. dma_free_coherent(&pinstance->pdev->dev,
  3738. PMCRAID_AEN_HDR_SIZE +
  3739. sizeof(struct pmcraid_hcam_ccn_ext),
  3740. pinstance->ccn.msg,
  3741. pinstance->ccn.baddr);
  3742. pinstance->ccn.msg = NULL;
  3743. pinstance->ccn.hcam = NULL;
  3744. pinstance->ccn.baddr = 0;
  3745. }
  3746. if (pinstance->ldn.msg != NULL) {
  3747. dma_free_coherent(&pinstance->pdev->dev,
  3748. PMCRAID_AEN_HDR_SIZE +
  3749. sizeof(struct pmcraid_hcam_ldn),
  3750. pinstance->ldn.msg,
  3751. pinstance->ldn.baddr);
  3752. pinstance->ldn.msg = NULL;
  3753. pinstance->ldn.hcam = NULL;
  3754. pinstance->ldn.baddr = 0;
  3755. }
  3756. }
  3757. /**
  3758. * pmcraid_allocate_hcams - allocates HCAM buffers
  3759. * @pinstance : pointer to per adapter instance structure
  3760. *
  3761. * Return Value:
  3762. * 0 in case of successful allocation, non-zero otherwise
  3763. */
  3764. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  3765. {
  3766. pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
  3767. PMCRAID_AEN_HDR_SIZE +
  3768. sizeof(struct pmcraid_hcam_ccn_ext),
  3769. &pinstance->ccn.baddr, GFP_KERNEL);
  3770. pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
  3771. PMCRAID_AEN_HDR_SIZE +
  3772. sizeof(struct pmcraid_hcam_ldn),
  3773. &pinstance->ldn.baddr, GFP_KERNEL);
  3774. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  3775. pmcraid_release_hcams(pinstance);
  3776. } else {
  3777. pinstance->ccn.hcam =
  3778. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  3779. pinstance->ldn.hcam =
  3780. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  3781. atomic_set(&pinstance->ccn.ignore, 0);
  3782. atomic_set(&pinstance->ldn.ignore, 0);
  3783. }
  3784. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  3785. }
  3786. /**
  3787. * pmcraid_release_config_buffers - release config.table buffers
  3788. * @pinstance: pointer to per adapter instance structure
  3789. *
  3790. * Return Value
  3791. * none
  3792. */
  3793. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  3794. {
  3795. if (pinstance->cfg_table != NULL &&
  3796. pinstance->cfg_table_bus_addr != 0) {
  3797. dma_free_coherent(&pinstance->pdev->dev,
  3798. sizeof(struct pmcraid_config_table),
  3799. pinstance->cfg_table,
  3800. pinstance->cfg_table_bus_addr);
  3801. pinstance->cfg_table = NULL;
  3802. pinstance->cfg_table_bus_addr = 0;
  3803. }
  3804. if (pinstance->res_entries != NULL) {
  3805. int i;
  3806. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  3807. list_del(&pinstance->res_entries[i].queue);
  3808. kfree(pinstance->res_entries);
  3809. pinstance->res_entries = NULL;
  3810. }
  3811. pmcraid_release_hcams(pinstance);
  3812. }
  3813. /**
  3814. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  3815. * @pinstance : pointer to per adapter instance structure
  3816. *
  3817. * Return Value
  3818. * 0 for successful allocation, -ENOMEM for any failure
  3819. */
  3820. static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  3821. {
  3822. int i;
  3823. pinstance->res_entries =
  3824. kzalloc_objs(struct pmcraid_resource_entry,
  3825. PMCRAID_MAX_RESOURCES);
  3826. if (NULL == pinstance->res_entries) {
  3827. pmcraid_err("failed to allocate memory for resource table\n");
  3828. return -ENOMEM;
  3829. }
  3830. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  3831. list_add_tail(&pinstance->res_entries[i].queue,
  3832. &pinstance->free_res_q);
  3833. pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,
  3834. sizeof(struct pmcraid_config_table),
  3835. &pinstance->cfg_table_bus_addr,
  3836. GFP_KERNEL);
  3837. if (NULL == pinstance->cfg_table) {
  3838. pmcraid_err("couldn't alloc DMA memory for config table\n");
  3839. pmcraid_release_config_buffers(pinstance);
  3840. return -ENOMEM;
  3841. }
  3842. if (pmcraid_allocate_hcams(pinstance)) {
  3843. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  3844. pmcraid_release_config_buffers(pinstance);
  3845. return -ENOMEM;
  3846. }
  3847. return 0;
  3848. }
  3849. /**
  3850. * pmcraid_init_tasklets - registers tasklets for response handling
  3851. *
  3852. * @pinstance: pointer adapter instance structure
  3853. *
  3854. * Return value
  3855. * none
  3856. */
  3857. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  3858. {
  3859. int i;
  3860. for (i = 0; i < pinstance->num_hrrq; i++)
  3861. tasklet_init(&pinstance->isr_tasklet[i],
  3862. pmcraid_tasklet_function,
  3863. (unsigned long)&pinstance->hrrq_vector[i]);
  3864. }
  3865. /**
  3866. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  3867. *
  3868. * @pinstance: pointer to adapter instance structure
  3869. *
  3870. * Return value
  3871. * none
  3872. */
  3873. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  3874. {
  3875. int i;
  3876. for (i = 0; i < pinstance->num_hrrq; i++)
  3877. tasklet_kill(&pinstance->isr_tasklet[i]);
  3878. }
  3879. /**
  3880. * pmcraid_release_buffers - release per-adapter buffers allocated
  3881. *
  3882. * @pinstance: pointer to adapter soft state
  3883. *
  3884. * Return Value
  3885. * none
  3886. */
  3887. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  3888. {
  3889. pmcraid_release_config_buffers(pinstance);
  3890. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  3891. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  3892. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  3893. if (pinstance->inq_data != NULL) {
  3894. dma_free_coherent(&pinstance->pdev->dev,
  3895. sizeof(struct pmcraid_inquiry_data),
  3896. pinstance->inq_data,
  3897. pinstance->inq_data_baddr);
  3898. pinstance->inq_data = NULL;
  3899. pinstance->inq_data_baddr = 0;
  3900. }
  3901. if (pinstance->timestamp_data != NULL) {
  3902. dma_free_coherent(&pinstance->pdev->dev,
  3903. sizeof(struct pmcraid_timestamp_data),
  3904. pinstance->timestamp_data,
  3905. pinstance->timestamp_data_baddr);
  3906. pinstance->timestamp_data = NULL;
  3907. pinstance->timestamp_data_baddr = 0;
  3908. }
  3909. }
  3910. /**
  3911. * pmcraid_init_buffers - allocates memory and initializes various structures
  3912. * @pinstance: pointer to per adapter instance structure
  3913. *
  3914. * This routine pre-allocates memory based on the type of block as below:
  3915. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  3916. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  3917. * config-table entries : DMAable memory using dma_alloc_coherent
  3918. * HostRRQs : DMAable memory, using dma_alloc_coherent
  3919. *
  3920. * Return Value
  3921. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  3922. */
  3923. static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  3924. {
  3925. int i;
  3926. if (pmcraid_allocate_host_rrqs(pinstance)) {
  3927. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  3928. pinstance->num_hrrq);
  3929. return -ENOMEM;
  3930. }
  3931. if (pmcraid_allocate_config_buffers(pinstance)) {
  3932. pmcraid_err("couldn't allocate memory for config buffers\n");
  3933. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  3934. return -ENOMEM;
  3935. }
  3936. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  3937. pmcraid_err("couldn't allocate memory for cmd blocks\n");
  3938. pmcraid_release_config_buffers(pinstance);
  3939. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  3940. return -ENOMEM;
  3941. }
  3942. if (pmcraid_allocate_control_blocks(pinstance)) {
  3943. pmcraid_err("couldn't allocate memory control blocks\n");
  3944. pmcraid_release_config_buffers(pinstance);
  3945. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  3946. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  3947. return -ENOMEM;
  3948. }
  3949. /* allocate DMAable memory for page D0 INQUIRY buffer */
  3950. pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,
  3951. sizeof(struct pmcraid_inquiry_data),
  3952. &pinstance->inq_data_baddr, GFP_KERNEL);
  3953. if (pinstance->inq_data == NULL) {
  3954. pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
  3955. pmcraid_release_buffers(pinstance);
  3956. return -ENOMEM;
  3957. }
  3958. /* allocate DMAable memory for set timestamp data buffer */
  3959. pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,
  3960. sizeof(struct pmcraid_timestamp_data),
  3961. &pinstance->timestamp_data_baddr,
  3962. GFP_KERNEL);
  3963. if (pinstance->timestamp_data == NULL) {
  3964. pmcraid_err("couldn't allocate DMA memory for \
  3965. set time_stamp \n");
  3966. pmcraid_release_buffers(pinstance);
  3967. return -ENOMEM;
  3968. }
  3969. /* Initialize all the command blocks and add them to free pool. No
  3970. * need to lock (free_pool_lock) as this is done in initialization
  3971. * itself
  3972. */
  3973. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3974. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  3975. pmcraid_init_cmdblk(cmdp, i);
  3976. cmdp->drv_inst = pinstance;
  3977. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  3978. }
  3979. return 0;
  3980. }
  3981. /**
  3982. * pmcraid_reinit_buffers - resets various buffer pointers
  3983. * @pinstance: pointer to adapter instance
  3984. * Return value
  3985. * none
  3986. */
  3987. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  3988. {
  3989. int i;
  3990. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  3991. for (i = 0; i < pinstance->num_hrrq; i++) {
  3992. memset(pinstance->hrrq_start[i], 0, buffer_size);
  3993. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  3994. pinstance->hrrq_end[i] =
  3995. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  3996. pinstance->host_toggle_bit[i] = 1;
  3997. }
  3998. }
  3999. /**
  4000. * pmcraid_init_instance - initialize per instance data structure
  4001. * @pdev: pointer to pci device structure
  4002. * @host: pointer to Scsi_Host structure
  4003. * @mapped_pci_addr: memory mapped IOA configuration registers
  4004. *
  4005. * Return Value
  4006. * 0 on success, non-zero in case of any failure
  4007. */
  4008. static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
  4009. void __iomem *mapped_pci_addr)
  4010. {
  4011. struct pmcraid_instance *pinstance =
  4012. (struct pmcraid_instance *)host->hostdata;
  4013. pinstance->host = host;
  4014. pinstance->pdev = pdev;
  4015. /* Initialize register addresses */
  4016. pinstance->mapped_dma_addr = mapped_pci_addr;
  4017. /* Initialize chip-specific details */
  4018. {
  4019. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4020. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4021. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4022. pint_regs->ioa_host_interrupt_reg =
  4023. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4024. pint_regs->ioa_host_interrupt_clr_reg =
  4025. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4026. pint_regs->ioa_host_msix_interrupt_reg =
  4027. mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
  4028. pint_regs->host_ioa_interrupt_reg =
  4029. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4030. pint_regs->host_ioa_interrupt_clr_reg =
  4031. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4032. /* Current version of firmware exposes interrupt mask set
  4033. * and mask clr registers through memory mapped bar0.
  4034. */
  4035. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4036. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4037. pint_regs->ioa_host_interrupt_mask_reg =
  4038. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4039. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4040. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4041. pint_regs->global_interrupt_mask_reg =
  4042. mapped_pci_addr + chip_cfg->global_intr_mask;
  4043. }
  4044. pinstance->ioa_reset_attempts = 0;
  4045. init_waitqueue_head(&pinstance->reset_wait_q);
  4046. atomic_set(&pinstance->outstanding_cmds, 0);
  4047. atomic_set(&pinstance->last_message_id, 0);
  4048. atomic_set(&pinstance->expose_resources, 0);
  4049. INIT_LIST_HEAD(&pinstance->free_res_q);
  4050. INIT_LIST_HEAD(&pinstance->used_res_q);
  4051. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4052. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4053. spin_lock_init(&pinstance->free_pool_lock);
  4054. spin_lock_init(&pinstance->pending_pool_lock);
  4055. spin_lock_init(&pinstance->resource_lock);
  4056. mutex_init(&pinstance->aen_queue_lock);
  4057. /* Work-queue (Shared) for deferred processing error handling */
  4058. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4059. /* Initialize the default log_level */
  4060. pinstance->current_log_level = pmcraid_log_level;
  4061. /* Setup variables required for reset engine */
  4062. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4063. pinstance->reset_cmd = NULL;
  4064. return 0;
  4065. }
  4066. /**
  4067. * pmcraid_shutdown - shutdown adapter controller.
  4068. * @pdev: pci device struct
  4069. *
  4070. * Issues an adapter shutdown to the card waits for its completion
  4071. *
  4072. * Return value
  4073. * none
  4074. */
  4075. static void pmcraid_shutdown(struct pci_dev *pdev)
  4076. {
  4077. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4078. pmcraid_reset_bringdown(pinstance);
  4079. }
  4080. /*
  4081. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4082. */
  4083. static unsigned short pmcraid_get_minor(void)
  4084. {
  4085. int minor;
  4086. minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  4087. __set_bit(minor, pmcraid_minor);
  4088. return minor;
  4089. }
  4090. /*
  4091. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4092. */
  4093. static void pmcraid_release_minor(unsigned short minor)
  4094. {
  4095. __clear_bit(minor, pmcraid_minor);
  4096. }
  4097. /**
  4098. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4099. *
  4100. * @pinstance: pointer to adapter instance for which to register device
  4101. *
  4102. * Return value
  4103. * 0 in case of success, otherwise non-zero
  4104. */
  4105. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4106. {
  4107. int minor;
  4108. int error;
  4109. minor = pmcraid_get_minor();
  4110. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4111. pinstance->cdev.owner = THIS_MODULE;
  4112. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4113. if (error)
  4114. pmcraid_release_minor(minor);
  4115. else
  4116. device_create(&pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4117. NULL, "%s%u", PMCRAID_DEVFILE, minor);
  4118. return error;
  4119. }
  4120. /**
  4121. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4122. *
  4123. * @pinstance: pointer to adapter instance structure
  4124. *
  4125. * Return value
  4126. * none
  4127. */
  4128. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4129. {
  4130. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4131. device_destroy(&pmcraid_class,
  4132. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4133. cdev_del(&pinstance->cdev);
  4134. }
  4135. /**
  4136. * pmcraid_remove - IOA hot plug remove entry point
  4137. * @pdev: pci device struct
  4138. *
  4139. * Return value
  4140. * none
  4141. */
  4142. static void pmcraid_remove(struct pci_dev *pdev)
  4143. {
  4144. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4145. /* remove the management interface (/dev file) for this device */
  4146. pmcraid_release_chrdev(pinstance);
  4147. /* remove host template from scsi midlayer */
  4148. scsi_remove_host(pinstance->host);
  4149. /* block requests from mid-layer */
  4150. scsi_block_requests(pinstance->host);
  4151. /* initiate shutdown adapter */
  4152. pmcraid_shutdown(pdev);
  4153. pmcraid_disable_interrupts(pinstance, ~0);
  4154. flush_work(&pinstance->worker_q);
  4155. pmcraid_kill_tasklets(pinstance);
  4156. pmcraid_unregister_interrupt_handler(pinstance);
  4157. pmcraid_release_buffers(pinstance);
  4158. iounmap(pinstance->mapped_dma_addr);
  4159. pci_release_regions(pdev);
  4160. scsi_host_put(pinstance->host);
  4161. pci_disable_device(pdev);
  4162. return;
  4163. }
  4164. /**
  4165. * pmcraid_suspend - driver suspend entry point for power management
  4166. * @dev: Device structure
  4167. *
  4168. * Return Value - 0 always
  4169. */
  4170. static int __maybe_unused pmcraid_suspend(struct device *dev)
  4171. {
  4172. struct pci_dev *pdev = to_pci_dev(dev);
  4173. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4174. pmcraid_shutdown(pdev);
  4175. pmcraid_disable_interrupts(pinstance, ~0);
  4176. pmcraid_kill_tasklets(pinstance);
  4177. pmcraid_unregister_interrupt_handler(pinstance);
  4178. return 0;
  4179. }
  4180. /**
  4181. * pmcraid_resume - driver resume entry point PCI power management
  4182. * @dev: Device structure
  4183. *
  4184. * Return Value - 0 in case of success. Error code in case of any failure
  4185. */
  4186. static int __maybe_unused pmcraid_resume(struct device *dev)
  4187. {
  4188. struct pci_dev *pdev = to_pci_dev(dev);
  4189. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4190. struct Scsi_Host *host = pinstance->host;
  4191. int rc = 0;
  4192. if (sizeof(dma_addr_t) == 4 ||
  4193. dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
  4194. rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  4195. if (rc == 0)
  4196. rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  4197. if (rc != 0) {
  4198. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4199. goto disable_device;
  4200. }
  4201. pmcraid_disable_interrupts(pinstance, ~0);
  4202. atomic_set(&pinstance->outstanding_cmds, 0);
  4203. rc = pmcraid_register_interrupt_handler(pinstance);
  4204. if (rc) {
  4205. dev_err(&pdev->dev,
  4206. "resume: couldn't register interrupt handlers\n");
  4207. rc = -ENODEV;
  4208. goto release_host;
  4209. }
  4210. pmcraid_init_tasklets(pinstance);
  4211. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4212. /* Start with hard reset sequence which brings up IOA to operational
  4213. * state as well as completes the reset sequence.
  4214. */
  4215. pinstance->ioa_hard_reset = 1;
  4216. /* Start IOA firmware initialization and bring card to Operational
  4217. * state.
  4218. */
  4219. if (pmcraid_reset_bringup(pinstance)) {
  4220. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4221. rc = -ENODEV;
  4222. goto release_tasklets;
  4223. }
  4224. return 0;
  4225. release_tasklets:
  4226. pmcraid_disable_interrupts(pinstance, ~0);
  4227. pmcraid_kill_tasklets(pinstance);
  4228. pmcraid_unregister_interrupt_handler(pinstance);
  4229. release_host:
  4230. scsi_host_put(host);
  4231. disable_device:
  4232. return rc;
  4233. }
  4234. /**
  4235. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4236. * completion of the ioa reset
  4237. * @cmd: pointer to reset command block
  4238. */
  4239. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4240. {
  4241. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4242. unsigned long flags;
  4243. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4244. pmcraid_ioa_reset(cmd);
  4245. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4246. scsi_unblock_requests(pinstance->host);
  4247. schedule_work(&pinstance->worker_q);
  4248. }
  4249. /**
  4250. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4251. *
  4252. * @cmd: pointer to pmcraid_cmd structure
  4253. *
  4254. * Return Value
  4255. * 0 for success or non-zero for failure cases
  4256. */
  4257. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4258. {
  4259. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4260. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4261. pmcraid_reinit_cmdblk(cmd);
  4262. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4263. ioarcb->request_type = REQ_TYPE_IOACMD;
  4264. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4265. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4266. /* If this was called as part of resource table reinitialization due to
  4267. * lost CCN, it is enough to return the command block back to free pool
  4268. * as part of set_supported_devs completion function.
  4269. */
  4270. if (cmd->drv_inst->reinit_cfg_table) {
  4271. cmd->drv_inst->reinit_cfg_table = 0;
  4272. cmd->release = 1;
  4273. cmd_done = pmcraid_reinit_cfgtable_done;
  4274. }
  4275. /* we will be done with the reset sequence after set supported devices,
  4276. * setup the done function to return the command block back to free
  4277. * pool
  4278. */
  4279. pmcraid_send_cmd(cmd,
  4280. cmd_done,
  4281. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4282. pmcraid_timeout_handler);
  4283. return;
  4284. }
  4285. /**
  4286. * pmcraid_set_timestamp - set the timestamp to IOAFP
  4287. *
  4288. * @cmd: pointer to pmcraid_cmd structure
  4289. *
  4290. * Return Value
  4291. * 0 for success or non-zero for failure cases
  4292. */
  4293. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
  4294. {
  4295. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4296. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4297. __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
  4298. struct pmcraid_ioadl_desc *ioadl;
  4299. u64 timestamp;
  4300. timestamp = ktime_get_real_seconds() * 1000;
  4301. pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
  4302. pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
  4303. pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
  4304. pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
  4305. pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
  4306. pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
  4307. pmcraid_reinit_cmdblk(cmd);
  4308. ioarcb->request_type = REQ_TYPE_SCSI;
  4309. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4310. ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
  4311. ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
  4312. memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
  4313. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4314. offsetof(struct pmcraid_ioarcb,
  4315. add_data.u.ioadl[0]));
  4316. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4317. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  4318. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4319. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  4320. ioarcb->data_transfer_length =
  4321. cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4322. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4323. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4324. ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
  4325. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4326. if (!pinstance->timestamp_error) {
  4327. pinstance->timestamp_error = 0;
  4328. pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
  4329. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4330. } else {
  4331. pmcraid_send_cmd(cmd, pmcraid_return_cmd,
  4332. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4333. return;
  4334. }
  4335. }
  4336. /**
  4337. * pmcraid_init_res_table - Initialize the resource table
  4338. * @cmd: pointer to pmcraid command struct
  4339. *
  4340. * This function looks through the existing resource table, comparing
  4341. * it with the config table. This function will take care of old/new
  4342. * devices and schedule adding/removing them from the mid-layer
  4343. * as appropriate.
  4344. *
  4345. * Return value
  4346. * None
  4347. */
  4348. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4349. {
  4350. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4351. struct pmcraid_resource_entry *res, *temp;
  4352. struct pmcraid_config_table_entry *cfgte;
  4353. unsigned long lock_flags;
  4354. int found, rc, i;
  4355. u16 fw_version;
  4356. LIST_HEAD(old_res);
  4357. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4358. pmcraid_err("IOA requires microcode download\n");
  4359. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  4360. /* resource list is protected by pinstance->resource_lock.
  4361. * init_res_table can be called from probe (user-thread) or runtime
  4362. * reset (timer/tasklet)
  4363. */
  4364. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4365. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4366. list_move_tail(&res->queue, &old_res);
  4367. for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
  4368. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4369. PMCRAID_FW_VERSION_1)
  4370. cfgte = &pinstance->cfg_table->entries[i];
  4371. else
  4372. cfgte = (struct pmcraid_config_table_entry *)
  4373. &pinstance->cfg_table->entries_ext[i];
  4374. if (!pmcraid_expose_resource(fw_version, cfgte))
  4375. continue;
  4376. found = 0;
  4377. /* If this entry was already detected and initialized */
  4378. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4379. rc = memcmp(&res->cfg_entry.resource_address,
  4380. &cfgte->resource_address,
  4381. sizeof(cfgte->resource_address));
  4382. if (!rc) {
  4383. list_move_tail(&res->queue,
  4384. &pinstance->used_res_q);
  4385. found = 1;
  4386. break;
  4387. }
  4388. }
  4389. /* If this is new entry, initialize it and add it the queue */
  4390. if (!found) {
  4391. if (list_empty(&pinstance->free_res_q)) {
  4392. pmcraid_err("Too many devices attached\n");
  4393. break;
  4394. }
  4395. found = 1;
  4396. res = list_entry(pinstance->free_res_q.next,
  4397. struct pmcraid_resource_entry, queue);
  4398. res->scsi_dev = NULL;
  4399. res->change_detected = RES_CHANGE_ADD;
  4400. res->reset_progress = 0;
  4401. list_move_tail(&res->queue, &pinstance->used_res_q);
  4402. }
  4403. /* copy new configuration table entry details into driver
  4404. * maintained resource entry
  4405. */
  4406. if (found) {
  4407. memcpy(&res->cfg_entry, cfgte,
  4408. pinstance->config_table_entry_size);
  4409. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4410. res->cfg_entry.resource_type,
  4411. (fw_version <= PMCRAID_FW_VERSION_1 ?
  4412. res->cfg_entry.unique_flags1 :
  4413. le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
  4414. le32_to_cpu(res->cfg_entry.resource_address));
  4415. }
  4416. }
  4417. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4418. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4419. if (res->scsi_dev) {
  4420. res->change_detected = RES_CHANGE_DEL;
  4421. res->cfg_entry.resource_handle =
  4422. PMCRAID_INVALID_RES_HANDLE;
  4423. list_move_tail(&res->queue, &pinstance->used_res_q);
  4424. } else {
  4425. list_move_tail(&res->queue, &pinstance->free_res_q);
  4426. }
  4427. }
  4428. /* release the resource list lock */
  4429. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4430. pmcraid_set_timestamp(cmd);
  4431. }
  4432. /**
  4433. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4434. * @cmd: pointer pmcraid_cmd struct
  4435. *
  4436. * This function sends a Query IOA Configuration command to the adapter to
  4437. * retrieve the IOA configuration table.
  4438. *
  4439. * Return value:
  4440. * none
  4441. */
  4442. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4443. {
  4444. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4445. struct pmcraid_ioadl_desc *ioadl;
  4446. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4447. __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4448. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4449. PMCRAID_FW_VERSION_1)
  4450. pinstance->config_table_entry_size =
  4451. sizeof(struct pmcraid_config_table_entry);
  4452. else
  4453. pinstance->config_table_entry_size =
  4454. sizeof(struct pmcraid_config_table_entry_ext);
  4455. ioarcb->request_type = REQ_TYPE_IOACMD;
  4456. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4457. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4458. /* firmware requires 4-byte length field, specified in B.E format */
  4459. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4460. /* Since entire config table can be described by single IOADL, it can
  4461. * be part of IOARCB itself
  4462. */
  4463. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4464. offsetof(struct pmcraid_ioarcb,
  4465. add_data.u.ioadl[0]));
  4466. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4467. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
  4468. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4469. ioarcb->data_transfer_length =
  4470. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4471. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4472. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4473. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4474. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4475. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4476. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4477. }
  4478. /**
  4479. * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
  4480. * @pdev: pointer to pci device structure
  4481. * @dev_id: pointer to device ids structure
  4482. *
  4483. * Return Value
  4484. * returns 0 if the device is claimed and successfully configured.
  4485. * returns non-zero error code in case of any failure
  4486. */
  4487. static int pmcraid_probe(struct pci_dev *pdev,
  4488. const struct pci_device_id *dev_id)
  4489. {
  4490. struct pmcraid_instance *pinstance;
  4491. struct Scsi_Host *host;
  4492. void __iomem *mapped_pci_addr;
  4493. int rc = PCIBIOS_SUCCESSFUL;
  4494. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  4495. pmcraid_err
  4496. ("maximum number(%d) of supported adapters reached\n",
  4497. atomic_read(&pmcraid_adapter_count));
  4498. return -ENOMEM;
  4499. }
  4500. atomic_inc(&pmcraid_adapter_count);
  4501. rc = pci_enable_device(pdev);
  4502. if (rc) {
  4503. dev_err(&pdev->dev, "Cannot enable adapter\n");
  4504. atomic_dec(&pmcraid_adapter_count);
  4505. return rc;
  4506. }
  4507. dev_info(&pdev->dev,
  4508. "Found new IOA(%x:%x), Total IOA count: %d\n",
  4509. pdev->vendor, pdev->device,
  4510. atomic_read(&pmcraid_adapter_count));
  4511. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  4512. if (rc < 0) {
  4513. dev_err(&pdev->dev,
  4514. "Couldn't register memory range of registers\n");
  4515. goto out_disable_device;
  4516. }
  4517. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  4518. if (!mapped_pci_addr) {
  4519. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  4520. rc = -ENOMEM;
  4521. goto out_release_regions;
  4522. }
  4523. pci_set_master(pdev);
  4524. /* Firmware requires the system bus address of IOARCB to be within
  4525. * 32-bit addressable range though it has 64-bit IOARRIN register.
  4526. * However, firmware supports 64-bit streaming DMA buffers, whereas
  4527. * coherent buffers are to be 32-bit. Since dma_alloc_coherent always
  4528. * returns memory within 4GB (if not, change this logic), coherent
  4529. * buffers are within firmware acceptable address ranges.
  4530. */
  4531. if (sizeof(dma_addr_t) == 4 ||
  4532. dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
  4533. rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  4534. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  4535. * bit mask for dma_alloc_coherent to return addresses within 4GB
  4536. */
  4537. if (rc == 0)
  4538. rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  4539. if (rc != 0) {
  4540. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  4541. goto cleanup_nomem;
  4542. }
  4543. host = scsi_host_alloc(&pmcraid_host_template,
  4544. sizeof(struct pmcraid_instance));
  4545. if (!host) {
  4546. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  4547. rc = -ENOMEM;
  4548. goto cleanup_nomem;
  4549. }
  4550. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  4551. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  4552. host->unique_id = host->host_no;
  4553. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  4554. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  4555. /* zero out entire instance structure */
  4556. pinstance = (struct pmcraid_instance *)host->hostdata;
  4557. memset(pinstance, 0, sizeof(*pinstance));
  4558. pinstance->chip_cfg =
  4559. (struct pmcraid_chip_details *)(dev_id->driver_data);
  4560. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  4561. if (rc < 0) {
  4562. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  4563. goto out_scsi_host_put;
  4564. }
  4565. pci_set_drvdata(pdev, pinstance);
  4566. /* Save PCI config-space for use following the reset */
  4567. rc = pci_save_state(pinstance->pdev);
  4568. if (rc != 0) {
  4569. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  4570. goto out_scsi_host_put;
  4571. }
  4572. pmcraid_disable_interrupts(pinstance, ~0);
  4573. rc = pmcraid_register_interrupt_handler(pinstance);
  4574. if (rc) {
  4575. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  4576. goto out_scsi_host_put;
  4577. }
  4578. pmcraid_init_tasklets(pinstance);
  4579. /* allocate verious buffers used by LLD.*/
  4580. rc = pmcraid_init_buffers(pinstance);
  4581. if (rc) {
  4582. pmcraid_err("couldn't allocate memory blocks\n");
  4583. goto out_unregister_isr;
  4584. }
  4585. /* check the reset type required */
  4586. pmcraid_reset_type(pinstance);
  4587. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4588. /* Start IOA firmware initialization and bring card to Operational
  4589. * state.
  4590. */
  4591. pmcraid_info("starting IOA initialization sequence\n");
  4592. if (pmcraid_reset_bringup(pinstance)) {
  4593. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4594. rc = 1;
  4595. goto out_release_bufs;
  4596. }
  4597. /* Add adapter instance into mid-layer list */
  4598. rc = scsi_add_host(pinstance->host, &pdev->dev);
  4599. if (rc != 0) {
  4600. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  4601. goto out_release_bufs;
  4602. }
  4603. scsi_scan_host(pinstance->host);
  4604. rc = pmcraid_setup_chrdev(pinstance);
  4605. if (rc != 0) {
  4606. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  4607. rc);
  4608. goto out_remove_host;
  4609. }
  4610. /* Schedule worker thread to handle CCN and take care of adding and
  4611. * removing devices to OS
  4612. */
  4613. atomic_set(&pinstance->expose_resources, 1);
  4614. schedule_work(&pinstance->worker_q);
  4615. return rc;
  4616. out_remove_host:
  4617. scsi_remove_host(host);
  4618. out_release_bufs:
  4619. pmcraid_release_buffers(pinstance);
  4620. out_unregister_isr:
  4621. pmcraid_kill_tasklets(pinstance);
  4622. pmcraid_unregister_interrupt_handler(pinstance);
  4623. out_scsi_host_put:
  4624. scsi_host_put(host);
  4625. cleanup_nomem:
  4626. iounmap(mapped_pci_addr);
  4627. out_release_regions:
  4628. pci_release_regions(pdev);
  4629. out_disable_device:
  4630. atomic_dec(&pmcraid_adapter_count);
  4631. pci_disable_device(pdev);
  4632. return -ENODEV;
  4633. }
  4634. static SIMPLE_DEV_PM_OPS(pmcraid_pm_ops, pmcraid_suspend, pmcraid_resume);
  4635. /*
  4636. * PCI driver structure of pmcraid driver
  4637. */
  4638. static struct pci_driver pmcraid_driver = {
  4639. .name = PMCRAID_DRIVER_NAME,
  4640. .id_table = pmcraid_pci_table,
  4641. .probe = pmcraid_probe,
  4642. .remove = pmcraid_remove,
  4643. .driver.pm = &pmcraid_pm_ops,
  4644. .shutdown = pmcraid_shutdown
  4645. };
  4646. /**
  4647. * pmcraid_init - module load entry point
  4648. */
  4649. static int __init pmcraid_init(void)
  4650. {
  4651. dev_t dev;
  4652. int error;
  4653. pmcraid_info("%s Device Driver version: %s\n",
  4654. PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
  4655. error = alloc_chrdev_region(&dev, 0,
  4656. PMCRAID_MAX_ADAPTERS,
  4657. PMCRAID_DEVFILE);
  4658. if (error) {
  4659. pmcraid_err("failed to get a major number for adapters\n");
  4660. goto out_init;
  4661. }
  4662. pmcraid_major = MAJOR(dev);
  4663. error = class_register(&pmcraid_class);
  4664. if (error) {
  4665. pmcraid_err("failed to register with sysfs, error = %x\n",
  4666. error);
  4667. goto out_unreg_chrdev;
  4668. }
  4669. error = pmcraid_netlink_init();
  4670. if (error) {
  4671. class_unregister(&pmcraid_class);
  4672. goto out_unreg_chrdev;
  4673. }
  4674. error = pci_register_driver(&pmcraid_driver);
  4675. if (error == 0)
  4676. goto out_init;
  4677. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  4678. error);
  4679. class_unregister(&pmcraid_class);
  4680. pmcraid_netlink_release();
  4681. out_unreg_chrdev:
  4682. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  4683. out_init:
  4684. return error;
  4685. }
  4686. /**
  4687. * pmcraid_exit - module unload entry point
  4688. */
  4689. static void __exit pmcraid_exit(void)
  4690. {
  4691. pmcraid_netlink_release();
  4692. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  4693. PMCRAID_MAX_ADAPTERS);
  4694. pci_unregister_driver(&pmcraid_driver);
  4695. class_unregister(&pmcraid_class);
  4696. }
  4697. module_init(pmcraid_init);
  4698. module_exit(pmcraid_exit);