nsp32.c 86 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  4. * Copyright (C) 2001, 2002, 2003
  5. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  6. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  7. *
  8. * Revision History:
  9. * 1.0: Initial Release.
  10. * 1.1: Add /proc SDTR status.
  11. * Remove obsolete error handler nsp32_reset.
  12. * Some clean up.
  13. * 1.2: PowerPC (big endian) support.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/timer.h>
  20. #include <linux/ioport.h>
  21. #include <linux/major.h>
  22. #include <linux/blkdev.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/pci.h>
  25. #include <linux/delay.h>
  26. #include <linux/ctype.h>
  27. #include <linux/dma-mapping.h>
  28. #include <asm/dma.h>
  29. #include <asm/io.h>
  30. #include <scsi/scsi.h>
  31. #include <scsi/scsi_cmnd.h>
  32. #include <scsi/scsi_device.h>
  33. #include <scsi/scsi_host.h>
  34. #include <scsi/scsi_ioctl.h>
  35. #include "nsp32.h"
  36. /***********************************************************************
  37. * Module parameters
  38. */
  39. static int trans_mode = 0; /* default: BIOS */
  40. module_param (trans_mode, int, 0);
  41. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  42. #define ASYNC_MODE 1
  43. #define ULTRA20M_MODE 2
  44. static bool auto_param = 0; /* default: ON */
  45. module_param (auto_param, bool, 0);
  46. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  47. static bool disc_priv = 1; /* default: OFF */
  48. module_param (disc_priv, bool, 0);
  49. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  50. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  51. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  52. MODULE_LICENSE("GPL");
  53. static const char *nsp32_release_version = "1.2";
  54. /****************************************************************************
  55. * Supported hardware
  56. */
  57. static const struct pci_device_id nsp32_pci_table[] = {
  58. {
  59. .vendor = PCI_VENDOR_ID_IODATA,
  60. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  61. .subvendor = PCI_ANY_ID,
  62. .subdevice = PCI_ANY_ID,
  63. .driver_data = MODEL_IODATA,
  64. },
  65. {
  66. .vendor = PCI_VENDOR_ID_WORKBIT,
  67. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  68. .subvendor = PCI_ANY_ID,
  69. .subdevice = PCI_ANY_ID,
  70. .driver_data = MODEL_KME,
  71. },
  72. {
  73. .vendor = PCI_VENDOR_ID_WORKBIT,
  74. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  75. .subvendor = PCI_ANY_ID,
  76. .subdevice = PCI_ANY_ID,
  77. .driver_data = MODEL_WORKBIT,
  78. },
  79. {
  80. .vendor = PCI_VENDOR_ID_WORKBIT,
  81. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  82. .subvendor = PCI_ANY_ID,
  83. .subdevice = PCI_ANY_ID,
  84. .driver_data = MODEL_PCI_WORKBIT,
  85. },
  86. {
  87. .vendor = PCI_VENDOR_ID_WORKBIT,
  88. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  89. .subvendor = PCI_ANY_ID,
  90. .subdevice = PCI_ANY_ID,
  91. .driver_data = MODEL_LOGITEC,
  92. },
  93. {
  94. .vendor = PCI_VENDOR_ID_WORKBIT,
  95. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  96. .subvendor = PCI_ANY_ID,
  97. .subdevice = PCI_ANY_ID,
  98. .driver_data = MODEL_PCI_LOGITEC,
  99. },
  100. {
  101. .vendor = PCI_VENDOR_ID_WORKBIT,
  102. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  103. .subvendor = PCI_ANY_ID,
  104. .subdevice = PCI_ANY_ID,
  105. .driver_data = MODEL_PCI_MELCO,
  106. },
  107. {
  108. .vendor = PCI_VENDOR_ID_WORKBIT,
  109. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  110. .subvendor = PCI_ANY_ID,
  111. .subdevice = PCI_ANY_ID,
  112. .driver_data = MODEL_PCI_MELCO,
  113. },
  114. {0,0,},
  115. };
  116. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  117. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  118. /*
  119. * Period/AckWidth speed conversion table
  120. *
  121. * Note: This period/ackwidth speed table must be in descending order.
  122. */
  123. static nsp32_sync_table nsp32_sync_table_40M[] = {
  124. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  125. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  126. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  127. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  128. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  129. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  130. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  131. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  132. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  133. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  134. };
  135. static nsp32_sync_table nsp32_sync_table_20M[] = {
  136. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  137. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  138. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  139. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  140. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  141. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  142. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  143. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  144. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  145. };
  146. static nsp32_sync_table nsp32_sync_table_pci[] = {
  147. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  148. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  149. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  150. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  151. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  152. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  153. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  154. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  155. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  156. };
  157. /*
  158. * function declaration
  159. */
  160. /* module entry point */
  161. static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  162. static void nsp32_remove(struct pci_dev *);
  163. static int __init init_nsp32 (void);
  164. static void __exit exit_nsp32 (void);
  165. /* struct struct scsi_host_template */
  166. static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
  167. static int nsp32_detect (struct pci_dev *pdev);
  168. static enum scsi_qc_status nsp32_queuecommand(struct Scsi_Host *,
  169. struct scsi_cmnd *);
  170. static const char *nsp32_info (struct Scsi_Host *);
  171. static int nsp32_release (struct Scsi_Host *);
  172. /* SCSI error handler */
  173. static int nsp32_eh_abort (struct scsi_cmnd *);
  174. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  175. /* generate SCSI message */
  176. static void nsp32_build_identify(struct scsi_cmnd *);
  177. static void nsp32_build_nop (struct scsi_cmnd *);
  178. static void nsp32_build_reject (struct scsi_cmnd *);
  179. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char,
  180. unsigned char);
  181. /* SCSI message handler */
  182. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  183. static void nsp32_msgout_occur (struct scsi_cmnd *);
  184. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long,
  185. unsigned short);
  186. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  187. static int nsp32_selection_autopara(struct scsi_cmnd *);
  188. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  189. static void nsp32_scsi_done (struct scsi_cmnd *);
  190. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  191. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  192. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  193. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  194. /* SCSI SDTR */
  195. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  196. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *,
  197. unsigned char);
  198. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  199. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *,
  200. unsigned char *, unsigned char *);
  201. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *,
  202. int, unsigned char);
  203. /* SCSI bus status handler */
  204. static void nsp32_wait_req (nsp32_hw_data *, int);
  205. static void nsp32_wait_sack (nsp32_hw_data *, int);
  206. static void nsp32_sack_assert (nsp32_hw_data *);
  207. static void nsp32_sack_negate (nsp32_hw_data *);
  208. static void nsp32_do_bus_reset(nsp32_hw_data *);
  209. /* hardware interrupt handler */
  210. static irqreturn_t do_nsp32_isr(int, void *);
  211. /* initialize hardware */
  212. static int nsp32hw_init(nsp32_hw_data *);
  213. /* EEPROM handler */
  214. static int nsp32_getprom_param (nsp32_hw_data *);
  215. static int nsp32_getprom_at24 (nsp32_hw_data *);
  216. static int nsp32_getprom_c16 (nsp32_hw_data *);
  217. static void nsp32_prom_start (nsp32_hw_data *);
  218. static void nsp32_prom_stop (nsp32_hw_data *);
  219. static int nsp32_prom_read (nsp32_hw_data *, int);
  220. static int nsp32_prom_read_bit (nsp32_hw_data *);
  221. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  222. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  223. static int nsp32_prom_get (nsp32_hw_data *, int);
  224. /* debug/warning/info message */
  225. static void nsp32_message (const char *, int, char *, char *, ...);
  226. #ifdef NSP32_DEBUG
  227. static void nsp32_dmessage(const char *, int, int, char *, ...);
  228. #endif
  229. /*
  230. * max_sectors is currently limited up to 128.
  231. */
  232. static const struct scsi_host_template nsp32_template = {
  233. .proc_name = "nsp32",
  234. .name = "Workbit NinjaSCSI-32Bi/UDE",
  235. .show_info = nsp32_show_info,
  236. .info = nsp32_info,
  237. .queuecommand = nsp32_queuecommand,
  238. .can_queue = 1,
  239. .sg_tablesize = NSP32_SG_SIZE,
  240. .max_sectors = 128,
  241. .this_id = NSP32_HOST_SCSIID,
  242. .dma_boundary = PAGE_SIZE - 1,
  243. .eh_abort_handler = nsp32_eh_abort,
  244. .eh_host_reset_handler = nsp32_eh_host_reset,
  245. /* .highmem_io = 1, */
  246. .cmd_size = sizeof(struct nsp32_cmd_priv),
  247. };
  248. #include "nsp32_io.h"
  249. /***********************************************************************
  250. * debug, error print
  251. */
  252. #ifndef NSP32_DEBUG
  253. # define NSP32_DEBUG_MASK 0x000000
  254. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  255. # define nsp32_dbg(mask, args...) /* */
  256. #else
  257. # define NSP32_DEBUG_MASK 0xffffff
  258. # define nsp32_msg(type, args...) \
  259. nsp32_message (__func__, __LINE__, (type), args)
  260. # define nsp32_dbg(mask, args...) \
  261. nsp32_dmessage(__func__, __LINE__, (mask), args)
  262. #endif
  263. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  264. #define NSP32_DEBUG_REGISTER BIT(1)
  265. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  266. #define NSP32_DEBUG_INTR BIT(3)
  267. #define NSP32_DEBUG_SGLIST BIT(4)
  268. #define NSP32_DEBUG_BUSFREE BIT(5)
  269. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  270. #define NSP32_DEBUG_RESELECTION BIT(7)
  271. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  272. #define NSP32_DEBUG_EEPROM BIT(9)
  273. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  274. #define NSP32_DEBUG_BUSRESET BIT(11)
  275. #define NSP32_DEBUG_RESTART BIT(12)
  276. #define NSP32_DEBUG_SYNC BIT(13)
  277. #define NSP32_DEBUG_WAIT BIT(14)
  278. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  279. #define NSP32_DEBUG_PROC BIT(16)
  280. #define NSP32_DEBUG_INIT BIT(17)
  281. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  282. #define NSP32_DEBUG_BUF_LEN 100
  283. __printf(4, 5)
  284. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  285. {
  286. va_list args;
  287. char buf[NSP32_DEBUG_BUF_LEN];
  288. va_start(args, fmt);
  289. vsnprintf(buf, sizeof(buf), fmt, args);
  290. va_end(args);
  291. #ifndef NSP32_DEBUG
  292. printk("%snsp32: %s\n", type, buf);
  293. #else
  294. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  295. #endif
  296. }
  297. #ifdef NSP32_DEBUG
  298. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  299. {
  300. va_list args;
  301. char buf[NSP32_DEBUG_BUF_LEN];
  302. va_start(args, fmt);
  303. vsnprintf(buf, sizeof(buf), fmt, args);
  304. va_end(args);
  305. if (mask & NSP32_DEBUG_MASK) {
  306. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  307. }
  308. }
  309. #endif
  310. #ifdef NSP32_DEBUG
  311. # include "nsp32_debug.c"
  312. #else
  313. # define show_command(arg) /* */
  314. # define show_busphase(arg) /* */
  315. # define show_autophase(arg) /* */
  316. #endif
  317. /*
  318. * IDENTIFY Message
  319. */
  320. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  321. {
  322. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  323. int pos = data->msgout_len;
  324. int mode = FALSE;
  325. /* XXX: Auto DiscPriv detection is progressing... */
  326. if (disc_priv == 0) {
  327. /* mode = TRUE; */
  328. }
  329. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  330. data->msgout_len = pos;
  331. }
  332. /*
  333. * SDTR Message Routine
  334. */
  335. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  336. unsigned char period,
  337. unsigned char offset)
  338. {
  339. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  340. int pos = data->msgout_len;
  341. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  342. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  343. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  344. data->msgoutbuf[pos] = period; pos++;
  345. data->msgoutbuf[pos] = offset; pos++;
  346. data->msgout_len = pos;
  347. }
  348. /*
  349. * No Operation Message
  350. */
  351. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  352. {
  353. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  354. int pos = data->msgout_len;
  355. if (pos != 0) {
  356. nsp32_msg(KERN_WARNING,
  357. "Some messages are already contained!");
  358. return;
  359. }
  360. data->msgoutbuf[pos] = NOP; pos++;
  361. data->msgout_len = pos;
  362. }
  363. /*
  364. * Reject Message
  365. */
  366. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  367. {
  368. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  369. int pos = data->msgout_len;
  370. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  371. data->msgout_len = pos;
  372. }
  373. /*
  374. * timer
  375. */
  376. #if 0
  377. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  378. {
  379. unsigned int base = SCpnt->host->io_port;
  380. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  381. if (time & (~TIMER_CNT_MASK)) {
  382. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  383. }
  384. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  385. }
  386. #endif
  387. /*
  388. * set SCSI command and other parameter to asic, and start selection phase
  389. */
  390. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  391. {
  392. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  393. unsigned int base = SCpnt->device->host->io_port;
  394. unsigned int host_id = SCpnt->device->host->this_id;
  395. unsigned char target = scmd_id(SCpnt);
  396. nsp32_autoparam *param = data->autoparam;
  397. unsigned char phase;
  398. int i, ret;
  399. unsigned int msgout;
  400. u16_le s;
  401. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  402. /*
  403. * check bus free
  404. */
  405. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  406. if (phase != BUSMON_BUS_FREE) {
  407. nsp32_msg(KERN_WARNING, "bus busy");
  408. show_busphase(phase & BUSMON_PHASE_MASK);
  409. SCpnt->result = DID_BUS_BUSY << 16;
  410. return FALSE;
  411. }
  412. /*
  413. * message out
  414. *
  415. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  416. * over 3 messages needs another routine.
  417. */
  418. if (data->msgout_len == 0) {
  419. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  420. SCpnt->result = DID_ERROR << 16;
  421. return FALSE;
  422. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  423. msgout = 0;
  424. for (i = 0; i < data->msgout_len; i++) {
  425. /*
  426. * the sending order of the message is:
  427. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  428. * MCNT 2: MSG#1 -> MSG#2
  429. * MCNT 1: MSG#2
  430. */
  431. msgout >>= 8;
  432. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  433. }
  434. msgout |= MV_VALID; /* MV valid */
  435. msgout |= (unsigned int)data->msgout_len; /* len */
  436. } else {
  437. /* data->msgout_len > 3 */
  438. msgout = 0;
  439. }
  440. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n",
  441. // nsp32_read2(base, SEL_TIME_OUT));
  442. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  443. /*
  444. * setup asic parameter
  445. */
  446. memset(param, 0, sizeof(nsp32_autoparam));
  447. /* cdb */
  448. for (i = 0; i < SCpnt->cmd_len; i++) {
  449. param->cdb[4 * i] = SCpnt->cmnd[i];
  450. }
  451. /* outgoing messages */
  452. param->msgout = cpu_to_le32(msgout);
  453. /* syncreg, ackwidth, target id, SREQ sampling rate */
  454. param->syncreg = data->cur_target->syncreg;
  455. param->ackwidth = data->cur_target->ackwidth;
  456. param->target_id = BIT(host_id) | BIT(target);
  457. param->sample_reg = data->cur_target->sample_reg;
  458. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  459. /* command control */
  460. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  461. AUTOSCSI_START |
  462. AUTO_MSGIN_00_OR_04 |
  463. AUTO_MSGIN_02 |
  464. AUTO_ATN );
  465. /* transfer control */
  466. s = 0;
  467. switch (data->trans_method) {
  468. case NSP32_TRANSFER_BUSMASTER:
  469. s |= BM_START;
  470. break;
  471. case NSP32_TRANSFER_MMIO:
  472. s |= CB_MMIO_MODE;
  473. break;
  474. case NSP32_TRANSFER_PIO:
  475. s |= CB_IO_MODE;
  476. break;
  477. default:
  478. nsp32_msg(KERN_ERR, "unknown trans_method");
  479. break;
  480. }
  481. /*
  482. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  483. * For bus master transfer, it's taken off.
  484. */
  485. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  486. param->transfer_control = cpu_to_le16(s);
  487. /* sg table addr */
  488. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  489. /*
  490. * transfer parameter to ASIC
  491. */
  492. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  493. nsp32_write2(base, COMMAND_CONTROL,
  494. CLEAR_CDB_FIFO_POINTER | AUTO_PARAMETER );
  495. /*
  496. * Check arbitration
  497. */
  498. ret = nsp32_arbitration(SCpnt, base);
  499. return ret;
  500. }
  501. /*
  502. * Selection with AUTO SCSI (without AUTO PARAMETER)
  503. */
  504. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  505. {
  506. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  507. unsigned int base = SCpnt->device->host->io_port;
  508. unsigned int host_id = SCpnt->device->host->this_id;
  509. unsigned char target = scmd_id(SCpnt);
  510. unsigned char phase;
  511. int status;
  512. unsigned short command = 0;
  513. unsigned int msgout = 0;
  514. int i;
  515. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  516. /*
  517. * IRQ disable
  518. */
  519. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  520. /*
  521. * check bus line
  522. */
  523. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  524. if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
  525. nsp32_msg(KERN_WARNING, "bus busy");
  526. SCpnt->result = DID_BUS_BUSY << 16;
  527. status = 1;
  528. goto out;
  529. }
  530. /*
  531. * clear execph
  532. */
  533. nsp32_read2(base, SCSI_EXECUTE_PHASE);
  534. /*
  535. * clear FIFO counter to set CDBs
  536. */
  537. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  538. /*
  539. * set CDB0 - CDB15
  540. */
  541. for (i = 0; i < SCpnt->cmd_len; i++) {
  542. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  543. }
  544. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  545. /*
  546. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  547. */
  548. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID,
  549. BIT(host_id) | BIT(target));
  550. /*
  551. * set SCSI MSGOUT REG
  552. *
  553. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  554. * over 3 messages needs another routine.
  555. */
  556. if (data->msgout_len == 0) {
  557. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  558. SCpnt->result = DID_ERROR << 16;
  559. status = 1;
  560. goto out;
  561. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  562. msgout = 0;
  563. for (i = 0; i < data->msgout_len; i++) {
  564. /*
  565. * the sending order of the message is:
  566. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  567. * MCNT 2: MSG#1 -> MSG#2
  568. * MCNT 1: MSG#2
  569. */
  570. msgout >>= 8;
  571. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  572. }
  573. msgout |= MV_VALID; /* MV valid */
  574. msgout |= (unsigned int)data->msgout_len; /* len */
  575. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  576. } else {
  577. /* data->msgout_len > 3 */
  578. nsp32_write4(base, SCSI_MSG_OUT, 0);
  579. }
  580. /*
  581. * set selection timeout(= 250ms)
  582. */
  583. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  584. /*
  585. * set SREQ hazard killer sampling rate
  586. *
  587. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  588. * check other internal clock!
  589. */
  590. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  591. /*
  592. * clear Arbit
  593. */
  594. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  595. /*
  596. * set SYNCREG
  597. * Don't set BM_START_ADR before setting this register.
  598. */
  599. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  600. /*
  601. * set ACKWIDTH
  602. */
  603. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  604. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  605. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  606. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  607. nsp32_read4(base, SGT_ADR),
  608. nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  609. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  610. data->msgout_len, msgout);
  611. /*
  612. * set SGT ADDR (physical address)
  613. */
  614. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  615. /*
  616. * set TRANSFER CONTROL REG
  617. */
  618. command = 0;
  619. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  620. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  621. if (scsi_bufflen(SCpnt) > 0) {
  622. command |= BM_START;
  623. }
  624. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  625. command |= CB_MMIO_MODE;
  626. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  627. command |= CB_IO_MODE;
  628. }
  629. nsp32_write2(base, TRANSFER_CONTROL, command);
  630. /*
  631. * start AUTO SCSI, kick off arbitration
  632. */
  633. command = (CLEAR_CDB_FIFO_POINTER |
  634. AUTOSCSI_START |
  635. AUTO_MSGIN_00_OR_04 |
  636. AUTO_MSGIN_02 |
  637. AUTO_ATN);
  638. nsp32_write2(base, COMMAND_CONTROL, command);
  639. /*
  640. * Check arbitration
  641. */
  642. status = nsp32_arbitration(SCpnt, base);
  643. out:
  644. /*
  645. * IRQ enable
  646. */
  647. nsp32_write2(base, IRQ_CONTROL, 0);
  648. return status;
  649. }
  650. /*
  651. * Arbitration Status Check
  652. *
  653. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  654. * Using udelay(1) consumes CPU time and system time, but
  655. * arbitration delay time is defined minimal 2.4us in SCSI
  656. * specification, thus udelay works as coarse grained wait timer.
  657. */
  658. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  659. {
  660. unsigned char arbit;
  661. int status = TRUE;
  662. int time = 0;
  663. do {
  664. arbit = nsp32_read1(base, ARBIT_STATUS);
  665. time++;
  666. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  667. (time <= ARBIT_TIMEOUT_TIME));
  668. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  669. "arbit: 0x%x, delay time: %d", arbit, time);
  670. if (arbit & ARBIT_WIN) {
  671. /* Arbitration succeeded */
  672. SCpnt->result = DID_OK << 16;
  673. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  674. } else if (arbit & ARBIT_FAIL) {
  675. /* Arbitration failed */
  676. SCpnt->result = DID_BUS_BUSY << 16;
  677. status = FALSE;
  678. } else {
  679. /*
  680. * unknown error or ARBIT_GO timeout,
  681. * something lock up! guess no connection.
  682. */
  683. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  684. SCpnt->result = DID_NO_CONNECT << 16;
  685. status = FALSE;
  686. }
  687. /*
  688. * clear Arbit
  689. */
  690. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  691. return status;
  692. }
  693. /*
  694. * reselection
  695. *
  696. * Note: This reselection routine is called from msgin_occur,
  697. * reselection target id&lun must be already set.
  698. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  699. */
  700. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  701. {
  702. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  703. unsigned int host_id = SCpnt->device->host->this_id;
  704. unsigned int base = SCpnt->device->host->io_port;
  705. unsigned char tmpid, newid;
  706. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  707. /*
  708. * calculate reselected SCSI ID
  709. */
  710. tmpid = nsp32_read1(base, RESELECT_ID);
  711. tmpid &= (~BIT(host_id));
  712. newid = 0;
  713. while (tmpid) {
  714. if (tmpid & 1) {
  715. break;
  716. }
  717. tmpid >>= 1;
  718. newid++;
  719. }
  720. /*
  721. * If reselected New ID:LUN is not existed
  722. * or current nexus is not existed, unexpected
  723. * reselection is occurred. Send reject message.
  724. */
  725. if (newid >= ARRAY_SIZE(data->lunt) ||
  726. newlun >= ARRAY_SIZE(data->lunt[0])) {
  727. nsp32_msg(KERN_WARNING, "unknown id/lun");
  728. return FALSE;
  729. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  730. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  731. return FALSE;
  732. }
  733. data->cur_id = newid;
  734. data->cur_lun = newlun;
  735. data->cur_target = &(data->target[newid]);
  736. data->cur_lunt = &(data->lunt[newid][newlun]);
  737. /* reset SACK/SavedACK counter (or ALL clear?) */
  738. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  739. return TRUE;
  740. }
  741. /*
  742. * nsp32_setup_sg_table - build scatter gather list for transfer data
  743. * with bus master.
  744. *
  745. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  746. */
  747. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  748. {
  749. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  750. struct scatterlist *sg;
  751. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  752. int num, i;
  753. u32_le l;
  754. if (sgt == NULL) {
  755. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  756. return FALSE;
  757. }
  758. num = scsi_dma_map(SCpnt);
  759. if (!num)
  760. return TRUE;
  761. else if (num < 0)
  762. return FALSE;
  763. else {
  764. scsi_for_each_sg(SCpnt, sg, num, i) {
  765. /*
  766. * Build nsp32_sglist, substitute sg dma addresses.
  767. */
  768. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  769. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  770. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  771. nsp32_msg(KERN_ERR,
  772. "can't transfer over 64KB at a time, "
  773. "size=0x%x", le32_to_cpu(sgt[i].len));
  774. return FALSE;
  775. }
  776. nsp32_dbg(NSP32_DEBUG_SGLIST,
  777. "num 0x%x : addr 0x%lx len 0x%lx",
  778. i,
  779. le32_to_cpu(sgt[i].addr),
  780. le32_to_cpu(sgt[i].len ));
  781. }
  782. /* set end mark */
  783. l = le32_to_cpu(sgt[num-1].len);
  784. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  785. }
  786. return TRUE;
  787. }
  788. static enum scsi_qc_status nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt)
  789. {
  790. void (*done)(struct scsi_cmnd *) = scsi_done;
  791. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  792. nsp32_target *target;
  793. nsp32_lunt *cur_lunt;
  794. int ret;
  795. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  796. "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
  797. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  798. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0],
  799. SCpnt->cmd_len, scsi_sg_count(SCpnt), scsi_sglist(SCpnt),
  800. scsi_bufflen(SCpnt));
  801. if (data->CurrentSC != NULL) {
  802. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  803. data->CurrentSC = NULL;
  804. SCpnt->result = DID_NO_CONNECT << 16;
  805. done(SCpnt);
  806. return 0;
  807. }
  808. /* check target ID is not same as this initiator ID */
  809. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  810. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
  811. SCpnt->result = DID_BAD_TARGET << 16;
  812. done(SCpnt);
  813. return 0;
  814. }
  815. /* check target LUN is allowable value */
  816. if (SCpnt->device->lun >= MAX_LUN) {
  817. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  818. SCpnt->result = DID_BAD_TARGET << 16;
  819. done(SCpnt);
  820. return 0;
  821. }
  822. show_command(SCpnt);
  823. data->CurrentSC = SCpnt;
  824. nsp32_priv(SCpnt)->status = SAM_STAT_CHECK_CONDITION;
  825. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  826. /* initialize data */
  827. data->msgout_len = 0;
  828. data->msgin_len = 0;
  829. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  830. cur_lunt->SCpnt = SCpnt;
  831. cur_lunt->save_datp = 0;
  832. cur_lunt->msgin03 = FALSE;
  833. data->cur_lunt = cur_lunt;
  834. data->cur_id = SCpnt->device->id;
  835. data->cur_lun = SCpnt->device->lun;
  836. ret = nsp32_setup_sg_table(SCpnt);
  837. if (ret == FALSE) {
  838. nsp32_msg(KERN_ERR, "SGT fail");
  839. SCpnt->result = DID_ERROR << 16;
  840. nsp32_scsi_done(SCpnt);
  841. return 0;
  842. }
  843. /* Build IDENTIFY */
  844. nsp32_build_identify(SCpnt);
  845. /*
  846. * If target is the first time to transfer after the reset
  847. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  848. * message SDTR is needed to do synchronous transfer.
  849. */
  850. target = &data->target[scmd_id(SCpnt)];
  851. data->cur_target = target;
  852. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  853. unsigned char period, offset;
  854. if (trans_mode != ASYNC_MODE) {
  855. nsp32_set_max_sync(data, target, &period, &offset);
  856. nsp32_build_sdtr(SCpnt, period, offset);
  857. target->sync_flag |= SDTR_INITIATOR;
  858. } else {
  859. nsp32_set_async(data, target);
  860. target->sync_flag |= SDTR_DONE;
  861. }
  862. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  863. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  864. target->limit_entry, period, offset);
  865. } else if (target->sync_flag & SDTR_INITIATOR) {
  866. /*
  867. * It was negotiating SDTR with target, sending from the
  868. * initiator, but there are no chance to remove this flag.
  869. * Set async because we don't get proper negotiation.
  870. */
  871. nsp32_set_async(data, target);
  872. target->sync_flag &= ~SDTR_INITIATOR;
  873. target->sync_flag |= SDTR_DONE;
  874. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  875. "SDTR_INITIATOR: fall back to async");
  876. } else if (target->sync_flag & SDTR_TARGET) {
  877. /*
  878. * It was negotiating SDTR with target, sending from target,
  879. * but there are no chance to remove this flag. Set async
  880. * because we don't get proper negotiation.
  881. */
  882. nsp32_set_async(data, target);
  883. target->sync_flag &= ~SDTR_TARGET;
  884. target->sync_flag |= SDTR_DONE;
  885. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  886. "Unknown SDTR from target is reached, fall back to async.");
  887. }
  888. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  889. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  890. SCpnt->device->id, target->sync_flag, target->syncreg,
  891. target->ackwidth);
  892. /* Selection */
  893. if (auto_param == 0) {
  894. ret = nsp32_selection_autopara(SCpnt);
  895. } else {
  896. ret = nsp32_selection_autoscsi(SCpnt);
  897. }
  898. if (ret != TRUE) {
  899. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  900. nsp32_scsi_done(SCpnt);
  901. }
  902. return 0;
  903. }
  904. static DEF_SCSI_QCMD(nsp32_queuecommand)
  905. /* initialize asic */
  906. static int nsp32hw_init(nsp32_hw_data *data)
  907. {
  908. unsigned int base = data->BaseAddress;
  909. unsigned short irq_stat;
  910. unsigned long lc_reg;
  911. unsigned char power;
  912. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  913. if ((lc_reg & 0xff00) == 0) {
  914. lc_reg |= (0x20 << 8);
  915. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  916. }
  917. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  918. nsp32_write2(base, TRANSFER_CONTROL, 0);
  919. nsp32_write4(base, BM_CNT, 0);
  920. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  921. do {
  922. irq_stat = nsp32_read2(base, IRQ_STATUS);
  923. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  924. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  925. /*
  926. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  927. * designated by specification.
  928. */
  929. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  930. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  931. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  932. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  933. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  934. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  935. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  936. } else {
  937. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  938. }
  939. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  940. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  941. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  942. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  943. nsp32_index_write1(base, BM_CYCLE,
  944. MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  945. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  946. /*
  947. * initialize MISC_WRRD register
  948. *
  949. * Note: Designated parameters is obeyed as following:
  950. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  951. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  952. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  953. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  954. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  955. * MISC_DELAYED_BMSTART: It's selected for safety.
  956. *
  957. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  958. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  959. * appropriate value before restarting bus master transfer.
  960. */
  961. nsp32_index_write2(base, MISC_WR,
  962. (SCSI_DIRECTION_DETECTOR_SELECT |
  963. DELAYED_BMSTART |
  964. MASTER_TERMINATION_SELECT |
  965. BMREQ_NEGATE_TIMING_SEL |
  966. AUTOSEL_TIMING_SEL |
  967. BMSTOP_CHANGE2_NONDATA_PHASE));
  968. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  969. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  970. if (!(power & SENSE)) {
  971. nsp32_msg(KERN_INFO, "term power on");
  972. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  973. }
  974. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  975. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  976. nsp32_write1(base, SYNC_REG, 0);
  977. nsp32_write1(base, ACK_WIDTH, 0);
  978. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  979. /*
  980. * enable to select designated IRQ (except for
  981. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  982. */
  983. nsp32_index_write2(base, IRQ_SELECT,
  984. IRQSELECT_TIMER_IRQ |
  985. IRQSELECT_SCSIRESET_IRQ |
  986. IRQSELECT_FIFO_SHLD_IRQ |
  987. IRQSELECT_RESELECT_IRQ |
  988. IRQSELECT_PHASE_CHANGE_IRQ |
  989. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  990. // IRQSELECT_BMCNTERR_IRQ |
  991. IRQSELECT_TARGET_ABORT_IRQ |
  992. IRQSELECT_MASTER_ABORT_IRQ );
  993. nsp32_write2(base, IRQ_CONTROL, 0);
  994. /* PCI LED off */
  995. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  996. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  997. return TRUE;
  998. }
  999. /* interrupt routine */
  1000. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1001. {
  1002. nsp32_hw_data *data = dev_id;
  1003. unsigned int base = data->BaseAddress;
  1004. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1005. unsigned short auto_stat, irq_stat, trans_stat;
  1006. unsigned char busmon, busphase;
  1007. unsigned long flags;
  1008. int ret;
  1009. int handled = 0;
  1010. struct Scsi_Host *host = data->Host;
  1011. spin_lock_irqsave(host->host_lock, flags);
  1012. /*
  1013. * IRQ check, then enable IRQ mask
  1014. */
  1015. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1016. nsp32_dbg(NSP32_DEBUG_INTR,
  1017. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1018. /* is this interrupt comes from Ninja asic? */
  1019. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1020. nsp32_dbg(NSP32_DEBUG_INTR,
  1021. "shared interrupt: irq other 0x%x", irq_stat);
  1022. goto out2;
  1023. }
  1024. handled = 1;
  1025. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1026. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1027. busphase = busmon & BUSMON_PHASE_MASK;
  1028. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1029. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1030. nsp32_msg(KERN_INFO, "card disconnect");
  1031. if (data->CurrentSC != NULL) {
  1032. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1033. SCpnt->result = DID_BAD_TARGET << 16;
  1034. nsp32_scsi_done(SCpnt);
  1035. }
  1036. goto out;
  1037. }
  1038. /* Timer IRQ */
  1039. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1040. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1041. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1042. goto out;
  1043. }
  1044. /* SCSI reset */
  1045. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1046. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1047. nsp32_do_bus_reset(data);
  1048. if (SCpnt != NULL) {
  1049. SCpnt->result = DID_RESET << 16;
  1050. nsp32_scsi_done(SCpnt);
  1051. }
  1052. goto out;
  1053. }
  1054. if (SCpnt == NULL) {
  1055. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1056. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x",
  1057. irq_stat, trans_stat);
  1058. goto out;
  1059. }
  1060. /*
  1061. * AutoSCSI Interrupt.
  1062. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1063. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1064. * recorded when AutoSCSI sequencer has been processed.
  1065. */
  1066. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1067. /* getting SCSI executed phase */
  1068. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1069. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1070. /* Selection Timeout, go busfree phase. */
  1071. if (auto_stat & SELECTION_TIMEOUT) {
  1072. nsp32_dbg(NSP32_DEBUG_INTR,
  1073. "selection timeout occurred");
  1074. SCpnt->result = DID_TIME_OUT << 16;
  1075. nsp32_scsi_done(SCpnt);
  1076. goto out;
  1077. }
  1078. if (auto_stat & MSGOUT_PHASE) {
  1079. /*
  1080. * MsgOut phase was processed.
  1081. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1082. * completed. Thus, msgout_len must reset. Otherwise,
  1083. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1084. * then we will encounter the condition and check.
  1085. */
  1086. if (!(auto_stat & MSG_IN_OCCUER) &&
  1087. (data->msgout_len <= 3)) {
  1088. /*
  1089. * !MSG_IN_OCCUER && msgout_len <=3
  1090. * ---> AutoSCSI with MSGOUTreg is processed.
  1091. */
  1092. data->msgout_len = 0;
  1093. }
  1094. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1095. }
  1096. if ((auto_stat & DATA_IN_PHASE) &&
  1097. (scsi_get_resid(SCpnt) > 0) &&
  1098. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1099. printk( "auto+fifo\n");
  1100. //nsp32_pio_read(SCpnt);
  1101. }
  1102. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1103. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1104. nsp32_dbg(NSP32_DEBUG_INTR,
  1105. "Data in/out phase processed");
  1106. /* read BMCNT, SGT pointer addr */
  1107. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1108. nsp32_read4(base, BM_CNT));
  1109. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1110. nsp32_read4(base, SGT_ADR));
  1111. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1112. nsp32_read4(base, SACK_CNT));
  1113. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1114. nsp32_read4(base, SAVED_SACK_CNT));
  1115. scsi_set_resid(SCpnt, 0); /* all data transferred! */
  1116. }
  1117. /*
  1118. * MsgIn Occur
  1119. */
  1120. if (auto_stat & MSG_IN_OCCUER) {
  1121. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1122. }
  1123. /*
  1124. * MsgOut Occur
  1125. */
  1126. if (auto_stat & MSG_OUT_OCCUER) {
  1127. nsp32_msgout_occur(SCpnt);
  1128. }
  1129. /*
  1130. * Bus Free Occur
  1131. */
  1132. if (auto_stat & BUS_FREE_OCCUER) {
  1133. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1134. if (ret == TRUE) {
  1135. goto out;
  1136. }
  1137. }
  1138. if (auto_stat & STATUS_PHASE) {
  1139. /*
  1140. * Read CSB and substitute CSB for SCpnt->result
  1141. * to save status phase stutas byte.
  1142. * scsi error handler checks host_byte (DID_*:
  1143. * low level driver to indicate status), then checks
  1144. * status_byte (SCSI status byte).
  1145. */
  1146. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1147. }
  1148. if (auto_stat & ILLEGAL_PHASE) {
  1149. /* Illegal phase is detected. SACK is not back. */
  1150. nsp32_msg(KERN_WARNING,
  1151. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1152. /* TODO: currently we don't have any action... bus reset? */
  1153. /*
  1154. * To send back SACK, assert, wait, and negate.
  1155. */
  1156. nsp32_sack_assert(data);
  1157. nsp32_wait_req(data, NEGATE);
  1158. nsp32_sack_negate(data);
  1159. }
  1160. if (auto_stat & COMMAND_PHASE) {
  1161. /* nothing to do */
  1162. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1163. }
  1164. if (auto_stat & AUTOSCSI_BUSY) {
  1165. /* AutoSCSI is running */
  1166. }
  1167. show_autophase(auto_stat);
  1168. }
  1169. /* FIFO_SHLD_IRQ */
  1170. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1171. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1172. switch(busphase) {
  1173. case BUSPHASE_DATA_OUT:
  1174. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1175. //nsp32_pio_write(SCpnt);
  1176. break;
  1177. case BUSPHASE_DATA_IN:
  1178. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1179. //nsp32_pio_read(SCpnt);
  1180. break;
  1181. case BUSPHASE_STATUS:
  1182. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1183. nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
  1184. break;
  1185. default:
  1186. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1187. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x",
  1188. irq_stat, trans_stat);
  1189. show_busphase(busphase);
  1190. break;
  1191. }
  1192. goto out;
  1193. }
  1194. /* Phase Change IRQ */
  1195. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1196. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1197. switch(busphase) {
  1198. case BUSPHASE_MESSAGE_IN:
  1199. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1200. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1201. break;
  1202. default:
  1203. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1204. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1205. irq_stat, trans_stat);
  1206. show_busphase(busphase);
  1207. break;
  1208. }
  1209. goto out;
  1210. }
  1211. /* PCI_IRQ */
  1212. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1213. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1214. /* Do nothing */
  1215. }
  1216. /* BMCNTERR_IRQ */
  1217. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1218. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1219. /*
  1220. * TODO: To be implemented improving bus master
  1221. * transfer reliability when BMCNTERR is occurred in
  1222. * AutoSCSI phase described in specification.
  1223. */
  1224. }
  1225. #if 0
  1226. nsp32_dbg(NSP32_DEBUG_INTR,
  1227. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1228. show_busphase(busphase);
  1229. #endif
  1230. out:
  1231. /* disable IRQ mask */
  1232. nsp32_write2(base, IRQ_CONTROL, 0);
  1233. out2:
  1234. spin_unlock_irqrestore(host->host_lock, flags);
  1235. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1236. return IRQ_RETVAL(handled);
  1237. }
  1238. static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
  1239. {
  1240. unsigned long flags;
  1241. nsp32_hw_data *data;
  1242. int hostno;
  1243. unsigned int base;
  1244. unsigned char mode_reg;
  1245. int id, speed;
  1246. long model;
  1247. hostno = host->host_no;
  1248. data = (nsp32_hw_data *)host->hostdata;
  1249. base = host->io_port;
  1250. seq_puts(m, "NinjaSCSI-32 status\n\n");
  1251. seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n",
  1252. nsp32_release_version);
  1253. seq_printf(m, "SCSI host No.: %d\n", hostno);
  1254. seq_printf(m, "IRQ: %d\n", host->irq);
  1255. seq_printf(m, "IO: 0x%lx-0x%lx\n",
  1256. host->io_port, host->io_port + host->n_io_port - 1);
  1257. seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n",
  1258. host->base, host->base + data->MmioLength - 1);
  1259. seq_printf(m, "sg_tablesize: %d\n",
  1260. host->sg_tablesize);
  1261. seq_printf(m, "Chip revision: 0x%x\n",
  1262. (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1263. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1264. model = data->pci_devid->driver_data;
  1265. #ifdef CONFIG_PM
  1266. seq_printf(m, "Power Management: %s\n",
  1267. (mode_reg & OPTF) ? "yes" : "no");
  1268. #endif
  1269. seq_printf(m, "OEM: %ld, %s\n",
  1270. (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1271. spin_lock_irqsave(&(data->Lock), flags);
  1272. seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
  1273. spin_unlock_irqrestore(&(data->Lock), flags);
  1274. seq_puts(m, "SDTR status\n");
  1275. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1276. seq_printf(m, "id %d: ", id);
  1277. if (id == host->this_id) {
  1278. seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
  1279. continue;
  1280. }
  1281. if (data->target[id].sync_flag == SDTR_DONE) {
  1282. if (data->target[id].period == 0 &&
  1283. data->target[id].offset == ASYNC_OFFSET ) {
  1284. seq_puts(m, "async");
  1285. } else {
  1286. seq_puts(m, " sync");
  1287. }
  1288. } else {
  1289. seq_puts(m, " none");
  1290. }
  1291. if (data->target[id].period != 0) {
  1292. speed = 1000000 / (data->target[id].period * 4);
  1293. seq_printf(m, " transfer %d.%dMB/s, offset %d",
  1294. speed / 1000,
  1295. speed % 1000,
  1296. data->target[id].offset
  1297. );
  1298. }
  1299. seq_putc(m, '\n');
  1300. }
  1301. return 0;
  1302. }
  1303. /*
  1304. * Reset parameters and call scsi_done for data->cur_lunt.
  1305. * Be careful setting SCpnt->result = DID_* before calling this function.
  1306. */
  1307. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1308. {
  1309. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1310. unsigned int base = SCpnt->device->host->io_port;
  1311. scsi_dma_unmap(SCpnt);
  1312. /*
  1313. * clear TRANSFERCONTROL_BM_START
  1314. */
  1315. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1316. nsp32_write4(base, BM_CNT, 0);
  1317. /*
  1318. * call scsi_done
  1319. */
  1320. scsi_done(SCpnt);
  1321. /*
  1322. * reset parameters
  1323. */
  1324. data->cur_lunt->SCpnt = NULL;
  1325. data->cur_lunt = NULL;
  1326. data->cur_target = NULL;
  1327. data->CurrentSC = NULL;
  1328. }
  1329. /*
  1330. * Bus Free Occur
  1331. *
  1332. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1333. * with ACK reply when below condition is matched:
  1334. * MsgIn 00: Command Complete.
  1335. * MsgIn 02: Save Data Pointer.
  1336. * MsgIn 04: Disconnect.
  1337. * In other case, unexpected BUSFREE is detected.
  1338. */
  1339. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1340. {
  1341. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1342. unsigned int base = SCpnt->device->host->io_port;
  1343. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1344. show_autophase(execph);
  1345. nsp32_write4(base, BM_CNT, 0);
  1346. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1347. /*
  1348. * MsgIn 02: Save Data Pointer
  1349. *
  1350. * VALID:
  1351. * Save Data Pointer is received. Adjust pointer.
  1352. *
  1353. * NO-VALID:
  1354. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1355. * processing and we can't adjust any SCSI data pointer in next data
  1356. * phase.
  1357. */
  1358. if (execph & MSGIN_02_VALID) {
  1359. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1360. /*
  1361. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1362. * needed.
  1363. */
  1364. if (!(execph & MSGIN_00_VALID) &&
  1365. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1366. unsigned int sacklen, s_sacklen;
  1367. /*
  1368. * Read SACK count and SAVEDSACK count, then compare.
  1369. */
  1370. sacklen = nsp32_read4(base, SACK_CNT );
  1371. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1372. /*
  1373. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1374. * come after data transferring.
  1375. */
  1376. if (s_sacklen > 0) {
  1377. /*
  1378. * Comparing between sack and savedsack to
  1379. * check the condition of AutoMsgIn03.
  1380. *
  1381. * If they are same, set msgin03 == TRUE,
  1382. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1383. * reselection. On the other hand, if they
  1384. * aren't same, set msgin03 == FALSE, and
  1385. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1386. * reselection.
  1387. */
  1388. if (sacklen != s_sacklen) {
  1389. data->cur_lunt->msgin03 = FALSE;
  1390. } else {
  1391. data->cur_lunt->msgin03 = TRUE;
  1392. }
  1393. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1394. }
  1395. }
  1396. /* This value has not substitude with valid value yet... */
  1397. //data->cur_lunt->save_datp = data->cur_datp;
  1398. } else {
  1399. /*
  1400. * no processing.
  1401. */
  1402. }
  1403. if (execph & MSGIN_03_VALID) {
  1404. /* MsgIn03 was valid to be processed. No need processing. */
  1405. }
  1406. /*
  1407. * target SDTR check
  1408. */
  1409. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1410. /*
  1411. * SDTR negotiation pulled by the initiator has not
  1412. * finished yet. Fall back to ASYNC mode.
  1413. */
  1414. nsp32_set_async(data, data->cur_target);
  1415. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1416. data->cur_target->sync_flag |= SDTR_DONE;
  1417. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1418. /*
  1419. * SDTR negotiation pulled by the target has been
  1420. * negotiating.
  1421. */
  1422. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1423. /*
  1424. * If valid message is received, then
  1425. * negotiation is succeeded.
  1426. */
  1427. } else {
  1428. /*
  1429. * On the contrary, if unexpected bus free is
  1430. * occurred, then negotiation is failed. Fall
  1431. * back to ASYNC mode.
  1432. */
  1433. nsp32_set_async(data, data->cur_target);
  1434. }
  1435. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1436. data->cur_target->sync_flag |= SDTR_DONE;
  1437. }
  1438. /*
  1439. * It is always ensured by SCSI standard that initiator
  1440. * switches into Bus Free Phase after
  1441. * receiving message 00 (Command Complete), 04 (Disconnect).
  1442. * It's the reason that processing here is valid.
  1443. */
  1444. if (execph & MSGIN_00_VALID) {
  1445. /* MsgIn 00: Command Complete */
  1446. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1447. nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
  1448. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1449. "normal end stat=0x%x resid=0x%x\n",
  1450. nsp32_priv(SCpnt)->status, scsi_get_resid(SCpnt));
  1451. SCpnt->result = (DID_OK << 16) |
  1452. (nsp32_priv(SCpnt)->status << 0);
  1453. nsp32_scsi_done(SCpnt);
  1454. /* All operation is done */
  1455. return TRUE;
  1456. } else if (execph & MSGIN_04_VALID) {
  1457. /* MsgIn 04: Disconnect */
  1458. nsp32_priv(SCpnt)->status = nsp32_read1(base, SCSI_CSB_IN);
  1459. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1460. return TRUE;
  1461. } else {
  1462. /* Unexpected bus free */
  1463. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1464. SCpnt->result = DID_ERROR << 16;
  1465. nsp32_scsi_done(SCpnt);
  1466. return TRUE;
  1467. }
  1468. return FALSE;
  1469. }
  1470. /*
  1471. * nsp32_adjust_busfree - adjusting SG table
  1472. *
  1473. * Note: This driver adjust the SG table using SCSI ACK
  1474. * counter instead of BMCNT counter!
  1475. */
  1476. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1477. {
  1478. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1479. int old_entry = data->cur_entry;
  1480. int new_entry;
  1481. int sg_num = data->cur_lunt->sg_num;
  1482. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1483. unsigned int restlen, sentlen;
  1484. u32_le len, addr;
  1485. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1486. /* adjust saved SACK count with 4 byte start address boundary */
  1487. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1488. /*
  1489. * calculate new_entry from sack count and each sgt[].len
  1490. * calculate the byte which is intent to send
  1491. */
  1492. sentlen = 0;
  1493. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1494. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1495. if (sentlen > s_sacklen) {
  1496. break;
  1497. }
  1498. }
  1499. /* all sgt is processed */
  1500. if (new_entry == sg_num) {
  1501. goto last;
  1502. }
  1503. if (sentlen == s_sacklen) {
  1504. /* XXX: confirm it's ok or not */
  1505. /* In this case, it's ok because we are at
  1506. * the head element of the sg. restlen is correctly
  1507. * calculated.
  1508. */
  1509. }
  1510. /* calculate the rest length for transferring */
  1511. restlen = sentlen - s_sacklen;
  1512. /* update adjusting current SG table entry */
  1513. len = le32_to_cpu(sgt[new_entry].len);
  1514. addr = le32_to_cpu(sgt[new_entry].addr);
  1515. addr += (len - restlen);
  1516. sgt[new_entry].addr = cpu_to_le32(addr);
  1517. sgt[new_entry].len = cpu_to_le32(restlen);
  1518. /* set cur_entry with new_entry */
  1519. data->cur_entry = new_entry;
  1520. return;
  1521. last:
  1522. if (scsi_get_resid(SCpnt) < sentlen) {
  1523. nsp32_msg(KERN_ERR, "resid underflow");
  1524. }
  1525. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1526. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1527. /* update hostdata and lun */
  1528. return;
  1529. }
  1530. /*
  1531. * It's called MsgOut phase occur.
  1532. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1533. * message out phase. It, however, has more than 3 messages,
  1534. * HBA creates the interrupt and we have to process by hand.
  1535. */
  1536. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1537. {
  1538. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1539. unsigned int base = SCpnt->device->host->io_port;
  1540. int i;
  1541. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1542. "enter: msgout_len: 0x%x", data->msgout_len);
  1543. /*
  1544. * If MsgOut phase is occurred without having any
  1545. * message, then No_Operation is sent (SCSI-2).
  1546. */
  1547. if (data->msgout_len == 0) {
  1548. nsp32_build_nop(SCpnt);
  1549. }
  1550. /*
  1551. * send messages
  1552. */
  1553. for (i = 0; i < data->msgout_len; i++) {
  1554. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1555. "%d : 0x%x", i, data->msgoutbuf[i]);
  1556. /*
  1557. * Check REQ is asserted.
  1558. */
  1559. nsp32_wait_req(data, ASSERT);
  1560. if (i == (data->msgout_len - 1)) {
  1561. /*
  1562. * If the last message, set the AutoSCSI restart
  1563. * before send back the ack message. AutoSCSI
  1564. * restart automatically negate ATN signal.
  1565. */
  1566. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1567. //nsp32_restart_autoscsi(SCpnt, command);
  1568. nsp32_write2(base, COMMAND_CONTROL,
  1569. (CLEAR_CDB_FIFO_POINTER |
  1570. AUTO_COMMAND_PHASE |
  1571. AUTOSCSI_RESTART |
  1572. AUTO_MSGIN_00_OR_04 |
  1573. AUTO_MSGIN_02 ));
  1574. }
  1575. /*
  1576. * Write data with SACK, then wait sack is
  1577. * automatically negated.
  1578. */
  1579. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1580. nsp32_wait_sack(data, NEGATE);
  1581. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1582. nsp32_read1(base, SCSI_BUS_MONITOR));
  1583. }
  1584. data->msgout_len = 0;
  1585. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1586. }
  1587. /*
  1588. * Restart AutoSCSI
  1589. *
  1590. * Note: Restarting AutoSCSI needs set:
  1591. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1592. */
  1593. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1594. {
  1595. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1596. unsigned int base = data->BaseAddress;
  1597. unsigned short transfer = 0;
  1598. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1599. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1600. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1601. }
  1602. /*
  1603. * set SYNC_REG
  1604. * Don't set BM_START_ADR before setting this register.
  1605. */
  1606. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1607. /*
  1608. * set ACKWIDTH
  1609. */
  1610. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1611. /*
  1612. * set SREQ hazard killer sampling rate
  1613. */
  1614. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1615. /*
  1616. * set SGT ADDR (physical address)
  1617. */
  1618. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1619. /*
  1620. * set TRANSFER CONTROL REG
  1621. */
  1622. transfer = 0;
  1623. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1624. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1625. if (scsi_bufflen(SCpnt) > 0) {
  1626. transfer |= BM_START;
  1627. }
  1628. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1629. transfer |= CB_MMIO_MODE;
  1630. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1631. transfer |= CB_IO_MODE;
  1632. }
  1633. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1634. /*
  1635. * restart AutoSCSI
  1636. *
  1637. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1638. */
  1639. command |= (CLEAR_CDB_FIFO_POINTER |
  1640. AUTO_COMMAND_PHASE |
  1641. AUTOSCSI_RESTART );
  1642. nsp32_write2(base, COMMAND_CONTROL, command);
  1643. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1644. }
  1645. /*
  1646. * cannot run automatically message in occur
  1647. */
  1648. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1649. unsigned long irq_status,
  1650. unsigned short execph)
  1651. {
  1652. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1653. unsigned int base = SCpnt->device->host->io_port;
  1654. unsigned char msg;
  1655. unsigned char msgtype;
  1656. unsigned char newlun;
  1657. unsigned short command = 0;
  1658. int msgclear = TRUE;
  1659. long new_sgtp;
  1660. int ret;
  1661. /*
  1662. * read first message
  1663. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1664. * of Message-In have to be processed before sending back SCSI ACK.
  1665. */
  1666. msg = nsp32_read1(base, SCSI_DATA_IN);
  1667. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1668. msgtype = data->msginbuf[0];
  1669. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1670. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1671. data->msgin_len, msg, msgtype);
  1672. /*
  1673. * TODO: We need checking whether bus phase is message in?
  1674. */
  1675. /*
  1676. * assert SCSI ACK
  1677. */
  1678. nsp32_sack_assert(data);
  1679. /*
  1680. * processing IDENTIFY
  1681. */
  1682. if (msgtype & 0x80) {
  1683. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1684. /* Invalid (non reselect) phase */
  1685. goto reject;
  1686. }
  1687. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1688. ret = nsp32_reselection(SCpnt, newlun);
  1689. if (ret == TRUE) {
  1690. goto restart;
  1691. } else {
  1692. goto reject;
  1693. }
  1694. }
  1695. /*
  1696. * processing messages except for IDENTIFY
  1697. *
  1698. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1699. */
  1700. switch (msgtype) {
  1701. /*
  1702. * 1-byte message
  1703. */
  1704. case COMMAND_COMPLETE:
  1705. case DISCONNECT:
  1706. /*
  1707. * These messages should not be occurred.
  1708. * They should be processed on AutoSCSI sequencer.
  1709. */
  1710. nsp32_msg(KERN_WARNING,
  1711. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1712. break;
  1713. case RESTORE_POINTERS:
  1714. /*
  1715. * AutoMsgIn03 is disabled, and HBA gets this message.
  1716. */
  1717. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1718. unsigned int s_sacklen;
  1719. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1720. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1721. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1722. } else {
  1723. /* No need to rewrite SGT */
  1724. }
  1725. }
  1726. data->cur_lunt->msgin03 = FALSE;
  1727. /* Update with the new value */
  1728. /* reset SACK/SavedACK counter (or ALL clear?) */
  1729. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1730. /*
  1731. * set new sg pointer
  1732. */
  1733. new_sgtp = data->cur_lunt->sglun_paddr +
  1734. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1735. nsp32_write4(base, SGT_ADR, new_sgtp);
  1736. break;
  1737. case SAVE_POINTERS:
  1738. /*
  1739. * These messages should not be occurred.
  1740. * They should be processed on AutoSCSI sequencer.
  1741. */
  1742. nsp32_msg (KERN_WARNING,
  1743. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1744. break;
  1745. case MESSAGE_REJECT:
  1746. /* If previous message_out is sending SDTR, and get
  1747. message_reject from target, SDTR negotiation is failed */
  1748. if (data->cur_target->sync_flag &
  1749. (SDTR_INITIATOR | SDTR_TARGET)) {
  1750. /*
  1751. * Current target is negotiating SDTR, but it's
  1752. * failed. Fall back to async transfer mode, and set
  1753. * SDTR_DONE.
  1754. */
  1755. nsp32_set_async(data, data->cur_target);
  1756. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1757. data->cur_target->sync_flag |= SDTR_DONE;
  1758. }
  1759. break;
  1760. case LINKED_CMD_COMPLETE:
  1761. case LINKED_FLG_CMD_COMPLETE:
  1762. /* queue tag is not supported currently */
  1763. nsp32_msg (KERN_WARNING,
  1764. "unsupported message: 0x%x", msgtype);
  1765. break;
  1766. case INITIATE_RECOVERY:
  1767. /* staring ECA (Extended Contingent Allegiance) state. */
  1768. /* This message is declined in SPI2 or later. */
  1769. goto reject;
  1770. /*
  1771. * 2-byte message
  1772. */
  1773. case SIMPLE_QUEUE_TAG:
  1774. case 0x23:
  1775. /*
  1776. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1777. * No support is needed.
  1778. */
  1779. if (data->msgin_len >= 1) {
  1780. goto reject;
  1781. }
  1782. /* current position is 1-byte of 2 byte */
  1783. msgclear = FALSE;
  1784. break;
  1785. /*
  1786. * extended message
  1787. */
  1788. case EXTENDED_MESSAGE:
  1789. if (data->msgin_len < 1) {
  1790. /*
  1791. * Current position does not reach 2-byte
  1792. * (2-byte is extended message length).
  1793. */
  1794. msgclear = FALSE;
  1795. break;
  1796. }
  1797. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1798. /*
  1799. * Current extended message has msginbuf[1] + 2
  1800. * (msgin_len starts counting from 0, so buf[1] + 1).
  1801. * If current message position is not finished,
  1802. * continue receiving message.
  1803. */
  1804. msgclear = FALSE;
  1805. break;
  1806. }
  1807. /*
  1808. * Reach here means regular length of each type of
  1809. * extended messages.
  1810. */
  1811. switch (data->msginbuf[2]) {
  1812. case EXTENDED_MODIFY_DATA_POINTER:
  1813. /* TODO */
  1814. goto reject; /* not implemented yet */
  1815. break;
  1816. case EXTENDED_SDTR:
  1817. /*
  1818. * Exchange this message between initiator and target.
  1819. */
  1820. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1821. /*
  1822. * received inappropriate message.
  1823. */
  1824. goto reject;
  1825. break;
  1826. }
  1827. nsp32_analyze_sdtr(SCpnt);
  1828. break;
  1829. case EXTENDED_EXTENDED_IDENTIFY:
  1830. /* SCSI-I only, not supported. */
  1831. goto reject; /* not implemented yet */
  1832. break;
  1833. case EXTENDED_WDTR:
  1834. goto reject; /* not implemented yet */
  1835. break;
  1836. default:
  1837. goto reject;
  1838. }
  1839. break;
  1840. default:
  1841. goto reject;
  1842. }
  1843. restart:
  1844. if (msgclear == TRUE) {
  1845. data->msgin_len = 0;
  1846. /*
  1847. * If restarting AutoSCSI, but there are some message to out
  1848. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1849. * (MV_VALID = 0). When commandcontrol is written with
  1850. * AutoSCSI restart, at the same time MsgOutOccur should be
  1851. * happened (however, such situation is really possible...?).
  1852. */
  1853. if (data->msgout_len > 0) {
  1854. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1855. command |= AUTO_ATN;
  1856. }
  1857. /*
  1858. * restart AutoSCSI
  1859. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1860. */
  1861. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1862. /*
  1863. * If current msgin03 is TRUE, then flag on.
  1864. */
  1865. if (data->cur_lunt->msgin03 == TRUE) {
  1866. command |= AUTO_MSGIN_03;
  1867. }
  1868. data->cur_lunt->msgin03 = FALSE;
  1869. } else {
  1870. data->msgin_len++;
  1871. }
  1872. /*
  1873. * restart AutoSCSI
  1874. */
  1875. nsp32_restart_autoscsi(SCpnt, command);
  1876. /*
  1877. * wait SCSI REQ negate for REQ-ACK handshake
  1878. */
  1879. nsp32_wait_req(data, NEGATE);
  1880. /*
  1881. * negate SCSI ACK
  1882. */
  1883. nsp32_sack_negate(data);
  1884. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1885. return;
  1886. reject:
  1887. nsp32_msg(KERN_WARNING,
  1888. "invalid or unsupported MessageIn, rejected. "
  1889. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1890. msg, data->msgin_len, msgtype);
  1891. nsp32_build_reject(SCpnt);
  1892. data->msgin_len = 0;
  1893. goto restart;
  1894. }
  1895. /*
  1896. *
  1897. */
  1898. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1899. {
  1900. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1901. nsp32_target *target = data->cur_target;
  1902. unsigned char get_period = data->msginbuf[3];
  1903. unsigned char get_offset = data->msginbuf[4];
  1904. int entry;
  1905. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1906. /*
  1907. * If this inititor sent the SDTR message, then target responds SDTR,
  1908. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1909. * Messages are not appropriate, then send back reject message.
  1910. * If initiator did not send the SDTR, but target sends SDTR,
  1911. * initiator calculator the appropriate parameter and send back SDTR.
  1912. */
  1913. if (target->sync_flag & SDTR_INITIATOR) {
  1914. /*
  1915. * Initiator sent SDTR, the target responds and
  1916. * send back negotiation SDTR.
  1917. */
  1918. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1919. target->sync_flag &= ~SDTR_INITIATOR;
  1920. target->sync_flag |= SDTR_DONE;
  1921. /*
  1922. * offset:
  1923. */
  1924. if (get_offset > SYNC_OFFSET) {
  1925. /*
  1926. * Negotiation is failed, the target send back
  1927. * unexpected offset value.
  1928. */
  1929. goto reject;
  1930. }
  1931. if (get_offset == ASYNC_OFFSET) {
  1932. /*
  1933. * Negotiation is succeeded, the target want
  1934. * to fall back into asynchronous transfer mode.
  1935. */
  1936. goto async;
  1937. }
  1938. /*
  1939. * period:
  1940. * Check whether sync period is too short. If too short,
  1941. * fall back to async mode. If it's ok, then investigate
  1942. * the received sync period. If sync period is acceptable
  1943. * between sync table start_period and end_period, then
  1944. * set this I_T nexus as sent offset and period.
  1945. * If it's not acceptable, send back reject and fall back
  1946. * to async mode.
  1947. */
  1948. if (get_period < data->synct[0].period_num) {
  1949. /*
  1950. * Negotiation is failed, the target send back
  1951. * unexpected period value.
  1952. */
  1953. goto reject;
  1954. }
  1955. entry = nsp32_search_period_entry(data, target, get_period);
  1956. if (entry < 0) {
  1957. /*
  1958. * Target want to use long period which is not
  1959. * acceptable NinjaSCSI-32Bi/UDE.
  1960. */
  1961. goto reject;
  1962. }
  1963. /*
  1964. * Set new sync table and offset in this I_T nexus.
  1965. */
  1966. nsp32_set_sync_entry(data, target, entry, get_offset);
  1967. } else {
  1968. /* Target send SDTR to initiator. */
  1969. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  1970. target->sync_flag |= SDTR_INITIATOR;
  1971. /* offset: */
  1972. if (get_offset > SYNC_OFFSET) {
  1973. /* send back as SYNC_OFFSET */
  1974. get_offset = SYNC_OFFSET;
  1975. }
  1976. /* period: */
  1977. if (get_period < data->synct[0].period_num) {
  1978. get_period = data->synct[0].period_num;
  1979. }
  1980. entry = nsp32_search_period_entry(data, target, get_period);
  1981. if (get_offset == ASYNC_OFFSET || entry < 0) {
  1982. nsp32_set_async(data, target);
  1983. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  1984. } else {
  1985. nsp32_set_sync_entry(data, target, entry, get_offset);
  1986. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  1987. }
  1988. }
  1989. target->period = get_period;
  1990. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1991. return;
  1992. reject:
  1993. /*
  1994. * If the current message is unacceptable, send back to the target
  1995. * with reject message.
  1996. */
  1997. nsp32_build_reject(SCpnt);
  1998. async:
  1999. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2000. target->period = 0;
  2001. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2002. return;
  2003. }
  2004. /*
  2005. * Search config entry number matched in sync_table from given
  2006. * target and speed period value. If failed to search, return negative value.
  2007. */
  2008. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2009. nsp32_target *target,
  2010. unsigned char period)
  2011. {
  2012. int i;
  2013. if (target->limit_entry >= data->syncnum) {
  2014. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2015. target->limit_entry = 0;
  2016. }
  2017. for (i = target->limit_entry; i < data->syncnum; i++) {
  2018. if (period >= data->synct[i].start_period &&
  2019. period <= data->synct[i].end_period) {
  2020. break;
  2021. }
  2022. }
  2023. /*
  2024. * Check given period value is over the sync_table value.
  2025. * If so, return max value.
  2026. */
  2027. if (i == data->syncnum) {
  2028. i = -1;
  2029. }
  2030. return i;
  2031. }
  2032. /*
  2033. * target <-> initiator use ASYNC transfer
  2034. */
  2035. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2036. {
  2037. unsigned char period = data->synct[target->limit_entry].period_num;
  2038. target->offset = ASYNC_OFFSET;
  2039. target->period = 0;
  2040. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2041. target->ackwidth = 0;
  2042. target->sample_reg = 0;
  2043. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2044. }
  2045. /*
  2046. * target <-> initiator use maximum SYNC transfer
  2047. */
  2048. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2049. nsp32_target *target,
  2050. unsigned char *period,
  2051. unsigned char *offset)
  2052. {
  2053. unsigned char period_num, ackwidth;
  2054. period_num = data->synct[target->limit_entry].period_num;
  2055. *period = data->synct[target->limit_entry].start_period;
  2056. ackwidth = data->synct[target->limit_entry].ackwidth;
  2057. *offset = SYNC_OFFSET;
  2058. target->syncreg = TO_SYNCREG(period_num, *offset);
  2059. target->ackwidth = ackwidth;
  2060. target->offset = *offset;
  2061. target->sample_reg = 0; /* disable SREQ sampling */
  2062. }
  2063. /*
  2064. * target <-> initiator use entry number speed
  2065. */
  2066. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2067. nsp32_target *target,
  2068. int entry,
  2069. unsigned char offset)
  2070. {
  2071. unsigned char period, ackwidth, sample_rate;
  2072. period = data->synct[entry].period_num;
  2073. ackwidth = data->synct[entry].ackwidth;
  2074. sample_rate = data->synct[entry].sample_rate;
  2075. target->syncreg = TO_SYNCREG(period, offset);
  2076. target->ackwidth = ackwidth;
  2077. target->offset = offset;
  2078. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2079. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2080. }
  2081. /*
  2082. * It waits until SCSI REQ becomes assertion or negation state.
  2083. *
  2084. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2085. * connected target responds SCSI REQ negation. We have to wait
  2086. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2087. * REQ-ACK handshake.
  2088. */
  2089. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2090. {
  2091. unsigned int base = data->BaseAddress;
  2092. int wait_time = 0;
  2093. unsigned char bus, req_bit;
  2094. if (!((state == ASSERT) || (state == NEGATE))) {
  2095. nsp32_msg(KERN_ERR, "unknown state designation");
  2096. }
  2097. /* REQ is BIT(5) */
  2098. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2099. do {
  2100. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2101. if ((bus & BUSMON_REQ) == req_bit) {
  2102. nsp32_dbg(NSP32_DEBUG_WAIT,
  2103. "wait_time: %d", wait_time);
  2104. return;
  2105. }
  2106. udelay(1);
  2107. wait_time++;
  2108. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2109. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2110. }
  2111. /*
  2112. * It waits until SCSI SACK becomes assertion or negation state.
  2113. */
  2114. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2115. {
  2116. unsigned int base = data->BaseAddress;
  2117. int wait_time = 0;
  2118. unsigned char bus, ack_bit;
  2119. if (!((state == ASSERT) || (state == NEGATE))) {
  2120. nsp32_msg(KERN_ERR, "unknown state designation");
  2121. }
  2122. /* ACK is BIT(4) */
  2123. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2124. do {
  2125. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2126. if ((bus & BUSMON_ACK) == ack_bit) {
  2127. nsp32_dbg(NSP32_DEBUG_WAIT,
  2128. "wait_time: %d", wait_time);
  2129. return;
  2130. }
  2131. udelay(1);
  2132. wait_time++;
  2133. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2134. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2135. }
  2136. /*
  2137. * assert SCSI ACK
  2138. *
  2139. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2140. */
  2141. static void nsp32_sack_assert(nsp32_hw_data *data)
  2142. {
  2143. unsigned int base = data->BaseAddress;
  2144. unsigned char busctrl;
  2145. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2146. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2147. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2148. }
  2149. /*
  2150. * negate SCSI ACK
  2151. */
  2152. static void nsp32_sack_negate(nsp32_hw_data *data)
  2153. {
  2154. unsigned int base = data->BaseAddress;
  2155. unsigned char busctrl;
  2156. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2157. busctrl &= ~BUSCTL_ACK;
  2158. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2159. }
  2160. /*
  2161. * Note: n_io_port is defined as 0x7f because I/O register port is
  2162. * assigned as:
  2163. * 0x800-0x8ff: memory mapped I/O port
  2164. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2165. * 0xc00-0xfff: CardBus status registers
  2166. */
  2167. static int nsp32_detect(struct pci_dev *pdev)
  2168. {
  2169. struct Scsi_Host *host; /* registered host structure */
  2170. struct resource *res;
  2171. nsp32_hw_data *data;
  2172. int ret;
  2173. int i, j;
  2174. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2175. /*
  2176. * register this HBA as SCSI device
  2177. */
  2178. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2179. if (host == NULL) {
  2180. nsp32_msg (KERN_ERR, "failed to scsi register");
  2181. goto err;
  2182. }
  2183. /*
  2184. * set nsp32_hw_data
  2185. */
  2186. data = (nsp32_hw_data *)host->hostdata;
  2187. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2188. host->irq = data->IrqNumber;
  2189. host->io_port = data->BaseAddress;
  2190. host->unique_id = data->BaseAddress;
  2191. host->n_io_port = data->NumAddress;
  2192. host->base = (unsigned long)data->MmioAddress;
  2193. data->Host = host;
  2194. spin_lock_init(&(data->Lock));
  2195. data->cur_lunt = NULL;
  2196. data->cur_target = NULL;
  2197. /*
  2198. * Bus master transfer mode is supported currently.
  2199. */
  2200. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2201. /*
  2202. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2203. * dividing * 100ns/4).
  2204. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2205. */
  2206. data->clock = CLOCK_4;
  2207. /*
  2208. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2209. */
  2210. switch (data->clock) {
  2211. case CLOCK_4:
  2212. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2213. data->synct = nsp32_sync_table_40M;
  2214. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2215. break;
  2216. case CLOCK_2:
  2217. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2218. data->synct = nsp32_sync_table_20M;
  2219. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2220. break;
  2221. case PCICLK:
  2222. /* If data->clock is PCICLK, then select pci sync table. */
  2223. data->synct = nsp32_sync_table_pci;
  2224. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2225. break;
  2226. default:
  2227. nsp32_msg(KERN_WARNING,
  2228. "Invalid clock div is selected, set CLOCK_4.");
  2229. /* Use default value CLOCK_4 */
  2230. data->clock = CLOCK_4;
  2231. data->synct = nsp32_sync_table_40M;
  2232. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2233. }
  2234. /*
  2235. * setup nsp32_lunt
  2236. */
  2237. /*
  2238. * setup DMA
  2239. */
  2240. if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
  2241. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2242. goto scsi_unregister;
  2243. }
  2244. /*
  2245. * allocate autoparam DMA resource.
  2246. */
  2247. data->autoparam = dma_alloc_coherent(&pdev->dev,
  2248. sizeof(nsp32_autoparam), &(data->auto_paddr),
  2249. GFP_KERNEL);
  2250. if (data->autoparam == NULL) {
  2251. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2252. goto scsi_unregister;
  2253. }
  2254. /*
  2255. * allocate scatter-gather DMA resource.
  2256. */
  2257. data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
  2258. &data->sg_paddr, GFP_KERNEL);
  2259. if (data->sg_list == NULL) {
  2260. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2261. goto free_autoparam;
  2262. }
  2263. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2264. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2265. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2266. nsp32_lunt tmp = {
  2267. .SCpnt = NULL,
  2268. .save_datp = 0,
  2269. .msgin03 = FALSE,
  2270. .sg_num = 0,
  2271. .cur_entry = 0,
  2272. .sglun = &(data->sg_list[offset]),
  2273. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2274. };
  2275. data->lunt[i][j] = tmp;
  2276. }
  2277. }
  2278. /*
  2279. * setup target
  2280. */
  2281. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2282. nsp32_target *target = &(data->target[i]);
  2283. target->limit_entry = 0;
  2284. target->sync_flag = 0;
  2285. nsp32_set_async(data, target);
  2286. }
  2287. /*
  2288. * EEPROM check
  2289. */
  2290. ret = nsp32_getprom_param(data);
  2291. if (ret == FALSE) {
  2292. data->resettime = 3; /* default 3 */
  2293. }
  2294. /*
  2295. * setup HBA
  2296. */
  2297. nsp32hw_init(data);
  2298. snprintf(data->info_str, sizeof(data->info_str),
  2299. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2300. host->irq, host->io_port, host->n_io_port);
  2301. /*
  2302. * SCSI bus reset
  2303. *
  2304. * Note: It's important to reset SCSI bus in initialization phase.
  2305. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2306. * system is coming up, so SCSI devices connected to HBA is set as
  2307. * un-asynchronous mode. It brings the merit that this HBA is
  2308. * ready to start synchronous transfer without any preparation,
  2309. * but we are difficult to control transfer speed. In addition,
  2310. * it prevents device transfer speed from effecting EEPROM start-up
  2311. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2312. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2313. * connected same or more than 4 devices. It should be avoided
  2314. * depending on this specification. Thus, resetting the SCSI bus
  2315. * restores all connected SCSI devices to asynchronous mode, then
  2316. * this driver set SDTR safely later, and we can control all SCSI
  2317. * device transfer mode.
  2318. */
  2319. nsp32_do_bus_reset(data);
  2320. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2321. if (ret < 0) {
  2322. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2323. "SCSI PCI controller. Interrupt: %d", host->irq);
  2324. goto free_sg_list;
  2325. }
  2326. /*
  2327. * PCI IO register
  2328. */
  2329. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2330. if (res == NULL) {
  2331. nsp32_msg(KERN_ERR,
  2332. "I/O region 0x%x+0x%x is already used",
  2333. data->BaseAddress, data->NumAddress);
  2334. goto free_irq;
  2335. }
  2336. ret = scsi_add_host(host, &pdev->dev);
  2337. if (ret) {
  2338. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2339. goto free_region;
  2340. }
  2341. scsi_scan_host(host);
  2342. pci_set_drvdata(pdev, host);
  2343. return 0;
  2344. free_region:
  2345. release_region(host->io_port, host->n_io_port);
  2346. free_irq:
  2347. free_irq(host->irq, data);
  2348. free_sg_list:
  2349. dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
  2350. data->sg_list, data->sg_paddr);
  2351. free_autoparam:
  2352. dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
  2353. data->autoparam, data->auto_paddr);
  2354. scsi_unregister:
  2355. scsi_host_put(host);
  2356. err:
  2357. return 1;
  2358. }
  2359. static int nsp32_release(struct Scsi_Host *host)
  2360. {
  2361. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2362. if (data->autoparam) {
  2363. dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
  2364. data->autoparam, data->auto_paddr);
  2365. }
  2366. if (data->sg_list) {
  2367. dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
  2368. data->sg_list, data->sg_paddr);
  2369. }
  2370. if (host->irq) {
  2371. free_irq(host->irq, data);
  2372. }
  2373. if (host->io_port && host->n_io_port) {
  2374. release_region(host->io_port, host->n_io_port);
  2375. }
  2376. if (data->MmioAddress) {
  2377. iounmap(data->MmioAddress);
  2378. }
  2379. return 0;
  2380. }
  2381. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2382. {
  2383. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2384. return data->info_str;
  2385. }
  2386. /****************************************************************************
  2387. * error handler
  2388. */
  2389. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2390. {
  2391. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2392. unsigned int base = SCpnt->device->host->io_port;
  2393. nsp32_msg(KERN_WARNING, "abort");
  2394. if (data->cur_lunt->SCpnt == NULL) {
  2395. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2396. return FAILED;
  2397. }
  2398. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2399. /* reset SDTR negotiation */
  2400. data->cur_target->sync_flag = 0;
  2401. nsp32_set_async(data, data->cur_target);
  2402. }
  2403. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2404. nsp32_write2(base, BM_CNT, 0);
  2405. SCpnt->result = DID_ABORT << 16;
  2406. nsp32_scsi_done(SCpnt);
  2407. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2408. return SUCCESS;
  2409. }
  2410. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2411. {
  2412. unsigned int base = data->BaseAddress;
  2413. int i;
  2414. unsigned short __maybe_unused intrdat;
  2415. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2416. /*
  2417. * stop all transfer
  2418. * clear TRANSFERCONTROL_BM_START
  2419. * clear counter
  2420. */
  2421. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2422. nsp32_write4(base, BM_CNT, 0);
  2423. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2424. /*
  2425. * fall back to asynchronous transfer mode
  2426. * initialize SDTR negotiation flag
  2427. */
  2428. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2429. nsp32_target *target = &data->target[i];
  2430. target->sync_flag = 0;
  2431. nsp32_set_async(data, target);
  2432. }
  2433. /*
  2434. * reset SCSI bus
  2435. */
  2436. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2437. mdelay(RESET_HOLD_TIME / 1000);
  2438. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2439. for(i = 0; i < 5; i++) {
  2440. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2441. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2442. }
  2443. data->CurrentSC = NULL;
  2444. }
  2445. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2446. {
  2447. struct Scsi_Host *host = SCpnt->device->host;
  2448. unsigned int base = SCpnt->device->host->io_port;
  2449. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2450. nsp32_msg(KERN_INFO, "Host Reset");
  2451. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2452. spin_lock_irq(SCpnt->device->host->host_lock);
  2453. nsp32hw_init(data);
  2454. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2455. nsp32_do_bus_reset(data);
  2456. nsp32_write2(base, IRQ_CONTROL, 0);
  2457. spin_unlock_irq(SCpnt->device->host->host_lock);
  2458. return SUCCESS; /* Host reset is succeeded at any time. */
  2459. }
  2460. /**************************************************************************
  2461. * EEPROM handler
  2462. */
  2463. /*
  2464. * getting EEPROM parameter
  2465. */
  2466. static int nsp32_getprom_param(nsp32_hw_data *data)
  2467. {
  2468. int vendor = data->pci_devid->vendor;
  2469. int device = data->pci_devid->device;
  2470. int ret, i;
  2471. int __maybe_unused val;
  2472. /*
  2473. * EEPROM checking.
  2474. */
  2475. ret = nsp32_prom_read(data, 0x7e);
  2476. if (ret != 0x55) {
  2477. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2478. return FALSE;
  2479. }
  2480. ret = nsp32_prom_read(data, 0x7f);
  2481. if (ret != 0xaa) {
  2482. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2483. return FALSE;
  2484. }
  2485. /*
  2486. * check EEPROM type
  2487. */
  2488. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2489. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2490. ret = nsp32_getprom_c16(data);
  2491. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2492. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2493. ret = nsp32_getprom_at24(data);
  2494. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2495. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2496. ret = nsp32_getprom_at24(data);
  2497. } else {
  2498. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2499. ret = FALSE;
  2500. }
  2501. /* for debug : SPROM data full checking */
  2502. for (i = 0; i <= 0x1f; i++) {
  2503. val = nsp32_prom_read(data, i);
  2504. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2505. "rom address 0x%x : 0x%x", i, val);
  2506. }
  2507. return ret;
  2508. }
  2509. /*
  2510. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2511. *
  2512. * ROMADDR
  2513. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2514. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2515. * 0x07 : HBA Synchronous Transfer Period
  2516. * Value 0: AutoSync, 1: Manual Setting
  2517. * 0x08 - 0x0f : Not Used? (0x0)
  2518. * 0x10 : Bus Termination
  2519. * Value 0: Auto[ON], 1: ON, 2: OFF
  2520. * 0x11 : Not Used? (0)
  2521. * 0x12 : Bus Reset Delay Time (0x03)
  2522. * 0x13 : Bootable CD Support
  2523. * Value 0: Disable, 1: Enable
  2524. * 0x14 : Device Scan
  2525. * Bit 7 6 5 4 3 2 1 0
  2526. * | <----------------->
  2527. * | SCSI ID: Value 0: Skip, 1: YES
  2528. * |-> Value 0: ALL scan, Value 1: Manual
  2529. * 0x15 - 0x1b : Not Used? (0)
  2530. * 0x1c : Constant? (0x01) (clock div?)
  2531. * 0x1d - 0x7c : Not Used (0xff)
  2532. * 0x7d : Not Used? (0xff)
  2533. * 0x7e : Constant (0x55), Validity signature
  2534. * 0x7f : Constant (0xaa), Validity signature
  2535. */
  2536. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2537. {
  2538. int ret, i;
  2539. int auto_sync;
  2540. nsp32_target *target;
  2541. int entry;
  2542. /*
  2543. * Reset time which is designated by EEPROM.
  2544. *
  2545. * TODO: Not used yet.
  2546. */
  2547. data->resettime = nsp32_prom_read(data, 0x12);
  2548. /*
  2549. * HBA Synchronous Transfer Period
  2550. *
  2551. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2552. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2553. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2554. * On the contrary if connected SCSI devices are same or higher
  2555. * than 4, then transfer speed is set as FAST-10M.
  2556. *
  2557. * I break this rule. The number of connected SCSI devices are
  2558. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2559. * forced as ULTRA-20M.
  2560. */
  2561. ret = nsp32_prom_read(data, 0x07);
  2562. switch (ret) {
  2563. case 0:
  2564. auto_sync = TRUE;
  2565. break;
  2566. case 1:
  2567. auto_sync = FALSE;
  2568. break;
  2569. default:
  2570. nsp32_msg(KERN_WARNING,
  2571. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2572. auto_sync = TRUE;
  2573. }
  2574. if (trans_mode == ULTRA20M_MODE) {
  2575. auto_sync = TRUE;
  2576. }
  2577. /*
  2578. * each device Synchronous Transfer Period
  2579. */
  2580. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2581. target = &data->target[i];
  2582. if (auto_sync == TRUE) {
  2583. target->limit_entry = 0; /* set as ULTRA20M */
  2584. } else {
  2585. ret = nsp32_prom_read(data, i);
  2586. entry = nsp32_search_period_entry(data, target, ret);
  2587. if (entry < 0) {
  2588. /* search failed... set maximum speed */
  2589. entry = 0;
  2590. }
  2591. target->limit_entry = entry;
  2592. }
  2593. }
  2594. return TRUE;
  2595. }
  2596. /*
  2597. * C16 110 (I-O Data: SC-NBD) data map:
  2598. *
  2599. * ROMADDR
  2600. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2601. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2602. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2603. * 0x08 - 0x0f : Not Used? (0x0)
  2604. * 0x10 : Transfer Mode
  2605. * Value 0: PIO, 1: Busmater
  2606. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2607. * 0x12 : Bus Termination
  2608. * Value 0: Disable, 1: Enable
  2609. * 0x13 - 0x19 : Disconnection
  2610. * Value 0: Disable, 1: Enable
  2611. * 0x1a - 0x7c : Not Used? (0)
  2612. * 0x7d : Not Used? (0xf8)
  2613. * 0x7e : Constant (0x55), Validity signature
  2614. * 0x7f : Constant (0xaa), Validity signature
  2615. */
  2616. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2617. {
  2618. int ret, i;
  2619. nsp32_target *target;
  2620. int entry, val;
  2621. /*
  2622. * Reset time which is designated by EEPROM.
  2623. *
  2624. * TODO: Not used yet.
  2625. */
  2626. data->resettime = nsp32_prom_read(data, 0x11);
  2627. /*
  2628. * each device Synchronous Transfer Period
  2629. */
  2630. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2631. target = &data->target[i];
  2632. ret = nsp32_prom_read(data, i);
  2633. switch (ret) {
  2634. case 0: /* 20MB/s */
  2635. val = 0x0c;
  2636. break;
  2637. case 1: /* 10MB/s */
  2638. val = 0x19;
  2639. break;
  2640. case 2: /* 5MB/s */
  2641. val = 0x32;
  2642. break;
  2643. case 3: /* ASYNC */
  2644. val = 0x00;
  2645. break;
  2646. default: /* default 20MB/s */
  2647. val = 0x0c;
  2648. break;
  2649. }
  2650. entry = nsp32_search_period_entry(data, target, val);
  2651. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2652. /* search failed... set maximum speed */
  2653. entry = 0;
  2654. }
  2655. target->limit_entry = entry;
  2656. }
  2657. return TRUE;
  2658. }
  2659. /*
  2660. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2661. */
  2662. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2663. {
  2664. int i, val;
  2665. /* start condition */
  2666. nsp32_prom_start(data);
  2667. /* device address */
  2668. nsp32_prom_write_bit(data, 1); /* 1 */
  2669. nsp32_prom_write_bit(data, 0); /* 0 */
  2670. nsp32_prom_write_bit(data, 1); /* 1 */
  2671. nsp32_prom_write_bit(data, 0); /* 0 */
  2672. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2673. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2674. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2675. /* R/W: W for dummy write */
  2676. nsp32_prom_write_bit(data, 0);
  2677. /* ack */
  2678. nsp32_prom_write_bit(data, 0);
  2679. /* word address */
  2680. for (i = 7; i >= 0; i--) {
  2681. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2682. }
  2683. /* ack */
  2684. nsp32_prom_write_bit(data, 0);
  2685. /* start condition */
  2686. nsp32_prom_start(data);
  2687. /* device address */
  2688. nsp32_prom_write_bit(data, 1); /* 1 */
  2689. nsp32_prom_write_bit(data, 0); /* 0 */
  2690. nsp32_prom_write_bit(data, 1); /* 1 */
  2691. nsp32_prom_write_bit(data, 0); /* 0 */
  2692. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2693. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2694. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2695. /* R/W: R */
  2696. nsp32_prom_write_bit(data, 1);
  2697. /* ack */
  2698. nsp32_prom_write_bit(data, 0);
  2699. /* data... */
  2700. val = 0;
  2701. for (i = 7; i >= 0; i--) {
  2702. val += (nsp32_prom_read_bit(data) << i);
  2703. }
  2704. /* no ack */
  2705. nsp32_prom_write_bit(data, 1);
  2706. /* stop condition */
  2707. nsp32_prom_stop(data);
  2708. return val;
  2709. }
  2710. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2711. {
  2712. int base = data->BaseAddress;
  2713. int tmp;
  2714. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2715. if (val == 0) {
  2716. tmp &= ~bit;
  2717. } else {
  2718. tmp |= bit;
  2719. }
  2720. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2721. udelay(10);
  2722. }
  2723. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2724. {
  2725. int base = data->BaseAddress;
  2726. int tmp, ret;
  2727. if (bit != SDA) {
  2728. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2729. return 0;
  2730. }
  2731. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2732. if (tmp == 0) {
  2733. ret = 0;
  2734. } else {
  2735. ret = 1;
  2736. }
  2737. udelay(10);
  2738. return ret;
  2739. }
  2740. static void nsp32_prom_start (nsp32_hw_data *data)
  2741. {
  2742. /* start condition */
  2743. nsp32_prom_set(data, SCL, 1);
  2744. nsp32_prom_set(data, SDA, 1);
  2745. nsp32_prom_set(data, ENA, 1); /* output mode */
  2746. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2747. * SDA 1->0 is start condition */
  2748. nsp32_prom_set(data, SCL, 0);
  2749. }
  2750. static void nsp32_prom_stop (nsp32_hw_data *data)
  2751. {
  2752. /* stop condition */
  2753. nsp32_prom_set(data, SCL, 1);
  2754. nsp32_prom_set(data, SDA, 0);
  2755. nsp32_prom_set(data, ENA, 1); /* output mode */
  2756. nsp32_prom_set(data, SDA, 1);
  2757. nsp32_prom_set(data, SCL, 0);
  2758. }
  2759. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2760. {
  2761. /* write */
  2762. nsp32_prom_set(data, SDA, val);
  2763. nsp32_prom_set(data, SCL, 1 );
  2764. nsp32_prom_set(data, SCL, 0 );
  2765. }
  2766. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2767. {
  2768. int val;
  2769. /* read */
  2770. nsp32_prom_set(data, ENA, 0); /* input mode */
  2771. nsp32_prom_set(data, SCL, 1);
  2772. val = nsp32_prom_get(data, SDA);
  2773. nsp32_prom_set(data, SCL, 0);
  2774. nsp32_prom_set(data, ENA, 1); /* output mode */
  2775. return val;
  2776. }
  2777. /**************************************************************************
  2778. * Power Management
  2779. */
  2780. #ifdef CONFIG_PM
  2781. /* Device suspended */
  2782. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2783. {
  2784. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2785. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state.event=%x, slot=%s, host=0x%p",
  2786. pdev, state.event, pci_name(pdev), host);
  2787. pci_save_state (pdev);
  2788. pci_disable_device (pdev);
  2789. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2790. return 0;
  2791. }
  2792. /* Device woken up */
  2793. static int nsp32_resume(struct pci_dev *pdev)
  2794. {
  2795. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2796. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2797. unsigned short reg;
  2798. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p",
  2799. pdev, pci_name(pdev), host);
  2800. pci_set_power_state(pdev, PCI_D0);
  2801. pci_enable_wake (pdev, PCI_D0, 0);
  2802. pci_restore_state (pdev);
  2803. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2804. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2805. if (reg == 0xffff) {
  2806. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2807. return 0;
  2808. }
  2809. nsp32hw_init (data);
  2810. nsp32_do_bus_reset(data);
  2811. nsp32_msg(KERN_INFO, "resume success");
  2812. return 0;
  2813. }
  2814. #endif
  2815. /************************************************************************
  2816. * PCI/Cardbus probe/remove routine
  2817. */
  2818. static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2819. {
  2820. int ret;
  2821. nsp32_hw_data *data = &nsp32_data_base;
  2822. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2823. ret = pci_enable_device(pdev);
  2824. if (ret) {
  2825. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2826. return ret;
  2827. }
  2828. data->Pci = pdev;
  2829. data->pci_devid = id;
  2830. data->IrqNumber = pdev->irq;
  2831. data->BaseAddress = pci_resource_start(pdev, 0);
  2832. data->NumAddress = pci_resource_len (pdev, 0);
  2833. data->MmioAddress = pci_ioremap_bar(pdev, 1);
  2834. data->MmioLength = pci_resource_len (pdev, 1);
  2835. pci_set_master(pdev);
  2836. ret = nsp32_detect(pdev);
  2837. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2838. pdev->irq,
  2839. data->MmioAddress, data->MmioLength,
  2840. pci_name(pdev),
  2841. nsp32_model[id->driver_data]);
  2842. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2843. return ret;
  2844. }
  2845. static void nsp32_remove(struct pci_dev *pdev)
  2846. {
  2847. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2848. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2849. scsi_remove_host(host);
  2850. nsp32_release(host);
  2851. scsi_host_put(host);
  2852. }
  2853. static struct pci_driver nsp32_driver = {
  2854. .name = "nsp32",
  2855. .id_table = nsp32_pci_table,
  2856. .probe = nsp32_probe,
  2857. .remove = nsp32_remove,
  2858. #ifdef CONFIG_PM
  2859. .suspend = nsp32_suspend,
  2860. .resume = nsp32_resume,
  2861. #endif
  2862. };
  2863. /*********************************************************************
  2864. * Moule entry point
  2865. */
  2866. static int __init init_nsp32(void) {
  2867. nsp32_msg(KERN_INFO, "loading...");
  2868. return pci_register_driver(&nsp32_driver);
  2869. }
  2870. static void __exit exit_nsp32(void) {
  2871. nsp32_msg(KERN_INFO, "unloading...");
  2872. pci_unregister_driver(&nsp32_driver);
  2873. }
  2874. module_init(init_nsp32);
  2875. module_exit(exit_nsp32);
  2876. /* end */