ipr.c 281 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ipr.c -- driver for IBM Power Linux RAID adapters
  4. *
  5. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  6. *
  7. * Copyright (C) 2003, 2004 IBM Corporation
  8. */
  9. /*
  10. * Notes:
  11. *
  12. * This driver is used to control the following SCSI adapters:
  13. *
  14. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  15. *
  16. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  17. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  18. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  19. * Embedded SCSI adapter on p615 and p655 systems
  20. *
  21. * Supported Hardware Features:
  22. * - Ultra 320 SCSI controller
  23. * - PCI-X host interface
  24. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  25. * - Non-Volatile Write Cache
  26. * - Supports attachment of non-RAID disks, tape, and optical devices
  27. * - RAID Levels 0, 5, 10
  28. * - Hot spare
  29. * - Background Parity Checking
  30. * - Background Data Scrubbing
  31. * - Ability to increase the capacity of an existing RAID 5 disk array
  32. * by adding disks
  33. *
  34. * Driver Features:
  35. * - Tagged command queuing
  36. * - Adapter microcode download
  37. * - PCI hot plug
  38. * - SCSI device hot plug
  39. *
  40. */
  41. #include <linux/fs.h>
  42. #include <linux/init.h>
  43. #include <linux/types.h>
  44. #include <linux/errno.h>
  45. #include <linux/kernel.h>
  46. #include <linux/slab.h>
  47. #include <linux/vmalloc.h>
  48. #include <linux/ioport.h>
  49. #include <linux/delay.h>
  50. #include <linux/pci.h>
  51. #include <linux/wait.h>
  52. #include <linux/spinlock.h>
  53. #include <linux/sched.h>
  54. #include <linux/interrupt.h>
  55. #include <linux/blkdev.h>
  56. #include <linux/firmware.h>
  57. #include <linux/module.h>
  58. #include <linux/moduleparam.h>
  59. #include <linux/hdreg.h>
  60. #include <linux/reboot.h>
  61. #include <linux/stringify.h>
  62. #include <linux/irq.h>
  63. #include <asm/io.h>
  64. #include <asm/processor.h>
  65. #include <scsi/scsi.h>
  66. #include <scsi/scsi_host.h>
  67. #include <scsi/scsi_tcq.h>
  68. #include <scsi/scsi_eh.h>
  69. #include <scsi/scsi_cmnd.h>
  70. #include "ipr.h"
  71. /*
  72. * Global Data
  73. */
  74. static LIST_HEAD(ipr_ioa_head);
  75. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  76. static unsigned int ipr_max_speed = 1;
  77. static unsigned int ipr_fastfail = 0;
  78. static unsigned int ipr_transop_timeout = 0;
  79. static unsigned int ipr_debug = 0;
  80. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  81. static unsigned int ipr_dual_ioa_raid = 1;
  82. static unsigned int ipr_number_of_msix = 16;
  83. static unsigned int ipr_fast_reboot;
  84. static DEFINE_SPINLOCK(ipr_driver_lock);
  85. /* This table describes the differences between DMA controller chips */
  86. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  87. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  88. .mailbox = 0x0042C,
  89. .max_cmds = 100,
  90. .cache_line_size = 0x20,
  91. .clear_isr = 1,
  92. .iopoll_weight = 0,
  93. {
  94. .set_interrupt_mask_reg = 0x0022C,
  95. .clr_interrupt_mask_reg = 0x00230,
  96. .clr_interrupt_mask_reg32 = 0x00230,
  97. .sense_interrupt_mask_reg = 0x0022C,
  98. .sense_interrupt_mask_reg32 = 0x0022C,
  99. .clr_interrupt_reg = 0x00228,
  100. .clr_interrupt_reg32 = 0x00228,
  101. .sense_interrupt_reg = 0x00224,
  102. .sense_interrupt_reg32 = 0x00224,
  103. .ioarrin_reg = 0x00404,
  104. .sense_uproc_interrupt_reg = 0x00214,
  105. .sense_uproc_interrupt_reg32 = 0x00214,
  106. .set_uproc_interrupt_reg = 0x00214,
  107. .set_uproc_interrupt_reg32 = 0x00214,
  108. .clr_uproc_interrupt_reg = 0x00218,
  109. .clr_uproc_interrupt_reg32 = 0x00218
  110. }
  111. },
  112. { /* Snipe and Scamp */
  113. .mailbox = 0x0052C,
  114. .max_cmds = 100,
  115. .cache_line_size = 0x20,
  116. .clear_isr = 1,
  117. .iopoll_weight = 0,
  118. {
  119. .set_interrupt_mask_reg = 0x00288,
  120. .clr_interrupt_mask_reg = 0x0028C,
  121. .clr_interrupt_mask_reg32 = 0x0028C,
  122. .sense_interrupt_mask_reg = 0x00288,
  123. .sense_interrupt_mask_reg32 = 0x00288,
  124. .clr_interrupt_reg = 0x00284,
  125. .clr_interrupt_reg32 = 0x00284,
  126. .sense_interrupt_reg = 0x00280,
  127. .sense_interrupt_reg32 = 0x00280,
  128. .ioarrin_reg = 0x00504,
  129. .sense_uproc_interrupt_reg = 0x00290,
  130. .sense_uproc_interrupt_reg32 = 0x00290,
  131. .set_uproc_interrupt_reg = 0x00290,
  132. .set_uproc_interrupt_reg32 = 0x00290,
  133. .clr_uproc_interrupt_reg = 0x00294,
  134. .clr_uproc_interrupt_reg32 = 0x00294
  135. }
  136. },
  137. { /* CRoC */
  138. .mailbox = 0x00044,
  139. .max_cmds = 1000,
  140. .cache_line_size = 0x20,
  141. .clear_isr = 0,
  142. .iopoll_weight = 64,
  143. {
  144. .set_interrupt_mask_reg = 0x00010,
  145. .clr_interrupt_mask_reg = 0x00018,
  146. .clr_interrupt_mask_reg32 = 0x0001C,
  147. .sense_interrupt_mask_reg = 0x00010,
  148. .sense_interrupt_mask_reg32 = 0x00014,
  149. .clr_interrupt_reg = 0x00008,
  150. .clr_interrupt_reg32 = 0x0000C,
  151. .sense_interrupt_reg = 0x00000,
  152. .sense_interrupt_reg32 = 0x00004,
  153. .ioarrin_reg = 0x00070,
  154. .sense_uproc_interrupt_reg = 0x00020,
  155. .sense_uproc_interrupt_reg32 = 0x00024,
  156. .set_uproc_interrupt_reg = 0x00020,
  157. .set_uproc_interrupt_reg32 = 0x00024,
  158. .clr_uproc_interrupt_reg = 0x00028,
  159. .clr_uproc_interrupt_reg32 = 0x0002C,
  160. .init_feedback_reg = 0x0005C,
  161. .dump_addr_reg = 0x00064,
  162. .dump_data_reg = 0x00068,
  163. .endian_swap_reg = 0x00084
  164. }
  165. },
  166. };
  167. static const struct ipr_chip_t ipr_chip[] = {
  168. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  169. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  170. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  171. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  172. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, true, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  173. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  174. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  175. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  176. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  177. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE, true, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  178. };
  179. static int ipr_max_bus_speeds[] = {
  180. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  181. };
  182. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  183. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  184. module_param_named(max_speed, ipr_max_speed, uint, 0);
  185. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  186. module_param_named(log_level, ipr_log_level, uint, 0);
  187. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  188. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  189. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  190. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  191. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  192. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  193. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  194. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  195. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  196. module_param_named(max_devs, ipr_max_devs, int, 0);
  197. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  198. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  199. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  200. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 16). (default:16)");
  201. module_param_named(fast_reboot, ipr_fast_reboot, int, S_IRUGO | S_IWUSR);
  202. MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0)");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(IPR_DRIVER_VERSION);
  205. /* A constant array of IOASCs/URCs/Error Messages */
  206. static const
  207. struct ipr_error_table_t ipr_error_table[] = {
  208. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  209. "8155: An unknown error was received"},
  210. {0x00330000, 0, 0,
  211. "Soft underlength error"},
  212. {0x005A0000, 0, 0,
  213. "Command to be cancelled not found"},
  214. {0x00808000, 0, 0,
  215. "Qualified success"},
  216. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  217. "FFFE: Soft device bus error recovered by the IOA"},
  218. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  219. "4101: Soft device bus fabric error"},
  220. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  221. "FFFC: Logical block guard error recovered by the device"},
  222. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  223. "FFFC: Logical block reference tag error recovered by the device"},
  224. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  225. "4171: Recovered scatter list tag / sequence number error"},
  226. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  227. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  228. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  229. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  230. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  231. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  232. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  233. "FFFD: Logical block guard error recovered by the IOA"},
  234. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  235. "FFF9: Device sector reassign successful"},
  236. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "FFF7: Media error recovered by device rewrite procedures"},
  238. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "7001: IOA sector reassignment successful"},
  240. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "FFF9: Soft media error. Sector reassignment recommended"},
  242. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "FFF7: Media error recovered by IOA rewrite procedures"},
  244. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FF3D: Soft PCI bus error recovered by the IOA"},
  246. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  247. "FFF6: Device hardware error recovered by the IOA"},
  248. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  249. "FFF6: Device hardware error recovered by the device"},
  250. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  251. "FF3D: Soft IOA error recovered by the IOA"},
  252. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  253. "FFFA: Undefined device response recovered by the IOA"},
  254. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  255. "FFF6: Device bus error, message or command phase"},
  256. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  257. "FFFE: Task Management Function failed"},
  258. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  259. "FFF6: Failure prediction threshold exceeded"},
  260. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  261. "8009: Impending cache battery pack failure"},
  262. {0x02040100, 0, 0,
  263. "Logical Unit in process of becoming ready"},
  264. {0x02040200, 0, 0,
  265. "Initializing command required"},
  266. {0x02040400, 0, 0,
  267. "34FF: Disk device format in progress"},
  268. {0x02040C00, 0, 0,
  269. "Logical unit not accessible, target port in unavailable state"},
  270. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  271. "9070: IOA requested reset"},
  272. {0x023F0000, 0, 0,
  273. "Synchronization required"},
  274. {0x02408500, 0, 0,
  275. "IOA microcode download required"},
  276. {0x02408600, 0, 0,
  277. "Device bus connection is prohibited by host"},
  278. {0x024E0000, 0, 0,
  279. "No ready, IOA shutdown"},
  280. {0x025A0000, 0, 0,
  281. "Not ready, IOA has been shutdown"},
  282. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  283. "3020: Storage subsystem configuration error"},
  284. {0x03110B00, 0, 0,
  285. "FFF5: Medium error, data unreadable, recommend reassign"},
  286. {0x03110C00, 0, 0,
  287. "7000: Medium error, data unreadable, do not reassign"},
  288. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  289. "FFF3: Disk media format bad"},
  290. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  291. "3002: Addressed device failed to respond to selection"},
  292. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  293. "3100: Device bus error"},
  294. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  295. "3109: IOA timed out a device command"},
  296. {0x04088000, 0, 0,
  297. "3120: SCSI bus is not operational"},
  298. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  299. "4100: Hard device bus fabric error"},
  300. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  301. "310C: Logical block guard error detected by the device"},
  302. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  303. "310C: Logical block reference tag error detected by the device"},
  304. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  305. "4170: Scatter list tag / sequence number error"},
  306. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  307. "8150: Logical block CRC error on IOA to Host transfer"},
  308. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  309. "4170: Logical block sequence number error on IOA to Host transfer"},
  310. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  311. "310D: Logical block reference tag error detected by the IOA"},
  312. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  313. "310D: Logical block guard error detected by the IOA"},
  314. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  315. "9000: IOA reserved area data check"},
  316. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  317. "9001: IOA reserved area invalid data pattern"},
  318. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  319. "9002: IOA reserved area LRC error"},
  320. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  321. "Hardware Error, IOA metadata access error"},
  322. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  323. "102E: Out of alternate sectors for disk storage"},
  324. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  325. "FFF4: Data transfer underlength error"},
  326. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  327. "FFF4: Data transfer overlength error"},
  328. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  329. "3400: Logical unit failure"},
  330. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  331. "FFF4: Device microcode is corrupt"},
  332. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  333. "8150: PCI bus error"},
  334. {0x04430000, 1, 0,
  335. "Unsupported device bus message received"},
  336. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  337. "FFF4: Disk device problem"},
  338. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  339. "8150: Permanent IOA failure"},
  340. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  341. "3010: Disk device returned wrong response to IOA"},
  342. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  343. "8151: IOA microcode error"},
  344. {0x04448500, 0, 0,
  345. "Device bus status error"},
  346. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  347. "8157: IOA error requiring IOA reset to recover"},
  348. {0x04448700, 0, 0,
  349. "ATA device status error"},
  350. {0x04490000, 0, 0,
  351. "Message reject received from the device"},
  352. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  353. "8008: A permanent cache battery pack failure occurred"},
  354. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  355. "9090: Disk unit has been modified after the last known status"},
  356. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  357. "9081: IOA detected device error"},
  358. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  359. "9082: IOA detected device error"},
  360. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  361. "3110: Device bus error, message or command phase"},
  362. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  363. "3110: SAS Command / Task Management Function failed"},
  364. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  365. "9091: Incorrect hardware configuration change has been detected"},
  366. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  367. "9073: Invalid multi-adapter configuration"},
  368. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  369. "4010: Incorrect connection between cascaded expanders"},
  370. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  371. "4020: Connections exceed IOA design limits"},
  372. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  373. "4030: Incorrect multipath connection"},
  374. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  375. "4110: Unsupported enclosure function"},
  376. {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
  377. "4120: SAS cable VPD cannot be read"},
  378. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  379. "FFF4: Command to logical unit failed"},
  380. {0x05240000, 1, 0,
  381. "Illegal request, invalid request type or request packet"},
  382. {0x05250000, 0, 0,
  383. "Illegal request, invalid resource handle"},
  384. {0x05258000, 0, 0,
  385. "Illegal request, commands not allowed to this device"},
  386. {0x05258100, 0, 0,
  387. "Illegal request, command not allowed to a secondary adapter"},
  388. {0x05258200, 0, 0,
  389. "Illegal request, command not allowed to a non-optimized resource"},
  390. {0x05260000, 0, 0,
  391. "Illegal request, invalid field in parameter list"},
  392. {0x05260100, 0, 0,
  393. "Illegal request, parameter not supported"},
  394. {0x05260200, 0, 0,
  395. "Illegal request, parameter value invalid"},
  396. {0x052C0000, 0, 0,
  397. "Illegal request, command sequence error"},
  398. {0x052C8000, 1, 0,
  399. "Illegal request, dual adapter support not enabled"},
  400. {0x052C8100, 1, 0,
  401. "Illegal request, another cable connector was physically disabled"},
  402. {0x054E8000, 1, 0,
  403. "Illegal request, inconsistent group id/group count"},
  404. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  405. "9031: Array protection temporarily suspended, protection resuming"},
  406. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  407. "9040: Array protection temporarily suspended, protection resuming"},
  408. {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
  409. "4080: IOA exceeded maximum operating temperature"},
  410. {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  411. "4085: Service required"},
  412. {0x060B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  413. "4086: SAS Adapter Hardware Configuration Error"},
  414. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  415. "3140: Device bus not ready to ready transition"},
  416. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  417. "FFFB: SCSI bus was reset"},
  418. {0x06290500, 0, 0,
  419. "FFFE: SCSI bus transition to single ended"},
  420. {0x06290600, 0, 0,
  421. "FFFE: SCSI bus transition to LVD"},
  422. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  423. "FFFB: SCSI bus was reset by another initiator"},
  424. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  425. "3029: A device replacement has occurred"},
  426. {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "4102: Device bus fabric performance degradation"},
  428. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "9051: IOA cache data exists for a missing or failed device"},
  430. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  431. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  432. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  433. "9025: Disk unit is not supported at its physical location"},
  434. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  435. "3020: IOA detected a SCSI bus configuration error"},
  436. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  437. "3150: SCSI bus configuration error"},
  438. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  439. "9074: Asymmetric advanced function disk configuration"},
  440. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "4040: Incomplete multipath connection between IOA and enclosure"},
  442. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  443. "4041: Incomplete multipath connection between enclosure and device"},
  444. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "9075: Incomplete multipath connection between IOA and remote IOA"},
  446. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "9076: Configuration error, missing remote IOA"},
  448. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  449. "4050: Enclosure does not support a required multipath function"},
  450. {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "4121: Configuration error, required cable is missing"},
  452. {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "4122: Cable is not plugged into the correct location on remote IOA"},
  454. {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
  455. "4123: Configuration error, invalid cable vital product data"},
  456. {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "4124: Configuration error, both cable ends are plugged into the same IOA"},
  458. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "4070: Logically bad block written on device"},
  460. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  461. "9041: Array protection temporarily suspended"},
  462. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "9042: Corrupt array parity detected on specified device"},
  464. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "9030: Array no longer protected due to missing or failed disk unit"},
  466. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "9071: Link operational transition"},
  468. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "9072: Link not operational transition"},
  470. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "9032: Array exposed but still protected"},
  472. {0x066B8300, 0, IPR_DEBUG_LOG_LEVEL,
  473. "70DD: Device forced failed by disrupt device command"},
  474. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "4061: Multipath redundancy level got better"},
  476. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  477. "4060: Multipath redundancy level got worse"},
  478. {0x06808100, 0, IPR_DEBUG_LOG_LEVEL,
  479. "9083: Device raw mode enabled"},
  480. {0x06808200, 0, IPR_DEBUG_LOG_LEVEL,
  481. "9084: Device raw mode disabled"},
  482. {0x07270000, 0, 0,
  483. "Failure due to other device"},
  484. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  485. "9008: IOA does not support functions expected by devices"},
  486. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  487. "9010: Cache data associated with attached devices cannot be found"},
  488. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  489. "9011: Cache data belongs to devices other than those attached"},
  490. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  491. "9020: Array missing 2 or more devices with only 1 device present"},
  492. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  493. "9021: Array missing 2 or more devices with 2 or more devices present"},
  494. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  495. "9022: Exposed array is missing a required device"},
  496. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  497. "9023: Array member(s) not at required physical locations"},
  498. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  499. "9024: Array not functional due to present hardware configuration"},
  500. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  501. "9026: Array not functional due to present hardware configuration"},
  502. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  503. "9027: Array is missing a device and parity is out of sync"},
  504. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  505. "9028: Maximum number of arrays already exist"},
  506. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  507. "9050: Required cache data cannot be located for a disk unit"},
  508. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  509. "9052: Cache data exists for a device that has been modified"},
  510. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  511. "9054: IOA resources not available due to previous problems"},
  512. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  513. "9092: Disk unit requires initialization before use"},
  514. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  515. "9029: Incorrect hardware configuration change has been detected"},
  516. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  517. "9060: One or more disk pairs are missing from an array"},
  518. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  519. "9061: One or more disks are missing from an array"},
  520. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  521. "9062: One or more disks are missing from an array"},
  522. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  523. "9063: Maximum number of functional arrays has been exceeded"},
  524. {0x07279A00, 0, 0,
  525. "Data protect, other volume set problem"},
  526. {0x0B260000, 0, 0,
  527. "Aborted command, invalid descriptor"},
  528. {0x0B3F9000, 0, 0,
  529. "Target operating conditions have changed, dual adapter takeover"},
  530. {0x0B530200, 0, 0,
  531. "Aborted command, medium removal prevented"},
  532. {0x0B5A0000, 0, 0,
  533. "Command terminated by host"},
  534. {0x0B5B8000, 0, 0,
  535. "Aborted command, command terminated by host"}
  536. };
  537. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  538. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  539. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  540. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  541. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  542. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  543. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  544. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  545. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  546. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  547. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  548. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  549. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  550. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  551. };
  552. /*
  553. * Function Prototypes
  554. */
  555. static int ipr_reset_alert(struct ipr_cmnd *);
  556. static void ipr_process_ccn(struct ipr_cmnd *);
  557. static void ipr_process_error(struct ipr_cmnd *);
  558. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  559. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  560. enum ipr_shutdown_type);
  561. #ifdef CONFIG_SCSI_IPR_TRACE
  562. /**
  563. * ipr_trc_hook - Add a trace entry to the driver trace
  564. * @ipr_cmd: ipr command struct
  565. * @type: trace type
  566. * @add_data: additional data
  567. *
  568. * Return value:
  569. * none
  570. **/
  571. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  572. u8 type, u32 add_data)
  573. {
  574. struct ipr_trace_entry *trace_entry;
  575. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  576. unsigned int trace_index;
  577. trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
  578. trace_entry = &ioa_cfg->trace[trace_index];
  579. trace_entry->time = jiffies;
  580. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  581. trace_entry->type = type;
  582. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  583. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  584. trace_entry->u.add_data = add_data;
  585. wmb();
  586. }
  587. #else
  588. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  589. #endif
  590. /**
  591. * ipr_lock_and_done - Acquire lock and complete command
  592. * @ipr_cmd: ipr command struct
  593. *
  594. * Return value:
  595. * none
  596. **/
  597. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  598. {
  599. unsigned long lock_flags;
  600. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  601. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  602. ipr_cmd->done(ipr_cmd);
  603. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  604. }
  605. /**
  606. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  607. * @ipr_cmd: ipr command struct
  608. *
  609. * Return value:
  610. * none
  611. **/
  612. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  613. {
  614. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  615. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  616. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  617. int hrrq_id;
  618. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  619. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  620. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  621. ioarcb->data_transfer_length = 0;
  622. ioarcb->read_data_transfer_length = 0;
  623. ioarcb->ioadl_len = 0;
  624. ioarcb->read_ioadl_len = 0;
  625. if (ipr_cmd->ioa_cfg->sis64) {
  626. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  627. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  628. } else {
  629. ioarcb->write_ioadl_addr =
  630. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  631. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  632. }
  633. ioasa->hdr.ioasc = 0;
  634. ioasa->hdr.residual_data_len = 0;
  635. ipr_cmd->scsi_cmd = NULL;
  636. ipr_cmd->sense_buffer[0] = 0;
  637. ipr_cmd->dma_use_sg = 0;
  638. }
  639. /**
  640. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  641. * @ipr_cmd: ipr command struct
  642. * @fast_done: fast done function call-back
  643. *
  644. * Return value:
  645. * none
  646. **/
  647. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  648. void (*fast_done) (struct ipr_cmnd *))
  649. {
  650. ipr_reinit_ipr_cmnd(ipr_cmd);
  651. ipr_cmd->u.scratch = 0;
  652. ipr_cmd->sibling = NULL;
  653. ipr_cmd->eh_comp = NULL;
  654. ipr_cmd->fast_done = fast_done;
  655. timer_setup(&ipr_cmd->timer, NULL, 0);
  656. }
  657. /**
  658. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  659. * @hrrq: hrr queue
  660. *
  661. * Return value:
  662. * pointer to ipr command struct
  663. **/
  664. static
  665. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  666. {
  667. struct ipr_cmnd *ipr_cmd = NULL;
  668. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  669. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  670. struct ipr_cmnd, queue);
  671. list_del(&ipr_cmd->queue);
  672. }
  673. return ipr_cmd;
  674. }
  675. /**
  676. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  677. * @ioa_cfg: ioa config struct
  678. *
  679. * Return value:
  680. * pointer to ipr command struct
  681. **/
  682. static
  683. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  684. {
  685. struct ipr_cmnd *ipr_cmd =
  686. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  687. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  688. return ipr_cmd;
  689. }
  690. /**
  691. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  692. * @ioa_cfg: ioa config struct
  693. * @clr_ints: interrupts to clear
  694. *
  695. * This function masks all interrupts on the adapter, then clears the
  696. * interrupts specified in the mask
  697. *
  698. * Return value:
  699. * none
  700. **/
  701. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  702. u32 clr_ints)
  703. {
  704. int i;
  705. /* Stop new interrupts */
  706. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  707. spin_lock(&ioa_cfg->hrrq[i]._lock);
  708. ioa_cfg->hrrq[i].allow_interrupts = 0;
  709. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  710. }
  711. /* Set interrupt mask to stop all new interrupts */
  712. if (ioa_cfg->sis64)
  713. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  714. else
  715. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  716. /* Clear any pending interrupts */
  717. if (ioa_cfg->sis64)
  718. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  719. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  720. readl(ioa_cfg->regs.sense_interrupt_reg);
  721. }
  722. /**
  723. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  724. * @ioa_cfg: ioa config struct
  725. *
  726. * Return value:
  727. * 0 on success / -EIO on failure
  728. **/
  729. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  730. {
  731. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  732. int rc;
  733. if (pcix_cmd_reg == 0)
  734. return 0;
  735. rc = pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  736. &ioa_cfg->saved_pcix_cmd_reg);
  737. if (rc != PCIBIOS_SUCCESSFUL) {
  738. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  739. return -EIO;
  740. }
  741. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  742. return 0;
  743. }
  744. /**
  745. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  746. * @ioa_cfg: ioa config struct
  747. *
  748. * Return value:
  749. * 0 on success / -EIO on failure
  750. **/
  751. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  752. {
  753. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  754. int rc;
  755. if (pcix_cmd_reg) {
  756. rc = pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  757. ioa_cfg->saved_pcix_cmd_reg);
  758. if (rc != PCIBIOS_SUCCESSFUL) {
  759. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  760. return -EIO;
  761. }
  762. }
  763. return 0;
  764. }
  765. /**
  766. * __ipr_scsi_eh_done - mid-layer done function for aborted ops
  767. * @ipr_cmd: ipr command struct
  768. *
  769. * This function is invoked by the interrupt handler for
  770. * ops generated by the SCSI mid-layer which are being aborted.
  771. *
  772. * Return value:
  773. * none
  774. **/
  775. static void __ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  776. {
  777. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  778. scsi_cmd->result |= (DID_ERROR << 16);
  779. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  780. scsi_done(scsi_cmd);
  781. if (ipr_cmd->eh_comp)
  782. complete(ipr_cmd->eh_comp);
  783. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  784. }
  785. /**
  786. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  787. * @ipr_cmd: ipr command struct
  788. *
  789. * This function is invoked by the interrupt handler for
  790. * ops generated by the SCSI mid-layer which are being aborted.
  791. *
  792. * Return value:
  793. * none
  794. **/
  795. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  796. {
  797. unsigned long hrrq_flags;
  798. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  799. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  800. __ipr_scsi_eh_done(ipr_cmd);
  801. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  802. }
  803. /**
  804. * ipr_fail_all_ops - Fails all outstanding ops.
  805. * @ioa_cfg: ioa config struct
  806. *
  807. * This function fails all outstanding ops.
  808. *
  809. * Return value:
  810. * none
  811. **/
  812. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  813. {
  814. struct ipr_cmnd *ipr_cmd, *temp;
  815. struct ipr_hrr_queue *hrrq;
  816. ENTER;
  817. for_each_hrrq(hrrq, ioa_cfg) {
  818. spin_lock(&hrrq->_lock);
  819. list_for_each_entry_safe(ipr_cmd,
  820. temp, &hrrq->hrrq_pending_q, queue) {
  821. list_del(&ipr_cmd->queue);
  822. ipr_cmd->s.ioasa.hdr.ioasc =
  823. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  824. ipr_cmd->s.ioasa.hdr.ilid =
  825. cpu_to_be32(IPR_DRIVER_ILID);
  826. if (ipr_cmd->scsi_cmd)
  827. ipr_cmd->done = __ipr_scsi_eh_done;
  828. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  829. IPR_IOASC_IOA_WAS_RESET);
  830. timer_delete(&ipr_cmd->timer);
  831. ipr_cmd->done(ipr_cmd);
  832. }
  833. spin_unlock(&hrrq->_lock);
  834. }
  835. LEAVE;
  836. }
  837. /**
  838. * ipr_send_command - Send driver initiated requests.
  839. * @ipr_cmd: ipr command struct
  840. *
  841. * This function sends a command to the adapter using the correct write call.
  842. * In the case of sis64, calculate the ioarcb size required. Then or in the
  843. * appropriate bits.
  844. *
  845. * Return value:
  846. * none
  847. **/
  848. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  849. {
  850. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  851. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  852. if (ioa_cfg->sis64) {
  853. /* The default size is 256 bytes */
  854. send_dma_addr |= 0x1;
  855. /* If the number of ioadls * size of ioadl > 128 bytes,
  856. then use a 512 byte ioarcb */
  857. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  858. send_dma_addr |= 0x4;
  859. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  860. } else
  861. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  862. }
  863. /**
  864. * ipr_do_req - Send driver initiated requests.
  865. * @ipr_cmd: ipr command struct
  866. * @done: done function
  867. * @timeout_func: timeout function
  868. * @timeout: timeout value
  869. *
  870. * This function sends the specified command to the adapter with the
  871. * timeout given. The done function is invoked on command completion.
  872. *
  873. * Return value:
  874. * none
  875. **/
  876. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  877. void (*done) (struct ipr_cmnd *),
  878. void (*timeout_func) (struct timer_list *), u32 timeout)
  879. {
  880. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  881. ipr_cmd->done = done;
  882. ipr_cmd->timer.expires = jiffies + timeout;
  883. ipr_cmd->timer.function = timeout_func;
  884. add_timer(&ipr_cmd->timer);
  885. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  886. ipr_send_command(ipr_cmd);
  887. }
  888. /**
  889. * ipr_internal_cmd_done - Op done function for an internally generated op.
  890. * @ipr_cmd: ipr command struct
  891. *
  892. * This function is the op done function for an internally generated,
  893. * blocking op. It simply wakes the sleeping thread.
  894. *
  895. * Return value:
  896. * none
  897. **/
  898. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  899. {
  900. if (ipr_cmd->sibling)
  901. ipr_cmd->sibling = NULL;
  902. else
  903. complete(&ipr_cmd->completion);
  904. }
  905. /**
  906. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  907. * @ipr_cmd: ipr command struct
  908. * @dma_addr: dma address
  909. * @len: transfer length
  910. * @flags: ioadl flag value
  911. *
  912. * This function initializes an ioadl in the case where there is only a single
  913. * descriptor.
  914. *
  915. * Return value:
  916. * nothing
  917. **/
  918. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  919. u32 len, int flags)
  920. {
  921. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  922. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  923. ipr_cmd->dma_use_sg = 1;
  924. if (ipr_cmd->ioa_cfg->sis64) {
  925. ioadl64->flags = cpu_to_be32(flags);
  926. ioadl64->data_len = cpu_to_be32(len);
  927. ioadl64->address = cpu_to_be64(dma_addr);
  928. ipr_cmd->ioarcb.ioadl_len =
  929. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  930. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  931. } else {
  932. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  933. ioadl->address = cpu_to_be32(dma_addr);
  934. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  935. ipr_cmd->ioarcb.read_ioadl_len =
  936. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  937. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  938. } else {
  939. ipr_cmd->ioarcb.ioadl_len =
  940. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  941. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  942. }
  943. }
  944. }
  945. /**
  946. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  947. * @ipr_cmd: ipr command struct
  948. * @timeout_func: function to invoke if command times out
  949. * @timeout: timeout
  950. *
  951. * Return value:
  952. * none
  953. **/
  954. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  955. void (*timeout_func) (struct timer_list *),
  956. u32 timeout)
  957. {
  958. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  959. init_completion(&ipr_cmd->completion);
  960. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  961. spin_unlock_irq(ioa_cfg->host->host_lock);
  962. wait_for_completion(&ipr_cmd->completion);
  963. spin_lock_irq(ioa_cfg->host->host_lock);
  964. }
  965. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  966. {
  967. unsigned int hrrq;
  968. if (ioa_cfg->hrrq_num == 1)
  969. hrrq = 0;
  970. else {
  971. hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
  972. hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
  973. }
  974. return hrrq;
  975. }
  976. /**
  977. * ipr_send_hcam - Send an HCAM to the adapter.
  978. * @ioa_cfg: ioa config struct
  979. * @type: HCAM type
  980. * @hostrcb: hostrcb struct
  981. *
  982. * This function will send a Host Controlled Async command to the adapter.
  983. * If HCAMs are currently not allowed to be issued to the adapter, it will
  984. * place the hostrcb on the free queue.
  985. *
  986. * Return value:
  987. * none
  988. **/
  989. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  990. struct ipr_hostrcb *hostrcb)
  991. {
  992. struct ipr_cmnd *ipr_cmd;
  993. struct ipr_ioarcb *ioarcb;
  994. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  995. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  996. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  997. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  998. ipr_cmd->u.hostrcb = hostrcb;
  999. ioarcb = &ipr_cmd->ioarcb;
  1000. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  1001. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  1002. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  1003. ioarcb->cmd_pkt.cdb[1] = type;
  1004. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  1005. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  1006. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  1007. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  1008. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  1009. ipr_cmd->done = ipr_process_ccn;
  1010. else
  1011. ipr_cmd->done = ipr_process_error;
  1012. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  1013. ipr_send_command(ipr_cmd);
  1014. } else {
  1015. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  1016. }
  1017. }
  1018. /**
  1019. * ipr_init_res_entry - Initialize a resource entry struct.
  1020. * @res: resource entry struct
  1021. * @cfgtew: config table entry wrapper struct
  1022. *
  1023. * Return value:
  1024. * none
  1025. **/
  1026. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1027. struct ipr_config_table_entry_wrapper *cfgtew)
  1028. {
  1029. int found = 0;
  1030. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1031. struct ipr_resource_entry *gscsi_res = NULL;
  1032. res->needs_sync_complete = 0;
  1033. res->in_erp = 0;
  1034. res->add_to_ml = 0;
  1035. res->del_from_ml = 0;
  1036. res->resetting_device = 0;
  1037. res->reset_occurred = 0;
  1038. res->sdev = NULL;
  1039. if (ioa_cfg->sis64) {
  1040. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1041. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1042. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1043. res->type = cfgtew->u.cfgte64->res_type;
  1044. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1045. sizeof(res->res_path));
  1046. res->bus = 0;
  1047. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1048. sizeof(res->dev_lun.scsi_lun));
  1049. res->lun = scsilun_to_int(&res->dev_lun);
  1050. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1051. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1052. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1053. found = 1;
  1054. res->target = gscsi_res->target;
  1055. break;
  1056. }
  1057. }
  1058. if (!found) {
  1059. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1060. ioa_cfg->max_devs_supported);
  1061. set_bit(res->target, ioa_cfg->target_ids);
  1062. }
  1063. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1064. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1065. res->target = 0;
  1066. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1067. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1068. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1069. ioa_cfg->max_devs_supported);
  1070. set_bit(res->target, ioa_cfg->array_ids);
  1071. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1072. res->bus = IPR_VSET_VIRTUAL_BUS;
  1073. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1074. ioa_cfg->max_devs_supported);
  1075. set_bit(res->target, ioa_cfg->vset_ids);
  1076. } else {
  1077. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1078. ioa_cfg->max_devs_supported);
  1079. set_bit(res->target, ioa_cfg->target_ids);
  1080. }
  1081. } else {
  1082. res->qmodel = IPR_QUEUEING_MODEL(res);
  1083. res->flags = cfgtew->u.cfgte->flags;
  1084. if (res->flags & IPR_IS_IOA_RESOURCE)
  1085. res->type = IPR_RES_TYPE_IOAFP;
  1086. else
  1087. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1088. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1089. res->target = cfgtew->u.cfgte->res_addr.target;
  1090. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1091. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1092. }
  1093. }
  1094. /**
  1095. * ipr_is_same_device - Determine if two devices are the same.
  1096. * @res: resource entry struct
  1097. * @cfgtew: config table entry wrapper struct
  1098. *
  1099. * Return value:
  1100. * 1 if the devices are the same / 0 otherwise
  1101. **/
  1102. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1103. struct ipr_config_table_entry_wrapper *cfgtew)
  1104. {
  1105. if (res->ioa_cfg->sis64) {
  1106. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1107. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1108. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1109. sizeof(cfgtew->u.cfgte64->lun))) {
  1110. return 1;
  1111. }
  1112. } else {
  1113. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1114. res->target == cfgtew->u.cfgte->res_addr.target &&
  1115. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1116. return 1;
  1117. }
  1118. return 0;
  1119. }
  1120. /**
  1121. * __ipr_format_res_path - Format the resource path for printing.
  1122. * @res_path: resource path
  1123. * @buffer: buffer
  1124. * @len: length of buffer provided
  1125. *
  1126. * Return value:
  1127. * pointer to buffer
  1128. **/
  1129. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1130. {
  1131. int i;
  1132. char *p = buffer;
  1133. *p = '\0';
  1134. p += scnprintf(p, buffer + len - p, "%02X", res_path[0]);
  1135. for (i = 1; res_path[i] != 0xff && i < IPR_RES_PATH_BYTES; i++)
  1136. p += scnprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1137. return buffer;
  1138. }
  1139. /**
  1140. * ipr_format_res_path - Format the resource path for printing.
  1141. * @ioa_cfg: ioa config struct
  1142. * @res_path: resource path
  1143. * @buffer: buffer
  1144. * @len: length of buffer provided
  1145. *
  1146. * Return value:
  1147. * pointer to buffer
  1148. **/
  1149. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1150. u8 *res_path, char *buffer, int len)
  1151. {
  1152. char *p = buffer;
  1153. *p = '\0';
  1154. p += scnprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1155. __ipr_format_res_path(res_path, p, len - (p - buffer));
  1156. return buffer;
  1157. }
  1158. /**
  1159. * ipr_update_res_entry - Update the resource entry.
  1160. * @res: resource entry struct
  1161. * @cfgtew: config table entry wrapper struct
  1162. *
  1163. * Return value:
  1164. * none
  1165. **/
  1166. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1167. struct ipr_config_table_entry_wrapper *cfgtew)
  1168. {
  1169. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1170. int new_path = 0;
  1171. if (res->ioa_cfg->sis64) {
  1172. res->flags = be16_to_cpu(cfgtew->u.cfgte64->flags);
  1173. res->res_flags = be16_to_cpu(cfgtew->u.cfgte64->res_flags);
  1174. res->type = cfgtew->u.cfgte64->res_type;
  1175. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1176. sizeof(struct ipr_std_inq_data));
  1177. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1178. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1179. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1180. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1181. sizeof(res->dev_lun.scsi_lun));
  1182. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1183. sizeof(res->res_path))) {
  1184. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1185. sizeof(res->res_path));
  1186. new_path = 1;
  1187. }
  1188. if (res->sdev && new_path)
  1189. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1190. ipr_format_res_path(res->ioa_cfg,
  1191. res->res_path, buffer, sizeof(buffer)));
  1192. } else {
  1193. res->flags = cfgtew->u.cfgte->flags;
  1194. if (res->flags & IPR_IS_IOA_RESOURCE)
  1195. res->type = IPR_RES_TYPE_IOAFP;
  1196. else
  1197. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1198. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1199. sizeof(struct ipr_std_inq_data));
  1200. res->qmodel = IPR_QUEUEING_MODEL(res);
  1201. res->res_handle = cfgtew->u.cfgte->res_handle;
  1202. }
  1203. }
  1204. /**
  1205. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1206. * for the resource.
  1207. * @res: resource entry struct
  1208. *
  1209. * Return value:
  1210. * none
  1211. **/
  1212. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1213. {
  1214. struct ipr_resource_entry *gscsi_res = NULL;
  1215. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1216. if (!ioa_cfg->sis64)
  1217. return;
  1218. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1219. clear_bit(res->target, ioa_cfg->array_ids);
  1220. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1221. clear_bit(res->target, ioa_cfg->vset_ids);
  1222. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1223. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1224. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1225. return;
  1226. clear_bit(res->target, ioa_cfg->target_ids);
  1227. } else if (res->bus == 0)
  1228. clear_bit(res->target, ioa_cfg->target_ids);
  1229. }
  1230. /**
  1231. * ipr_handle_config_change - Handle a config change from the adapter
  1232. * @ioa_cfg: ioa config struct
  1233. * @hostrcb: hostrcb
  1234. *
  1235. * Return value:
  1236. * none
  1237. **/
  1238. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1239. struct ipr_hostrcb *hostrcb)
  1240. {
  1241. struct ipr_resource_entry *res = NULL;
  1242. struct ipr_config_table_entry_wrapper cfgtew;
  1243. __be32 cc_res_handle;
  1244. u32 is_ndn = 1;
  1245. if (ioa_cfg->sis64) {
  1246. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1247. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1248. } else {
  1249. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1250. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1251. }
  1252. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1253. if (res->res_handle == cc_res_handle) {
  1254. is_ndn = 0;
  1255. break;
  1256. }
  1257. }
  1258. if (is_ndn) {
  1259. if (list_empty(&ioa_cfg->free_res_q)) {
  1260. ipr_send_hcam(ioa_cfg,
  1261. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1262. hostrcb);
  1263. return;
  1264. }
  1265. res = list_entry(ioa_cfg->free_res_q.next,
  1266. struct ipr_resource_entry, queue);
  1267. list_del(&res->queue);
  1268. ipr_init_res_entry(res, &cfgtew);
  1269. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1270. }
  1271. ipr_update_res_entry(res, &cfgtew);
  1272. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1273. if (res->sdev) {
  1274. res->del_from_ml = 1;
  1275. res->res_handle = IPR_INVALID_RES_HANDLE;
  1276. schedule_work(&ioa_cfg->work_q);
  1277. } else {
  1278. ipr_clear_res_target(res);
  1279. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1280. }
  1281. } else if (!res->sdev || res->del_from_ml) {
  1282. res->add_to_ml = 1;
  1283. schedule_work(&ioa_cfg->work_q);
  1284. }
  1285. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1286. }
  1287. /**
  1288. * ipr_process_ccn - Op done function for a CCN.
  1289. * @ipr_cmd: ipr command struct
  1290. *
  1291. * This function is the op done function for a configuration
  1292. * change notification host controlled async from the adapter.
  1293. *
  1294. * Return value:
  1295. * none
  1296. **/
  1297. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1298. {
  1299. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1300. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1301. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1302. list_del_init(&hostrcb->queue);
  1303. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1304. if (ioasc) {
  1305. if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  1306. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST)
  1307. dev_err(&ioa_cfg->pdev->dev,
  1308. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1309. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1310. } else {
  1311. ipr_handle_config_change(ioa_cfg, hostrcb);
  1312. }
  1313. }
  1314. /**
  1315. * strip_whitespace - Strip and pad trailing whitespace.
  1316. * @i: size of buffer
  1317. * @buf: string to modify
  1318. *
  1319. * This function will strip all trailing whitespace and
  1320. * NUL terminate the string.
  1321. *
  1322. **/
  1323. static void strip_whitespace(int i, char *buf)
  1324. {
  1325. if (i < 1)
  1326. return;
  1327. i--;
  1328. while (i && buf[i] == ' ')
  1329. i--;
  1330. buf[i+1] = '\0';
  1331. }
  1332. /**
  1333. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1334. * @prefix: string to print at start of printk
  1335. * @hostrcb: hostrcb pointer
  1336. * @vpd: vendor/product id/sn struct
  1337. *
  1338. * Return value:
  1339. * none
  1340. **/
  1341. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1342. struct ipr_vpd *vpd)
  1343. {
  1344. char vendor_id[IPR_VENDOR_ID_LEN + 1];
  1345. char product_id[IPR_PROD_ID_LEN + 1];
  1346. char sn[IPR_SERIAL_NUM_LEN + 1];
  1347. memcpy(vendor_id, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1348. strip_whitespace(IPR_VENDOR_ID_LEN, vendor_id);
  1349. memcpy(product_id, vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1350. strip_whitespace(IPR_PROD_ID_LEN, product_id);
  1351. memcpy(sn, vpd->sn, IPR_SERIAL_NUM_LEN);
  1352. strip_whitespace(IPR_SERIAL_NUM_LEN, sn);
  1353. ipr_hcam_err(hostrcb, "%s VPID/SN: %s %s %s\n", prefix,
  1354. vendor_id, product_id, sn);
  1355. }
  1356. /**
  1357. * ipr_log_vpd - Log the passed VPD to the error log.
  1358. * @vpd: vendor/product id/sn struct
  1359. *
  1360. * Return value:
  1361. * none
  1362. **/
  1363. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1364. {
  1365. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1366. + IPR_SERIAL_NUM_LEN];
  1367. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1368. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1369. IPR_PROD_ID_LEN);
  1370. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1371. ipr_err("Vendor/Product ID: %s\n", buffer);
  1372. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1373. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1374. ipr_err(" Serial Number: %s\n", buffer);
  1375. }
  1376. /**
  1377. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1378. * @prefix: string to print at start of printk
  1379. * @hostrcb: hostrcb pointer
  1380. * @vpd: vendor/product id/sn/wwn struct
  1381. *
  1382. * Return value:
  1383. * none
  1384. **/
  1385. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1386. struct ipr_ext_vpd *vpd)
  1387. {
  1388. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1389. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1390. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1391. }
  1392. /**
  1393. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1394. * @vpd: vendor/product id/sn/wwn struct
  1395. *
  1396. * Return value:
  1397. * none
  1398. **/
  1399. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1400. {
  1401. ipr_log_vpd(&vpd->vpd);
  1402. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1403. be32_to_cpu(vpd->wwid[1]));
  1404. }
  1405. /**
  1406. * ipr_log_enhanced_cache_error - Log a cache error.
  1407. * @ioa_cfg: ioa config struct
  1408. * @hostrcb: hostrcb struct
  1409. *
  1410. * Return value:
  1411. * none
  1412. **/
  1413. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1414. struct ipr_hostrcb *hostrcb)
  1415. {
  1416. struct ipr_hostrcb_type_12_error *error;
  1417. if (ioa_cfg->sis64)
  1418. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1419. else
  1420. error = &hostrcb->hcam.u.error.u.type_12_error;
  1421. ipr_err("-----Current Configuration-----\n");
  1422. ipr_err("Cache Directory Card Information:\n");
  1423. ipr_log_ext_vpd(&error->ioa_vpd);
  1424. ipr_err("Adapter Card Information:\n");
  1425. ipr_log_ext_vpd(&error->cfc_vpd);
  1426. ipr_err("-----Expected Configuration-----\n");
  1427. ipr_err("Cache Directory Card Information:\n");
  1428. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1429. ipr_err("Adapter Card Information:\n");
  1430. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1431. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1432. be32_to_cpu(error->ioa_data[0]),
  1433. be32_to_cpu(error->ioa_data[1]),
  1434. be32_to_cpu(error->ioa_data[2]));
  1435. }
  1436. /**
  1437. * ipr_log_cache_error - Log a cache error.
  1438. * @ioa_cfg: ioa config struct
  1439. * @hostrcb: hostrcb struct
  1440. *
  1441. * Return value:
  1442. * none
  1443. **/
  1444. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1445. struct ipr_hostrcb *hostrcb)
  1446. {
  1447. struct ipr_hostrcb_type_02_error *error =
  1448. &hostrcb->hcam.u.error.u.type_02_error;
  1449. ipr_err("-----Current Configuration-----\n");
  1450. ipr_err("Cache Directory Card Information:\n");
  1451. ipr_log_vpd(&error->ioa_vpd);
  1452. ipr_err("Adapter Card Information:\n");
  1453. ipr_log_vpd(&error->cfc_vpd);
  1454. ipr_err("-----Expected Configuration-----\n");
  1455. ipr_err("Cache Directory Card Information:\n");
  1456. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1457. ipr_err("Adapter Card Information:\n");
  1458. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1459. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1460. be32_to_cpu(error->ioa_data[0]),
  1461. be32_to_cpu(error->ioa_data[1]),
  1462. be32_to_cpu(error->ioa_data[2]));
  1463. }
  1464. /**
  1465. * ipr_log_enhanced_config_error - Log a configuration error.
  1466. * @ioa_cfg: ioa config struct
  1467. * @hostrcb: hostrcb struct
  1468. *
  1469. * Return value:
  1470. * none
  1471. **/
  1472. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1473. struct ipr_hostrcb *hostrcb)
  1474. {
  1475. int errors_logged, i;
  1476. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1477. struct ipr_hostrcb_type_13_error *error;
  1478. error = &hostrcb->hcam.u.error.u.type_13_error;
  1479. errors_logged = be32_to_cpu(error->errors_logged);
  1480. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1481. be32_to_cpu(error->errors_detected), errors_logged);
  1482. dev_entry = error->dev;
  1483. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1484. ipr_err_separator;
  1485. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1486. ipr_log_ext_vpd(&dev_entry->vpd);
  1487. ipr_err("-----New Device Information-----\n");
  1488. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1489. ipr_err("Cache Directory Card Information:\n");
  1490. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1491. ipr_err("Adapter Card Information:\n");
  1492. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1493. }
  1494. }
  1495. /**
  1496. * ipr_log_sis64_config_error - Log a device error.
  1497. * @ioa_cfg: ioa config struct
  1498. * @hostrcb: hostrcb struct
  1499. *
  1500. * Return value:
  1501. * none
  1502. **/
  1503. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1504. struct ipr_hostrcb *hostrcb)
  1505. {
  1506. int errors_logged, i;
  1507. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1508. struct ipr_hostrcb_type_23_error *error;
  1509. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1510. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1511. errors_logged = be32_to_cpu(error->errors_logged);
  1512. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1513. be32_to_cpu(error->errors_detected), errors_logged);
  1514. dev_entry = error->dev;
  1515. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1516. ipr_err_separator;
  1517. ipr_err("Device %d : %s", i + 1,
  1518. __ipr_format_res_path(dev_entry->res_path,
  1519. buffer, sizeof(buffer)));
  1520. ipr_log_ext_vpd(&dev_entry->vpd);
  1521. ipr_err("-----New Device Information-----\n");
  1522. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1523. ipr_err("Cache Directory Card Information:\n");
  1524. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1525. ipr_err("Adapter Card Information:\n");
  1526. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1527. }
  1528. }
  1529. /**
  1530. * ipr_log_config_error - Log a configuration error.
  1531. * @ioa_cfg: ioa config struct
  1532. * @hostrcb: hostrcb struct
  1533. *
  1534. * Return value:
  1535. * none
  1536. **/
  1537. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1538. struct ipr_hostrcb *hostrcb)
  1539. {
  1540. int errors_logged, i;
  1541. struct ipr_hostrcb_device_data_entry *dev_entry;
  1542. struct ipr_hostrcb_type_03_error *error;
  1543. error = &hostrcb->hcam.u.error.u.type_03_error;
  1544. errors_logged = be32_to_cpu(error->errors_logged);
  1545. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1546. be32_to_cpu(error->errors_detected), errors_logged);
  1547. dev_entry = error->dev;
  1548. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1549. ipr_err_separator;
  1550. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1551. ipr_log_vpd(&dev_entry->vpd);
  1552. ipr_err("-----New Device Information-----\n");
  1553. ipr_log_vpd(&dev_entry->new_vpd);
  1554. ipr_err("Cache Directory Card Information:\n");
  1555. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1556. ipr_err("Adapter Card Information:\n");
  1557. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1558. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1559. be32_to_cpu(dev_entry->ioa_data[0]),
  1560. be32_to_cpu(dev_entry->ioa_data[1]),
  1561. be32_to_cpu(dev_entry->ioa_data[2]),
  1562. be32_to_cpu(dev_entry->ioa_data[3]),
  1563. be32_to_cpu(dev_entry->ioa_data[4]));
  1564. }
  1565. }
  1566. /**
  1567. * ipr_log_enhanced_array_error - Log an array configuration error.
  1568. * @ioa_cfg: ioa config struct
  1569. * @hostrcb: hostrcb struct
  1570. *
  1571. * Return value:
  1572. * none
  1573. **/
  1574. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1575. struct ipr_hostrcb *hostrcb)
  1576. {
  1577. int i, num_entries;
  1578. struct ipr_hostrcb_type_14_error *error;
  1579. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1580. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1581. error = &hostrcb->hcam.u.error.u.type_14_error;
  1582. ipr_err_separator;
  1583. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1584. error->protection_level,
  1585. ioa_cfg->host->host_no,
  1586. error->last_func_vset_res_addr.bus,
  1587. error->last_func_vset_res_addr.target,
  1588. error->last_func_vset_res_addr.lun);
  1589. ipr_err_separator;
  1590. array_entry = error->array_member;
  1591. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1592. ARRAY_SIZE(error->array_member));
  1593. for (i = 0; i < num_entries; i++, array_entry++) {
  1594. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1595. continue;
  1596. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1597. ipr_err("Exposed Array Member %d:\n", i);
  1598. else
  1599. ipr_err("Array Member %d:\n", i);
  1600. ipr_log_ext_vpd(&array_entry->vpd);
  1601. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1602. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1603. "Expected Location");
  1604. ipr_err_separator;
  1605. }
  1606. }
  1607. /**
  1608. * ipr_log_array_error - Log an array configuration error.
  1609. * @ioa_cfg: ioa config struct
  1610. * @hostrcb: hostrcb struct
  1611. *
  1612. * Return value:
  1613. * none
  1614. **/
  1615. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1616. struct ipr_hostrcb *hostrcb)
  1617. {
  1618. int i;
  1619. struct ipr_hostrcb_type_04_error *error;
  1620. struct ipr_hostrcb_array_data_entry *array_entry;
  1621. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1622. error = &hostrcb->hcam.u.error.u.type_04_error;
  1623. ipr_err_separator;
  1624. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1625. error->protection_level,
  1626. ioa_cfg->host->host_no,
  1627. error->last_func_vset_res_addr.bus,
  1628. error->last_func_vset_res_addr.target,
  1629. error->last_func_vset_res_addr.lun);
  1630. ipr_err_separator;
  1631. array_entry = error->array_member;
  1632. for (i = 0; i < 18; i++) {
  1633. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1634. continue;
  1635. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1636. ipr_err("Exposed Array Member %d:\n", i);
  1637. else
  1638. ipr_err("Array Member %d:\n", i);
  1639. ipr_log_vpd(&array_entry->vpd);
  1640. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1641. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1642. "Expected Location");
  1643. ipr_err_separator;
  1644. if (i == 9)
  1645. array_entry = error->array_member2;
  1646. else
  1647. array_entry++;
  1648. }
  1649. }
  1650. /**
  1651. * ipr_log_hex_data - Log additional hex IOA error data.
  1652. * @ioa_cfg: ioa config struct
  1653. * @data: IOA error data
  1654. * @len: data length
  1655. *
  1656. * Return value:
  1657. * none
  1658. **/
  1659. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, __be32 *data, int len)
  1660. {
  1661. int i;
  1662. if (len == 0)
  1663. return;
  1664. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1665. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1666. for (i = 0; i < len / 4; i += 4) {
  1667. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1668. be32_to_cpu(data[i]),
  1669. be32_to_cpu(data[i+1]),
  1670. be32_to_cpu(data[i+2]),
  1671. be32_to_cpu(data[i+3]));
  1672. }
  1673. }
  1674. /**
  1675. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1676. * @ioa_cfg: ioa config struct
  1677. * @hostrcb: hostrcb struct
  1678. *
  1679. * Return value:
  1680. * none
  1681. **/
  1682. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1683. struct ipr_hostrcb *hostrcb)
  1684. {
  1685. struct ipr_hostrcb_type_17_error *error;
  1686. if (ioa_cfg->sis64)
  1687. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1688. else
  1689. error = &hostrcb->hcam.u.error.u.type_17_error;
  1690. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1691. strim(error->failure_reason);
  1692. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1693. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1694. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1695. ipr_log_hex_data(ioa_cfg, error->data,
  1696. be32_to_cpu(hostrcb->hcam.length) -
  1697. (offsetof(struct ipr_hostrcb_error, u) +
  1698. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1699. }
  1700. /**
  1701. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1702. * @ioa_cfg: ioa config struct
  1703. * @hostrcb: hostrcb struct
  1704. *
  1705. * Return value:
  1706. * none
  1707. **/
  1708. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1709. struct ipr_hostrcb *hostrcb)
  1710. {
  1711. struct ipr_hostrcb_type_07_error *error;
  1712. error = &hostrcb->hcam.u.error.u.type_07_error;
  1713. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1714. strim(error->failure_reason);
  1715. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1716. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1717. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1718. ipr_log_hex_data(ioa_cfg, error->data,
  1719. be32_to_cpu(hostrcb->hcam.length) -
  1720. (offsetof(struct ipr_hostrcb_error, u) +
  1721. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1722. }
  1723. static const struct {
  1724. u8 active;
  1725. char *desc;
  1726. } path_active_desc[] = {
  1727. { IPR_PATH_NO_INFO, "Path" },
  1728. { IPR_PATH_ACTIVE, "Active path" },
  1729. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1730. };
  1731. static const struct {
  1732. u8 state;
  1733. char *desc;
  1734. } path_state_desc[] = {
  1735. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1736. { IPR_PATH_HEALTHY, "is healthy" },
  1737. { IPR_PATH_DEGRADED, "is degraded" },
  1738. { IPR_PATH_FAILED, "is failed" }
  1739. };
  1740. /**
  1741. * ipr_log_fabric_path - Log a fabric path error
  1742. * @hostrcb: hostrcb struct
  1743. * @fabric: fabric descriptor
  1744. *
  1745. * Return value:
  1746. * none
  1747. **/
  1748. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1749. struct ipr_hostrcb_fabric_desc *fabric)
  1750. {
  1751. int i, j;
  1752. u8 path_state = fabric->path_state;
  1753. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1754. u8 state = path_state & IPR_PATH_STATE_MASK;
  1755. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1756. if (path_active_desc[i].active != active)
  1757. continue;
  1758. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1759. if (path_state_desc[j].state != state)
  1760. continue;
  1761. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1762. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1763. path_active_desc[i].desc, path_state_desc[j].desc,
  1764. fabric->ioa_port);
  1765. } else if (fabric->cascaded_expander == 0xff) {
  1766. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1767. path_active_desc[i].desc, path_state_desc[j].desc,
  1768. fabric->ioa_port, fabric->phy);
  1769. } else if (fabric->phy == 0xff) {
  1770. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1771. path_active_desc[i].desc, path_state_desc[j].desc,
  1772. fabric->ioa_port, fabric->cascaded_expander);
  1773. } else {
  1774. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1775. path_active_desc[i].desc, path_state_desc[j].desc,
  1776. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1777. }
  1778. return;
  1779. }
  1780. }
  1781. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1782. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1783. }
  1784. /**
  1785. * ipr_log64_fabric_path - Log a fabric path error
  1786. * @hostrcb: hostrcb struct
  1787. * @fabric: fabric descriptor
  1788. *
  1789. * Return value:
  1790. * none
  1791. **/
  1792. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1793. struct ipr_hostrcb64_fabric_desc *fabric)
  1794. {
  1795. int i, j;
  1796. u8 path_state = fabric->path_state;
  1797. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1798. u8 state = path_state & IPR_PATH_STATE_MASK;
  1799. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1800. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1801. if (path_active_desc[i].active != active)
  1802. continue;
  1803. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1804. if (path_state_desc[j].state != state)
  1805. continue;
  1806. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1807. path_active_desc[i].desc, path_state_desc[j].desc,
  1808. ipr_format_res_path(hostrcb->ioa_cfg,
  1809. fabric->res_path,
  1810. buffer, sizeof(buffer)));
  1811. return;
  1812. }
  1813. }
  1814. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1815. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1816. buffer, sizeof(buffer)));
  1817. }
  1818. static const struct {
  1819. u8 type;
  1820. char *desc;
  1821. } path_type_desc[] = {
  1822. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1823. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1824. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1825. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1826. };
  1827. static const struct {
  1828. u8 status;
  1829. char *desc;
  1830. } path_status_desc[] = {
  1831. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1832. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1833. { IPR_PATH_CFG_FAILED, "Failed" },
  1834. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1835. { IPR_PATH_NOT_DETECTED, "Missing" },
  1836. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1837. };
  1838. static const char *link_rate[] = {
  1839. "unknown",
  1840. "disabled",
  1841. "phy reset problem",
  1842. "spinup hold",
  1843. "port selector",
  1844. "unknown",
  1845. "unknown",
  1846. "unknown",
  1847. "1.5Gbps",
  1848. "3.0Gbps",
  1849. "unknown",
  1850. "unknown",
  1851. "unknown",
  1852. "unknown",
  1853. "unknown",
  1854. "unknown"
  1855. };
  1856. /**
  1857. * ipr_log_path_elem - Log a fabric path element.
  1858. * @hostrcb: hostrcb struct
  1859. * @cfg: fabric path element struct
  1860. *
  1861. * Return value:
  1862. * none
  1863. **/
  1864. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1865. struct ipr_hostrcb_config_element *cfg)
  1866. {
  1867. int i, j;
  1868. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1869. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1870. if (type == IPR_PATH_CFG_NOT_EXIST)
  1871. return;
  1872. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1873. if (path_type_desc[i].type != type)
  1874. continue;
  1875. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1876. if (path_status_desc[j].status != status)
  1877. continue;
  1878. if (type == IPR_PATH_CFG_IOA_PORT) {
  1879. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1880. path_status_desc[j].desc, path_type_desc[i].desc,
  1881. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1882. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1883. } else {
  1884. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1885. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1886. path_status_desc[j].desc, path_type_desc[i].desc,
  1887. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1888. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1889. } else if (cfg->cascaded_expander == 0xff) {
  1890. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1891. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1892. path_type_desc[i].desc, cfg->phy,
  1893. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1894. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1895. } else if (cfg->phy == 0xff) {
  1896. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1897. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1898. path_type_desc[i].desc, cfg->cascaded_expander,
  1899. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1900. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1901. } else {
  1902. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1903. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1904. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1905. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1906. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1907. }
  1908. }
  1909. return;
  1910. }
  1911. }
  1912. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1913. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1914. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1915. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1916. }
  1917. /**
  1918. * ipr_log64_path_elem - Log a fabric path element.
  1919. * @hostrcb: hostrcb struct
  1920. * @cfg: fabric path element struct
  1921. *
  1922. * Return value:
  1923. * none
  1924. **/
  1925. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1926. struct ipr_hostrcb64_config_element *cfg)
  1927. {
  1928. int i, j;
  1929. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1930. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1931. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1932. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1933. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1934. return;
  1935. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1936. if (path_type_desc[i].type != type)
  1937. continue;
  1938. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1939. if (path_status_desc[j].status != status)
  1940. continue;
  1941. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  1942. path_status_desc[j].desc, path_type_desc[i].desc,
  1943. ipr_format_res_path(hostrcb->ioa_cfg,
  1944. cfg->res_path, buffer, sizeof(buffer)),
  1945. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1946. be32_to_cpu(cfg->wwid[0]),
  1947. be32_to_cpu(cfg->wwid[1]));
  1948. return;
  1949. }
  1950. }
  1951. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  1952. "WWN=%08X%08X\n", cfg->type_status,
  1953. ipr_format_res_path(hostrcb->ioa_cfg,
  1954. cfg->res_path, buffer, sizeof(buffer)),
  1955. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1956. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1957. }
  1958. /**
  1959. * ipr_log_fabric_error - Log a fabric error.
  1960. * @ioa_cfg: ioa config struct
  1961. * @hostrcb: hostrcb struct
  1962. *
  1963. * Return value:
  1964. * none
  1965. **/
  1966. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  1967. struct ipr_hostrcb *hostrcb)
  1968. {
  1969. struct ipr_hostrcb_type_20_error *error;
  1970. struct ipr_hostrcb_fabric_desc *fabric;
  1971. struct ipr_hostrcb_config_element *cfg;
  1972. int i, add_len;
  1973. error = &hostrcb->hcam.u.error.u.type_20_error;
  1974. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1975. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  1976. add_len = be32_to_cpu(hostrcb->hcam.length) -
  1977. (offsetof(struct ipr_hostrcb_error, u) +
  1978. offsetof(struct ipr_hostrcb_type_20_error, desc));
  1979. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  1980. ipr_log_fabric_path(hostrcb, fabric);
  1981. for_each_fabric_cfg(fabric, cfg)
  1982. ipr_log_path_elem(hostrcb, cfg);
  1983. add_len -= be16_to_cpu(fabric->length);
  1984. fabric = (struct ipr_hostrcb_fabric_desc *)
  1985. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  1986. }
  1987. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  1988. }
  1989. /**
  1990. * ipr_log_sis64_array_error - Log a sis64 array error.
  1991. * @ioa_cfg: ioa config struct
  1992. * @hostrcb: hostrcb struct
  1993. *
  1994. * Return value:
  1995. * none
  1996. **/
  1997. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1998. struct ipr_hostrcb *hostrcb)
  1999. {
  2000. int i, num_entries;
  2001. struct ipr_hostrcb_type_24_error *error;
  2002. struct ipr_hostrcb64_array_data_entry *array_entry;
  2003. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2004. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2005. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2006. ipr_err_separator;
  2007. ipr_err("RAID %s Array Configuration: %s\n",
  2008. error->protection_level,
  2009. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2010. buffer, sizeof(buffer)));
  2011. ipr_err_separator;
  2012. array_entry = error->array_member;
  2013. num_entries = min_t(u32, error->num_entries,
  2014. ARRAY_SIZE(error->array_member));
  2015. for (i = 0; i < num_entries; i++, array_entry++) {
  2016. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2017. continue;
  2018. if (error->exposed_mode_adn == i)
  2019. ipr_err("Exposed Array Member %d:\n", i);
  2020. else
  2021. ipr_err("Array Member %d:\n", i);
  2022. ipr_err("Array Member %d:\n", i);
  2023. ipr_log_ext_vpd(&array_entry->vpd);
  2024. ipr_err("Current Location: %s\n",
  2025. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2026. buffer, sizeof(buffer)));
  2027. ipr_err("Expected Location: %s\n",
  2028. ipr_format_res_path(ioa_cfg,
  2029. array_entry->expected_res_path,
  2030. buffer, sizeof(buffer)));
  2031. ipr_err_separator;
  2032. }
  2033. }
  2034. /**
  2035. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2036. * @ioa_cfg: ioa config struct
  2037. * @hostrcb: hostrcb struct
  2038. *
  2039. * Return value:
  2040. * none
  2041. **/
  2042. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2043. struct ipr_hostrcb *hostrcb)
  2044. {
  2045. struct ipr_hostrcb_type_30_error *error;
  2046. struct ipr_hostrcb64_fabric_desc *fabric;
  2047. struct ipr_hostrcb64_config_element *cfg;
  2048. int i, add_len;
  2049. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2050. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2051. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2052. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2053. (offsetof(struct ipr_hostrcb64_error, u) +
  2054. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2055. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2056. ipr_log64_fabric_path(hostrcb, fabric);
  2057. for_each_fabric_cfg(fabric, cfg)
  2058. ipr_log64_path_elem(hostrcb, cfg);
  2059. add_len -= be16_to_cpu(fabric->length);
  2060. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2061. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2062. }
  2063. ipr_log_hex_data(ioa_cfg, (__be32 *)fabric, add_len);
  2064. }
  2065. /**
  2066. * ipr_log_sis64_service_required_error - Log a sis64 service required error.
  2067. * @ioa_cfg: ioa config struct
  2068. * @hostrcb: hostrcb struct
  2069. *
  2070. * Return value:
  2071. * none
  2072. **/
  2073. static void ipr_log_sis64_service_required_error(struct ipr_ioa_cfg *ioa_cfg,
  2074. struct ipr_hostrcb *hostrcb)
  2075. {
  2076. struct ipr_hostrcb_type_41_error *error;
  2077. error = &hostrcb->hcam.u.error64.u.type_41_error;
  2078. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2079. ipr_err("Primary Failure Reason: %s\n", error->failure_reason);
  2080. ipr_log_hex_data(ioa_cfg, error->data,
  2081. be32_to_cpu(hostrcb->hcam.length) -
  2082. (offsetof(struct ipr_hostrcb_error, u) +
  2083. offsetof(struct ipr_hostrcb_type_41_error, data)));
  2084. }
  2085. /**
  2086. * ipr_log_generic_error - Log an adapter error.
  2087. * @ioa_cfg: ioa config struct
  2088. * @hostrcb: hostrcb struct
  2089. *
  2090. * Return value:
  2091. * none
  2092. **/
  2093. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2094. struct ipr_hostrcb *hostrcb)
  2095. {
  2096. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2097. be32_to_cpu(hostrcb->hcam.length));
  2098. }
  2099. /**
  2100. * ipr_log_sis64_device_error - Log a cache error.
  2101. * @ioa_cfg: ioa config struct
  2102. * @hostrcb: hostrcb struct
  2103. *
  2104. * Return value:
  2105. * none
  2106. **/
  2107. static void ipr_log_sis64_device_error(struct ipr_ioa_cfg *ioa_cfg,
  2108. struct ipr_hostrcb *hostrcb)
  2109. {
  2110. struct ipr_hostrcb_type_21_error *error;
  2111. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2112. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2113. ipr_err("-----Failing Device Information-----\n");
  2114. ipr_err("World Wide Unique ID: %08X%08X%08X%08X\n",
  2115. be32_to_cpu(error->wwn[0]), be32_to_cpu(error->wwn[1]),
  2116. be32_to_cpu(error->wwn[2]), be32_to_cpu(error->wwn[3]));
  2117. ipr_err("Device Resource Path: %s\n",
  2118. __ipr_format_res_path(error->res_path,
  2119. buffer, sizeof(buffer)));
  2120. error->primary_problem_desc[sizeof(error->primary_problem_desc) - 1] = '\0';
  2121. error->second_problem_desc[sizeof(error->second_problem_desc) - 1] = '\0';
  2122. ipr_err("Primary Problem Description: %s\n", error->primary_problem_desc);
  2123. ipr_err("Secondary Problem Description: %s\n", error->second_problem_desc);
  2124. ipr_err("SCSI Sense Data:\n");
  2125. ipr_log_hex_data(ioa_cfg, error->sense_data, sizeof(error->sense_data));
  2126. ipr_err("SCSI Command Descriptor Block: \n");
  2127. ipr_log_hex_data(ioa_cfg, error->cdb, sizeof(error->cdb));
  2128. ipr_err("Additional IOA Data:\n");
  2129. ipr_log_hex_data(ioa_cfg, error->ioa_data, be32_to_cpu(error->length_of_error));
  2130. }
  2131. /**
  2132. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2133. * @ioasc: IOASC
  2134. *
  2135. * This function will return the index of into the ipr_error_table
  2136. * for the specified IOASC. If the IOASC is not in the table,
  2137. * 0 will be returned, which points to the entry used for unknown errors.
  2138. *
  2139. * Return value:
  2140. * index into the ipr_error_table
  2141. **/
  2142. static u32 ipr_get_error(u32 ioasc)
  2143. {
  2144. int i;
  2145. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2146. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2147. return i;
  2148. return 0;
  2149. }
  2150. /**
  2151. * ipr_handle_log_data - Log an adapter error.
  2152. * @ioa_cfg: ioa config struct
  2153. * @hostrcb: hostrcb struct
  2154. *
  2155. * This function logs an adapter error to the system.
  2156. *
  2157. * Return value:
  2158. * none
  2159. **/
  2160. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2161. struct ipr_hostrcb *hostrcb)
  2162. {
  2163. u32 ioasc;
  2164. int error_index;
  2165. struct ipr_hostrcb_type_21_error *error;
  2166. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2167. return;
  2168. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2169. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2170. if (ioa_cfg->sis64)
  2171. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2172. else
  2173. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2174. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2175. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2176. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2177. scsi_report_bus_reset(ioa_cfg->host,
  2178. hostrcb->hcam.u.error.fd_res_addr.bus);
  2179. }
  2180. error_index = ipr_get_error(ioasc);
  2181. if (!ipr_error_table[error_index].log_hcam)
  2182. return;
  2183. if (ioasc == IPR_IOASC_HW_CMD_FAILED &&
  2184. hostrcb->hcam.overlay_id == IPR_HOST_RCB_OVERLAY_ID_21) {
  2185. error = &hostrcb->hcam.u.error64.u.type_21_error;
  2186. if (((be32_to_cpu(error->sense_data[0]) & 0x0000ff00) >> 8) == ILLEGAL_REQUEST &&
  2187. ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  2188. return;
  2189. }
  2190. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2191. /* Set indication we have logged an error */
  2192. ioa_cfg->errors_logged++;
  2193. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2194. return;
  2195. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2196. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2197. switch (hostrcb->hcam.overlay_id) {
  2198. case IPR_HOST_RCB_OVERLAY_ID_2:
  2199. ipr_log_cache_error(ioa_cfg, hostrcb);
  2200. break;
  2201. case IPR_HOST_RCB_OVERLAY_ID_3:
  2202. ipr_log_config_error(ioa_cfg, hostrcb);
  2203. break;
  2204. case IPR_HOST_RCB_OVERLAY_ID_4:
  2205. case IPR_HOST_RCB_OVERLAY_ID_6:
  2206. ipr_log_array_error(ioa_cfg, hostrcb);
  2207. break;
  2208. case IPR_HOST_RCB_OVERLAY_ID_7:
  2209. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2210. break;
  2211. case IPR_HOST_RCB_OVERLAY_ID_12:
  2212. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2213. break;
  2214. case IPR_HOST_RCB_OVERLAY_ID_13:
  2215. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2216. break;
  2217. case IPR_HOST_RCB_OVERLAY_ID_14:
  2218. case IPR_HOST_RCB_OVERLAY_ID_16:
  2219. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2220. break;
  2221. case IPR_HOST_RCB_OVERLAY_ID_17:
  2222. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2223. break;
  2224. case IPR_HOST_RCB_OVERLAY_ID_20:
  2225. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2226. break;
  2227. case IPR_HOST_RCB_OVERLAY_ID_21:
  2228. ipr_log_sis64_device_error(ioa_cfg, hostrcb);
  2229. break;
  2230. case IPR_HOST_RCB_OVERLAY_ID_23:
  2231. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2232. break;
  2233. case IPR_HOST_RCB_OVERLAY_ID_24:
  2234. case IPR_HOST_RCB_OVERLAY_ID_26:
  2235. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2236. break;
  2237. case IPR_HOST_RCB_OVERLAY_ID_30:
  2238. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2239. break;
  2240. case IPR_HOST_RCB_OVERLAY_ID_41:
  2241. ipr_log_sis64_service_required_error(ioa_cfg, hostrcb);
  2242. break;
  2243. case IPR_HOST_RCB_OVERLAY_ID_1:
  2244. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2245. default:
  2246. ipr_log_generic_error(ioa_cfg, hostrcb);
  2247. break;
  2248. }
  2249. }
  2250. static struct ipr_hostrcb *ipr_get_free_hostrcb(struct ipr_ioa_cfg *ioa)
  2251. {
  2252. struct ipr_hostrcb *hostrcb;
  2253. hostrcb = list_first_entry_or_null(&ioa->hostrcb_free_q,
  2254. struct ipr_hostrcb, queue);
  2255. if (unlikely(!hostrcb)) {
  2256. dev_info(&ioa->pdev->dev, "Reclaiming async error buffers.");
  2257. hostrcb = list_first_entry_or_null(&ioa->hostrcb_report_q,
  2258. struct ipr_hostrcb, queue);
  2259. }
  2260. list_del_init(&hostrcb->queue);
  2261. return hostrcb;
  2262. }
  2263. /**
  2264. * ipr_process_error - Op done function for an adapter error log.
  2265. * @ipr_cmd: ipr command struct
  2266. *
  2267. * This function is the op done function for an error log host
  2268. * controlled async from the adapter. It will log the error and
  2269. * send the HCAM back to the adapter.
  2270. *
  2271. * Return value:
  2272. * none
  2273. **/
  2274. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2275. {
  2276. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2277. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2278. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2279. u32 fd_ioasc;
  2280. if (ioa_cfg->sis64)
  2281. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2282. else
  2283. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2284. list_del_init(&hostrcb->queue);
  2285. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2286. if (!ioasc) {
  2287. ipr_handle_log_data(ioa_cfg, hostrcb);
  2288. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2289. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2290. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET &&
  2291. ioasc != IPR_IOASC_ABORTED_CMD_TERM_BY_HOST) {
  2292. dev_err(&ioa_cfg->pdev->dev,
  2293. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2294. }
  2295. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_report_q);
  2296. schedule_work(&ioa_cfg->work_q);
  2297. hostrcb = ipr_get_free_hostrcb(ioa_cfg);
  2298. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2299. }
  2300. /**
  2301. * ipr_timeout - An internally generated op has timed out.
  2302. * @t: Timer context used to fetch ipr command struct
  2303. *
  2304. * This function blocks host requests and initiates an
  2305. * adapter reset.
  2306. *
  2307. * Return value:
  2308. * none
  2309. **/
  2310. static void ipr_timeout(struct timer_list *t)
  2311. {
  2312. struct ipr_cmnd *ipr_cmd = timer_container_of(ipr_cmd, t, timer);
  2313. unsigned long lock_flags = 0;
  2314. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2315. ENTER;
  2316. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2317. ioa_cfg->errors_logged++;
  2318. dev_err(&ioa_cfg->pdev->dev,
  2319. "Adapter being reset due to command timeout.\n");
  2320. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2321. ioa_cfg->sdt_state = GET_DUMP;
  2322. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2323. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2324. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2325. LEAVE;
  2326. }
  2327. /**
  2328. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2329. * @t: Timer context used to fetch ipr command struct
  2330. *
  2331. * This function blocks host requests and initiates an
  2332. * adapter reset.
  2333. *
  2334. * Return value:
  2335. * none
  2336. **/
  2337. static void ipr_oper_timeout(struct timer_list *t)
  2338. {
  2339. struct ipr_cmnd *ipr_cmd = timer_container_of(ipr_cmd, t, timer);
  2340. unsigned long lock_flags = 0;
  2341. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2342. ENTER;
  2343. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2344. ioa_cfg->errors_logged++;
  2345. dev_err(&ioa_cfg->pdev->dev,
  2346. "Adapter timed out transitioning to operational.\n");
  2347. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2348. ioa_cfg->sdt_state = GET_DUMP;
  2349. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2350. if (ipr_fastfail)
  2351. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2352. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2353. }
  2354. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2355. LEAVE;
  2356. }
  2357. /**
  2358. * ipr_find_ses_entry - Find matching SES in SES table
  2359. * @res: resource entry struct of SES
  2360. *
  2361. * Return value:
  2362. * pointer to SES table entry / NULL on failure
  2363. **/
  2364. static const struct ipr_ses_table_entry *
  2365. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2366. {
  2367. int i, j, matches;
  2368. struct ipr_std_inq_vpids *vpids;
  2369. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2370. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2371. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2372. if (ste->compare_product_id_byte[j] == 'X') {
  2373. vpids = &res->std_inq_data.vpids;
  2374. if (vpids->product_id[j] == ste->product_id[j])
  2375. matches++;
  2376. else
  2377. break;
  2378. } else
  2379. matches++;
  2380. }
  2381. if (matches == IPR_PROD_ID_LEN)
  2382. return ste;
  2383. }
  2384. return NULL;
  2385. }
  2386. /**
  2387. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2388. * @ioa_cfg: ioa config struct
  2389. * @bus: SCSI bus
  2390. * @bus_width: bus width
  2391. *
  2392. * Return value:
  2393. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2394. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2395. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2396. * max 160MHz = max 320MB/sec).
  2397. **/
  2398. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2399. {
  2400. struct ipr_resource_entry *res;
  2401. const struct ipr_ses_table_entry *ste;
  2402. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2403. /* Loop through each config table entry in the config table buffer */
  2404. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2405. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2406. continue;
  2407. if (bus != res->bus)
  2408. continue;
  2409. if (!(ste = ipr_find_ses_entry(res)))
  2410. continue;
  2411. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2412. }
  2413. return max_xfer_rate;
  2414. }
  2415. /**
  2416. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2417. * @ioa_cfg: ioa config struct
  2418. * @max_delay: max delay in micro-seconds to wait
  2419. *
  2420. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2421. *
  2422. * Return value:
  2423. * 0 on success / other on failure
  2424. **/
  2425. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2426. {
  2427. volatile u32 pcii_reg;
  2428. int delay = 1;
  2429. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2430. while (delay < max_delay) {
  2431. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2432. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2433. return 0;
  2434. /* udelay cannot be used if delay is more than a few milliseconds */
  2435. if ((delay / 1000) > MAX_UDELAY_MS)
  2436. mdelay(delay / 1000);
  2437. else
  2438. udelay(delay);
  2439. delay += delay;
  2440. }
  2441. return -EIO;
  2442. }
  2443. /**
  2444. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2445. * @ioa_cfg: ioa config struct
  2446. * @start_addr: adapter address to dump
  2447. * @dest: destination kernel buffer
  2448. * @length_in_words: length to dump in 4 byte words
  2449. *
  2450. * Return value:
  2451. * 0 on success
  2452. **/
  2453. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2454. u32 start_addr,
  2455. __be32 *dest, u32 length_in_words)
  2456. {
  2457. int i;
  2458. for (i = 0; i < length_in_words; i++) {
  2459. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2460. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2461. dest++;
  2462. }
  2463. return 0;
  2464. }
  2465. /**
  2466. * ipr_get_ldump_data_section - Dump IOA memory
  2467. * @ioa_cfg: ioa config struct
  2468. * @start_addr: adapter address to dump
  2469. * @dest: destination kernel buffer
  2470. * @length_in_words: length to dump in 4 byte words
  2471. *
  2472. * Return value:
  2473. * 0 on success / -EIO on failure
  2474. **/
  2475. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2476. u32 start_addr,
  2477. __be32 *dest, u32 length_in_words)
  2478. {
  2479. volatile u32 temp_pcii_reg;
  2480. int i, delay = 0;
  2481. if (ioa_cfg->sis64)
  2482. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2483. dest, length_in_words);
  2484. /* Write IOA interrupt reg starting LDUMP state */
  2485. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2486. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2487. /* Wait for IO debug acknowledge */
  2488. if (ipr_wait_iodbg_ack(ioa_cfg,
  2489. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2490. dev_err(&ioa_cfg->pdev->dev,
  2491. "IOA dump long data transfer timeout\n");
  2492. return -EIO;
  2493. }
  2494. /* Signal LDUMP interlocked - clear IO debug ack */
  2495. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2496. ioa_cfg->regs.clr_interrupt_reg);
  2497. /* Write Mailbox with starting address */
  2498. writel(start_addr, ioa_cfg->ioa_mailbox);
  2499. /* Signal address valid - clear IOA Reset alert */
  2500. writel(IPR_UPROCI_RESET_ALERT,
  2501. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2502. for (i = 0; i < length_in_words; i++) {
  2503. /* Wait for IO debug acknowledge */
  2504. if (ipr_wait_iodbg_ack(ioa_cfg,
  2505. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2506. dev_err(&ioa_cfg->pdev->dev,
  2507. "IOA dump short data transfer timeout\n");
  2508. return -EIO;
  2509. }
  2510. /* Read data from mailbox and increment destination pointer */
  2511. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2512. dest++;
  2513. /* For all but the last word of data, signal data received */
  2514. if (i < (length_in_words - 1)) {
  2515. /* Signal dump data received - Clear IO debug Ack */
  2516. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2517. ioa_cfg->regs.clr_interrupt_reg);
  2518. }
  2519. }
  2520. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2521. writel(IPR_UPROCI_RESET_ALERT,
  2522. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2523. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2524. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2525. /* Signal dump data received - Clear IO debug Ack */
  2526. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2527. ioa_cfg->regs.clr_interrupt_reg);
  2528. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2529. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2530. temp_pcii_reg =
  2531. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2532. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2533. return 0;
  2534. udelay(10);
  2535. delay += 10;
  2536. }
  2537. return 0;
  2538. }
  2539. #ifdef CONFIG_SCSI_IPR_DUMP
  2540. /**
  2541. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2542. * @ioa_cfg: ioa config struct
  2543. * @pci_address: adapter address
  2544. * @length: length of data to copy
  2545. *
  2546. * Copy data from PCI adapter to kernel buffer.
  2547. * Note: length MUST be a 4 byte multiple
  2548. * Return value:
  2549. * 0 on success / other on failure
  2550. **/
  2551. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2552. unsigned long pci_address, u32 length)
  2553. {
  2554. int bytes_copied = 0;
  2555. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2556. __be32 *page;
  2557. unsigned long lock_flags = 0;
  2558. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2559. if (ioa_cfg->sis64)
  2560. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2561. else
  2562. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2563. while (bytes_copied < length &&
  2564. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2565. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2566. ioa_dump->page_offset == 0) {
  2567. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2568. if (!page) {
  2569. ipr_trace;
  2570. return bytes_copied;
  2571. }
  2572. ioa_dump->page_offset = 0;
  2573. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2574. ioa_dump->next_page_index++;
  2575. } else
  2576. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2577. rem_len = length - bytes_copied;
  2578. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2579. cur_len = min(rem_len, rem_page_len);
  2580. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2581. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2582. rc = -EIO;
  2583. } else {
  2584. rc = ipr_get_ldump_data_section(ioa_cfg,
  2585. pci_address + bytes_copied,
  2586. &page[ioa_dump->page_offset / 4],
  2587. (cur_len / sizeof(u32)));
  2588. }
  2589. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2590. if (!rc) {
  2591. ioa_dump->page_offset += cur_len;
  2592. bytes_copied += cur_len;
  2593. } else {
  2594. ipr_trace;
  2595. break;
  2596. }
  2597. schedule();
  2598. }
  2599. return bytes_copied;
  2600. }
  2601. /**
  2602. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2603. * @hdr: dump entry header struct
  2604. *
  2605. * Return value:
  2606. * nothing
  2607. **/
  2608. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2609. {
  2610. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2611. hdr->num_elems = 1;
  2612. hdr->offset = sizeof(*hdr);
  2613. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2614. }
  2615. /**
  2616. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2617. * @ioa_cfg: ioa config struct
  2618. * @driver_dump: driver dump struct
  2619. *
  2620. * Return value:
  2621. * nothing
  2622. **/
  2623. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2624. struct ipr_driver_dump *driver_dump)
  2625. {
  2626. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2627. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2628. driver_dump->ioa_type_entry.hdr.len =
  2629. sizeof(struct ipr_dump_ioa_type_entry) -
  2630. sizeof(struct ipr_dump_entry_header);
  2631. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2632. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2633. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2634. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2635. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2636. ucode_vpd->minor_release[1];
  2637. driver_dump->hdr.num_entries++;
  2638. }
  2639. /**
  2640. * ipr_dump_version_data - Fill in the driver version in the dump.
  2641. * @ioa_cfg: ioa config struct
  2642. * @driver_dump: driver dump struct
  2643. *
  2644. * Return value:
  2645. * nothing
  2646. **/
  2647. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2648. struct ipr_driver_dump *driver_dump)
  2649. {
  2650. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2651. driver_dump->version_entry.hdr.len =
  2652. sizeof(struct ipr_dump_version_entry) -
  2653. sizeof(struct ipr_dump_entry_header);
  2654. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2655. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2656. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2657. driver_dump->hdr.num_entries++;
  2658. }
  2659. /**
  2660. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2661. * @ioa_cfg: ioa config struct
  2662. * @driver_dump: driver dump struct
  2663. *
  2664. * Return value:
  2665. * nothing
  2666. **/
  2667. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2668. struct ipr_driver_dump *driver_dump)
  2669. {
  2670. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2671. driver_dump->trace_entry.hdr.len =
  2672. sizeof(struct ipr_dump_trace_entry) -
  2673. sizeof(struct ipr_dump_entry_header);
  2674. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2675. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2676. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2677. driver_dump->hdr.num_entries++;
  2678. }
  2679. /**
  2680. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2681. * @ioa_cfg: ioa config struct
  2682. * @driver_dump: driver dump struct
  2683. *
  2684. * Return value:
  2685. * nothing
  2686. **/
  2687. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2688. struct ipr_driver_dump *driver_dump)
  2689. {
  2690. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2691. driver_dump->location_entry.hdr.len =
  2692. sizeof(struct ipr_dump_location_entry) -
  2693. sizeof(struct ipr_dump_entry_header);
  2694. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2695. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2696. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2697. driver_dump->hdr.num_entries++;
  2698. }
  2699. /**
  2700. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2701. * @ioa_cfg: ioa config struct
  2702. * @dump: dump struct
  2703. *
  2704. * Return value:
  2705. * nothing
  2706. **/
  2707. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2708. {
  2709. unsigned long start_addr, sdt_word;
  2710. unsigned long lock_flags = 0;
  2711. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2712. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2713. u32 num_entries, max_num_entries, start_off, end_off;
  2714. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2715. struct ipr_sdt *sdt;
  2716. int valid = 1;
  2717. int i;
  2718. ENTER;
  2719. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2720. if (ioa_cfg->sdt_state != READ_DUMP) {
  2721. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2722. return;
  2723. }
  2724. if (ioa_cfg->sis64) {
  2725. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2726. ssleep(IPR_DUMP_DELAY_SECONDS);
  2727. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2728. }
  2729. start_addr = readl(ioa_cfg->ioa_mailbox);
  2730. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2731. dev_err(&ioa_cfg->pdev->dev,
  2732. "Invalid dump table format: %lx\n", start_addr);
  2733. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2734. return;
  2735. }
  2736. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2737. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2738. /* Initialize the overall dump header */
  2739. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2740. driver_dump->hdr.num_entries = 1;
  2741. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2742. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2743. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2744. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2745. ipr_dump_version_data(ioa_cfg, driver_dump);
  2746. ipr_dump_location_data(ioa_cfg, driver_dump);
  2747. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2748. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2749. /* Update dump_header */
  2750. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2751. /* IOA Dump entry */
  2752. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2753. ioa_dump->hdr.len = 0;
  2754. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2755. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2756. /* First entries in sdt are actually a list of dump addresses and
  2757. lengths to gather the real dump data. sdt represents the pointer
  2758. to the ioa generated dump table. Dump data will be extracted based
  2759. on entries in this table */
  2760. sdt = &ioa_dump->sdt;
  2761. if (ioa_cfg->sis64) {
  2762. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2763. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2764. } else {
  2765. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2766. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2767. }
  2768. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2769. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2770. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2771. bytes_to_copy / sizeof(__be32));
  2772. /* Smart Dump table is ready to use and the first entry is valid */
  2773. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2774. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2775. dev_err(&ioa_cfg->pdev->dev,
  2776. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2777. rc, be32_to_cpu(sdt->hdr.state));
  2778. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2779. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2780. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2781. return;
  2782. }
  2783. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2784. if (num_entries > max_num_entries)
  2785. num_entries = max_num_entries;
  2786. /* Update dump length to the actual data to be copied */
  2787. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2788. if (ioa_cfg->sis64)
  2789. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2790. else
  2791. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2792. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2793. for (i = 0; i < num_entries; i++) {
  2794. if (ioa_dump->hdr.len > max_dump_size) {
  2795. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2796. break;
  2797. }
  2798. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2799. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2800. if (ioa_cfg->sis64)
  2801. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2802. else {
  2803. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2804. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2805. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2806. bytes_to_copy = end_off - start_off;
  2807. else
  2808. valid = 0;
  2809. }
  2810. if (valid) {
  2811. if (bytes_to_copy > max_dump_size) {
  2812. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2813. continue;
  2814. }
  2815. /* Copy data from adapter to driver buffers */
  2816. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2817. bytes_to_copy);
  2818. ioa_dump->hdr.len += bytes_copied;
  2819. if (bytes_copied != bytes_to_copy) {
  2820. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2821. break;
  2822. }
  2823. }
  2824. }
  2825. }
  2826. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2827. /* Update dump_header */
  2828. driver_dump->hdr.len += ioa_dump->hdr.len;
  2829. wmb();
  2830. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2831. LEAVE;
  2832. }
  2833. #else
  2834. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2835. #endif
  2836. /**
  2837. * ipr_release_dump - Free adapter dump memory
  2838. * @kref: kref struct
  2839. *
  2840. * Return value:
  2841. * nothing
  2842. **/
  2843. static void ipr_release_dump(struct kref *kref)
  2844. {
  2845. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2846. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2847. unsigned long lock_flags = 0;
  2848. int i;
  2849. ENTER;
  2850. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2851. ioa_cfg->dump = NULL;
  2852. ioa_cfg->sdt_state = INACTIVE;
  2853. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2854. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2855. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2856. vfree(dump->ioa_dump.ioa_data);
  2857. kfree(dump);
  2858. LEAVE;
  2859. }
  2860. static void ipr_add_remove_thread(struct work_struct *work)
  2861. {
  2862. unsigned long lock_flags;
  2863. struct ipr_resource_entry *res;
  2864. struct scsi_device *sdev;
  2865. struct ipr_ioa_cfg *ioa_cfg =
  2866. container_of(work, struct ipr_ioa_cfg, scsi_add_work_q);
  2867. u8 bus, target, lun;
  2868. int did_work;
  2869. ENTER;
  2870. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2871. restart:
  2872. do {
  2873. did_work = 0;
  2874. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  2875. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2876. return;
  2877. }
  2878. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2879. if (res->del_from_ml && res->sdev) {
  2880. did_work = 1;
  2881. sdev = res->sdev;
  2882. if (!scsi_device_get(sdev)) {
  2883. if (!res->add_to_ml)
  2884. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2885. else
  2886. res->del_from_ml = 0;
  2887. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2888. scsi_remove_device(sdev);
  2889. scsi_device_put(sdev);
  2890. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2891. }
  2892. break;
  2893. }
  2894. }
  2895. } while (did_work);
  2896. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2897. if (res->add_to_ml) {
  2898. bus = res->bus;
  2899. target = res->target;
  2900. lun = res->lun;
  2901. res->add_to_ml = 0;
  2902. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2903. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2904. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2905. goto restart;
  2906. }
  2907. }
  2908. ioa_cfg->scan_done = 1;
  2909. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2910. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2911. LEAVE;
  2912. }
  2913. /**
  2914. * ipr_worker_thread - Worker thread
  2915. * @work: ioa config struct
  2916. *
  2917. * Called at task level from a work thread. This function takes care
  2918. * of adding and removing device from the mid-layer as configuration
  2919. * changes are detected by the adapter.
  2920. *
  2921. * Return value:
  2922. * nothing
  2923. **/
  2924. static void ipr_worker_thread(struct work_struct *work)
  2925. {
  2926. unsigned long lock_flags;
  2927. struct ipr_dump *dump;
  2928. struct ipr_ioa_cfg *ioa_cfg =
  2929. container_of(work, struct ipr_ioa_cfg, work_q);
  2930. ENTER;
  2931. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2932. if (ioa_cfg->sdt_state == READ_DUMP) {
  2933. dump = ioa_cfg->dump;
  2934. if (!dump) {
  2935. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2936. return;
  2937. }
  2938. kref_get(&dump->kref);
  2939. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2940. ipr_get_ioa_dump(ioa_cfg, dump);
  2941. kref_put(&dump->kref, ipr_release_dump);
  2942. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2943. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2944. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2945. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2946. return;
  2947. }
  2948. if (ioa_cfg->scsi_unblock) {
  2949. ioa_cfg->scsi_unblock = 0;
  2950. ioa_cfg->scsi_blocked = 0;
  2951. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2952. scsi_unblock_requests(ioa_cfg->host);
  2953. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2954. if (ioa_cfg->scsi_blocked)
  2955. scsi_block_requests(ioa_cfg->host);
  2956. }
  2957. if (!ioa_cfg->scan_enabled) {
  2958. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2959. return;
  2960. }
  2961. schedule_work(&ioa_cfg->scsi_add_work_q);
  2962. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2963. LEAVE;
  2964. }
  2965. #ifdef CONFIG_SCSI_IPR_TRACE
  2966. /**
  2967. * ipr_read_trace - Dump the adapter trace
  2968. * @filp: open sysfs file
  2969. * @kobj: kobject struct
  2970. * @bin_attr: bin_attribute struct
  2971. * @buf: buffer
  2972. * @off: offset
  2973. * @count: buffer size
  2974. *
  2975. * Return value:
  2976. * number of bytes printed to buffer
  2977. **/
  2978. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2979. const struct bin_attribute *bin_attr,
  2980. char *buf, loff_t off, size_t count)
  2981. {
  2982. struct device *dev = kobj_to_dev(kobj);
  2983. struct Scsi_Host *shost = class_to_shost(dev);
  2984. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2985. unsigned long lock_flags = 0;
  2986. ssize_t ret;
  2987. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2988. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  2989. IPR_TRACE_SIZE);
  2990. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2991. return ret;
  2992. }
  2993. static const struct bin_attribute ipr_trace_attr = {
  2994. .attr = {
  2995. .name = "trace",
  2996. .mode = S_IRUGO,
  2997. },
  2998. .size = 0,
  2999. .read = ipr_read_trace,
  3000. };
  3001. #endif
  3002. /**
  3003. * ipr_show_fw_version - Show the firmware version
  3004. * @dev: class device struct
  3005. * @attr: device attribute (unused)
  3006. * @buf: buffer
  3007. *
  3008. * Return value:
  3009. * number of bytes printed to buffer
  3010. **/
  3011. static ssize_t ipr_show_fw_version(struct device *dev,
  3012. struct device_attribute *attr, char *buf)
  3013. {
  3014. struct Scsi_Host *shost = class_to_shost(dev);
  3015. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3016. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  3017. unsigned long lock_flags = 0;
  3018. int len;
  3019. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3020. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  3021. ucode_vpd->major_release, ucode_vpd->card_type,
  3022. ucode_vpd->minor_release[0],
  3023. ucode_vpd->minor_release[1]);
  3024. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3025. return len;
  3026. }
  3027. static struct device_attribute ipr_fw_version_attr = {
  3028. .attr = {
  3029. .name = "fw_version",
  3030. .mode = S_IRUGO,
  3031. },
  3032. .show = ipr_show_fw_version,
  3033. };
  3034. /**
  3035. * ipr_show_log_level - Show the adapter's error logging level
  3036. * @dev: class device struct
  3037. * @attr: device attribute (unused)
  3038. * @buf: buffer
  3039. *
  3040. * Return value:
  3041. * number of bytes printed to buffer
  3042. **/
  3043. static ssize_t ipr_show_log_level(struct device *dev,
  3044. struct device_attribute *attr, char *buf)
  3045. {
  3046. struct Scsi_Host *shost = class_to_shost(dev);
  3047. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3048. unsigned long lock_flags = 0;
  3049. int len;
  3050. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3051. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  3052. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3053. return len;
  3054. }
  3055. /**
  3056. * ipr_store_log_level - Change the adapter's error logging level
  3057. * @dev: class device struct
  3058. * @attr: device attribute (unused)
  3059. * @buf: buffer
  3060. * @count: buffer size
  3061. *
  3062. * Return value:
  3063. * number of bytes printed to buffer
  3064. **/
  3065. static ssize_t ipr_store_log_level(struct device *dev,
  3066. struct device_attribute *attr,
  3067. const char *buf, size_t count)
  3068. {
  3069. struct Scsi_Host *shost = class_to_shost(dev);
  3070. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3071. unsigned long lock_flags = 0;
  3072. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3073. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  3074. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3075. return strlen(buf);
  3076. }
  3077. static struct device_attribute ipr_log_level_attr = {
  3078. .attr = {
  3079. .name = "log_level",
  3080. .mode = S_IRUGO | S_IWUSR,
  3081. },
  3082. .show = ipr_show_log_level,
  3083. .store = ipr_store_log_level
  3084. };
  3085. /**
  3086. * ipr_store_diagnostics - IOA Diagnostics interface
  3087. * @dev: device struct
  3088. * @attr: device attribute (unused)
  3089. * @buf: buffer
  3090. * @count: buffer size
  3091. *
  3092. * This function will reset the adapter and wait a reasonable
  3093. * amount of time for any errors that the adapter might log.
  3094. *
  3095. * Return value:
  3096. * count on success / other on failure
  3097. **/
  3098. static ssize_t ipr_store_diagnostics(struct device *dev,
  3099. struct device_attribute *attr,
  3100. const char *buf, size_t count)
  3101. {
  3102. struct Scsi_Host *shost = class_to_shost(dev);
  3103. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3104. unsigned long lock_flags = 0;
  3105. int rc = count;
  3106. if (!capable(CAP_SYS_ADMIN))
  3107. return -EACCES;
  3108. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3109. while (ioa_cfg->in_reset_reload) {
  3110. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3111. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3112. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3113. }
  3114. ioa_cfg->errors_logged = 0;
  3115. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3116. if (ioa_cfg->in_reset_reload) {
  3117. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3118. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3119. /* Wait for a second for any errors to be logged */
  3120. msleep(1000);
  3121. } else {
  3122. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3123. return -EIO;
  3124. }
  3125. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3126. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3127. rc = -EIO;
  3128. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3129. return rc;
  3130. }
  3131. static struct device_attribute ipr_diagnostics_attr = {
  3132. .attr = {
  3133. .name = "run_diagnostics",
  3134. .mode = S_IWUSR,
  3135. },
  3136. .store = ipr_store_diagnostics
  3137. };
  3138. /**
  3139. * ipr_show_adapter_state - Show the adapter's state
  3140. * @dev: device struct
  3141. * @attr: device attribute (unused)
  3142. * @buf: buffer
  3143. *
  3144. * Return value:
  3145. * number of bytes printed to buffer
  3146. **/
  3147. static ssize_t ipr_show_adapter_state(struct device *dev,
  3148. struct device_attribute *attr, char *buf)
  3149. {
  3150. struct Scsi_Host *shost = class_to_shost(dev);
  3151. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3152. unsigned long lock_flags = 0;
  3153. int len;
  3154. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3155. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3156. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3157. else
  3158. len = snprintf(buf, PAGE_SIZE, "online\n");
  3159. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3160. return len;
  3161. }
  3162. /**
  3163. * ipr_store_adapter_state - Change adapter state
  3164. * @dev: device struct
  3165. * @attr: device attribute (unused)
  3166. * @buf: buffer
  3167. * @count: buffer size
  3168. *
  3169. * This function will change the adapter's state.
  3170. *
  3171. * Return value:
  3172. * count on success / other on failure
  3173. **/
  3174. static ssize_t ipr_store_adapter_state(struct device *dev,
  3175. struct device_attribute *attr,
  3176. const char *buf, size_t count)
  3177. {
  3178. struct Scsi_Host *shost = class_to_shost(dev);
  3179. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3180. unsigned long lock_flags;
  3181. int result = count, i;
  3182. if (!capable(CAP_SYS_ADMIN))
  3183. return -EACCES;
  3184. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3185. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3186. !strncmp(buf, "online", 6)) {
  3187. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3188. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3189. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3190. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3191. }
  3192. wmb();
  3193. ioa_cfg->reset_retries = 0;
  3194. ioa_cfg->in_ioa_bringdown = 0;
  3195. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3196. }
  3197. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3198. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3199. return result;
  3200. }
  3201. static struct device_attribute ipr_ioa_state_attr = {
  3202. .attr = {
  3203. .name = "online_state",
  3204. .mode = S_IRUGO | S_IWUSR,
  3205. },
  3206. .show = ipr_show_adapter_state,
  3207. .store = ipr_store_adapter_state
  3208. };
  3209. /**
  3210. * ipr_store_reset_adapter - Reset the adapter
  3211. * @dev: device struct
  3212. * @attr: device attribute (unused)
  3213. * @buf: buffer
  3214. * @count: buffer size
  3215. *
  3216. * This function will reset the adapter.
  3217. *
  3218. * Return value:
  3219. * count on success / other on failure
  3220. **/
  3221. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3222. struct device_attribute *attr,
  3223. const char *buf, size_t count)
  3224. {
  3225. struct Scsi_Host *shost = class_to_shost(dev);
  3226. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3227. unsigned long lock_flags;
  3228. int result = count;
  3229. if (!capable(CAP_SYS_ADMIN))
  3230. return -EACCES;
  3231. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3232. if (!ioa_cfg->in_reset_reload)
  3233. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3234. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3235. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3236. return result;
  3237. }
  3238. static struct device_attribute ipr_ioa_reset_attr = {
  3239. .attr = {
  3240. .name = "reset_host",
  3241. .mode = S_IWUSR,
  3242. },
  3243. .store = ipr_store_reset_adapter
  3244. };
  3245. static int ipr_iopoll(struct irq_poll *iop, int budget);
  3246. /**
  3247. * ipr_show_iopoll_weight - Show ipr polling mode
  3248. * @dev: class device struct
  3249. * @attr: device attribute (unused)
  3250. * @buf: buffer
  3251. *
  3252. * Return value:
  3253. * number of bytes printed to buffer
  3254. **/
  3255. static ssize_t ipr_show_iopoll_weight(struct device *dev,
  3256. struct device_attribute *attr, char *buf)
  3257. {
  3258. struct Scsi_Host *shost = class_to_shost(dev);
  3259. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3260. unsigned long lock_flags = 0;
  3261. int len;
  3262. spin_lock_irqsave(shost->host_lock, lock_flags);
  3263. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->iopoll_weight);
  3264. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3265. return len;
  3266. }
  3267. /**
  3268. * ipr_store_iopoll_weight - Change the adapter's polling mode
  3269. * @dev: class device struct
  3270. * @attr: device attribute (unused)
  3271. * @buf: buffer
  3272. * @count: buffer size
  3273. *
  3274. * Return value:
  3275. * number of bytes printed to buffer
  3276. **/
  3277. static ssize_t ipr_store_iopoll_weight(struct device *dev,
  3278. struct device_attribute *attr,
  3279. const char *buf, size_t count)
  3280. {
  3281. struct Scsi_Host *shost = class_to_shost(dev);
  3282. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3283. unsigned long user_iopoll_weight;
  3284. unsigned long lock_flags = 0;
  3285. int i;
  3286. if (!ioa_cfg->sis64) {
  3287. dev_info(&ioa_cfg->pdev->dev, "irq_poll not supported on this adapter\n");
  3288. return -EINVAL;
  3289. }
  3290. if (kstrtoul(buf, 10, &user_iopoll_weight))
  3291. return -EINVAL;
  3292. if (user_iopoll_weight > 256) {
  3293. dev_info(&ioa_cfg->pdev->dev, "Invalid irq_poll weight. It must be less than 256\n");
  3294. return -EINVAL;
  3295. }
  3296. if (user_iopoll_weight == ioa_cfg->iopoll_weight) {
  3297. dev_info(&ioa_cfg->pdev->dev, "Current irq_poll weight has the same weight\n");
  3298. return strlen(buf);
  3299. }
  3300. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3301. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  3302. irq_poll_disable(&ioa_cfg->hrrq[i].iopoll);
  3303. }
  3304. spin_lock_irqsave(shost->host_lock, lock_flags);
  3305. ioa_cfg->iopoll_weight = user_iopoll_weight;
  3306. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3307. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  3308. irq_poll_init(&ioa_cfg->hrrq[i].iopoll,
  3309. ioa_cfg->iopoll_weight, ipr_iopoll);
  3310. }
  3311. }
  3312. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3313. return strlen(buf);
  3314. }
  3315. static struct device_attribute ipr_iopoll_weight_attr = {
  3316. .attr = {
  3317. .name = "iopoll_weight",
  3318. .mode = S_IRUGO | S_IWUSR,
  3319. },
  3320. .show = ipr_show_iopoll_weight,
  3321. .store = ipr_store_iopoll_weight
  3322. };
  3323. /**
  3324. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3325. * @buf_len: buffer length
  3326. *
  3327. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3328. * list to use for microcode download
  3329. *
  3330. * Return value:
  3331. * pointer to sglist / NULL on failure
  3332. **/
  3333. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3334. {
  3335. int sg_size, order;
  3336. struct ipr_sglist *sglist;
  3337. /* Get the minimum size per scatter/gather element */
  3338. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3339. /* Get the actual size per element */
  3340. order = get_order(sg_size);
  3341. /* Allocate a scatter/gather list for the DMA */
  3342. sglist = kzalloc_obj(struct ipr_sglist);
  3343. if (sglist == NULL) {
  3344. ipr_trace;
  3345. return NULL;
  3346. }
  3347. sglist->order = order;
  3348. sglist->scatterlist = sgl_alloc_order(buf_len, order, false, GFP_KERNEL,
  3349. &sglist->num_sg);
  3350. if (!sglist->scatterlist) {
  3351. kfree(sglist);
  3352. return NULL;
  3353. }
  3354. return sglist;
  3355. }
  3356. /**
  3357. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3358. * @sglist: scatter/gather list pointer
  3359. *
  3360. * Free a DMA'able ucode download buffer previously allocated with
  3361. * ipr_alloc_ucode_buffer
  3362. *
  3363. * Return value:
  3364. * nothing
  3365. **/
  3366. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3367. {
  3368. sgl_free_order(sglist->scatterlist, sglist->order);
  3369. kfree(sglist);
  3370. }
  3371. /**
  3372. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3373. * @sglist: scatter/gather list pointer
  3374. * @buffer: buffer pointer
  3375. * @len: buffer length
  3376. *
  3377. * Copy a microcode image from a user buffer into a buffer allocated by
  3378. * ipr_alloc_ucode_buffer
  3379. *
  3380. * Return value:
  3381. * 0 on success / other on failure
  3382. **/
  3383. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3384. u8 *buffer, u32 len)
  3385. {
  3386. int bsize_elem, i, result = 0;
  3387. struct scatterlist *sg;
  3388. /* Determine the actual number of bytes per element */
  3389. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3390. sg = sglist->scatterlist;
  3391. for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg),
  3392. buffer += bsize_elem) {
  3393. struct page *page = sg_page(sg);
  3394. memcpy_to_page(page, 0, buffer, bsize_elem);
  3395. sg->length = bsize_elem;
  3396. if (result != 0) {
  3397. ipr_trace;
  3398. return result;
  3399. }
  3400. }
  3401. if (len % bsize_elem) {
  3402. struct page *page = sg_page(sg);
  3403. memcpy_to_page(page, 0, buffer, len % bsize_elem);
  3404. sg->length = len % bsize_elem;
  3405. }
  3406. sglist->buffer_len = len;
  3407. return result;
  3408. }
  3409. /**
  3410. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3411. * @ipr_cmd: ipr command struct
  3412. * @sglist: scatter/gather list
  3413. *
  3414. * Builds a microcode download IOA data list (IOADL).
  3415. *
  3416. **/
  3417. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3418. struct ipr_sglist *sglist)
  3419. {
  3420. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3421. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3422. struct scatterlist *scatterlist = sglist->scatterlist;
  3423. struct scatterlist *sg;
  3424. int i;
  3425. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3426. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3427. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3428. ioarcb->ioadl_len =
  3429. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3430. for_each_sg(scatterlist, sg, ipr_cmd->dma_use_sg, i) {
  3431. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3432. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  3433. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  3434. }
  3435. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3436. }
  3437. /**
  3438. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3439. * @ipr_cmd: ipr command struct
  3440. * @sglist: scatter/gather list
  3441. *
  3442. * Builds a microcode download IOA data list (IOADL).
  3443. *
  3444. **/
  3445. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3446. struct ipr_sglist *sglist)
  3447. {
  3448. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3449. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3450. struct scatterlist *scatterlist = sglist->scatterlist;
  3451. struct scatterlist *sg;
  3452. int i;
  3453. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3454. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3455. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3456. ioarcb->ioadl_len =
  3457. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3458. for_each_sg(scatterlist, sg, ipr_cmd->dma_use_sg, i) {
  3459. ioadl[i].flags_and_data_len =
  3460. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(sg));
  3461. ioadl[i].address =
  3462. cpu_to_be32(sg_dma_address(sg));
  3463. }
  3464. ioadl[i-1].flags_and_data_len |=
  3465. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3466. }
  3467. /**
  3468. * ipr_update_ioa_ucode - Update IOA's microcode
  3469. * @ioa_cfg: ioa config struct
  3470. * @sglist: scatter/gather list
  3471. *
  3472. * Initiate an adapter reset to update the IOA's microcode
  3473. *
  3474. * Return value:
  3475. * 0 on success / -EIO on failure
  3476. **/
  3477. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3478. struct ipr_sglist *sglist)
  3479. {
  3480. unsigned long lock_flags;
  3481. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3482. while (ioa_cfg->in_reset_reload) {
  3483. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3484. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3485. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3486. }
  3487. if (ioa_cfg->ucode_sglist) {
  3488. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3489. dev_err(&ioa_cfg->pdev->dev,
  3490. "Microcode download already in progress\n");
  3491. return -EIO;
  3492. }
  3493. sglist->num_dma_sg = dma_map_sg(&ioa_cfg->pdev->dev,
  3494. sglist->scatterlist, sglist->num_sg,
  3495. DMA_TO_DEVICE);
  3496. if (!sglist->num_dma_sg) {
  3497. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3498. dev_err(&ioa_cfg->pdev->dev,
  3499. "Failed to map microcode download buffer!\n");
  3500. return -EIO;
  3501. }
  3502. ioa_cfg->ucode_sglist = sglist;
  3503. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3504. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3505. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3506. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3507. ioa_cfg->ucode_sglist = NULL;
  3508. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3509. return 0;
  3510. }
  3511. /**
  3512. * ipr_store_update_fw - Update the firmware on the adapter
  3513. * @dev: device struct
  3514. * @attr: device attribute (unused)
  3515. * @buf: buffer
  3516. * @count: buffer size
  3517. *
  3518. * This function will update the firmware on the adapter.
  3519. *
  3520. * Return value:
  3521. * count on success / other on failure
  3522. **/
  3523. static ssize_t ipr_store_update_fw(struct device *dev,
  3524. struct device_attribute *attr,
  3525. const char *buf, size_t count)
  3526. {
  3527. struct Scsi_Host *shost = class_to_shost(dev);
  3528. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3529. struct ipr_ucode_image_header *image_hdr;
  3530. const struct firmware *fw_entry;
  3531. struct ipr_sglist *sglist;
  3532. char fname[100];
  3533. char *src;
  3534. char *endline;
  3535. int result, dnld_size;
  3536. if (!capable(CAP_SYS_ADMIN))
  3537. return -EACCES;
  3538. snprintf(fname, sizeof(fname), "%s", buf);
  3539. endline = strchr(fname, '\n');
  3540. if (endline)
  3541. *endline = '\0';
  3542. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3543. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3544. return -EIO;
  3545. }
  3546. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3547. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3548. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3549. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3550. if (!sglist) {
  3551. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3552. release_firmware(fw_entry);
  3553. return -ENOMEM;
  3554. }
  3555. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3556. if (result) {
  3557. dev_err(&ioa_cfg->pdev->dev,
  3558. "Microcode buffer copy to DMA buffer failed\n");
  3559. goto out;
  3560. }
  3561. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3562. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3563. if (!result)
  3564. result = count;
  3565. out:
  3566. ipr_free_ucode_buffer(sglist);
  3567. release_firmware(fw_entry);
  3568. return result;
  3569. }
  3570. static struct device_attribute ipr_update_fw_attr = {
  3571. .attr = {
  3572. .name = "update_fw",
  3573. .mode = S_IWUSR,
  3574. },
  3575. .store = ipr_store_update_fw
  3576. };
  3577. /**
  3578. * ipr_show_fw_type - Show the adapter's firmware type.
  3579. * @dev: class device struct
  3580. * @attr: device attribute (unused)
  3581. * @buf: buffer
  3582. *
  3583. * Return value:
  3584. * number of bytes printed to buffer
  3585. **/
  3586. static ssize_t ipr_show_fw_type(struct device *dev,
  3587. struct device_attribute *attr, char *buf)
  3588. {
  3589. struct Scsi_Host *shost = class_to_shost(dev);
  3590. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3591. unsigned long lock_flags = 0;
  3592. int len;
  3593. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3594. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3595. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3596. return len;
  3597. }
  3598. static struct device_attribute ipr_ioa_fw_type_attr = {
  3599. .attr = {
  3600. .name = "fw_type",
  3601. .mode = S_IRUGO,
  3602. },
  3603. .show = ipr_show_fw_type
  3604. };
  3605. static ssize_t ipr_read_async_err_log(struct file *filep, struct kobject *kobj,
  3606. const struct bin_attribute *bin_attr, char *buf,
  3607. loff_t off, size_t count)
  3608. {
  3609. struct device *cdev = kobj_to_dev(kobj);
  3610. struct Scsi_Host *shost = class_to_shost(cdev);
  3611. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3612. struct ipr_hostrcb *hostrcb;
  3613. unsigned long lock_flags = 0;
  3614. int ret;
  3615. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3616. hostrcb = list_first_entry_or_null(&ioa_cfg->hostrcb_report_q,
  3617. struct ipr_hostrcb, queue);
  3618. if (!hostrcb) {
  3619. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3620. return 0;
  3621. }
  3622. ret = memory_read_from_buffer(buf, count, &off, &hostrcb->hcam,
  3623. sizeof(hostrcb->hcam));
  3624. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3625. return ret;
  3626. }
  3627. static ssize_t ipr_next_async_err_log(struct file *filep, struct kobject *kobj,
  3628. const struct bin_attribute *bin_attr, char *buf,
  3629. loff_t off, size_t count)
  3630. {
  3631. struct device *cdev = kobj_to_dev(kobj);
  3632. struct Scsi_Host *shost = class_to_shost(cdev);
  3633. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3634. struct ipr_hostrcb *hostrcb;
  3635. unsigned long lock_flags = 0;
  3636. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3637. hostrcb = list_first_entry_or_null(&ioa_cfg->hostrcb_report_q,
  3638. struct ipr_hostrcb, queue);
  3639. if (!hostrcb) {
  3640. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3641. return count;
  3642. }
  3643. /* Reclaim hostrcb before exit */
  3644. list_move_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  3645. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3646. return count;
  3647. }
  3648. static const struct bin_attribute ipr_ioa_async_err_log = {
  3649. .attr = {
  3650. .name = "async_err_log",
  3651. .mode = S_IRUGO | S_IWUSR,
  3652. },
  3653. .size = 0,
  3654. .read = ipr_read_async_err_log,
  3655. .write = ipr_next_async_err_log
  3656. };
  3657. static struct attribute *ipr_ioa_attrs[] = {
  3658. &ipr_fw_version_attr.attr,
  3659. &ipr_log_level_attr.attr,
  3660. &ipr_diagnostics_attr.attr,
  3661. &ipr_ioa_state_attr.attr,
  3662. &ipr_ioa_reset_attr.attr,
  3663. &ipr_update_fw_attr.attr,
  3664. &ipr_ioa_fw_type_attr.attr,
  3665. &ipr_iopoll_weight_attr.attr,
  3666. NULL,
  3667. };
  3668. ATTRIBUTE_GROUPS(ipr_ioa);
  3669. #ifdef CONFIG_SCSI_IPR_DUMP
  3670. /**
  3671. * ipr_read_dump - Dump the adapter
  3672. * @filp: open sysfs file
  3673. * @kobj: kobject struct
  3674. * @bin_attr: bin_attribute struct
  3675. * @buf: buffer
  3676. * @off: offset
  3677. * @count: buffer size
  3678. *
  3679. * Return value:
  3680. * number of bytes printed to buffer
  3681. **/
  3682. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3683. const struct bin_attribute *bin_attr,
  3684. char *buf, loff_t off, size_t count)
  3685. {
  3686. struct device *cdev = kobj_to_dev(kobj);
  3687. struct Scsi_Host *shost = class_to_shost(cdev);
  3688. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3689. struct ipr_dump *dump;
  3690. unsigned long lock_flags = 0;
  3691. char *src;
  3692. int len, sdt_end;
  3693. size_t rc = count;
  3694. if (!capable(CAP_SYS_ADMIN))
  3695. return -EACCES;
  3696. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3697. dump = ioa_cfg->dump;
  3698. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3699. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3700. return 0;
  3701. }
  3702. kref_get(&dump->kref);
  3703. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3704. if (off > dump->driver_dump.hdr.len) {
  3705. kref_put(&dump->kref, ipr_release_dump);
  3706. return 0;
  3707. }
  3708. if (off + count > dump->driver_dump.hdr.len) {
  3709. count = dump->driver_dump.hdr.len - off;
  3710. rc = count;
  3711. }
  3712. if (count && off < sizeof(dump->driver_dump)) {
  3713. if (off + count > sizeof(dump->driver_dump))
  3714. len = sizeof(dump->driver_dump) - off;
  3715. else
  3716. len = count;
  3717. src = (u8 *)&dump->driver_dump + off;
  3718. memcpy(buf, src, len);
  3719. buf += len;
  3720. off += len;
  3721. count -= len;
  3722. }
  3723. off -= sizeof(dump->driver_dump);
  3724. if (ioa_cfg->sis64)
  3725. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3726. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3727. sizeof(struct ipr_sdt_entry));
  3728. else
  3729. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3730. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3731. if (count && off < sdt_end) {
  3732. if (off + count > sdt_end)
  3733. len = sdt_end - off;
  3734. else
  3735. len = count;
  3736. src = (u8 *)&dump->ioa_dump + off;
  3737. memcpy(buf, src, len);
  3738. buf += len;
  3739. off += len;
  3740. count -= len;
  3741. }
  3742. off -= sdt_end;
  3743. while (count) {
  3744. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3745. len = PAGE_ALIGN(off) - off;
  3746. else
  3747. len = count;
  3748. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3749. src += off & ~PAGE_MASK;
  3750. memcpy(buf, src, len);
  3751. buf += len;
  3752. off += len;
  3753. count -= len;
  3754. }
  3755. kref_put(&dump->kref, ipr_release_dump);
  3756. return rc;
  3757. }
  3758. /**
  3759. * ipr_alloc_dump - Prepare for adapter dump
  3760. * @ioa_cfg: ioa config struct
  3761. *
  3762. * Return value:
  3763. * 0 on success / other on failure
  3764. **/
  3765. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3766. {
  3767. struct ipr_dump *dump;
  3768. __be32 **ioa_data;
  3769. unsigned long lock_flags = 0;
  3770. dump = kzalloc_obj(struct ipr_dump);
  3771. if (!dump) {
  3772. ipr_err("Dump memory allocation failed\n");
  3773. return -ENOMEM;
  3774. }
  3775. if (ioa_cfg->sis64)
  3776. ioa_data = vmalloc_array(IPR_FMT3_MAX_NUM_DUMP_PAGES,
  3777. sizeof(__be32 *));
  3778. else
  3779. ioa_data = vmalloc_array(IPR_FMT2_MAX_NUM_DUMP_PAGES,
  3780. sizeof(__be32 *));
  3781. if (!ioa_data) {
  3782. ipr_err("Dump memory allocation failed\n");
  3783. kfree(dump);
  3784. return -ENOMEM;
  3785. }
  3786. dump->ioa_dump.ioa_data = ioa_data;
  3787. kref_init(&dump->kref);
  3788. dump->ioa_cfg = ioa_cfg;
  3789. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3790. if (INACTIVE != ioa_cfg->sdt_state) {
  3791. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3792. vfree(dump->ioa_dump.ioa_data);
  3793. kfree(dump);
  3794. return 0;
  3795. }
  3796. ioa_cfg->dump = dump;
  3797. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3798. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3799. ioa_cfg->dump_taken = 1;
  3800. schedule_work(&ioa_cfg->work_q);
  3801. }
  3802. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3803. return 0;
  3804. }
  3805. /**
  3806. * ipr_free_dump - Free adapter dump memory
  3807. * @ioa_cfg: ioa config struct
  3808. *
  3809. * Return value:
  3810. * 0 on success / other on failure
  3811. **/
  3812. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3813. {
  3814. struct ipr_dump *dump;
  3815. unsigned long lock_flags = 0;
  3816. ENTER;
  3817. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3818. dump = ioa_cfg->dump;
  3819. if (!dump) {
  3820. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3821. return 0;
  3822. }
  3823. ioa_cfg->dump = NULL;
  3824. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3825. kref_put(&dump->kref, ipr_release_dump);
  3826. LEAVE;
  3827. return 0;
  3828. }
  3829. /**
  3830. * ipr_write_dump - Setup dump state of adapter
  3831. * @filp: open sysfs file
  3832. * @kobj: kobject struct
  3833. * @bin_attr: bin_attribute struct
  3834. * @buf: buffer
  3835. * @off: offset
  3836. * @count: buffer size
  3837. *
  3838. * Return value:
  3839. * number of bytes printed to buffer
  3840. **/
  3841. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3842. const struct bin_attribute *bin_attr,
  3843. char *buf, loff_t off, size_t count)
  3844. {
  3845. struct device *cdev = kobj_to_dev(kobj);
  3846. struct Scsi_Host *shost = class_to_shost(cdev);
  3847. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3848. int rc;
  3849. if (!capable(CAP_SYS_ADMIN))
  3850. return -EACCES;
  3851. if (buf[0] == '1')
  3852. rc = ipr_alloc_dump(ioa_cfg);
  3853. else if (buf[0] == '0')
  3854. rc = ipr_free_dump(ioa_cfg);
  3855. else
  3856. return -EINVAL;
  3857. if (rc)
  3858. return rc;
  3859. else
  3860. return count;
  3861. }
  3862. static const struct bin_attribute ipr_dump_attr = {
  3863. .attr = {
  3864. .name = "dump",
  3865. .mode = S_IRUSR | S_IWUSR,
  3866. },
  3867. .size = 0,
  3868. .read = ipr_read_dump,
  3869. .write = ipr_write_dump
  3870. };
  3871. #else
  3872. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3873. #endif
  3874. /**
  3875. * ipr_change_queue_depth - Change the device's queue depth
  3876. * @sdev: scsi device struct
  3877. * @qdepth: depth to set
  3878. *
  3879. * Return value:
  3880. * actual depth set
  3881. **/
  3882. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth)
  3883. {
  3884. scsi_change_queue_depth(sdev, qdepth);
  3885. return sdev->queue_depth;
  3886. }
  3887. /**
  3888. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3889. * @dev: device struct
  3890. * @attr: device attribute structure
  3891. * @buf: buffer
  3892. *
  3893. * Return value:
  3894. * number of bytes printed to buffer
  3895. **/
  3896. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3897. {
  3898. struct scsi_device *sdev = to_scsi_device(dev);
  3899. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3900. struct ipr_resource_entry *res;
  3901. unsigned long lock_flags = 0;
  3902. ssize_t len = -ENXIO;
  3903. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3904. res = (struct ipr_resource_entry *)sdev->hostdata;
  3905. if (res)
  3906. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3907. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3908. return len;
  3909. }
  3910. static struct device_attribute ipr_adapter_handle_attr = {
  3911. .attr = {
  3912. .name = "adapter_handle",
  3913. .mode = S_IRUSR,
  3914. },
  3915. .show = ipr_show_adapter_handle
  3916. };
  3917. /**
  3918. * ipr_show_resource_path - Show the resource path or the resource address for
  3919. * this device.
  3920. * @dev: device struct
  3921. * @attr: device attribute structure
  3922. * @buf: buffer
  3923. *
  3924. * Return value:
  3925. * number of bytes printed to buffer
  3926. **/
  3927. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3928. {
  3929. struct scsi_device *sdev = to_scsi_device(dev);
  3930. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3931. struct ipr_resource_entry *res;
  3932. unsigned long lock_flags = 0;
  3933. ssize_t len = -ENXIO;
  3934. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3935. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3936. res = (struct ipr_resource_entry *)sdev->hostdata;
  3937. if (res && ioa_cfg->sis64)
  3938. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3939. __ipr_format_res_path(res->res_path, buffer,
  3940. sizeof(buffer)));
  3941. else if (res)
  3942. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3943. res->bus, res->target, res->lun);
  3944. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3945. return len;
  3946. }
  3947. static struct device_attribute ipr_resource_path_attr = {
  3948. .attr = {
  3949. .name = "resource_path",
  3950. .mode = S_IRUGO,
  3951. },
  3952. .show = ipr_show_resource_path
  3953. };
  3954. /**
  3955. * ipr_show_device_id - Show the device_id for this device.
  3956. * @dev: device struct
  3957. * @attr: device attribute structure
  3958. * @buf: buffer
  3959. *
  3960. * Return value:
  3961. * number of bytes printed to buffer
  3962. **/
  3963. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3964. {
  3965. struct scsi_device *sdev = to_scsi_device(dev);
  3966. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3967. struct ipr_resource_entry *res;
  3968. unsigned long lock_flags = 0;
  3969. ssize_t len = -ENXIO;
  3970. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3971. res = (struct ipr_resource_entry *)sdev->hostdata;
  3972. if (res && ioa_cfg->sis64)
  3973. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", be64_to_cpu(res->dev_id));
  3974. else if (res)
  3975. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  3976. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3977. return len;
  3978. }
  3979. static struct device_attribute ipr_device_id_attr = {
  3980. .attr = {
  3981. .name = "device_id",
  3982. .mode = S_IRUGO,
  3983. },
  3984. .show = ipr_show_device_id
  3985. };
  3986. /**
  3987. * ipr_show_resource_type - Show the resource type for this device.
  3988. * @dev: device struct
  3989. * @attr: device attribute structure
  3990. * @buf: buffer
  3991. *
  3992. * Return value:
  3993. * number of bytes printed to buffer
  3994. **/
  3995. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  3996. {
  3997. struct scsi_device *sdev = to_scsi_device(dev);
  3998. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3999. struct ipr_resource_entry *res;
  4000. unsigned long lock_flags = 0;
  4001. ssize_t len = -ENXIO;
  4002. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4003. res = (struct ipr_resource_entry *)sdev->hostdata;
  4004. if (res)
  4005. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  4006. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4007. return len;
  4008. }
  4009. static struct device_attribute ipr_resource_type_attr = {
  4010. .attr = {
  4011. .name = "resource_type",
  4012. .mode = S_IRUGO,
  4013. },
  4014. .show = ipr_show_resource_type
  4015. };
  4016. /**
  4017. * ipr_show_raw_mode - Show the adapter's raw mode
  4018. * @dev: class device struct
  4019. * @attr: device attribute (unused)
  4020. * @buf: buffer
  4021. *
  4022. * Return value:
  4023. * number of bytes printed to buffer
  4024. **/
  4025. static ssize_t ipr_show_raw_mode(struct device *dev,
  4026. struct device_attribute *attr, char *buf)
  4027. {
  4028. struct scsi_device *sdev = to_scsi_device(dev);
  4029. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4030. struct ipr_resource_entry *res;
  4031. unsigned long lock_flags = 0;
  4032. ssize_t len;
  4033. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4034. res = (struct ipr_resource_entry *)sdev->hostdata;
  4035. if (res)
  4036. len = snprintf(buf, PAGE_SIZE, "%d\n", res->raw_mode);
  4037. else
  4038. len = -ENXIO;
  4039. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4040. return len;
  4041. }
  4042. /**
  4043. * ipr_store_raw_mode - Change the adapter's raw mode
  4044. * @dev: class device struct
  4045. * @attr: device attribute (unused)
  4046. * @buf: buffer
  4047. * @count: buffer size
  4048. *
  4049. * Return value:
  4050. * number of bytes printed to buffer
  4051. **/
  4052. static ssize_t ipr_store_raw_mode(struct device *dev,
  4053. struct device_attribute *attr,
  4054. const char *buf, size_t count)
  4055. {
  4056. struct scsi_device *sdev = to_scsi_device(dev);
  4057. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  4058. struct ipr_resource_entry *res;
  4059. unsigned long lock_flags = 0;
  4060. ssize_t len;
  4061. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4062. res = (struct ipr_resource_entry *)sdev->hostdata;
  4063. if (res) {
  4064. if (ipr_is_af_dasd_device(res)) {
  4065. res->raw_mode = simple_strtoul(buf, NULL, 10);
  4066. len = strlen(buf);
  4067. if (res->sdev)
  4068. sdev_printk(KERN_INFO, res->sdev, "raw mode is %s\n",
  4069. res->raw_mode ? "enabled" : "disabled");
  4070. } else
  4071. len = -EINVAL;
  4072. } else
  4073. len = -ENXIO;
  4074. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4075. return len;
  4076. }
  4077. static struct device_attribute ipr_raw_mode_attr = {
  4078. .attr = {
  4079. .name = "raw_mode",
  4080. .mode = S_IRUGO | S_IWUSR,
  4081. },
  4082. .show = ipr_show_raw_mode,
  4083. .store = ipr_store_raw_mode
  4084. };
  4085. static struct attribute *ipr_dev_attrs[] = {
  4086. &ipr_adapter_handle_attr.attr,
  4087. &ipr_resource_path_attr.attr,
  4088. &ipr_device_id_attr.attr,
  4089. &ipr_resource_type_attr.attr,
  4090. &ipr_raw_mode_attr.attr,
  4091. NULL,
  4092. };
  4093. ATTRIBUTE_GROUPS(ipr_dev);
  4094. /**
  4095. * ipr_biosparam - Return the HSC mapping
  4096. * @sdev: scsi device struct
  4097. * @unused: gendisk pointer
  4098. * @capacity: capacity of the device
  4099. * @parm: Array containing returned HSC values.
  4100. *
  4101. * This function generates the HSC parms that fdisk uses.
  4102. * We want to make sure we return something that places partitions
  4103. * on 4k boundaries for best performance with the IOA.
  4104. *
  4105. * Return value:
  4106. * 0 on success
  4107. **/
  4108. static int ipr_biosparam(struct scsi_device *sdev,
  4109. struct gendisk *unused,
  4110. sector_t capacity, int *parm)
  4111. {
  4112. int heads, sectors;
  4113. sector_t cylinders;
  4114. heads = 128;
  4115. sectors = 32;
  4116. cylinders = capacity;
  4117. sector_div(cylinders, (128 * 32));
  4118. /* return result */
  4119. parm[0] = heads;
  4120. parm[1] = sectors;
  4121. parm[2] = cylinders;
  4122. return 0;
  4123. }
  4124. /**
  4125. * ipr_find_starget - Find target based on bus/target.
  4126. * @starget: scsi target struct
  4127. *
  4128. * Return value:
  4129. * resource entry pointer if found / NULL if not found
  4130. **/
  4131. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  4132. {
  4133. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4134. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4135. struct ipr_resource_entry *res;
  4136. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4137. if ((res->bus == starget->channel) &&
  4138. (res->target == starget->id)) {
  4139. return res;
  4140. }
  4141. }
  4142. return NULL;
  4143. }
  4144. /**
  4145. * ipr_target_destroy - Destroy a SCSI target
  4146. * @starget: scsi target struct
  4147. *
  4148. **/
  4149. static void ipr_target_destroy(struct scsi_target *starget)
  4150. {
  4151. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4152. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4153. if (ioa_cfg->sis64) {
  4154. if (!ipr_find_starget(starget)) {
  4155. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  4156. clear_bit(starget->id, ioa_cfg->array_ids);
  4157. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  4158. clear_bit(starget->id, ioa_cfg->vset_ids);
  4159. else if (starget->channel == 0)
  4160. clear_bit(starget->id, ioa_cfg->target_ids);
  4161. }
  4162. }
  4163. }
  4164. /**
  4165. * ipr_find_sdev - Find device based on bus/target/lun.
  4166. * @sdev: scsi device struct
  4167. *
  4168. * Return value:
  4169. * resource entry pointer if found / NULL if not found
  4170. **/
  4171. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  4172. {
  4173. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4174. struct ipr_resource_entry *res;
  4175. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4176. if ((res->bus == sdev->channel) &&
  4177. (res->target == sdev->id) &&
  4178. (res->lun == sdev->lun))
  4179. return res;
  4180. }
  4181. return NULL;
  4182. }
  4183. /**
  4184. * ipr_sdev_destroy - Unconfigure a SCSI device
  4185. * @sdev: scsi device struct
  4186. *
  4187. * Return value:
  4188. * nothing
  4189. **/
  4190. static void ipr_sdev_destroy(struct scsi_device *sdev)
  4191. {
  4192. struct ipr_resource_entry *res;
  4193. struct ipr_ioa_cfg *ioa_cfg;
  4194. unsigned long lock_flags = 0;
  4195. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4196. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4197. res = (struct ipr_resource_entry *) sdev->hostdata;
  4198. if (res) {
  4199. sdev->hostdata = NULL;
  4200. res->sdev = NULL;
  4201. }
  4202. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4203. }
  4204. /**
  4205. * ipr_sdev_configure - Configure a SCSI device
  4206. * @sdev: scsi device struct
  4207. * @lim: queue limits
  4208. *
  4209. * This function configures the specified scsi device.
  4210. *
  4211. * Return value:
  4212. * 0 on success
  4213. **/
  4214. static int ipr_sdev_configure(struct scsi_device *sdev,
  4215. struct queue_limits *lim)
  4216. {
  4217. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4218. struct ipr_resource_entry *res;
  4219. unsigned long lock_flags = 0;
  4220. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4221. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4222. res = sdev->hostdata;
  4223. if (res) {
  4224. if (ipr_is_af_dasd_device(res))
  4225. sdev->type = TYPE_RAID;
  4226. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4227. sdev->scsi_level = 4;
  4228. sdev->no_uld_attach = 1;
  4229. }
  4230. if (ipr_is_vset_device(res)) {
  4231. sdev->scsi_level = SCSI_SPC_3;
  4232. sdev->no_report_opcodes = 1;
  4233. blk_queue_rq_timeout(sdev->request_queue,
  4234. IPR_VSET_RW_TIMEOUT);
  4235. lim->max_hw_sectors = IPR_VSET_MAX_SECTORS;
  4236. }
  4237. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4238. if (ioa_cfg->sis64)
  4239. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4240. ipr_format_res_path(ioa_cfg,
  4241. res->res_path, buffer, sizeof(buffer)));
  4242. return 0;
  4243. }
  4244. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4245. return 0;
  4246. }
  4247. /**
  4248. * ipr_sdev_init - Prepare for commands to a device.
  4249. * @sdev: scsi device struct
  4250. *
  4251. * This function saves a pointer to the resource entry
  4252. * in the scsi device struct if the device exists. We
  4253. * can then use this pointer in ipr_queuecommand when
  4254. * handling new commands.
  4255. *
  4256. * Return value:
  4257. * 0 on success / -ENXIO if device does not exist
  4258. **/
  4259. static int ipr_sdev_init(struct scsi_device *sdev)
  4260. {
  4261. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4262. struct ipr_resource_entry *res;
  4263. unsigned long lock_flags;
  4264. int rc = -ENXIO;
  4265. sdev->hostdata = NULL;
  4266. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4267. res = ipr_find_sdev(sdev);
  4268. if (res) {
  4269. res->sdev = sdev;
  4270. res->add_to_ml = 0;
  4271. res->in_erp = 0;
  4272. sdev->hostdata = res;
  4273. if (!ipr_is_naca_model(res))
  4274. res->needs_sync_complete = 1;
  4275. rc = 0;
  4276. if (ipr_is_gata(res)) {
  4277. sdev_printk(KERN_ERR, sdev, "SATA devices are no longer "
  4278. "supported by this driver. Skipping device.\n");
  4279. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4280. return -ENXIO;
  4281. }
  4282. }
  4283. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4284. return rc;
  4285. }
  4286. /**
  4287. * ipr_match_lun - Match function for specified LUN
  4288. * @ipr_cmd: ipr command struct
  4289. * @device: device to match (sdev)
  4290. *
  4291. * Returns:
  4292. * 1 if command matches sdev / 0 if command does not match sdev
  4293. **/
  4294. static int ipr_match_lun(struct ipr_cmnd *ipr_cmd, void *device)
  4295. {
  4296. if (ipr_cmd->scsi_cmd && ipr_cmd->scsi_cmd->device == device)
  4297. return 1;
  4298. return 0;
  4299. }
  4300. /**
  4301. * ipr_cmnd_is_free - Check if a command is free or not
  4302. * @ipr_cmd: ipr command struct
  4303. *
  4304. * Returns:
  4305. * true / false
  4306. **/
  4307. static bool ipr_cmnd_is_free(struct ipr_cmnd *ipr_cmd)
  4308. {
  4309. struct ipr_cmnd *loop_cmd;
  4310. list_for_each_entry(loop_cmd, &ipr_cmd->hrrq->hrrq_free_q, queue) {
  4311. if (loop_cmd == ipr_cmd)
  4312. return true;
  4313. }
  4314. return false;
  4315. }
  4316. /**
  4317. * ipr_wait_for_ops - Wait for matching commands to complete
  4318. * @ioa_cfg: ioa config struct
  4319. * @device: device to match (sdev)
  4320. * @match: match function to use
  4321. *
  4322. * Returns:
  4323. * SUCCESS / FAILED
  4324. **/
  4325. static int ipr_wait_for_ops(struct ipr_ioa_cfg *ioa_cfg, void *device,
  4326. int (*match)(struct ipr_cmnd *, void *))
  4327. {
  4328. struct ipr_cmnd *ipr_cmd;
  4329. int wait, i;
  4330. unsigned long flags;
  4331. struct ipr_hrr_queue *hrrq;
  4332. signed long timeout = IPR_ABORT_TASK_TIMEOUT;
  4333. DECLARE_COMPLETION_ONSTACK(comp);
  4334. ENTER;
  4335. do {
  4336. wait = 0;
  4337. for_each_hrrq(hrrq, ioa_cfg) {
  4338. spin_lock_irqsave(hrrq->lock, flags);
  4339. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4340. ipr_cmd = ioa_cfg->ipr_cmnd_list[i];
  4341. if (!ipr_cmnd_is_free(ipr_cmd)) {
  4342. if (match(ipr_cmd, device)) {
  4343. ipr_cmd->eh_comp = &comp;
  4344. wait++;
  4345. }
  4346. }
  4347. }
  4348. spin_unlock_irqrestore(hrrq->lock, flags);
  4349. }
  4350. if (wait) {
  4351. timeout = wait_for_completion_timeout(&comp, timeout);
  4352. if (!timeout) {
  4353. wait = 0;
  4354. for_each_hrrq(hrrq, ioa_cfg) {
  4355. spin_lock_irqsave(hrrq->lock, flags);
  4356. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4357. ipr_cmd = ioa_cfg->ipr_cmnd_list[i];
  4358. if (!ipr_cmnd_is_free(ipr_cmd)) {
  4359. if (match(ipr_cmd, device)) {
  4360. ipr_cmd->eh_comp = NULL;
  4361. wait++;
  4362. }
  4363. }
  4364. }
  4365. spin_unlock_irqrestore(hrrq->lock, flags);
  4366. }
  4367. if (wait)
  4368. dev_err(&ioa_cfg->pdev->dev, "Timed out waiting for aborted commands\n");
  4369. LEAVE;
  4370. return wait ? FAILED : SUCCESS;
  4371. }
  4372. }
  4373. } while (wait);
  4374. LEAVE;
  4375. return SUCCESS;
  4376. }
  4377. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4378. {
  4379. struct ipr_ioa_cfg *ioa_cfg;
  4380. unsigned long lock_flags = 0;
  4381. int rc = SUCCESS;
  4382. ENTER;
  4383. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4384. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4385. if (!ioa_cfg->in_reset_reload && !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4386. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4387. dev_err(&ioa_cfg->pdev->dev,
  4388. "Adapter being reset as a result of error recovery.\n");
  4389. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4390. ioa_cfg->sdt_state = GET_DUMP;
  4391. }
  4392. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4393. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4394. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4395. /* If we got hit with a host reset while we were already resetting
  4396. the adapter for some reason, and the reset failed. */
  4397. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4398. ipr_trace;
  4399. rc = FAILED;
  4400. }
  4401. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4402. LEAVE;
  4403. return rc;
  4404. }
  4405. /**
  4406. * ipr_device_reset - Reset the device
  4407. * @ioa_cfg: ioa config struct
  4408. * @res: resource entry struct
  4409. *
  4410. * This function issues a device reset to the affected device.
  4411. * If the device is a SCSI device, a LUN reset will be sent
  4412. * to the device first. If that does not work, a target reset
  4413. * will be sent.
  4414. *
  4415. * Return value:
  4416. * 0 on success / non-zero on failure
  4417. **/
  4418. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4419. struct ipr_resource_entry *res)
  4420. {
  4421. struct ipr_cmnd *ipr_cmd;
  4422. struct ipr_ioarcb *ioarcb;
  4423. struct ipr_cmd_pkt *cmd_pkt;
  4424. u32 ioasc;
  4425. ENTER;
  4426. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4427. ioarcb = &ipr_cmd->ioarcb;
  4428. cmd_pkt = &ioarcb->cmd_pkt;
  4429. if (ipr_cmd->ioa_cfg->sis64)
  4430. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4431. ioarcb->res_handle = res->res_handle;
  4432. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4433. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4434. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4435. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4436. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4437. LEAVE;
  4438. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4439. }
  4440. /**
  4441. * __ipr_eh_dev_reset - Reset the device
  4442. * @scsi_cmd: scsi command struct
  4443. *
  4444. * This function issues a device reset to the affected device.
  4445. * A LUN reset will be sent to the device first. If that does
  4446. * not work, a target reset will be sent.
  4447. *
  4448. * Return value:
  4449. * SUCCESS / FAILED
  4450. **/
  4451. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4452. {
  4453. struct ipr_ioa_cfg *ioa_cfg;
  4454. struct ipr_resource_entry *res;
  4455. int rc = 0;
  4456. ENTER;
  4457. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4458. res = scsi_cmd->device->hostdata;
  4459. /*
  4460. * If we are currently going through reset/reload, return failed. This will force the
  4461. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4462. * reset to complete
  4463. */
  4464. if (ioa_cfg->in_reset_reload)
  4465. return FAILED;
  4466. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4467. return FAILED;
  4468. res->resetting_device = 1;
  4469. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4470. rc = ipr_device_reset(ioa_cfg, res);
  4471. res->resetting_device = 0;
  4472. res->reset_occurred = 1;
  4473. LEAVE;
  4474. return rc ? FAILED : SUCCESS;
  4475. }
  4476. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4477. {
  4478. int rc;
  4479. struct ipr_ioa_cfg *ioa_cfg;
  4480. struct ipr_resource_entry *res;
  4481. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4482. res = cmd->device->hostdata;
  4483. if (!res)
  4484. return FAILED;
  4485. spin_lock_irq(cmd->device->host->host_lock);
  4486. rc = __ipr_eh_dev_reset(cmd);
  4487. spin_unlock_irq(cmd->device->host->host_lock);
  4488. if (rc == SUCCESS)
  4489. rc = ipr_wait_for_ops(ioa_cfg, cmd->device, ipr_match_lun);
  4490. return rc;
  4491. }
  4492. /**
  4493. * ipr_bus_reset_done - Op done function for bus reset.
  4494. * @ipr_cmd: ipr command struct
  4495. *
  4496. * This function is the op done function for a bus reset
  4497. *
  4498. * Return value:
  4499. * none
  4500. **/
  4501. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4502. {
  4503. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4504. struct ipr_resource_entry *res;
  4505. ENTER;
  4506. if (!ioa_cfg->sis64)
  4507. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4508. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4509. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4510. break;
  4511. }
  4512. }
  4513. /*
  4514. * If abort has not completed, indicate the reset has, else call the
  4515. * abort's done function to wake the sleeping eh thread
  4516. */
  4517. if (ipr_cmd->sibling->sibling)
  4518. ipr_cmd->sibling->sibling = NULL;
  4519. else
  4520. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4521. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4522. LEAVE;
  4523. }
  4524. /**
  4525. * ipr_abort_timeout - An abort task has timed out
  4526. * @t: Timer context used to fetch ipr command struct
  4527. *
  4528. * This function handles when an abort task times out. If this
  4529. * happens we issue a bus reset since we have resources tied
  4530. * up that must be freed before returning to the midlayer.
  4531. *
  4532. * Return value:
  4533. * none
  4534. **/
  4535. static void ipr_abort_timeout(struct timer_list *t)
  4536. {
  4537. struct ipr_cmnd *ipr_cmd = timer_container_of(ipr_cmd, t, timer);
  4538. struct ipr_cmnd *reset_cmd;
  4539. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4540. struct ipr_cmd_pkt *cmd_pkt;
  4541. unsigned long lock_flags = 0;
  4542. ENTER;
  4543. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4544. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4545. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4546. return;
  4547. }
  4548. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4549. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4550. ipr_cmd->sibling = reset_cmd;
  4551. reset_cmd->sibling = ipr_cmd;
  4552. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4553. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4554. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4555. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4556. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4557. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4558. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4559. LEAVE;
  4560. }
  4561. /**
  4562. * ipr_cancel_op - Cancel specified op
  4563. * @scsi_cmd: scsi command struct
  4564. *
  4565. * This function cancels specified op.
  4566. *
  4567. * Return value:
  4568. * SUCCESS / FAILED
  4569. **/
  4570. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4571. {
  4572. struct ipr_cmnd *ipr_cmd;
  4573. struct ipr_ioa_cfg *ioa_cfg;
  4574. struct ipr_resource_entry *res;
  4575. struct ipr_cmd_pkt *cmd_pkt;
  4576. u32 ioasc;
  4577. int i, op_found = 0;
  4578. struct ipr_hrr_queue *hrrq;
  4579. ENTER;
  4580. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4581. res = scsi_cmd->device->hostdata;
  4582. /* If we are currently going through reset/reload, return failed.
  4583. * This will force the mid-layer to call ipr_eh_host_reset,
  4584. * which will then go to sleep and wait for the reset to complete
  4585. */
  4586. if (ioa_cfg->in_reset_reload ||
  4587. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4588. return FAILED;
  4589. if (!res)
  4590. return FAILED;
  4591. /*
  4592. * If we are aborting a timed out op, chances are that the timeout was caused
  4593. * by a still not detected EEH error. In such cases, reading a register will
  4594. * trigger the EEH recovery infrastructure.
  4595. */
  4596. readl(ioa_cfg->regs.sense_interrupt_reg);
  4597. if (!ipr_is_gscsi(res))
  4598. return FAILED;
  4599. for_each_hrrq(hrrq, ioa_cfg) {
  4600. spin_lock(&hrrq->_lock);
  4601. for (i = hrrq->min_cmd_id; i <= hrrq->max_cmd_id; i++) {
  4602. if (ioa_cfg->ipr_cmnd_list[i]->scsi_cmd == scsi_cmd) {
  4603. if (!ipr_cmnd_is_free(ioa_cfg->ipr_cmnd_list[i])) {
  4604. op_found = 1;
  4605. break;
  4606. }
  4607. }
  4608. }
  4609. spin_unlock(&hrrq->_lock);
  4610. }
  4611. if (!op_found)
  4612. return SUCCESS;
  4613. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4614. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4615. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4616. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4617. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4618. ipr_cmd->u.sdev = scsi_cmd->device;
  4619. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4620. scsi_cmd->cmnd[0]);
  4621. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4622. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4623. /*
  4624. * If the abort task timed out and we sent a bus reset, we will get
  4625. * one the following responses to the abort
  4626. */
  4627. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4628. ioasc = 0;
  4629. ipr_trace;
  4630. }
  4631. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4632. if (!ipr_is_naca_model(res))
  4633. res->needs_sync_complete = 1;
  4634. LEAVE;
  4635. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4636. }
  4637. /**
  4638. * ipr_scan_finished - Report whether scan is done
  4639. * @shost: scsi host struct
  4640. * @elapsed_time: elapsed time
  4641. *
  4642. * Return value:
  4643. * 0 if scan in progress / 1 if scan is complete
  4644. **/
  4645. static int ipr_scan_finished(struct Scsi_Host *shost, unsigned long elapsed_time)
  4646. {
  4647. unsigned long lock_flags;
  4648. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4649. int rc = 0;
  4650. spin_lock_irqsave(shost->host_lock, lock_flags);
  4651. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead || ioa_cfg->scan_done)
  4652. rc = 1;
  4653. if ((elapsed_time/HZ) > (ioa_cfg->transop_timeout * 2))
  4654. rc = 1;
  4655. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  4656. return rc;
  4657. }
  4658. /**
  4659. * ipr_eh_abort - Reset the host adapter
  4660. * @scsi_cmd: scsi command struct
  4661. *
  4662. * Return value:
  4663. * SUCCESS / FAILED
  4664. **/
  4665. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4666. {
  4667. unsigned long flags;
  4668. int rc;
  4669. struct ipr_ioa_cfg *ioa_cfg;
  4670. ENTER;
  4671. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4672. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4673. rc = ipr_cancel_op(scsi_cmd);
  4674. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4675. if (rc == SUCCESS)
  4676. rc = ipr_wait_for_ops(ioa_cfg, scsi_cmd->device, ipr_match_lun);
  4677. LEAVE;
  4678. return rc;
  4679. }
  4680. /**
  4681. * ipr_handle_other_interrupt - Handle "other" interrupts
  4682. * @ioa_cfg: ioa config struct
  4683. * @int_reg: interrupt register
  4684. *
  4685. * Return value:
  4686. * IRQ_NONE / IRQ_HANDLED
  4687. **/
  4688. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4689. u32 int_reg)
  4690. {
  4691. irqreturn_t rc = IRQ_HANDLED;
  4692. u32 int_mask_reg;
  4693. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4694. int_reg &= ~int_mask_reg;
  4695. /* If an interrupt on the adapter did not occur, ignore it.
  4696. * Or in the case of SIS 64, check for a stage change interrupt.
  4697. */
  4698. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4699. if (ioa_cfg->sis64) {
  4700. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4701. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4702. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4703. /* clear stage change */
  4704. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4705. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4706. list_del(&ioa_cfg->reset_cmd->queue);
  4707. timer_delete(&ioa_cfg->reset_cmd->timer);
  4708. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4709. return IRQ_HANDLED;
  4710. }
  4711. }
  4712. return IRQ_NONE;
  4713. }
  4714. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4715. /* Mask the interrupt */
  4716. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4717. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4718. list_del(&ioa_cfg->reset_cmd->queue);
  4719. timer_delete(&ioa_cfg->reset_cmd->timer);
  4720. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4721. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4722. if (ioa_cfg->clear_isr) {
  4723. if (ipr_debug && printk_ratelimit())
  4724. dev_err(&ioa_cfg->pdev->dev,
  4725. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4726. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4727. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4728. return IRQ_NONE;
  4729. }
  4730. } else {
  4731. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4732. ioa_cfg->ioa_unit_checked = 1;
  4733. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  4734. dev_err(&ioa_cfg->pdev->dev,
  4735. "No Host RRQ. 0x%08X\n", int_reg);
  4736. else
  4737. dev_err(&ioa_cfg->pdev->dev,
  4738. "Permanent IOA failure. 0x%08X\n", int_reg);
  4739. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4740. ioa_cfg->sdt_state = GET_DUMP;
  4741. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4742. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4743. }
  4744. return rc;
  4745. }
  4746. /**
  4747. * ipr_isr_eh - Interrupt service routine error handler
  4748. * @ioa_cfg: ioa config struct
  4749. * @msg: message to log
  4750. * @number: various meanings depending on the caller/message
  4751. *
  4752. * Return value:
  4753. * none
  4754. **/
  4755. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  4756. {
  4757. ioa_cfg->errors_logged++;
  4758. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  4759. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4760. ioa_cfg->sdt_state = GET_DUMP;
  4761. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4762. }
  4763. static int ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue, int budget,
  4764. struct list_head *doneq)
  4765. {
  4766. u32 ioasc;
  4767. u16 cmd_index;
  4768. struct ipr_cmnd *ipr_cmd;
  4769. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  4770. int num_hrrq = 0;
  4771. /* If interrupts are disabled, ignore the interrupt */
  4772. if (!hrr_queue->allow_interrupts)
  4773. return 0;
  4774. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4775. hrr_queue->toggle_bit) {
  4776. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  4777. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  4778. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4779. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  4780. cmd_index < hrr_queue->min_cmd_id)) {
  4781. ipr_isr_eh(ioa_cfg,
  4782. "Invalid response handle from IOA: ",
  4783. cmd_index);
  4784. break;
  4785. }
  4786. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4787. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4788. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4789. list_move_tail(&ipr_cmd->queue, doneq);
  4790. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  4791. hrr_queue->hrrq_curr++;
  4792. } else {
  4793. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  4794. hrr_queue->toggle_bit ^= 1u;
  4795. }
  4796. num_hrrq++;
  4797. if (budget > 0 && num_hrrq >= budget)
  4798. break;
  4799. }
  4800. return num_hrrq;
  4801. }
  4802. static int ipr_iopoll(struct irq_poll *iop, int budget)
  4803. {
  4804. struct ipr_hrr_queue *hrrq;
  4805. struct ipr_cmnd *ipr_cmd, *temp;
  4806. unsigned long hrrq_flags;
  4807. int completed_ops;
  4808. LIST_HEAD(doneq);
  4809. hrrq = container_of(iop, struct ipr_hrr_queue, iopoll);
  4810. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4811. completed_ops = ipr_process_hrrq(hrrq, budget, &doneq);
  4812. if (completed_ops < budget)
  4813. irq_poll_complete(iop);
  4814. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4815. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4816. list_del(&ipr_cmd->queue);
  4817. timer_delete(&ipr_cmd->timer);
  4818. ipr_cmd->fast_done(ipr_cmd);
  4819. }
  4820. return completed_ops;
  4821. }
  4822. /**
  4823. * ipr_isr - Interrupt service routine
  4824. * @irq: irq number
  4825. * @devp: pointer to ioa config struct
  4826. *
  4827. * Return value:
  4828. * IRQ_NONE / IRQ_HANDLED
  4829. **/
  4830. static irqreturn_t ipr_isr(int irq, void *devp)
  4831. {
  4832. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4833. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4834. unsigned long hrrq_flags = 0;
  4835. u32 int_reg = 0;
  4836. int num_hrrq = 0;
  4837. int irq_none = 0;
  4838. struct ipr_cmnd *ipr_cmd, *temp;
  4839. irqreturn_t rc = IRQ_NONE;
  4840. LIST_HEAD(doneq);
  4841. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4842. /* If interrupts are disabled, ignore the interrupt */
  4843. if (!hrrq->allow_interrupts) {
  4844. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4845. return IRQ_NONE;
  4846. }
  4847. while (1) {
  4848. if (ipr_process_hrrq(hrrq, -1, &doneq)) {
  4849. rc = IRQ_HANDLED;
  4850. if (!ioa_cfg->clear_isr)
  4851. break;
  4852. /* Clear the PCI interrupt */
  4853. num_hrrq = 0;
  4854. do {
  4855. writel(IPR_PCII_HRRQ_UPDATED,
  4856. ioa_cfg->regs.clr_interrupt_reg32);
  4857. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4858. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  4859. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  4860. } else if (rc == IRQ_NONE && irq_none == 0) {
  4861. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4862. irq_none++;
  4863. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  4864. int_reg & IPR_PCII_HRRQ_UPDATED) {
  4865. ipr_isr_eh(ioa_cfg,
  4866. "Error clearing HRRQ: ", num_hrrq);
  4867. rc = IRQ_HANDLED;
  4868. break;
  4869. } else
  4870. break;
  4871. }
  4872. if (unlikely(rc == IRQ_NONE))
  4873. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  4874. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4875. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4876. list_del(&ipr_cmd->queue);
  4877. timer_delete(&ipr_cmd->timer);
  4878. ipr_cmd->fast_done(ipr_cmd);
  4879. }
  4880. return rc;
  4881. }
  4882. /**
  4883. * ipr_isr_mhrrq - Interrupt service routine
  4884. * @irq: irq number
  4885. * @devp: pointer to ioa config struct
  4886. *
  4887. * Return value:
  4888. * IRQ_NONE / IRQ_HANDLED
  4889. **/
  4890. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  4891. {
  4892. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4893. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4894. unsigned long hrrq_flags = 0;
  4895. struct ipr_cmnd *ipr_cmd, *temp;
  4896. irqreturn_t rc = IRQ_NONE;
  4897. LIST_HEAD(doneq);
  4898. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4899. /* If interrupts are disabled, ignore the interrupt */
  4900. if (!hrrq->allow_interrupts) {
  4901. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4902. return IRQ_NONE;
  4903. }
  4904. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  4905. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4906. hrrq->toggle_bit) {
  4907. irq_poll_sched(&hrrq->iopoll);
  4908. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4909. return IRQ_HANDLED;
  4910. }
  4911. } else {
  4912. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4913. hrrq->toggle_bit)
  4914. if (ipr_process_hrrq(hrrq, -1, &doneq))
  4915. rc = IRQ_HANDLED;
  4916. }
  4917. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4918. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4919. list_del(&ipr_cmd->queue);
  4920. timer_delete(&ipr_cmd->timer);
  4921. ipr_cmd->fast_done(ipr_cmd);
  4922. }
  4923. return rc;
  4924. }
  4925. /**
  4926. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  4927. * @ioa_cfg: ioa config struct
  4928. * @ipr_cmd: ipr command struct
  4929. *
  4930. * Return value:
  4931. * 0 on success / -1 on failure
  4932. **/
  4933. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  4934. struct ipr_cmnd *ipr_cmd)
  4935. {
  4936. int i, nseg;
  4937. struct scatterlist *sg;
  4938. u32 length;
  4939. u32 ioadl_flags = 0;
  4940. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4941. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4942. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  4943. length = scsi_bufflen(scsi_cmd);
  4944. if (!length)
  4945. return 0;
  4946. nseg = scsi_dma_map(scsi_cmd);
  4947. if (nseg < 0) {
  4948. if (printk_ratelimit())
  4949. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  4950. return -1;
  4951. }
  4952. ipr_cmd->dma_use_sg = nseg;
  4953. ioarcb->data_transfer_length = cpu_to_be32(length);
  4954. ioarcb->ioadl_len =
  4955. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  4956. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4957. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4958. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4959. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  4960. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4961. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4962. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  4963. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  4964. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  4965. }
  4966. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4967. return 0;
  4968. }
  4969. /**
  4970. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  4971. * @ioa_cfg: ioa config struct
  4972. * @ipr_cmd: ipr command struct
  4973. *
  4974. * Return value:
  4975. * 0 on success / -1 on failure
  4976. **/
  4977. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  4978. struct ipr_cmnd *ipr_cmd)
  4979. {
  4980. int i, nseg;
  4981. struct scatterlist *sg;
  4982. u32 length;
  4983. u32 ioadl_flags = 0;
  4984. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4985. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4986. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  4987. length = scsi_bufflen(scsi_cmd);
  4988. if (!length)
  4989. return 0;
  4990. nseg = scsi_dma_map(scsi_cmd);
  4991. if (nseg < 0) {
  4992. dev_err(&ioa_cfg->pdev->dev, "scsi_dma_map failed!\n");
  4993. return -1;
  4994. }
  4995. ipr_cmd->dma_use_sg = nseg;
  4996. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4997. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4998. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4999. ioarcb->data_transfer_length = cpu_to_be32(length);
  5000. ioarcb->ioadl_len =
  5001. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5002. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  5003. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5004. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  5005. ioarcb->read_ioadl_len =
  5006. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5007. }
  5008. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  5009. ioadl = ioarcb->u.add_data.u.ioadl;
  5010. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  5011. offsetof(struct ipr_ioarcb, u.add_data));
  5012. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5013. }
  5014. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  5015. ioadl[i].flags_and_data_len =
  5016. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5017. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  5018. }
  5019. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5020. return 0;
  5021. }
  5022. /**
  5023. * __ipr_erp_done - Process completion of ERP for a device
  5024. * @ipr_cmd: ipr command struct
  5025. *
  5026. * This function copies the sense buffer into the scsi_cmd
  5027. * struct and pushes the scsi_done function.
  5028. *
  5029. * Return value:
  5030. * nothing
  5031. **/
  5032. static void __ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  5033. {
  5034. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5035. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5036. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5037. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5038. scsi_cmd->result |= (DID_ERROR << 16);
  5039. scmd_printk(KERN_ERR, scsi_cmd,
  5040. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  5041. } else {
  5042. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  5043. SCSI_SENSE_BUFFERSIZE);
  5044. }
  5045. if (res) {
  5046. if (!ipr_is_naca_model(res))
  5047. res->needs_sync_complete = 1;
  5048. res->in_erp = 0;
  5049. }
  5050. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5051. scsi_done(scsi_cmd);
  5052. if (ipr_cmd->eh_comp)
  5053. complete(ipr_cmd->eh_comp);
  5054. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5055. }
  5056. /**
  5057. * ipr_erp_done - Process completion of ERP for a device
  5058. * @ipr_cmd: ipr command struct
  5059. *
  5060. * This function copies the sense buffer into the scsi_cmd
  5061. * struct and pushes the scsi_done function.
  5062. *
  5063. * Return value:
  5064. * nothing
  5065. **/
  5066. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  5067. {
  5068. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  5069. unsigned long hrrq_flags;
  5070. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  5071. __ipr_erp_done(ipr_cmd);
  5072. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  5073. }
  5074. /**
  5075. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  5076. * @ipr_cmd: ipr command struct
  5077. *
  5078. * Return value:
  5079. * none
  5080. **/
  5081. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  5082. {
  5083. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5084. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5085. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5086. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  5087. ioarcb->data_transfer_length = 0;
  5088. ioarcb->read_data_transfer_length = 0;
  5089. ioarcb->ioadl_len = 0;
  5090. ioarcb->read_ioadl_len = 0;
  5091. ioasa->hdr.ioasc = 0;
  5092. ioasa->hdr.residual_data_len = 0;
  5093. if (ipr_cmd->ioa_cfg->sis64)
  5094. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5095. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  5096. else {
  5097. ioarcb->write_ioadl_addr =
  5098. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  5099. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5100. }
  5101. }
  5102. /**
  5103. * __ipr_erp_request_sense - Send request sense to a device
  5104. * @ipr_cmd: ipr command struct
  5105. *
  5106. * This function sends a request sense to a device as a result
  5107. * of a check condition.
  5108. *
  5109. * Return value:
  5110. * nothing
  5111. **/
  5112. static void __ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5113. {
  5114. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5115. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5116. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5117. __ipr_erp_done(ipr_cmd);
  5118. return;
  5119. }
  5120. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5121. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  5122. cmd_pkt->cdb[0] = REQUEST_SENSE;
  5123. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  5124. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  5125. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5126. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  5127. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  5128. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  5129. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  5130. IPR_REQUEST_SENSE_TIMEOUT * 2);
  5131. }
  5132. /**
  5133. * ipr_erp_request_sense - Send request sense to a device
  5134. * @ipr_cmd: ipr command struct
  5135. *
  5136. * This function sends a request sense to a device as a result
  5137. * of a check condition.
  5138. *
  5139. * Return value:
  5140. * nothing
  5141. **/
  5142. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5143. {
  5144. struct ipr_hrr_queue *hrrq = ipr_cmd->hrrq;
  5145. unsigned long hrrq_flags;
  5146. spin_lock_irqsave(&hrrq->_lock, hrrq_flags);
  5147. __ipr_erp_request_sense(ipr_cmd);
  5148. spin_unlock_irqrestore(&hrrq->_lock, hrrq_flags);
  5149. }
  5150. /**
  5151. * ipr_erp_cancel_all - Send cancel all to a device
  5152. * @ipr_cmd: ipr command struct
  5153. *
  5154. * This function sends a cancel all to a device to clear the
  5155. * queue. If we are running TCQ on the device, QERR is set to 1,
  5156. * which means all outstanding ops have been dropped on the floor.
  5157. * Cancel all will return them to us.
  5158. *
  5159. * Return value:
  5160. * nothing
  5161. **/
  5162. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  5163. {
  5164. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5165. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5166. struct ipr_cmd_pkt *cmd_pkt;
  5167. res->in_erp = 1;
  5168. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5169. if (!scsi_cmd->device->simple_tags) {
  5170. __ipr_erp_request_sense(ipr_cmd);
  5171. return;
  5172. }
  5173. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5174. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  5175. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  5176. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  5177. IPR_CANCEL_ALL_TIMEOUT);
  5178. }
  5179. /**
  5180. * ipr_dump_ioasa - Dump contents of IOASA
  5181. * @ioa_cfg: ioa config struct
  5182. * @ipr_cmd: ipr command struct
  5183. * @res: resource entry struct
  5184. *
  5185. * This function is invoked by the interrupt handler when ops
  5186. * fail. It will log the IOASA if appropriate. Only called
  5187. * for GPDD ops.
  5188. *
  5189. * Return value:
  5190. * none
  5191. **/
  5192. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  5193. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  5194. {
  5195. int i;
  5196. u16 data_len;
  5197. u32 ioasc, fd_ioasc;
  5198. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5199. __be32 *ioasa_data = (__be32 *)ioasa;
  5200. int error_index;
  5201. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5202. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5203. if (0 == ioasc)
  5204. return;
  5205. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5206. return;
  5207. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5208. error_index = ipr_get_error(fd_ioasc);
  5209. else
  5210. error_index = ipr_get_error(ioasc);
  5211. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5212. /* Don't log an error if the IOA already logged one */
  5213. if (ioasa->hdr.ilid != 0)
  5214. return;
  5215. if (!ipr_is_gscsi(res))
  5216. return;
  5217. if (ipr_error_table[error_index].log_ioasa == 0)
  5218. return;
  5219. }
  5220. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5221. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5222. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5223. data_len = sizeof(struct ipr_ioasa64);
  5224. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5225. data_len = sizeof(struct ipr_ioasa);
  5226. ipr_err("IOASA Dump:\n");
  5227. for (i = 0; i < data_len / 4; i += 4) {
  5228. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5229. be32_to_cpu(ioasa_data[i]),
  5230. be32_to_cpu(ioasa_data[i+1]),
  5231. be32_to_cpu(ioasa_data[i+2]),
  5232. be32_to_cpu(ioasa_data[i+3]));
  5233. }
  5234. }
  5235. /**
  5236. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5237. * @ipr_cmd: ipr command struct
  5238. *
  5239. * Return value:
  5240. * none
  5241. **/
  5242. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5243. {
  5244. u32 failing_lba;
  5245. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5246. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5247. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5248. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5249. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5250. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5251. return;
  5252. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5253. if (ipr_is_vset_device(res) &&
  5254. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5255. ioasa->u.vset.failing_lba_hi != 0) {
  5256. sense_buf[0] = 0x72;
  5257. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5258. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5259. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5260. sense_buf[7] = 12;
  5261. sense_buf[8] = 0;
  5262. sense_buf[9] = 0x0A;
  5263. sense_buf[10] = 0x80;
  5264. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5265. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5266. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5267. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5268. sense_buf[15] = failing_lba & 0x000000ff;
  5269. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5270. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5271. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5272. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5273. sense_buf[19] = failing_lba & 0x000000ff;
  5274. } else {
  5275. sense_buf[0] = 0x70;
  5276. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5277. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5278. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5279. /* Illegal request */
  5280. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5281. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5282. sense_buf[7] = 10; /* additional length */
  5283. /* IOARCB was in error */
  5284. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5285. sense_buf[15] = 0xC0;
  5286. else /* Parameter data was invalid */
  5287. sense_buf[15] = 0x80;
  5288. sense_buf[16] =
  5289. ((IPR_FIELD_POINTER_MASK &
  5290. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5291. sense_buf[17] =
  5292. (IPR_FIELD_POINTER_MASK &
  5293. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5294. } else {
  5295. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5296. if (ipr_is_vset_device(res))
  5297. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5298. else
  5299. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5300. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5301. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5302. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5303. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5304. sense_buf[6] = failing_lba & 0x000000ff;
  5305. }
  5306. sense_buf[7] = 6; /* additional length */
  5307. }
  5308. }
  5309. }
  5310. /**
  5311. * ipr_get_autosense - Copy autosense data to sense buffer
  5312. * @ipr_cmd: ipr command struct
  5313. *
  5314. * This function copies the autosense buffer to the buffer
  5315. * in the scsi_cmd, if there is autosense available.
  5316. *
  5317. * Return value:
  5318. * 1 if autosense was available / 0 if not
  5319. **/
  5320. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5321. {
  5322. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5323. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5324. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5325. return 0;
  5326. if (ipr_cmd->ioa_cfg->sis64)
  5327. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5328. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5329. SCSI_SENSE_BUFFERSIZE));
  5330. else
  5331. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5332. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5333. SCSI_SENSE_BUFFERSIZE));
  5334. return 1;
  5335. }
  5336. /**
  5337. * ipr_erp_start - Process an error response for a SCSI op
  5338. * @ioa_cfg: ioa config struct
  5339. * @ipr_cmd: ipr command struct
  5340. *
  5341. * This function determines whether or not to initiate ERP
  5342. * on the affected device.
  5343. *
  5344. * Return value:
  5345. * nothing
  5346. **/
  5347. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5348. struct ipr_cmnd *ipr_cmd)
  5349. {
  5350. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5351. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5352. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5353. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5354. if (!res) {
  5355. __ipr_scsi_eh_done(ipr_cmd);
  5356. return;
  5357. }
  5358. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5359. ipr_gen_sense(ipr_cmd);
  5360. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5361. switch (masked_ioasc) {
  5362. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5363. if (ipr_is_naca_model(res))
  5364. scsi_cmd->result |= (DID_ABORT << 16);
  5365. else
  5366. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5367. break;
  5368. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5369. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5370. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5371. break;
  5372. case IPR_IOASC_HW_SEL_TIMEOUT:
  5373. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5374. if (!ipr_is_naca_model(res))
  5375. res->needs_sync_complete = 1;
  5376. break;
  5377. case IPR_IOASC_SYNC_REQUIRED:
  5378. if (!res->in_erp)
  5379. res->needs_sync_complete = 1;
  5380. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5381. break;
  5382. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5383. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5384. /*
  5385. * exception: do not set DID_PASSTHROUGH on CHECK CONDITION
  5386. * so SCSI mid-layer and upper layers handle it accordingly.
  5387. */
  5388. if (scsi_cmd->result != SAM_STAT_CHECK_CONDITION)
  5389. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5390. break;
  5391. case IPR_IOASC_BUS_WAS_RESET:
  5392. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5393. /*
  5394. * Report the bus reset and ask for a retry. The device
  5395. * will give CC/UA the next command.
  5396. */
  5397. if (!res->resetting_device)
  5398. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5399. scsi_cmd->result |= (DID_ERROR << 16);
  5400. if (!ipr_is_naca_model(res))
  5401. res->needs_sync_complete = 1;
  5402. break;
  5403. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5404. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5405. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5406. if (!ipr_get_autosense(ipr_cmd)) {
  5407. if (!ipr_is_naca_model(res)) {
  5408. ipr_erp_cancel_all(ipr_cmd);
  5409. return;
  5410. }
  5411. }
  5412. }
  5413. if (!ipr_is_naca_model(res))
  5414. res->needs_sync_complete = 1;
  5415. break;
  5416. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5417. break;
  5418. case IPR_IOASC_IR_NON_OPTIMIZED:
  5419. if (res->raw_mode) {
  5420. res->raw_mode = 0;
  5421. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5422. } else
  5423. scsi_cmd->result |= (DID_ERROR << 16);
  5424. break;
  5425. default:
  5426. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5427. scsi_cmd->result |= (DID_ERROR << 16);
  5428. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5429. res->needs_sync_complete = 1;
  5430. break;
  5431. }
  5432. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5433. scsi_done(scsi_cmd);
  5434. if (ipr_cmd->eh_comp)
  5435. complete(ipr_cmd->eh_comp);
  5436. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5437. }
  5438. /**
  5439. * ipr_scsi_done - mid-layer done function
  5440. * @ipr_cmd: ipr command struct
  5441. *
  5442. * This function is invoked by the interrupt handler for
  5443. * ops generated by the SCSI mid-layer
  5444. *
  5445. * Return value:
  5446. * none
  5447. **/
  5448. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5449. {
  5450. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5451. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5452. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5453. unsigned long lock_flags;
  5454. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5455. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5456. scsi_dma_unmap(scsi_cmd);
  5457. spin_lock_irqsave(ipr_cmd->hrrq->lock, lock_flags);
  5458. scsi_done(scsi_cmd);
  5459. if (ipr_cmd->eh_comp)
  5460. complete(ipr_cmd->eh_comp);
  5461. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5462. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, lock_flags);
  5463. } else {
  5464. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5465. spin_lock(&ipr_cmd->hrrq->_lock);
  5466. ipr_erp_start(ioa_cfg, ipr_cmd);
  5467. spin_unlock(&ipr_cmd->hrrq->_lock);
  5468. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5469. }
  5470. }
  5471. /**
  5472. * ipr_queuecommand - Queue a mid-layer request
  5473. * @shost: scsi host struct
  5474. * @scsi_cmd: scsi command struct
  5475. *
  5476. * This function queues a request generated by the mid-layer.
  5477. *
  5478. * Return value:
  5479. * 0 on success
  5480. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5481. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5482. **/
  5483. static enum scsi_qc_status ipr_queuecommand(struct Scsi_Host *shost,
  5484. struct scsi_cmnd *scsi_cmd)
  5485. {
  5486. struct ipr_ioa_cfg *ioa_cfg;
  5487. struct ipr_resource_entry *res;
  5488. struct ipr_ioarcb *ioarcb;
  5489. struct ipr_cmnd *ipr_cmd;
  5490. unsigned long hrrq_flags;
  5491. int rc;
  5492. struct ipr_hrr_queue *hrrq;
  5493. int hrrq_id;
  5494. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5495. scsi_cmd->result = (DID_OK << 16);
  5496. res = scsi_cmd->device->hostdata;
  5497. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5498. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5499. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5500. /*
  5501. * We are currently blocking all devices due to a host reset
  5502. * We have told the host to stop giving us new requests, but
  5503. * ERP ops don't count. FIXME
  5504. */
  5505. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead && !hrrq->removing_ioa)) {
  5506. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5507. return SCSI_MLQUEUE_HOST_BUSY;
  5508. }
  5509. /*
  5510. * FIXME - Create scsi_set_host_offline interface
  5511. * and the ioa_is_dead check can be removed
  5512. */
  5513. if (unlikely(hrrq->ioa_is_dead || hrrq->removing_ioa || !res)) {
  5514. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5515. goto err_nodev;
  5516. }
  5517. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5518. if (ipr_cmd == NULL) {
  5519. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5520. return SCSI_MLQUEUE_HOST_BUSY;
  5521. }
  5522. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5523. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5524. ioarcb = &ipr_cmd->ioarcb;
  5525. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5526. ipr_cmd->scsi_cmd = scsi_cmd;
  5527. ipr_cmd->done = ipr_scsi_eh_done;
  5528. if (ipr_is_gscsi(res)) {
  5529. if (scsi_cmd->underflow == 0)
  5530. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5531. if (res->reset_occurred) {
  5532. res->reset_occurred = 0;
  5533. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5534. }
  5535. }
  5536. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5537. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5538. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5539. if (scsi_cmd->flags & SCMD_TAGGED)
  5540. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_SIMPLE_TASK;
  5541. else
  5542. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_UNTAGGED_TASK;
  5543. }
  5544. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5545. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5546. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5547. }
  5548. if (res->raw_mode && ipr_is_af_dasd_device(res)) {
  5549. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_PIPE;
  5550. if (scsi_cmd->underflow == 0)
  5551. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5552. }
  5553. if (ioa_cfg->sis64)
  5554. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5555. else
  5556. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5557. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5558. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5559. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5560. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5561. if (!rc)
  5562. scsi_dma_unmap(scsi_cmd);
  5563. return SCSI_MLQUEUE_HOST_BUSY;
  5564. }
  5565. if (unlikely(hrrq->ioa_is_dead)) {
  5566. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5567. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5568. scsi_dma_unmap(scsi_cmd);
  5569. goto err_nodev;
  5570. }
  5571. ioarcb->res_handle = res->res_handle;
  5572. if (res->needs_sync_complete) {
  5573. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5574. res->needs_sync_complete = 0;
  5575. }
  5576. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5577. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5578. ipr_send_command(ipr_cmd);
  5579. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5580. return 0;
  5581. err_nodev:
  5582. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5583. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5584. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5585. scsi_done(scsi_cmd);
  5586. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5587. return 0;
  5588. }
  5589. /**
  5590. * ipr_ioa_info - Get information about the card/driver
  5591. * @host: scsi host struct
  5592. *
  5593. * Return value:
  5594. * pointer to buffer with description string
  5595. **/
  5596. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5597. {
  5598. static char buffer[512];
  5599. struct ipr_ioa_cfg *ioa_cfg;
  5600. unsigned long lock_flags = 0;
  5601. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5602. spin_lock_irqsave(host->host_lock, lock_flags);
  5603. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5604. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5605. return buffer;
  5606. }
  5607. static const struct scsi_host_template driver_template = {
  5608. .module = THIS_MODULE,
  5609. .name = "IPR",
  5610. .info = ipr_ioa_info,
  5611. .queuecommand = ipr_queuecommand,
  5612. .eh_abort_handler = ipr_eh_abort,
  5613. .eh_device_reset_handler = ipr_eh_dev_reset,
  5614. .eh_host_reset_handler = ipr_eh_host_reset,
  5615. .sdev_init = ipr_sdev_init,
  5616. .sdev_configure = ipr_sdev_configure,
  5617. .sdev_destroy = ipr_sdev_destroy,
  5618. .scan_finished = ipr_scan_finished,
  5619. .target_destroy = ipr_target_destroy,
  5620. .change_queue_depth = ipr_change_queue_depth,
  5621. .bios_param = ipr_biosparam,
  5622. .can_queue = IPR_MAX_COMMANDS,
  5623. .this_id = -1,
  5624. .sg_tablesize = IPR_MAX_SGLIST,
  5625. .max_sectors = IPR_IOA_MAX_SECTORS,
  5626. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5627. .shost_groups = ipr_ioa_groups,
  5628. .sdev_groups = ipr_dev_groups,
  5629. .proc_name = IPR_NAME,
  5630. };
  5631. /**
  5632. * ipr_ioa_bringdown_done - IOA bring down completion.
  5633. * @ipr_cmd: ipr command struct
  5634. *
  5635. * This function processes the completion of an adapter bring down.
  5636. * It wakes any reset sleepers.
  5637. *
  5638. * Return value:
  5639. * IPR_RC_JOB_RETURN
  5640. **/
  5641. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  5642. {
  5643. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5644. int i;
  5645. ENTER;
  5646. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  5647. ipr_trace;
  5648. ioa_cfg->scsi_unblock = 1;
  5649. schedule_work(&ioa_cfg->work_q);
  5650. }
  5651. ioa_cfg->in_reset_reload = 0;
  5652. ioa_cfg->reset_retries = 0;
  5653. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  5654. spin_lock(&ioa_cfg->hrrq[i]._lock);
  5655. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  5656. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  5657. }
  5658. wmb();
  5659. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5660. wake_up_all(&ioa_cfg->reset_wait_q);
  5661. LEAVE;
  5662. return IPR_RC_JOB_RETURN;
  5663. }
  5664. /**
  5665. * ipr_ioa_reset_done - IOA reset completion.
  5666. * @ipr_cmd: ipr command struct
  5667. *
  5668. * This function processes the completion of an adapter reset.
  5669. * It schedules any necessary mid-layer add/removes and
  5670. * wakes any reset sleepers.
  5671. *
  5672. * Return value:
  5673. * IPR_RC_JOB_RETURN
  5674. **/
  5675. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  5676. {
  5677. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5678. struct ipr_resource_entry *res;
  5679. int j;
  5680. ENTER;
  5681. ioa_cfg->in_reset_reload = 0;
  5682. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  5683. spin_lock(&ioa_cfg->hrrq[j]._lock);
  5684. ioa_cfg->hrrq[j].allow_cmds = 1;
  5685. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  5686. }
  5687. wmb();
  5688. ioa_cfg->reset_cmd = NULL;
  5689. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  5690. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  5691. if (res->add_to_ml || res->del_from_ml) {
  5692. ipr_trace;
  5693. break;
  5694. }
  5695. }
  5696. schedule_work(&ioa_cfg->work_q);
  5697. for (j = 0; j < IPR_NUM_HCAMS; j++) {
  5698. list_del_init(&ioa_cfg->hostrcb[j]->queue);
  5699. if (j < IPR_NUM_LOG_HCAMS)
  5700. ipr_send_hcam(ioa_cfg,
  5701. IPR_HCAM_CDB_OP_CODE_LOG_DATA,
  5702. ioa_cfg->hostrcb[j]);
  5703. else
  5704. ipr_send_hcam(ioa_cfg,
  5705. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  5706. ioa_cfg->hostrcb[j]);
  5707. }
  5708. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  5709. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  5710. ioa_cfg->reset_retries = 0;
  5711. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5712. wake_up_all(&ioa_cfg->reset_wait_q);
  5713. ioa_cfg->scsi_unblock = 1;
  5714. schedule_work(&ioa_cfg->work_q);
  5715. LEAVE;
  5716. return IPR_RC_JOB_RETURN;
  5717. }
  5718. /**
  5719. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  5720. * @supported_dev: supported device struct
  5721. * @vpids: vendor product id struct
  5722. *
  5723. * Return value:
  5724. * none
  5725. **/
  5726. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  5727. struct ipr_std_inq_vpids *vpids)
  5728. {
  5729. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  5730. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  5731. supported_dev->num_records = 1;
  5732. supported_dev->data_length =
  5733. cpu_to_be16(sizeof(struct ipr_supported_device));
  5734. supported_dev->reserved = 0;
  5735. }
  5736. /**
  5737. * ipr_set_supported_devs - Send Set Supported Devices for a device
  5738. * @ipr_cmd: ipr command struct
  5739. *
  5740. * This function sends a Set Supported Devices to the adapter
  5741. *
  5742. * Return value:
  5743. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  5744. **/
  5745. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  5746. {
  5747. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5748. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  5749. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5750. struct ipr_resource_entry *res = ipr_cmd->u.res;
  5751. ipr_cmd->job_step = ipr_ioa_reset_done;
  5752. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  5753. if (!ipr_is_scsi_disk(res))
  5754. continue;
  5755. ipr_cmd->u.res = res;
  5756. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  5757. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  5758. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5759. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5760. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  5761. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  5762. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  5763. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  5764. ipr_init_ioadl(ipr_cmd,
  5765. ioa_cfg->vpd_cbs_dma +
  5766. offsetof(struct ipr_misc_cbs, supp_dev),
  5767. sizeof(struct ipr_supported_device),
  5768. IPR_IOADL_FLAGS_WRITE_LAST);
  5769. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  5770. IPR_SET_SUP_DEVICE_TIMEOUT);
  5771. if (!ioa_cfg->sis64)
  5772. ipr_cmd->job_step = ipr_set_supported_devs;
  5773. LEAVE;
  5774. return IPR_RC_JOB_RETURN;
  5775. }
  5776. LEAVE;
  5777. return IPR_RC_JOB_CONTINUE;
  5778. }
  5779. /**
  5780. * ipr_get_mode_page - Locate specified mode page
  5781. * @mode_pages: mode page buffer
  5782. * @page_code: page code to find
  5783. * @len: minimum required length for mode page
  5784. *
  5785. * Return value:
  5786. * pointer to mode page / NULL on failure
  5787. **/
  5788. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  5789. u32 page_code, u32 len)
  5790. {
  5791. struct ipr_mode_page_hdr *mode_hdr;
  5792. u32 page_length;
  5793. u32 length;
  5794. if (!mode_pages || (mode_pages->hdr.length == 0))
  5795. return NULL;
  5796. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  5797. mode_hdr = (struct ipr_mode_page_hdr *)
  5798. (mode_pages->data + mode_pages->hdr.block_desc_len);
  5799. while (length) {
  5800. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  5801. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  5802. return mode_hdr;
  5803. break;
  5804. } else {
  5805. page_length = (sizeof(struct ipr_mode_page_hdr) +
  5806. mode_hdr->page_length);
  5807. length -= page_length;
  5808. mode_hdr = (struct ipr_mode_page_hdr *)
  5809. ((unsigned long)mode_hdr + page_length);
  5810. }
  5811. }
  5812. return NULL;
  5813. }
  5814. /**
  5815. * ipr_check_term_power - Check for term power errors
  5816. * @ioa_cfg: ioa config struct
  5817. * @mode_pages: IOAFP mode pages buffer
  5818. *
  5819. * Check the IOAFP's mode page 28 for term power errors
  5820. *
  5821. * Return value:
  5822. * nothing
  5823. **/
  5824. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  5825. struct ipr_mode_pages *mode_pages)
  5826. {
  5827. int i;
  5828. int entry_length;
  5829. struct ipr_dev_bus_entry *bus;
  5830. struct ipr_mode_page28 *mode_page;
  5831. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  5832. sizeof(struct ipr_mode_page28));
  5833. entry_length = mode_page->entry_length;
  5834. bus = mode_page->bus;
  5835. for (i = 0; i < mode_page->num_entries; i++) {
  5836. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  5837. dev_err(&ioa_cfg->pdev->dev,
  5838. "Term power is absent on scsi bus %d\n",
  5839. bus->res_addr.bus);
  5840. }
  5841. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  5842. }
  5843. }
  5844. /**
  5845. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  5846. * @ioa_cfg: ioa config struct
  5847. *
  5848. * Looks through the config table checking for SES devices. If
  5849. * the SES device is in the SES table indicating a maximum SCSI
  5850. * bus speed, the speed is limited for the bus.
  5851. *
  5852. * Return value:
  5853. * none
  5854. **/
  5855. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  5856. {
  5857. u32 max_xfer_rate;
  5858. int i;
  5859. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  5860. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  5861. ioa_cfg->bus_attr[i].bus_width);
  5862. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  5863. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  5864. }
  5865. }
  5866. /**
  5867. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  5868. * @ioa_cfg: ioa config struct
  5869. * @mode_pages: mode page 28 buffer
  5870. *
  5871. * Updates mode page 28 based on driver configuration
  5872. *
  5873. * Return value:
  5874. * none
  5875. **/
  5876. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  5877. struct ipr_mode_pages *mode_pages)
  5878. {
  5879. int i, entry_length;
  5880. struct ipr_dev_bus_entry *bus;
  5881. struct ipr_bus_attributes *bus_attr;
  5882. struct ipr_mode_page28 *mode_page;
  5883. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  5884. sizeof(struct ipr_mode_page28));
  5885. entry_length = mode_page->entry_length;
  5886. /* Loop for each device bus entry */
  5887. for (i = 0, bus = mode_page->bus;
  5888. i < mode_page->num_entries;
  5889. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  5890. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  5891. dev_err(&ioa_cfg->pdev->dev,
  5892. "Invalid resource address reported: 0x%08X\n",
  5893. IPR_GET_PHYS_LOC(bus->res_addr));
  5894. continue;
  5895. }
  5896. bus_attr = &ioa_cfg->bus_attr[i];
  5897. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  5898. bus->bus_width = bus_attr->bus_width;
  5899. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  5900. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  5901. if (bus_attr->qas_enabled)
  5902. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  5903. else
  5904. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  5905. }
  5906. }
  5907. /**
  5908. * ipr_build_mode_select - Build a mode select command
  5909. * @ipr_cmd: ipr command struct
  5910. * @res_handle: resource handle to send command to
  5911. * @parm: Byte 2 of Mode Sense command
  5912. * @dma_addr: DMA buffer address
  5913. * @xfer_len: data transfer length
  5914. *
  5915. * Return value:
  5916. * none
  5917. **/
  5918. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  5919. __be32 res_handle, u8 parm,
  5920. dma_addr_t dma_addr, u8 xfer_len)
  5921. {
  5922. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5923. ioarcb->res_handle = res_handle;
  5924. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  5925. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5926. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  5927. ioarcb->cmd_pkt.cdb[1] = parm;
  5928. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  5929. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  5930. }
  5931. /**
  5932. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  5933. * @ipr_cmd: ipr command struct
  5934. *
  5935. * This function sets up the SCSI bus attributes and sends
  5936. * a Mode Select for Page 28 to activate them.
  5937. *
  5938. * Return value:
  5939. * IPR_RC_JOB_RETURN
  5940. **/
  5941. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  5942. {
  5943. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5944. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  5945. int length;
  5946. ENTER;
  5947. ipr_scsi_bus_speed_limit(ioa_cfg);
  5948. ipr_check_term_power(ioa_cfg, mode_pages);
  5949. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  5950. length = mode_pages->hdr.length + 1;
  5951. mode_pages->hdr.length = 0;
  5952. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  5953. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  5954. length);
  5955. ipr_cmd->job_step = ipr_set_supported_devs;
  5956. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  5957. struct ipr_resource_entry, queue);
  5958. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  5959. LEAVE;
  5960. return IPR_RC_JOB_RETURN;
  5961. }
  5962. /**
  5963. * ipr_build_mode_sense - Builds a mode sense command
  5964. * @ipr_cmd: ipr command struct
  5965. * @res_handle: resource entry struct
  5966. * @parm: Byte 2 of mode sense command
  5967. * @dma_addr: DMA address of mode sense buffer
  5968. * @xfer_len: Size of DMA buffer
  5969. *
  5970. * Return value:
  5971. * none
  5972. **/
  5973. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  5974. __be32 res_handle,
  5975. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  5976. {
  5977. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5978. ioarcb->res_handle = res_handle;
  5979. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  5980. ioarcb->cmd_pkt.cdb[2] = parm;
  5981. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  5982. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  5983. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  5984. }
  5985. /**
  5986. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  5987. * @ipr_cmd: ipr command struct
  5988. *
  5989. * This function handles the failure of an IOA bringup command.
  5990. *
  5991. * Return value:
  5992. * IPR_RC_JOB_RETURN
  5993. **/
  5994. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  5995. {
  5996. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5997. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5998. dev_err(&ioa_cfg->pdev->dev,
  5999. "0x%02X failed with IOASC: 0x%08X\n",
  6000. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6001. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6002. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6003. return IPR_RC_JOB_RETURN;
  6004. }
  6005. /**
  6006. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6007. * @ipr_cmd: ipr command struct
  6008. *
  6009. * This function handles the failure of a Mode Sense to the IOAFP.
  6010. * Some adapters do not handle all mode pages.
  6011. *
  6012. * Return value:
  6013. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6014. **/
  6015. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6016. {
  6017. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6018. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6019. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6020. ipr_cmd->job_step = ipr_set_supported_devs;
  6021. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6022. struct ipr_resource_entry, queue);
  6023. return IPR_RC_JOB_CONTINUE;
  6024. }
  6025. return ipr_reset_cmd_failed(ipr_cmd);
  6026. }
  6027. /**
  6028. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6029. * @ipr_cmd: ipr command struct
  6030. *
  6031. * This function send a Page 28 mode sense to the IOA to
  6032. * retrieve SCSI bus attributes.
  6033. *
  6034. * Return value:
  6035. * IPR_RC_JOB_RETURN
  6036. **/
  6037. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6038. {
  6039. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6040. ENTER;
  6041. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6042. 0x28, ioa_cfg->vpd_cbs_dma +
  6043. offsetof(struct ipr_misc_cbs, mode_pages),
  6044. sizeof(struct ipr_mode_pages));
  6045. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6046. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6047. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6048. LEAVE;
  6049. return IPR_RC_JOB_RETURN;
  6050. }
  6051. /**
  6052. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6053. * @ipr_cmd: ipr command struct
  6054. *
  6055. * This function enables dual IOA RAID support if possible.
  6056. *
  6057. * Return value:
  6058. * IPR_RC_JOB_RETURN
  6059. **/
  6060. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6061. {
  6062. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6063. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6064. struct ipr_mode_page24 *mode_page;
  6065. int length;
  6066. ENTER;
  6067. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6068. sizeof(struct ipr_mode_page24));
  6069. if (mode_page)
  6070. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6071. length = mode_pages->hdr.length + 1;
  6072. mode_pages->hdr.length = 0;
  6073. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6074. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6075. length);
  6076. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6077. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6078. LEAVE;
  6079. return IPR_RC_JOB_RETURN;
  6080. }
  6081. /**
  6082. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6083. * @ipr_cmd: ipr command struct
  6084. *
  6085. * This function handles the failure of a Mode Sense to the IOAFP.
  6086. * Some adapters do not handle all mode pages.
  6087. *
  6088. * Return value:
  6089. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6090. **/
  6091. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6092. {
  6093. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6094. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6095. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6096. return IPR_RC_JOB_CONTINUE;
  6097. }
  6098. return ipr_reset_cmd_failed(ipr_cmd);
  6099. }
  6100. /**
  6101. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6102. * @ipr_cmd: ipr command struct
  6103. *
  6104. * This function send a mode sense to the IOA to retrieve
  6105. * the IOA Advanced Function Control mode page.
  6106. *
  6107. * Return value:
  6108. * IPR_RC_JOB_RETURN
  6109. **/
  6110. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6111. {
  6112. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6113. ENTER;
  6114. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6115. 0x24, ioa_cfg->vpd_cbs_dma +
  6116. offsetof(struct ipr_misc_cbs, mode_pages),
  6117. sizeof(struct ipr_mode_pages));
  6118. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6119. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6120. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6121. LEAVE;
  6122. return IPR_RC_JOB_RETURN;
  6123. }
  6124. /**
  6125. * ipr_init_res_table - Initialize the resource table
  6126. * @ipr_cmd: ipr command struct
  6127. *
  6128. * This function looks through the existing resource table, comparing
  6129. * it with the config table. This function will take care of old/new
  6130. * devices and schedule adding/removing them from the mid-layer
  6131. * as appropriate.
  6132. *
  6133. * Return value:
  6134. * IPR_RC_JOB_CONTINUE
  6135. **/
  6136. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6137. {
  6138. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6139. struct ipr_resource_entry *res, *temp;
  6140. struct ipr_config_table_entry_wrapper cfgtew;
  6141. int entries, found, flag, i;
  6142. LIST_HEAD(old_res);
  6143. ENTER;
  6144. if (ioa_cfg->sis64)
  6145. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6146. else
  6147. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6148. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6149. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6150. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6151. list_move_tail(&res->queue, &old_res);
  6152. if (ioa_cfg->sis64)
  6153. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6154. else
  6155. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6156. for (i = 0; i < entries; i++) {
  6157. if (ioa_cfg->sis64)
  6158. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6159. else
  6160. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6161. found = 0;
  6162. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6163. if (ipr_is_same_device(res, &cfgtew)) {
  6164. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6165. found = 1;
  6166. break;
  6167. }
  6168. }
  6169. if (!found) {
  6170. if (list_empty(&ioa_cfg->free_res_q)) {
  6171. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6172. break;
  6173. }
  6174. found = 1;
  6175. res = list_entry(ioa_cfg->free_res_q.next,
  6176. struct ipr_resource_entry, queue);
  6177. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6178. ipr_init_res_entry(res, &cfgtew);
  6179. res->add_to_ml = 1;
  6180. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6181. res->sdev->allow_restart = 1;
  6182. if (found)
  6183. ipr_update_res_entry(res, &cfgtew);
  6184. }
  6185. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6186. if (res->sdev) {
  6187. res->del_from_ml = 1;
  6188. res->res_handle = IPR_INVALID_RES_HANDLE;
  6189. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6190. }
  6191. }
  6192. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6193. ipr_clear_res_target(res);
  6194. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6195. }
  6196. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6197. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6198. else
  6199. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6200. LEAVE;
  6201. return IPR_RC_JOB_CONTINUE;
  6202. }
  6203. /**
  6204. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6205. * @ipr_cmd: ipr command struct
  6206. *
  6207. * This function sends a Query IOA Configuration command
  6208. * to the adapter to retrieve the IOA configuration table.
  6209. *
  6210. * Return value:
  6211. * IPR_RC_JOB_RETURN
  6212. **/
  6213. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6214. {
  6215. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6216. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6217. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6218. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6219. ENTER;
  6220. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6221. ioa_cfg->dual_raid = 1;
  6222. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6223. ucode_vpd->major_release, ucode_vpd->card_type,
  6224. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6225. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6226. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6227. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6228. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6229. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6230. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6231. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6232. IPR_IOADL_FLAGS_READ_LAST);
  6233. ipr_cmd->job_step = ipr_init_res_table;
  6234. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6235. LEAVE;
  6236. return IPR_RC_JOB_RETURN;
  6237. }
  6238. static int ipr_ioa_service_action_failed(struct ipr_cmnd *ipr_cmd)
  6239. {
  6240. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6241. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT)
  6242. return IPR_RC_JOB_CONTINUE;
  6243. return ipr_reset_cmd_failed(ipr_cmd);
  6244. }
  6245. static void ipr_build_ioa_service_action(struct ipr_cmnd *ipr_cmd,
  6246. __be32 res_handle, u8 sa_code)
  6247. {
  6248. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6249. ioarcb->res_handle = res_handle;
  6250. ioarcb->cmd_pkt.cdb[0] = IPR_IOA_SERVICE_ACTION;
  6251. ioarcb->cmd_pkt.cdb[1] = sa_code;
  6252. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6253. }
  6254. /**
  6255. * ipr_ioafp_set_caching_parameters - Issue Set Cache parameters service
  6256. * action
  6257. * @ipr_cmd: ipr command struct
  6258. *
  6259. * Return value:
  6260. * none
  6261. **/
  6262. static int ipr_ioafp_set_caching_parameters(struct ipr_cmnd *ipr_cmd)
  6263. {
  6264. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6265. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6266. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6267. ENTER;
  6268. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6269. if (pageC4->cache_cap[0] & IPR_CAP_SYNC_CACHE) {
  6270. ipr_build_ioa_service_action(ipr_cmd,
  6271. cpu_to_be32(IPR_IOA_RES_HANDLE),
  6272. IPR_IOA_SA_CHANGE_CACHE_PARAMS);
  6273. ioarcb->cmd_pkt.cdb[2] = 0x40;
  6274. ipr_cmd->job_step_failed = ipr_ioa_service_action_failed;
  6275. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6276. IPR_SET_SUP_DEVICE_TIMEOUT);
  6277. LEAVE;
  6278. return IPR_RC_JOB_RETURN;
  6279. }
  6280. LEAVE;
  6281. return IPR_RC_JOB_CONTINUE;
  6282. }
  6283. /**
  6284. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6285. * @ipr_cmd: ipr command struct
  6286. * @flags: flags to send
  6287. * @page: page to inquire
  6288. * @dma_addr: DMA address
  6289. * @xfer_len: transfer data length
  6290. *
  6291. * This utility function sends an inquiry to the adapter.
  6292. *
  6293. * Return value:
  6294. * none
  6295. **/
  6296. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6297. dma_addr_t dma_addr, u8 xfer_len)
  6298. {
  6299. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6300. ENTER;
  6301. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6302. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6303. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6304. ioarcb->cmd_pkt.cdb[1] = flags;
  6305. ioarcb->cmd_pkt.cdb[2] = page;
  6306. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6307. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6308. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6309. LEAVE;
  6310. }
  6311. /**
  6312. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6313. * @page0: inquiry page 0 buffer
  6314. * @page: page code.
  6315. *
  6316. * This function determines if the specified inquiry page is supported.
  6317. *
  6318. * Return value:
  6319. * 1 if page is supported / 0 if not
  6320. **/
  6321. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6322. {
  6323. int i;
  6324. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6325. if (page0->page[i] == page)
  6326. return 1;
  6327. return 0;
  6328. }
  6329. /**
  6330. * ipr_ioafp_pageC4_inquiry - Send a Page 0xC4 Inquiry to the adapter.
  6331. * @ipr_cmd: ipr command struct
  6332. *
  6333. * This function sends a Page 0xC4 inquiry to the adapter
  6334. * to retrieve software VPD information.
  6335. *
  6336. * Return value:
  6337. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6338. **/
  6339. static int ipr_ioafp_pageC4_inquiry(struct ipr_cmnd *ipr_cmd)
  6340. {
  6341. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6342. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6343. struct ipr_inquiry_pageC4 *pageC4 = &ioa_cfg->vpd_cbs->pageC4_data;
  6344. ENTER;
  6345. ipr_cmd->job_step = ipr_ioafp_set_caching_parameters;
  6346. memset(pageC4, 0, sizeof(*pageC4));
  6347. if (ipr_inquiry_page_supported(page0, 0xC4)) {
  6348. ipr_ioafp_inquiry(ipr_cmd, 1, 0xC4,
  6349. (ioa_cfg->vpd_cbs_dma
  6350. + offsetof(struct ipr_misc_cbs,
  6351. pageC4_data)),
  6352. sizeof(struct ipr_inquiry_pageC4));
  6353. return IPR_RC_JOB_RETURN;
  6354. }
  6355. LEAVE;
  6356. return IPR_RC_JOB_CONTINUE;
  6357. }
  6358. /**
  6359. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6360. * @ipr_cmd: ipr command struct
  6361. *
  6362. * This function sends a Page 0xD0 inquiry to the adapter
  6363. * to retrieve adapter capabilities.
  6364. *
  6365. * Return value:
  6366. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6367. **/
  6368. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6369. {
  6370. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6371. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6372. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6373. ENTER;
  6374. ipr_cmd->job_step = ipr_ioafp_pageC4_inquiry;
  6375. memset(cap, 0, sizeof(*cap));
  6376. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6377. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6378. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6379. sizeof(struct ipr_inquiry_cap));
  6380. return IPR_RC_JOB_RETURN;
  6381. }
  6382. LEAVE;
  6383. return IPR_RC_JOB_CONTINUE;
  6384. }
  6385. /**
  6386. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6387. * @ipr_cmd: ipr command struct
  6388. *
  6389. * This function sends a Page 3 inquiry to the adapter
  6390. * to retrieve software VPD information.
  6391. *
  6392. * Return value:
  6393. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6394. **/
  6395. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6396. {
  6397. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6398. ENTER;
  6399. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6400. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6401. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6402. sizeof(struct ipr_inquiry_page3));
  6403. LEAVE;
  6404. return IPR_RC_JOB_RETURN;
  6405. }
  6406. /**
  6407. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6408. * @ipr_cmd: ipr command struct
  6409. *
  6410. * This function sends a Page 0 inquiry to the adapter
  6411. * to retrieve supported inquiry pages.
  6412. *
  6413. * Return value:
  6414. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6415. **/
  6416. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6417. {
  6418. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6419. char type[5];
  6420. ENTER;
  6421. /* Grab the type out of the VPD and store it away */
  6422. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6423. type[4] = '\0';
  6424. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6425. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  6426. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  6427. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  6428. sizeof(struct ipr_inquiry_page0));
  6429. LEAVE;
  6430. return IPR_RC_JOB_RETURN;
  6431. }
  6432. /**
  6433. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  6434. * @ipr_cmd: ipr command struct
  6435. *
  6436. * This function sends a standard inquiry to the adapter.
  6437. *
  6438. * Return value:
  6439. * IPR_RC_JOB_RETURN
  6440. **/
  6441. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  6442. {
  6443. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6444. ENTER;
  6445. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  6446. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  6447. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  6448. sizeof(struct ipr_ioa_vpd));
  6449. LEAVE;
  6450. return IPR_RC_JOB_RETURN;
  6451. }
  6452. /**
  6453. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  6454. * @ipr_cmd: ipr command struct
  6455. *
  6456. * This function send an Identify Host Request Response Queue
  6457. * command to establish the HRRQ with the adapter.
  6458. *
  6459. * Return value:
  6460. * IPR_RC_JOB_RETURN
  6461. **/
  6462. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  6463. {
  6464. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6465. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6466. struct ipr_hrr_queue *hrrq;
  6467. ENTER;
  6468. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  6469. if (ioa_cfg->identify_hrrq_index == 0)
  6470. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  6471. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  6472. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  6473. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  6474. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6475. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6476. if (ioa_cfg->sis64)
  6477. ioarcb->cmd_pkt.cdb[1] = 0x1;
  6478. if (ioa_cfg->nvectors == 1)
  6479. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  6480. else
  6481. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  6482. ioarcb->cmd_pkt.cdb[2] =
  6483. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  6484. ioarcb->cmd_pkt.cdb[3] =
  6485. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  6486. ioarcb->cmd_pkt.cdb[4] =
  6487. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  6488. ioarcb->cmd_pkt.cdb[5] =
  6489. ((u64) hrrq->host_rrq_dma) & 0xff;
  6490. ioarcb->cmd_pkt.cdb[7] =
  6491. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  6492. ioarcb->cmd_pkt.cdb[8] =
  6493. (sizeof(u32) * hrrq->size) & 0xff;
  6494. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6495. ioarcb->cmd_pkt.cdb[9] =
  6496. ioa_cfg->identify_hrrq_index;
  6497. if (ioa_cfg->sis64) {
  6498. ioarcb->cmd_pkt.cdb[10] =
  6499. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  6500. ioarcb->cmd_pkt.cdb[11] =
  6501. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  6502. ioarcb->cmd_pkt.cdb[12] =
  6503. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  6504. ioarcb->cmd_pkt.cdb[13] =
  6505. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  6506. }
  6507. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6508. ioarcb->cmd_pkt.cdb[14] =
  6509. ioa_cfg->identify_hrrq_index;
  6510. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6511. IPR_INTERNAL_TIMEOUT);
  6512. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  6513. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6514. LEAVE;
  6515. return IPR_RC_JOB_RETURN;
  6516. }
  6517. LEAVE;
  6518. return IPR_RC_JOB_CONTINUE;
  6519. }
  6520. /**
  6521. * ipr_reset_timer_done - Adapter reset timer function
  6522. * @t: Timer context used to fetch ipr command struct
  6523. *
  6524. * Description: This function is used in adapter reset processing
  6525. * for timing events. If the reset_cmd pointer in the IOA
  6526. * config struct is not this adapter's we are doing nested
  6527. * resets and fail_all_ops will take care of freeing the
  6528. * command block.
  6529. *
  6530. * Return value:
  6531. * none
  6532. **/
  6533. static void ipr_reset_timer_done(struct timer_list *t)
  6534. {
  6535. struct ipr_cmnd *ipr_cmd = timer_container_of(ipr_cmd, t, timer);
  6536. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6537. unsigned long lock_flags = 0;
  6538. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  6539. if (ioa_cfg->reset_cmd == ipr_cmd) {
  6540. list_del(&ipr_cmd->queue);
  6541. ipr_cmd->done(ipr_cmd);
  6542. }
  6543. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  6544. }
  6545. /**
  6546. * ipr_reset_start_timer - Start a timer for adapter reset job
  6547. * @ipr_cmd: ipr command struct
  6548. * @timeout: timeout value
  6549. *
  6550. * Description: This function is used in adapter reset processing
  6551. * for timing events. If the reset_cmd pointer in the IOA
  6552. * config struct is not this adapter's we are doing nested
  6553. * resets and fail_all_ops will take care of freeing the
  6554. * command block.
  6555. *
  6556. * Return value:
  6557. * none
  6558. **/
  6559. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  6560. unsigned long timeout)
  6561. {
  6562. ENTER;
  6563. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6564. ipr_cmd->done = ipr_reset_ioa_job;
  6565. ipr_cmd->timer.expires = jiffies + timeout;
  6566. ipr_cmd->timer.function = ipr_reset_timer_done;
  6567. add_timer(&ipr_cmd->timer);
  6568. }
  6569. /**
  6570. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  6571. * @ioa_cfg: ioa cfg struct
  6572. *
  6573. * Return value:
  6574. * nothing
  6575. **/
  6576. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  6577. {
  6578. struct ipr_hrr_queue *hrrq;
  6579. for_each_hrrq(hrrq, ioa_cfg) {
  6580. spin_lock(&hrrq->_lock);
  6581. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  6582. /* Initialize Host RRQ pointers */
  6583. hrrq->hrrq_start = hrrq->host_rrq;
  6584. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  6585. hrrq->hrrq_curr = hrrq->hrrq_start;
  6586. hrrq->toggle_bit = 1;
  6587. spin_unlock(&hrrq->_lock);
  6588. }
  6589. wmb();
  6590. ioa_cfg->identify_hrrq_index = 0;
  6591. if (ioa_cfg->hrrq_num == 1)
  6592. atomic_set(&ioa_cfg->hrrq_index, 0);
  6593. else
  6594. atomic_set(&ioa_cfg->hrrq_index, 1);
  6595. /* Zero out config table */
  6596. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  6597. }
  6598. /**
  6599. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  6600. * @ipr_cmd: ipr command struct
  6601. *
  6602. * Return value:
  6603. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6604. **/
  6605. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  6606. {
  6607. unsigned long stage, stage_time;
  6608. u32 feedback;
  6609. volatile u32 int_reg;
  6610. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6611. u64 maskval = 0;
  6612. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  6613. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  6614. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  6615. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  6616. /* sanity check the stage_time value */
  6617. if (stage_time == 0)
  6618. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  6619. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  6620. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  6621. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  6622. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  6623. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  6624. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  6625. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6626. stage_time = ioa_cfg->transop_timeout;
  6627. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6628. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  6629. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6630. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6631. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6632. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6633. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  6634. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  6635. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6636. return IPR_RC_JOB_CONTINUE;
  6637. }
  6638. }
  6639. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  6640. ipr_cmd->timer.function = ipr_oper_timeout;
  6641. ipr_cmd->done = ipr_reset_ioa_job;
  6642. add_timer(&ipr_cmd->timer);
  6643. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6644. return IPR_RC_JOB_RETURN;
  6645. }
  6646. /**
  6647. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  6648. * @ipr_cmd: ipr command struct
  6649. *
  6650. * This function reinitializes some control blocks and
  6651. * enables destructive diagnostics on the adapter.
  6652. *
  6653. * Return value:
  6654. * IPR_RC_JOB_RETURN
  6655. **/
  6656. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  6657. {
  6658. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6659. volatile u32 int_reg;
  6660. volatile u64 maskval;
  6661. int i;
  6662. ENTER;
  6663. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6664. ipr_init_ioa_mem(ioa_cfg);
  6665. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6666. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6667. ioa_cfg->hrrq[i].allow_interrupts = 1;
  6668. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6669. }
  6670. if (ioa_cfg->sis64) {
  6671. /* Set the adapter to the correct endian mode. */
  6672. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6673. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6674. }
  6675. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6676. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6677. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  6678. ioa_cfg->regs.clr_interrupt_mask_reg32);
  6679. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6680. return IPR_RC_JOB_CONTINUE;
  6681. }
  6682. /* Enable destructive diagnostics on IOA */
  6683. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  6684. if (ioa_cfg->sis64) {
  6685. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6686. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  6687. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  6688. } else
  6689. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  6690. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6691. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  6692. if (ioa_cfg->sis64) {
  6693. ipr_cmd->job_step = ipr_reset_next_stage;
  6694. return IPR_RC_JOB_CONTINUE;
  6695. }
  6696. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  6697. ipr_cmd->timer.function = ipr_oper_timeout;
  6698. ipr_cmd->done = ipr_reset_ioa_job;
  6699. add_timer(&ipr_cmd->timer);
  6700. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6701. LEAVE;
  6702. return IPR_RC_JOB_RETURN;
  6703. }
  6704. /**
  6705. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  6706. * @ipr_cmd: ipr command struct
  6707. *
  6708. * This function is invoked when an adapter dump has run out
  6709. * of processing time.
  6710. *
  6711. * Return value:
  6712. * IPR_RC_JOB_CONTINUE
  6713. **/
  6714. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  6715. {
  6716. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6717. if (ioa_cfg->sdt_state == GET_DUMP)
  6718. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6719. else if (ioa_cfg->sdt_state == READ_DUMP)
  6720. ioa_cfg->sdt_state = ABORT_DUMP;
  6721. ioa_cfg->dump_timeout = 1;
  6722. ipr_cmd->job_step = ipr_reset_alert;
  6723. return IPR_RC_JOB_CONTINUE;
  6724. }
  6725. /**
  6726. * ipr_unit_check_no_data - Log a unit check/no data error log
  6727. * @ioa_cfg: ioa config struct
  6728. *
  6729. * Logs an error indicating the adapter unit checked, but for some
  6730. * reason, we were unable to fetch the unit check buffer.
  6731. *
  6732. * Return value:
  6733. * nothing
  6734. **/
  6735. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  6736. {
  6737. ioa_cfg->errors_logged++;
  6738. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  6739. }
  6740. /**
  6741. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  6742. * @ioa_cfg: ioa config struct
  6743. *
  6744. * Fetches the unit check buffer from the adapter by clocking the data
  6745. * through the mailbox register.
  6746. *
  6747. * Return value:
  6748. * nothing
  6749. **/
  6750. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  6751. {
  6752. unsigned long mailbox;
  6753. struct ipr_hostrcb *hostrcb;
  6754. struct ipr_uc_sdt sdt;
  6755. int rc, length;
  6756. u32 ioasc;
  6757. mailbox = readl(ioa_cfg->ioa_mailbox);
  6758. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  6759. ipr_unit_check_no_data(ioa_cfg);
  6760. return;
  6761. }
  6762. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  6763. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  6764. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  6765. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  6766. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  6767. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  6768. ipr_unit_check_no_data(ioa_cfg);
  6769. return;
  6770. }
  6771. /* Find length of the first sdt entry (UC buffer) */
  6772. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  6773. length = be32_to_cpu(sdt.entry[0].end_token);
  6774. else
  6775. length = (be32_to_cpu(sdt.entry[0].end_token) -
  6776. be32_to_cpu(sdt.entry[0].start_token)) &
  6777. IPR_FMT2_MBX_ADDR_MASK;
  6778. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  6779. struct ipr_hostrcb, queue);
  6780. list_del_init(&hostrcb->queue);
  6781. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  6782. rc = ipr_get_ldump_data_section(ioa_cfg,
  6783. be32_to_cpu(sdt.entry[0].start_token),
  6784. (__be32 *)&hostrcb->hcam,
  6785. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  6786. if (!rc) {
  6787. ipr_handle_log_data(ioa_cfg, hostrcb);
  6788. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  6789. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  6790. ioa_cfg->sdt_state == GET_DUMP)
  6791. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6792. } else
  6793. ipr_unit_check_no_data(ioa_cfg);
  6794. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  6795. }
  6796. /**
  6797. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  6798. * @ipr_cmd: ipr command struct
  6799. *
  6800. * Description: This function will call to get the unit check buffer.
  6801. *
  6802. * Return value:
  6803. * IPR_RC_JOB_RETURN
  6804. **/
  6805. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  6806. {
  6807. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6808. ENTER;
  6809. ioa_cfg->ioa_unit_checked = 0;
  6810. ipr_get_unit_check_buffer(ioa_cfg);
  6811. ipr_cmd->job_step = ipr_reset_alert;
  6812. ipr_reset_start_timer(ipr_cmd, 0);
  6813. LEAVE;
  6814. return IPR_RC_JOB_RETURN;
  6815. }
  6816. static int ipr_dump_mailbox_wait(struct ipr_cmnd *ipr_cmd)
  6817. {
  6818. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6819. ENTER;
  6820. if (ioa_cfg->sdt_state != GET_DUMP)
  6821. return IPR_RC_JOB_RETURN;
  6822. if (!ioa_cfg->sis64 || !ipr_cmd->u.time_left ||
  6823. (readl(ioa_cfg->regs.sense_interrupt_reg) &
  6824. IPR_PCII_MAILBOX_STABLE)) {
  6825. if (!ipr_cmd->u.time_left)
  6826. dev_err(&ioa_cfg->pdev->dev,
  6827. "Timed out waiting for Mailbox register.\n");
  6828. ioa_cfg->sdt_state = READ_DUMP;
  6829. ioa_cfg->dump_timeout = 0;
  6830. if (ioa_cfg->sis64)
  6831. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  6832. else
  6833. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  6834. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  6835. schedule_work(&ioa_cfg->work_q);
  6836. } else {
  6837. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  6838. ipr_reset_start_timer(ipr_cmd,
  6839. IPR_CHECK_FOR_RESET_TIMEOUT);
  6840. }
  6841. LEAVE;
  6842. return IPR_RC_JOB_RETURN;
  6843. }
  6844. /**
  6845. * ipr_set_affinity_nobalance
  6846. * @ioa_cfg: ipr_ioa_cfg struct for an ipr device
  6847. * @flag: bool
  6848. * true: ensable "IRQ_NO_BALANCING" bit for msix interrupt
  6849. * false: disable "IRQ_NO_BALANCING" bit for msix interrupt
  6850. * Description: This function will be called to disable/enable
  6851. * "IRQ_NO_BALANCING" to avoid irqbalance daemon
  6852. * kicking in during adapter reset.
  6853. **/
  6854. static void ipr_set_affinity_nobalance(struct ipr_ioa_cfg *ioa_cfg, bool flag)
  6855. {
  6856. int irq, i;
  6857. for (i = 0; i < ioa_cfg->nvectors; i++) {
  6858. irq = pci_irq_vector(ioa_cfg->pdev, i);
  6859. if (flag)
  6860. irq_set_status_flags(irq, IRQ_NO_BALANCING);
  6861. else
  6862. irq_clear_status_flags(irq, IRQ_NO_BALANCING);
  6863. }
  6864. }
  6865. /**
  6866. * ipr_reset_restore_cfg_space - Restore PCI config space.
  6867. * @ipr_cmd: ipr command struct
  6868. *
  6869. * Description: This function restores the saved PCI config space of
  6870. * the adapter, fails all outstanding ops back to the callers, and
  6871. * fetches the dump/unit check if applicable to this reset.
  6872. *
  6873. * Return value:
  6874. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6875. **/
  6876. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  6877. {
  6878. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6879. ENTER;
  6880. pci_restore_state(ioa_cfg->pdev);
  6881. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  6882. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  6883. return IPR_RC_JOB_CONTINUE;
  6884. }
  6885. ipr_set_affinity_nobalance(ioa_cfg, false);
  6886. ipr_fail_all_ops(ioa_cfg);
  6887. if (ioa_cfg->sis64) {
  6888. /* Set the adapter to the correct endian mode. */
  6889. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6890. readl(ioa_cfg->regs.endian_swap_reg);
  6891. }
  6892. if (ioa_cfg->ioa_unit_checked) {
  6893. if (ioa_cfg->sis64) {
  6894. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  6895. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  6896. return IPR_RC_JOB_RETURN;
  6897. } else {
  6898. ioa_cfg->ioa_unit_checked = 0;
  6899. ipr_get_unit_check_buffer(ioa_cfg);
  6900. ipr_cmd->job_step = ipr_reset_alert;
  6901. ipr_reset_start_timer(ipr_cmd, 0);
  6902. return IPR_RC_JOB_RETURN;
  6903. }
  6904. }
  6905. if (ioa_cfg->in_ioa_bringdown) {
  6906. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  6907. } else if (ioa_cfg->sdt_state == GET_DUMP) {
  6908. ipr_cmd->job_step = ipr_dump_mailbox_wait;
  6909. ipr_cmd->u.time_left = IPR_WAIT_FOR_MAILBOX;
  6910. } else {
  6911. ipr_cmd->job_step = ipr_reset_enable_ioa;
  6912. }
  6913. LEAVE;
  6914. return IPR_RC_JOB_CONTINUE;
  6915. }
  6916. /**
  6917. * ipr_reset_bist_done - BIST has completed on the adapter.
  6918. * @ipr_cmd: ipr command struct
  6919. *
  6920. * Description: Unblock config space and resume the reset process.
  6921. *
  6922. * Return value:
  6923. * IPR_RC_JOB_CONTINUE
  6924. **/
  6925. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  6926. {
  6927. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6928. ENTER;
  6929. if (ioa_cfg->cfg_locked)
  6930. pci_cfg_access_unlock(ioa_cfg->pdev);
  6931. ioa_cfg->cfg_locked = 0;
  6932. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  6933. LEAVE;
  6934. return IPR_RC_JOB_CONTINUE;
  6935. }
  6936. /**
  6937. * ipr_reset_start_bist - Run BIST on the adapter.
  6938. * @ipr_cmd: ipr command struct
  6939. *
  6940. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  6941. *
  6942. * Return value:
  6943. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6944. **/
  6945. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  6946. {
  6947. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6948. int rc = PCIBIOS_SUCCESSFUL;
  6949. ENTER;
  6950. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  6951. writel(IPR_UPROCI_SIS64_START_BIST,
  6952. ioa_cfg->regs.set_uproc_interrupt_reg32);
  6953. else
  6954. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  6955. if (rc == PCIBIOS_SUCCESSFUL) {
  6956. ipr_set_affinity_nobalance(ioa_cfg, true);
  6957. ipr_cmd->job_step = ipr_reset_bist_done;
  6958. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  6959. rc = IPR_RC_JOB_RETURN;
  6960. } else {
  6961. if (ioa_cfg->cfg_locked)
  6962. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  6963. ioa_cfg->cfg_locked = 0;
  6964. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  6965. rc = IPR_RC_JOB_CONTINUE;
  6966. }
  6967. LEAVE;
  6968. return rc;
  6969. }
  6970. /**
  6971. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  6972. * @ipr_cmd: ipr command struct
  6973. *
  6974. * Description: This clears PCI reset to the adapter and delays two seconds.
  6975. *
  6976. * Return value:
  6977. * IPR_RC_JOB_RETURN
  6978. **/
  6979. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  6980. {
  6981. ENTER;
  6982. ipr_cmd->job_step = ipr_reset_bist_done;
  6983. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  6984. LEAVE;
  6985. return IPR_RC_JOB_RETURN;
  6986. }
  6987. /**
  6988. * ipr_reset_reset_work - Pulse a PCIe fundamental reset
  6989. * @work: work struct
  6990. *
  6991. * Description: This pulses warm reset to a slot.
  6992. *
  6993. **/
  6994. static void ipr_reset_reset_work(struct work_struct *work)
  6995. {
  6996. struct ipr_cmnd *ipr_cmd = container_of(work, struct ipr_cmnd, work);
  6997. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6998. struct pci_dev *pdev = ioa_cfg->pdev;
  6999. unsigned long lock_flags = 0;
  7000. ENTER;
  7001. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7002. msleep(jiffies_to_msecs(IPR_PCI_RESET_TIMEOUT));
  7003. pci_set_pcie_reset_state(pdev, pcie_deassert_reset);
  7004. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  7005. if (ioa_cfg->reset_cmd == ipr_cmd)
  7006. ipr_reset_ioa_job(ipr_cmd);
  7007. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  7008. LEAVE;
  7009. }
  7010. /**
  7011. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7012. * @ipr_cmd: ipr command struct
  7013. *
  7014. * Description: This asserts PCI reset to the adapter.
  7015. *
  7016. * Return value:
  7017. * IPR_RC_JOB_RETURN
  7018. **/
  7019. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7020. {
  7021. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7022. ENTER;
  7023. INIT_WORK(&ipr_cmd->work, ipr_reset_reset_work);
  7024. queue_work(ioa_cfg->reset_work_q, &ipr_cmd->work);
  7025. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7026. LEAVE;
  7027. return IPR_RC_JOB_RETURN;
  7028. }
  7029. /**
  7030. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7031. * @ipr_cmd: ipr command struct
  7032. *
  7033. * Description: This attempts to block config access to the IOA.
  7034. *
  7035. * Return value:
  7036. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7037. **/
  7038. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7039. {
  7040. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7041. int rc = IPR_RC_JOB_CONTINUE;
  7042. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7043. ioa_cfg->cfg_locked = 1;
  7044. ipr_cmd->job_step = ioa_cfg->reset;
  7045. } else {
  7046. if (ipr_cmd->u.time_left) {
  7047. rc = IPR_RC_JOB_RETURN;
  7048. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7049. ipr_reset_start_timer(ipr_cmd,
  7050. IPR_CHECK_FOR_RESET_TIMEOUT);
  7051. } else {
  7052. ipr_cmd->job_step = ioa_cfg->reset;
  7053. dev_err(&ioa_cfg->pdev->dev,
  7054. "Timed out waiting to lock config access. Resetting anyway.\n");
  7055. }
  7056. }
  7057. return rc;
  7058. }
  7059. /**
  7060. * ipr_reset_block_config_access - Block config access to the IOA
  7061. * @ipr_cmd: ipr command struct
  7062. *
  7063. * Description: This attempts to block config access to the IOA
  7064. *
  7065. * Return value:
  7066. * IPR_RC_JOB_CONTINUE
  7067. **/
  7068. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7069. {
  7070. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7071. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7072. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7073. return IPR_RC_JOB_CONTINUE;
  7074. }
  7075. /**
  7076. * ipr_reset_allowed - Query whether or not IOA can be reset
  7077. * @ioa_cfg: ioa config struct
  7078. *
  7079. * Return value:
  7080. * 0 if reset not allowed / non-zero if reset is allowed
  7081. **/
  7082. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7083. {
  7084. volatile u32 temp_reg;
  7085. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7086. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7087. }
  7088. /**
  7089. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7090. * @ipr_cmd: ipr command struct
  7091. *
  7092. * Description: This function waits for adapter permission to run BIST,
  7093. * then runs BIST. If the adapter does not give permission after a
  7094. * reasonable time, we will reset the adapter anyway. The impact of
  7095. * resetting the adapter without warning the adapter is the risk of
  7096. * losing the persistent error log on the adapter. If the adapter is
  7097. * reset while it is writing to the flash on the adapter, the flash
  7098. * segment will have bad ECC and be zeroed.
  7099. *
  7100. * Return value:
  7101. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7102. **/
  7103. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7104. {
  7105. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7106. int rc = IPR_RC_JOB_RETURN;
  7107. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7108. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7109. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7110. } else {
  7111. ipr_cmd->job_step = ipr_reset_block_config_access;
  7112. rc = IPR_RC_JOB_CONTINUE;
  7113. }
  7114. return rc;
  7115. }
  7116. /**
  7117. * ipr_reset_alert - Alert the adapter of a pending reset
  7118. * @ipr_cmd: ipr command struct
  7119. *
  7120. * Description: This function alerts the adapter that it will be reset.
  7121. * If memory space is not currently enabled, proceed directly
  7122. * to running BIST on the adapter. The timer must always be started
  7123. * so we guarantee we do not run BIST from ipr_isr.
  7124. *
  7125. * Return value:
  7126. * IPR_RC_JOB_RETURN
  7127. **/
  7128. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7129. {
  7130. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7131. u16 cmd_reg;
  7132. int rc;
  7133. ENTER;
  7134. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7135. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7136. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7137. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7138. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7139. } else {
  7140. ipr_cmd->job_step = ipr_reset_block_config_access;
  7141. }
  7142. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7143. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7144. LEAVE;
  7145. return IPR_RC_JOB_RETURN;
  7146. }
  7147. /**
  7148. * ipr_reset_quiesce_done - Complete IOA disconnect
  7149. * @ipr_cmd: ipr command struct
  7150. *
  7151. * Description: Freeze the adapter to complete quiesce processing
  7152. *
  7153. * Return value:
  7154. * IPR_RC_JOB_CONTINUE
  7155. **/
  7156. static int ipr_reset_quiesce_done(struct ipr_cmnd *ipr_cmd)
  7157. {
  7158. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7159. ENTER;
  7160. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7161. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  7162. LEAVE;
  7163. return IPR_RC_JOB_CONTINUE;
  7164. }
  7165. /**
  7166. * ipr_reset_cancel_hcam_done - Check for outstanding commands
  7167. * @ipr_cmd: ipr command struct
  7168. *
  7169. * Description: Ensure nothing is outstanding to the IOA and
  7170. * proceed with IOA disconnect. Otherwise reset the IOA.
  7171. *
  7172. * Return value:
  7173. * IPR_RC_JOB_RETURN / IPR_RC_JOB_CONTINUE
  7174. **/
  7175. static int ipr_reset_cancel_hcam_done(struct ipr_cmnd *ipr_cmd)
  7176. {
  7177. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7178. struct ipr_cmnd *loop_cmd;
  7179. struct ipr_hrr_queue *hrrq;
  7180. int rc = IPR_RC_JOB_CONTINUE;
  7181. int count = 0;
  7182. ENTER;
  7183. ipr_cmd->job_step = ipr_reset_quiesce_done;
  7184. for_each_hrrq(hrrq, ioa_cfg) {
  7185. spin_lock(&hrrq->_lock);
  7186. list_for_each_entry(loop_cmd, &hrrq->hrrq_pending_q, queue) {
  7187. count++;
  7188. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7189. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7190. rc = IPR_RC_JOB_RETURN;
  7191. break;
  7192. }
  7193. spin_unlock(&hrrq->_lock);
  7194. if (count)
  7195. break;
  7196. }
  7197. LEAVE;
  7198. return rc;
  7199. }
  7200. /**
  7201. * ipr_reset_cancel_hcam - Cancel outstanding HCAMs
  7202. * @ipr_cmd: ipr command struct
  7203. *
  7204. * Description: Cancel any oustanding HCAMs to the IOA.
  7205. *
  7206. * Return value:
  7207. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7208. **/
  7209. static int ipr_reset_cancel_hcam(struct ipr_cmnd *ipr_cmd)
  7210. {
  7211. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7212. int rc = IPR_RC_JOB_CONTINUE;
  7213. struct ipr_cmd_pkt *cmd_pkt;
  7214. struct ipr_cmnd *hcam_cmd;
  7215. struct ipr_hrr_queue *hrrq = &ioa_cfg->hrrq[IPR_INIT_HRRQ];
  7216. ENTER;
  7217. ipr_cmd->job_step = ipr_reset_cancel_hcam_done;
  7218. if (!hrrq->ioa_is_dead) {
  7219. if (!list_empty(&ioa_cfg->hostrcb_pending_q)) {
  7220. list_for_each_entry(hcam_cmd, &hrrq->hrrq_pending_q, queue) {
  7221. if (hcam_cmd->ioarcb.cmd_pkt.cdb[0] != IPR_HOST_CONTROLLED_ASYNC)
  7222. continue;
  7223. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7224. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7225. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  7226. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  7227. cmd_pkt->cdb[0] = IPR_CANCEL_REQUEST;
  7228. cmd_pkt->cdb[1] = IPR_CANCEL_64BIT_IOARCB;
  7229. cmd_pkt->cdb[10] = ((u64) hcam_cmd->dma_addr >> 56) & 0xff;
  7230. cmd_pkt->cdb[11] = ((u64) hcam_cmd->dma_addr >> 48) & 0xff;
  7231. cmd_pkt->cdb[12] = ((u64) hcam_cmd->dma_addr >> 40) & 0xff;
  7232. cmd_pkt->cdb[13] = ((u64) hcam_cmd->dma_addr >> 32) & 0xff;
  7233. cmd_pkt->cdb[2] = ((u64) hcam_cmd->dma_addr >> 24) & 0xff;
  7234. cmd_pkt->cdb[3] = ((u64) hcam_cmd->dma_addr >> 16) & 0xff;
  7235. cmd_pkt->cdb[4] = ((u64) hcam_cmd->dma_addr >> 8) & 0xff;
  7236. cmd_pkt->cdb[5] = ((u64) hcam_cmd->dma_addr) & 0xff;
  7237. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7238. IPR_CANCEL_TIMEOUT);
  7239. rc = IPR_RC_JOB_RETURN;
  7240. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7241. break;
  7242. }
  7243. }
  7244. } else
  7245. ipr_cmd->job_step = ipr_reset_alert;
  7246. LEAVE;
  7247. return rc;
  7248. }
  7249. /**
  7250. * ipr_reset_ucode_download_done - Microcode download completion
  7251. * @ipr_cmd: ipr command struct
  7252. *
  7253. * Description: This function unmaps the microcode download buffer.
  7254. *
  7255. * Return value:
  7256. * IPR_RC_JOB_CONTINUE
  7257. **/
  7258. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7259. {
  7260. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7261. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7262. dma_unmap_sg(&ioa_cfg->pdev->dev, sglist->scatterlist,
  7263. sglist->num_sg, DMA_TO_DEVICE);
  7264. ipr_cmd->job_step = ipr_reset_alert;
  7265. return IPR_RC_JOB_CONTINUE;
  7266. }
  7267. /**
  7268. * ipr_reset_ucode_download - Download microcode to the adapter
  7269. * @ipr_cmd: ipr command struct
  7270. *
  7271. * Description: This function checks to see if it there is microcode
  7272. * to download to the adapter. If there is, a download is performed.
  7273. *
  7274. * Return value:
  7275. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7276. **/
  7277. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7278. {
  7279. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7280. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7281. ENTER;
  7282. ipr_cmd->job_step = ipr_reset_alert;
  7283. if (!sglist)
  7284. return IPR_RC_JOB_CONTINUE;
  7285. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7286. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7287. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7288. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7289. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7290. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7291. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7292. if (ioa_cfg->sis64)
  7293. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7294. else
  7295. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7296. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7297. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7298. IPR_WRITE_BUFFER_TIMEOUT);
  7299. LEAVE;
  7300. return IPR_RC_JOB_RETURN;
  7301. }
  7302. /**
  7303. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7304. * @ipr_cmd: ipr command struct
  7305. *
  7306. * Description: This function issues an adapter shutdown of the
  7307. * specified type to the specified adapter as part of the
  7308. * adapter reset job.
  7309. *
  7310. * Return value:
  7311. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7312. **/
  7313. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  7314. {
  7315. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7316. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  7317. unsigned long timeout;
  7318. int rc = IPR_RC_JOB_CONTINUE;
  7319. ENTER;
  7320. if (shutdown_type == IPR_SHUTDOWN_QUIESCE)
  7321. ipr_cmd->job_step = ipr_reset_cancel_hcam;
  7322. else if (shutdown_type != IPR_SHUTDOWN_NONE &&
  7323. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7324. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7325. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7326. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7327. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  7328. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  7329. timeout = IPR_SHUTDOWN_TIMEOUT;
  7330. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  7331. timeout = IPR_INTERNAL_TIMEOUT;
  7332. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  7333. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  7334. else
  7335. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  7336. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  7337. rc = IPR_RC_JOB_RETURN;
  7338. ipr_cmd->job_step = ipr_reset_ucode_download;
  7339. } else
  7340. ipr_cmd->job_step = ipr_reset_alert;
  7341. LEAVE;
  7342. return rc;
  7343. }
  7344. /**
  7345. * ipr_reset_ioa_job - Adapter reset job
  7346. * @ipr_cmd: ipr command struct
  7347. *
  7348. * Description: This function is the job router for the adapter reset job.
  7349. *
  7350. * Return value:
  7351. * none
  7352. **/
  7353. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  7354. {
  7355. u32 rc, ioasc;
  7356. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7357. do {
  7358. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  7359. if (ioa_cfg->reset_cmd != ipr_cmd) {
  7360. /*
  7361. * We are doing nested adapter resets and this is
  7362. * not the current reset job.
  7363. */
  7364. list_add_tail(&ipr_cmd->queue,
  7365. &ipr_cmd->hrrq->hrrq_free_q);
  7366. return;
  7367. }
  7368. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  7369. rc = ipr_cmd->job_step_failed(ipr_cmd);
  7370. if (rc == IPR_RC_JOB_RETURN)
  7371. return;
  7372. }
  7373. ipr_reinit_ipr_cmnd(ipr_cmd);
  7374. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  7375. rc = ipr_cmd->job_step(ipr_cmd);
  7376. } while (rc == IPR_RC_JOB_CONTINUE);
  7377. }
  7378. /**
  7379. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  7380. * @ioa_cfg: ioa config struct
  7381. * @job_step: first job step of reset job
  7382. * @shutdown_type: shutdown type
  7383. *
  7384. * Description: This function will initiate the reset of the given adapter
  7385. * starting at the selected job step.
  7386. * If the caller needs to wait on the completion of the reset,
  7387. * the caller must sleep on the reset_wait_q.
  7388. *
  7389. * Return value:
  7390. * none
  7391. **/
  7392. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7393. int (*job_step) (struct ipr_cmnd *),
  7394. enum ipr_shutdown_type shutdown_type)
  7395. {
  7396. struct ipr_cmnd *ipr_cmd;
  7397. int i;
  7398. ioa_cfg->in_reset_reload = 1;
  7399. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7400. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7401. ioa_cfg->hrrq[i].allow_cmds = 0;
  7402. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7403. }
  7404. wmb();
  7405. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  7406. ioa_cfg->scsi_unblock = 0;
  7407. ioa_cfg->scsi_blocked = 1;
  7408. scsi_block_requests(ioa_cfg->host);
  7409. }
  7410. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7411. ioa_cfg->reset_cmd = ipr_cmd;
  7412. ipr_cmd->job_step = job_step;
  7413. ipr_cmd->u.shutdown_type = shutdown_type;
  7414. ipr_reset_ioa_job(ipr_cmd);
  7415. }
  7416. /**
  7417. * ipr_initiate_ioa_reset - Initiate an adapter reset
  7418. * @ioa_cfg: ioa config struct
  7419. * @shutdown_type: shutdown type
  7420. *
  7421. * Description: This function will initiate the reset of the given adapter.
  7422. * If the caller needs to wait on the completion of the reset,
  7423. * the caller must sleep on the reset_wait_q.
  7424. *
  7425. * Return value:
  7426. * none
  7427. **/
  7428. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7429. enum ipr_shutdown_type shutdown_type)
  7430. {
  7431. int i;
  7432. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  7433. return;
  7434. if (ioa_cfg->in_reset_reload) {
  7435. if (ioa_cfg->sdt_state == GET_DUMP)
  7436. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7437. else if (ioa_cfg->sdt_state == READ_DUMP)
  7438. ioa_cfg->sdt_state = ABORT_DUMP;
  7439. }
  7440. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  7441. dev_err(&ioa_cfg->pdev->dev,
  7442. "IOA taken offline - error recovery failed\n");
  7443. ioa_cfg->reset_retries = 0;
  7444. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7445. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7446. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  7447. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7448. }
  7449. wmb();
  7450. if (ioa_cfg->in_ioa_bringdown) {
  7451. ioa_cfg->reset_cmd = NULL;
  7452. ioa_cfg->in_reset_reload = 0;
  7453. ipr_fail_all_ops(ioa_cfg);
  7454. wake_up_all(&ioa_cfg->reset_wait_q);
  7455. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  7456. ioa_cfg->scsi_unblock = 1;
  7457. schedule_work(&ioa_cfg->work_q);
  7458. }
  7459. return;
  7460. } else {
  7461. ioa_cfg->in_ioa_bringdown = 1;
  7462. shutdown_type = IPR_SHUTDOWN_NONE;
  7463. }
  7464. }
  7465. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  7466. shutdown_type);
  7467. }
  7468. /**
  7469. * ipr_reset_freeze - Hold off all I/O activity
  7470. * @ipr_cmd: ipr command struct
  7471. *
  7472. * Description: If the PCI slot is frozen, hold off all I/O
  7473. * activity; then, as soon as the slot is available again,
  7474. * initiate an adapter reset.
  7475. */
  7476. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  7477. {
  7478. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7479. int i;
  7480. /* Disallow new interrupts, avoid loop */
  7481. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7482. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7483. ioa_cfg->hrrq[i].allow_interrupts = 0;
  7484. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7485. }
  7486. wmb();
  7487. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7488. ipr_cmd->done = ipr_reset_ioa_job;
  7489. return IPR_RC_JOB_RETURN;
  7490. }
  7491. /**
  7492. * ipr_pci_mmio_enabled - Called when MMIO has been re-enabled
  7493. * @pdev: PCI device struct
  7494. *
  7495. * Description: This routine is called to tell us that the MMIO
  7496. * access to the IOA has been restored
  7497. */
  7498. static pci_ers_result_t ipr_pci_mmio_enabled(struct pci_dev *pdev)
  7499. {
  7500. unsigned long flags = 0;
  7501. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7502. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7503. if (!ioa_cfg->probe_done)
  7504. pci_save_state(pdev);
  7505. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7506. return PCI_ERS_RESULT_NEED_RESET;
  7507. }
  7508. /**
  7509. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  7510. * @pdev: PCI device struct
  7511. *
  7512. * Description: This routine is called to tell us that the PCI bus
  7513. * is down. Can't do anything here, except put the device driver
  7514. * into a holding pattern, waiting for the PCI bus to come back.
  7515. */
  7516. static void ipr_pci_frozen(struct pci_dev *pdev)
  7517. {
  7518. unsigned long flags = 0;
  7519. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7520. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7521. if (ioa_cfg->probe_done)
  7522. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  7523. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7524. }
  7525. /**
  7526. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  7527. * @pdev: PCI device struct
  7528. *
  7529. * Description: This routine is called by the pci error recovery
  7530. * code after the PCI slot has been reset, just before we
  7531. * should resume normal operations.
  7532. */
  7533. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  7534. {
  7535. unsigned long flags = 0;
  7536. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7537. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7538. if (ioa_cfg->probe_done) {
  7539. if (ioa_cfg->needs_warm_reset)
  7540. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7541. else
  7542. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  7543. IPR_SHUTDOWN_NONE);
  7544. } else
  7545. wake_up_all(&ioa_cfg->eeh_wait_q);
  7546. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7547. return PCI_ERS_RESULT_RECOVERED;
  7548. }
  7549. /**
  7550. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  7551. * @pdev: PCI device struct
  7552. *
  7553. * Description: This routine is called when the PCI bus has
  7554. * permanently failed.
  7555. */
  7556. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  7557. {
  7558. unsigned long flags = 0;
  7559. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7560. int i;
  7561. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7562. if (ioa_cfg->probe_done) {
  7563. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  7564. ioa_cfg->sdt_state = ABORT_DUMP;
  7565. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES - 1;
  7566. ioa_cfg->in_ioa_bringdown = 1;
  7567. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7568. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7569. ioa_cfg->hrrq[i].allow_cmds = 0;
  7570. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7571. }
  7572. wmb();
  7573. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7574. } else
  7575. wake_up_all(&ioa_cfg->eeh_wait_q);
  7576. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7577. }
  7578. /**
  7579. * ipr_pci_error_detected - Called when a PCI error is detected.
  7580. * @pdev: PCI device struct
  7581. * @state: PCI channel state
  7582. *
  7583. * Description: Called when a PCI error is detected.
  7584. *
  7585. * Return value:
  7586. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  7587. */
  7588. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  7589. pci_channel_state_t state)
  7590. {
  7591. switch (state) {
  7592. case pci_channel_io_frozen:
  7593. ipr_pci_frozen(pdev);
  7594. return PCI_ERS_RESULT_CAN_RECOVER;
  7595. case pci_channel_io_perm_failure:
  7596. ipr_pci_perm_failure(pdev);
  7597. return PCI_ERS_RESULT_DISCONNECT;
  7598. default:
  7599. break;
  7600. }
  7601. return PCI_ERS_RESULT_NEED_RESET;
  7602. }
  7603. /**
  7604. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  7605. * @ioa_cfg: ioa cfg struct
  7606. *
  7607. * Description: This is the second phase of adapter initialization
  7608. * This function takes care of initilizing the adapter to the point
  7609. * where it can accept new commands.
  7610. * Return value:
  7611. * none
  7612. **/
  7613. static void ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  7614. {
  7615. unsigned long host_lock_flags = 0;
  7616. ENTER;
  7617. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7618. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  7619. ioa_cfg->probe_done = 1;
  7620. if (ioa_cfg->needs_hard_reset) {
  7621. ioa_cfg->needs_hard_reset = 0;
  7622. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7623. } else
  7624. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  7625. IPR_SHUTDOWN_NONE);
  7626. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7627. LEAVE;
  7628. }
  7629. /**
  7630. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  7631. * @ioa_cfg: ioa config struct
  7632. *
  7633. * Return value:
  7634. * none
  7635. **/
  7636. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7637. {
  7638. int i;
  7639. if (ioa_cfg->ipr_cmnd_list) {
  7640. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7641. if (ioa_cfg->ipr_cmnd_list[i])
  7642. dma_pool_free(ioa_cfg->ipr_cmd_pool,
  7643. ioa_cfg->ipr_cmnd_list[i],
  7644. ioa_cfg->ipr_cmnd_list_dma[i]);
  7645. ioa_cfg->ipr_cmnd_list[i] = NULL;
  7646. }
  7647. }
  7648. dma_pool_destroy(ioa_cfg->ipr_cmd_pool);
  7649. kfree(ioa_cfg->ipr_cmnd_list);
  7650. kfree(ioa_cfg->ipr_cmnd_list_dma);
  7651. ioa_cfg->ipr_cmnd_list = NULL;
  7652. ioa_cfg->ipr_cmnd_list_dma = NULL;
  7653. ioa_cfg->ipr_cmd_pool = NULL;
  7654. }
  7655. /**
  7656. * ipr_free_mem - Frees memory allocated for an adapter
  7657. * @ioa_cfg: ioa cfg struct
  7658. *
  7659. * Return value:
  7660. * nothing
  7661. **/
  7662. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  7663. {
  7664. int i;
  7665. kfree(ioa_cfg->res_entries);
  7666. dma_free_coherent(&ioa_cfg->pdev->dev, sizeof(struct ipr_misc_cbs),
  7667. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7668. ipr_free_cmd_blks(ioa_cfg);
  7669. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  7670. dma_free_coherent(&ioa_cfg->pdev->dev,
  7671. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7672. ioa_cfg->hrrq[i].host_rrq,
  7673. ioa_cfg->hrrq[i].host_rrq_dma);
  7674. dma_free_coherent(&ioa_cfg->pdev->dev, ioa_cfg->cfg_table_size,
  7675. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  7676. for (i = 0; i < IPR_MAX_HCAMS; i++) {
  7677. dma_free_coherent(&ioa_cfg->pdev->dev,
  7678. sizeof(struct ipr_hostrcb),
  7679. ioa_cfg->hostrcb[i],
  7680. ioa_cfg->hostrcb_dma[i]);
  7681. }
  7682. ipr_free_dump(ioa_cfg);
  7683. kfree(ioa_cfg->trace);
  7684. }
  7685. /**
  7686. * ipr_free_irqs - Free all allocated IRQs for the adapter.
  7687. * @ioa_cfg: ipr cfg struct
  7688. *
  7689. * This function frees all allocated IRQs for the
  7690. * specified adapter.
  7691. *
  7692. * Return value:
  7693. * none
  7694. **/
  7695. static void ipr_free_irqs(struct ipr_ioa_cfg *ioa_cfg)
  7696. {
  7697. struct pci_dev *pdev = ioa_cfg->pdev;
  7698. int i;
  7699. for (i = 0; i < ioa_cfg->nvectors; i++)
  7700. free_irq(pci_irq_vector(pdev, i), &ioa_cfg->hrrq[i]);
  7701. pci_free_irq_vectors(pdev);
  7702. }
  7703. /**
  7704. * ipr_free_all_resources - Free all allocated resources for an adapter.
  7705. * @ioa_cfg: ioa config struct
  7706. *
  7707. * This function frees all allocated resources for the
  7708. * specified adapter.
  7709. *
  7710. * Return value:
  7711. * none
  7712. **/
  7713. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  7714. {
  7715. struct pci_dev *pdev = ioa_cfg->pdev;
  7716. ENTER;
  7717. ipr_free_irqs(ioa_cfg);
  7718. if (ioa_cfg->reset_work_q)
  7719. destroy_workqueue(ioa_cfg->reset_work_q);
  7720. iounmap(ioa_cfg->hdw_dma_regs);
  7721. pci_release_regions(pdev);
  7722. ipr_free_mem(ioa_cfg);
  7723. scsi_host_put(ioa_cfg->host);
  7724. pci_disable_device(pdev);
  7725. LEAVE;
  7726. }
  7727. /**
  7728. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  7729. * @ioa_cfg: ioa config struct
  7730. *
  7731. * Return value:
  7732. * 0 on success / -ENOMEM on allocation failure
  7733. **/
  7734. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7735. {
  7736. struct ipr_cmnd *ipr_cmd;
  7737. struct ipr_ioarcb *ioarcb;
  7738. dma_addr_t dma_addr;
  7739. int i, entries_each_hrrq, hrrq_id = 0;
  7740. ioa_cfg->ipr_cmd_pool = dma_pool_create(IPR_NAME, &ioa_cfg->pdev->dev,
  7741. sizeof(struct ipr_cmnd), 512, 0);
  7742. if (!ioa_cfg->ipr_cmd_pool)
  7743. return -ENOMEM;
  7744. ioa_cfg->ipr_cmnd_list = kzalloc_objs(struct ipr_cmnd *,
  7745. IPR_NUM_CMD_BLKS);
  7746. ioa_cfg->ipr_cmnd_list_dma = kzalloc_objs(dma_addr_t, IPR_NUM_CMD_BLKS);
  7747. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  7748. ipr_free_cmd_blks(ioa_cfg);
  7749. return -ENOMEM;
  7750. }
  7751. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7752. if (ioa_cfg->hrrq_num > 1) {
  7753. if (i == 0) {
  7754. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  7755. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7756. ioa_cfg->hrrq[i].max_cmd_id =
  7757. (entries_each_hrrq - 1);
  7758. } else {
  7759. entries_each_hrrq =
  7760. IPR_NUM_BASE_CMD_BLKS/
  7761. (ioa_cfg->hrrq_num - 1);
  7762. ioa_cfg->hrrq[i].min_cmd_id =
  7763. IPR_NUM_INTERNAL_CMD_BLKS +
  7764. (i - 1) * entries_each_hrrq;
  7765. ioa_cfg->hrrq[i].max_cmd_id =
  7766. (IPR_NUM_INTERNAL_CMD_BLKS +
  7767. i * entries_each_hrrq - 1);
  7768. }
  7769. } else {
  7770. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  7771. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7772. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  7773. }
  7774. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  7775. }
  7776. BUG_ON(ioa_cfg->hrrq_num == 0);
  7777. i = IPR_NUM_CMD_BLKS -
  7778. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  7779. if (i > 0) {
  7780. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  7781. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  7782. }
  7783. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7784. ipr_cmd = dma_pool_zalloc(ioa_cfg->ipr_cmd_pool,
  7785. GFP_KERNEL, &dma_addr);
  7786. if (!ipr_cmd) {
  7787. ipr_free_cmd_blks(ioa_cfg);
  7788. return -ENOMEM;
  7789. }
  7790. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  7791. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  7792. ioarcb = &ipr_cmd->ioarcb;
  7793. ipr_cmd->dma_addr = dma_addr;
  7794. if (ioa_cfg->sis64)
  7795. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  7796. else
  7797. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  7798. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  7799. if (ioa_cfg->sis64) {
  7800. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  7801. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  7802. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  7803. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  7804. } else {
  7805. ioarcb->write_ioadl_addr =
  7806. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  7807. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  7808. ioarcb->ioasa_host_pci_addr =
  7809. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  7810. }
  7811. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  7812. ipr_cmd->cmd_index = i;
  7813. ipr_cmd->ioa_cfg = ioa_cfg;
  7814. ipr_cmd->sense_buffer_dma = dma_addr +
  7815. offsetof(struct ipr_cmnd, sense_buffer);
  7816. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  7817. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  7818. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7819. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  7820. hrrq_id++;
  7821. }
  7822. return 0;
  7823. }
  7824. /**
  7825. * ipr_alloc_mem - Allocate memory for an adapter
  7826. * @ioa_cfg: ioa config struct
  7827. *
  7828. * Return value:
  7829. * 0 on success / non-zero for error
  7830. **/
  7831. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  7832. {
  7833. struct pci_dev *pdev = ioa_cfg->pdev;
  7834. int i, rc = -ENOMEM;
  7835. ENTER;
  7836. ioa_cfg->res_entries = kzalloc_objs(struct ipr_resource_entry,
  7837. ioa_cfg->max_devs_supported);
  7838. if (!ioa_cfg->res_entries)
  7839. goto out;
  7840. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  7841. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  7842. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  7843. }
  7844. ioa_cfg->vpd_cbs = dma_alloc_coherent(&pdev->dev,
  7845. sizeof(struct ipr_misc_cbs),
  7846. &ioa_cfg->vpd_cbs_dma,
  7847. GFP_KERNEL);
  7848. if (!ioa_cfg->vpd_cbs)
  7849. goto out_free_res_entries;
  7850. if (ipr_alloc_cmd_blks(ioa_cfg))
  7851. goto out_free_vpd_cbs;
  7852. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7853. ioa_cfg->hrrq[i].host_rrq = dma_alloc_coherent(&pdev->dev,
  7854. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7855. &ioa_cfg->hrrq[i].host_rrq_dma,
  7856. GFP_KERNEL);
  7857. if (!ioa_cfg->hrrq[i].host_rrq) {
  7858. while (--i >= 0)
  7859. dma_free_coherent(&pdev->dev,
  7860. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7861. ioa_cfg->hrrq[i].host_rrq,
  7862. ioa_cfg->hrrq[i].host_rrq_dma);
  7863. goto out_ipr_free_cmd_blocks;
  7864. }
  7865. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  7866. }
  7867. ioa_cfg->u.cfg_table = dma_alloc_coherent(&pdev->dev,
  7868. ioa_cfg->cfg_table_size,
  7869. &ioa_cfg->cfg_table_dma,
  7870. GFP_KERNEL);
  7871. if (!ioa_cfg->u.cfg_table)
  7872. goto out_free_host_rrq;
  7873. for (i = 0; i < IPR_MAX_HCAMS; i++) {
  7874. ioa_cfg->hostrcb[i] = dma_alloc_coherent(&pdev->dev,
  7875. sizeof(struct ipr_hostrcb),
  7876. &ioa_cfg->hostrcb_dma[i],
  7877. GFP_KERNEL);
  7878. if (!ioa_cfg->hostrcb[i])
  7879. goto out_free_hostrcb_dma;
  7880. ioa_cfg->hostrcb[i]->hostrcb_dma =
  7881. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  7882. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  7883. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  7884. }
  7885. ioa_cfg->trace = kzalloc_objs(struct ipr_trace_entry,
  7886. IPR_NUM_TRACE_ENTRIES);
  7887. if (!ioa_cfg->trace)
  7888. goto out_free_hostrcb_dma;
  7889. rc = 0;
  7890. out:
  7891. LEAVE;
  7892. return rc;
  7893. out_free_hostrcb_dma:
  7894. while (i-- > 0) {
  7895. dma_free_coherent(&pdev->dev, sizeof(struct ipr_hostrcb),
  7896. ioa_cfg->hostrcb[i],
  7897. ioa_cfg->hostrcb_dma[i]);
  7898. }
  7899. dma_free_coherent(&pdev->dev, ioa_cfg->cfg_table_size,
  7900. ioa_cfg->u.cfg_table, ioa_cfg->cfg_table_dma);
  7901. out_free_host_rrq:
  7902. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7903. dma_free_coherent(&pdev->dev,
  7904. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7905. ioa_cfg->hrrq[i].host_rrq,
  7906. ioa_cfg->hrrq[i].host_rrq_dma);
  7907. }
  7908. out_ipr_free_cmd_blocks:
  7909. ipr_free_cmd_blks(ioa_cfg);
  7910. out_free_vpd_cbs:
  7911. dma_free_coherent(&pdev->dev, sizeof(struct ipr_misc_cbs),
  7912. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7913. out_free_res_entries:
  7914. kfree(ioa_cfg->res_entries);
  7915. goto out;
  7916. }
  7917. /**
  7918. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  7919. * @ioa_cfg: ioa config struct
  7920. *
  7921. * Return value:
  7922. * none
  7923. **/
  7924. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  7925. {
  7926. int i;
  7927. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  7928. ioa_cfg->bus_attr[i].bus = i;
  7929. ioa_cfg->bus_attr[i].qas_enabled = 0;
  7930. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  7931. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  7932. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  7933. else
  7934. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  7935. }
  7936. }
  7937. /**
  7938. * ipr_init_regs - Initialize IOA registers
  7939. * @ioa_cfg: ioa config struct
  7940. *
  7941. * Return value:
  7942. * none
  7943. **/
  7944. static void ipr_init_regs(struct ipr_ioa_cfg *ioa_cfg)
  7945. {
  7946. const struct ipr_interrupt_offsets *p;
  7947. struct ipr_interrupts *t;
  7948. void __iomem *base;
  7949. p = &ioa_cfg->chip_cfg->regs;
  7950. t = &ioa_cfg->regs;
  7951. base = ioa_cfg->hdw_dma_regs;
  7952. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  7953. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  7954. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  7955. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  7956. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  7957. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  7958. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  7959. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  7960. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  7961. t->ioarrin_reg = base + p->ioarrin_reg;
  7962. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  7963. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  7964. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  7965. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  7966. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  7967. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  7968. if (ioa_cfg->sis64) {
  7969. t->init_feedback_reg = base + p->init_feedback_reg;
  7970. t->dump_addr_reg = base + p->dump_addr_reg;
  7971. t->dump_data_reg = base + p->dump_data_reg;
  7972. t->endian_swap_reg = base + p->endian_swap_reg;
  7973. }
  7974. }
  7975. /**
  7976. * ipr_init_ioa_cfg - Initialize IOA config struct
  7977. * @ioa_cfg: ioa config struct
  7978. * @host: scsi host struct
  7979. * @pdev: PCI dev struct
  7980. *
  7981. * Return value:
  7982. * none
  7983. **/
  7984. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  7985. struct Scsi_Host *host, struct pci_dev *pdev)
  7986. {
  7987. int i;
  7988. ioa_cfg->host = host;
  7989. ioa_cfg->pdev = pdev;
  7990. ioa_cfg->log_level = ipr_log_level;
  7991. ioa_cfg->doorbell = IPR_DOORBELL;
  7992. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  7993. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  7994. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  7995. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  7996. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  7997. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  7998. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  7999. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  8000. INIT_LIST_HEAD(&ioa_cfg->hostrcb_report_q);
  8001. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  8002. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8003. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  8004. INIT_WORK(&ioa_cfg->scsi_add_work_q, ipr_add_remove_thread);
  8005. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  8006. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8007. init_waitqueue_head(&ioa_cfg->eeh_wait_q);
  8008. ioa_cfg->sdt_state = INACTIVE;
  8009. ipr_initialize_bus_attr(ioa_cfg);
  8010. ioa_cfg->max_devs_supported = ipr_max_devs;
  8011. if (ioa_cfg->sis64) {
  8012. host->max_channel = IPR_MAX_SIS64_BUSES;
  8013. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  8014. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  8015. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  8016. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  8017. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8018. + ((sizeof(struct ipr_config_table_entry64)
  8019. * ioa_cfg->max_devs_supported)));
  8020. } else {
  8021. host->max_channel = IPR_VSET_BUS;
  8022. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  8023. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  8024. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  8025. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  8026. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8027. + ((sizeof(struct ipr_config_table_entry)
  8028. * ioa_cfg->max_devs_supported)));
  8029. }
  8030. host->unique_id = host->host_no;
  8031. host->max_cmd_len = IPR_MAX_CDB_LEN;
  8032. host->can_queue = ioa_cfg->max_cmds;
  8033. pci_set_drvdata(pdev, ioa_cfg);
  8034. for (i = 0; i < ARRAY_SIZE(ioa_cfg->hrrq); i++) {
  8035. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  8036. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  8037. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  8038. if (i == 0)
  8039. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  8040. else
  8041. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  8042. }
  8043. }
  8044. /**
  8045. * ipr_get_chip_info - Find adapter chip information
  8046. * @dev_id: PCI device id struct
  8047. *
  8048. * Return value:
  8049. * ptr to chip information on success / NULL on failure
  8050. **/
  8051. static const struct ipr_chip_t *
  8052. ipr_get_chip_info(const struct pci_device_id *dev_id)
  8053. {
  8054. int i;
  8055. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  8056. if (ipr_chip[i].vendor == dev_id->vendor &&
  8057. ipr_chip[i].device == dev_id->device)
  8058. return &ipr_chip[i];
  8059. return NULL;
  8060. }
  8061. /**
  8062. * ipr_wait_for_pci_err_recovery - Wait for any PCI error recovery to complete
  8063. * during probe time
  8064. * @ioa_cfg: ioa config struct
  8065. *
  8066. * Return value:
  8067. * None
  8068. **/
  8069. static void ipr_wait_for_pci_err_recovery(struct ipr_ioa_cfg *ioa_cfg)
  8070. {
  8071. struct pci_dev *pdev = ioa_cfg->pdev;
  8072. if (pci_channel_offline(pdev)) {
  8073. wait_event_timeout(ioa_cfg->eeh_wait_q,
  8074. !pci_channel_offline(pdev),
  8075. IPR_PCI_ERROR_RECOVERY_TIMEOUT);
  8076. pci_restore_state(pdev);
  8077. }
  8078. }
  8079. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8080. {
  8081. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8082. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8083. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8084. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8085. ioa_cfg->vectors_info[vec_idx].
  8086. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8087. }
  8088. }
  8089. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg,
  8090. struct pci_dev *pdev)
  8091. {
  8092. int i, rc;
  8093. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8094. rc = request_irq(pci_irq_vector(pdev, i),
  8095. ipr_isr_mhrrq,
  8096. 0,
  8097. ioa_cfg->vectors_info[i].desc,
  8098. &ioa_cfg->hrrq[i]);
  8099. if (rc) {
  8100. while (--i > 0)
  8101. free_irq(pci_irq_vector(pdev, i),
  8102. &ioa_cfg->hrrq[i]);
  8103. return rc;
  8104. }
  8105. }
  8106. return 0;
  8107. }
  8108. /**
  8109. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8110. * @devp: PCI device struct
  8111. * @irq: IRQ number
  8112. *
  8113. * Description: Simply set the msi_received flag to 1 indicating that
  8114. * Message Signaled Interrupts are supported.
  8115. *
  8116. * Return value:
  8117. * 0 on success / non-zero on failure
  8118. **/
  8119. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8120. {
  8121. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8122. unsigned long lock_flags = 0;
  8123. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8124. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8125. ioa_cfg->msi_received = 1;
  8126. wake_up(&ioa_cfg->msi_wait_q);
  8127. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8128. return IRQ_HANDLED;
  8129. }
  8130. /**
  8131. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8132. * @ioa_cfg: ioa config struct
  8133. * @pdev: PCI device struct
  8134. *
  8135. * Description: This routine sets up and initiates a test interrupt to determine
  8136. * if the interrupt is received via the ipr_test_intr() service routine.
  8137. * If the tests fails, the driver will fall back to LSI.
  8138. *
  8139. * Return value:
  8140. * 0 on success / non-zero on failure
  8141. **/
  8142. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8143. {
  8144. int rc;
  8145. unsigned long lock_flags = 0;
  8146. int irq = pci_irq_vector(pdev, 0);
  8147. ENTER;
  8148. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8149. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8150. ioa_cfg->msi_received = 0;
  8151. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8152. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8153. readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8154. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8155. rc = request_irq(irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8156. if (rc) {
  8157. dev_err(&pdev->dev, "Can not assign irq %d\n", irq);
  8158. return rc;
  8159. } else if (ipr_debug)
  8160. dev_info(&pdev->dev, "IRQ assigned: %d\n", irq);
  8161. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8162. readl(ioa_cfg->regs.sense_interrupt_reg);
  8163. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8164. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8165. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8166. if (!ioa_cfg->msi_received) {
  8167. /* MSI test failed */
  8168. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8169. rc = -EOPNOTSUPP;
  8170. } else if (ipr_debug)
  8171. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8172. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8173. free_irq(irq, ioa_cfg);
  8174. LEAVE;
  8175. return rc;
  8176. }
  8177. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8178. * @pdev: PCI device struct
  8179. * @dev_id: PCI device id struct
  8180. *
  8181. * Return value:
  8182. * 0 on success / non-zero on failure
  8183. **/
  8184. static int ipr_probe_ioa(struct pci_dev *pdev,
  8185. const struct pci_device_id *dev_id)
  8186. {
  8187. struct ipr_ioa_cfg *ioa_cfg;
  8188. struct Scsi_Host *host;
  8189. unsigned long ipr_regs_pci;
  8190. void __iomem *ipr_regs;
  8191. int rc = PCIBIOS_SUCCESSFUL;
  8192. volatile u32 mask, uproc, interrupts;
  8193. unsigned long lock_flags, driver_lock_flags;
  8194. unsigned int irq_flag;
  8195. ENTER;
  8196. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8197. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8198. if (!host) {
  8199. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8200. rc = -ENOMEM;
  8201. goto out;
  8202. }
  8203. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8204. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8205. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8206. if (!ioa_cfg->ipr_chip) {
  8207. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8208. dev_id->vendor, dev_id->device);
  8209. goto out_scsi_host_put;
  8210. }
  8211. /* set SIS 32 or SIS 64 */
  8212. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8213. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8214. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8215. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8216. if (ipr_transop_timeout)
  8217. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8218. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8219. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8220. else
  8221. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8222. ioa_cfg->revid = pdev->revision;
  8223. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8224. ipr_regs_pci = pci_resource_start(pdev, 0);
  8225. rc = pci_request_regions(pdev, IPR_NAME);
  8226. if (rc < 0) {
  8227. dev_err(&pdev->dev,
  8228. "Couldn't register memory range of registers\n");
  8229. goto out_scsi_host_put;
  8230. }
  8231. rc = pci_enable_device(pdev);
  8232. if (rc || pci_channel_offline(pdev)) {
  8233. if (pci_channel_offline(pdev)) {
  8234. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8235. rc = pci_enable_device(pdev);
  8236. }
  8237. if (rc) {
  8238. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8239. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8240. goto out_release_regions;
  8241. }
  8242. }
  8243. ipr_regs = pci_ioremap_bar(pdev, 0);
  8244. if (!ipr_regs) {
  8245. dev_err(&pdev->dev,
  8246. "Couldn't map memory range of registers\n");
  8247. rc = -ENOMEM;
  8248. goto out_disable;
  8249. }
  8250. ioa_cfg->hdw_dma_regs = ipr_regs;
  8251. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8252. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8253. ipr_init_regs(ioa_cfg);
  8254. if (ioa_cfg->sis64) {
  8255. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  8256. if (rc < 0) {
  8257. dev_dbg(&pdev->dev, "Failed to set 64 bit DMA mask\n");
  8258. rc = dma_set_mask_and_coherent(&pdev->dev,
  8259. DMA_BIT_MASK(32));
  8260. }
  8261. } else
  8262. rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  8263. if (rc < 0) {
  8264. dev_err(&pdev->dev, "Failed to set DMA mask\n");
  8265. goto cleanup_nomem;
  8266. }
  8267. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8268. ioa_cfg->chip_cfg->cache_line_size);
  8269. if (rc != PCIBIOS_SUCCESSFUL) {
  8270. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8271. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8272. rc = -EIO;
  8273. goto cleanup_nomem;
  8274. }
  8275. /* Issue MMIO read to ensure card is not in EEH */
  8276. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg);
  8277. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8278. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8279. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8280. IPR_MAX_MSIX_VECTORS);
  8281. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8282. }
  8283. irq_flag = PCI_IRQ_INTX;
  8284. if (ioa_cfg->ipr_chip->has_msi)
  8285. irq_flag |= PCI_IRQ_MSI | PCI_IRQ_MSIX;
  8286. rc = pci_alloc_irq_vectors(pdev, 1, ipr_number_of_msix, irq_flag);
  8287. if (rc < 0) {
  8288. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8289. goto cleanup_nomem;
  8290. }
  8291. ioa_cfg->nvectors = rc;
  8292. if (!pdev->msi_enabled && !pdev->msix_enabled)
  8293. ioa_cfg->clear_isr = 1;
  8294. pci_set_master(pdev);
  8295. if (pci_channel_offline(pdev)) {
  8296. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8297. pci_set_master(pdev);
  8298. if (pci_channel_offline(pdev)) {
  8299. rc = -EIO;
  8300. goto out_msi_disable;
  8301. }
  8302. }
  8303. if (pdev->msi_enabled || pdev->msix_enabled) {
  8304. rc = ipr_test_msi(ioa_cfg, pdev);
  8305. switch (rc) {
  8306. case 0:
  8307. dev_info(&pdev->dev,
  8308. "Request for %d MSI%ss succeeded.", ioa_cfg->nvectors,
  8309. pdev->msix_enabled ? "-X" : "");
  8310. break;
  8311. case -EOPNOTSUPP:
  8312. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8313. pci_free_irq_vectors(pdev);
  8314. ioa_cfg->nvectors = 1;
  8315. ioa_cfg->clear_isr = 1;
  8316. break;
  8317. default:
  8318. goto out_msi_disable;
  8319. }
  8320. }
  8321. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  8322. (unsigned int)num_online_cpus(),
  8323. (unsigned int)IPR_MAX_HRRQ_NUM);
  8324. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  8325. goto out_msi_disable;
  8326. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  8327. goto out_msi_disable;
  8328. rc = ipr_alloc_mem(ioa_cfg);
  8329. if (rc < 0) {
  8330. dev_err(&pdev->dev,
  8331. "Couldn't allocate enough memory for device driver!\n");
  8332. goto out_msi_disable;
  8333. }
  8334. /* Save away PCI config space for use following IOA reset */
  8335. rc = pci_save_state(pdev);
  8336. if (rc != PCIBIOS_SUCCESSFUL) {
  8337. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  8338. rc = -EIO;
  8339. goto cleanup_nolog;
  8340. }
  8341. /*
  8342. * If HRRQ updated interrupt is not masked, or reset alert is set,
  8343. * the card is in an unknown state and needs a hard reset
  8344. */
  8345. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  8346. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  8347. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  8348. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  8349. ioa_cfg->needs_hard_reset = 1;
  8350. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  8351. ioa_cfg->needs_hard_reset = 1;
  8352. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  8353. ioa_cfg->ioa_unit_checked = 1;
  8354. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8355. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8356. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8357. if (pdev->msi_enabled || pdev->msix_enabled) {
  8358. name_msi_vectors(ioa_cfg);
  8359. rc = request_irq(pci_irq_vector(pdev, 0), ipr_isr, 0,
  8360. ioa_cfg->vectors_info[0].desc,
  8361. &ioa_cfg->hrrq[0]);
  8362. if (!rc)
  8363. rc = ipr_request_other_msi_irqs(ioa_cfg, pdev);
  8364. } else {
  8365. rc = request_irq(pdev->irq, ipr_isr,
  8366. IRQF_SHARED,
  8367. IPR_NAME, &ioa_cfg->hrrq[0]);
  8368. }
  8369. if (rc) {
  8370. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  8371. pdev->irq, rc);
  8372. goto cleanup_nolog;
  8373. }
  8374. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  8375. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  8376. ioa_cfg->needs_warm_reset = 1;
  8377. ioa_cfg->reset = ipr_reset_slot_reset;
  8378. ioa_cfg->reset_work_q = alloc_ordered_workqueue("ipr_reset_%d",
  8379. WQ_MEM_RECLAIM, host->host_no);
  8380. if (!ioa_cfg->reset_work_q) {
  8381. dev_err(&pdev->dev, "Couldn't register reset workqueue\n");
  8382. rc = -ENOMEM;
  8383. goto out_free_irq;
  8384. }
  8385. } else
  8386. ioa_cfg->reset = ipr_reset_start_bist;
  8387. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8388. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  8389. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8390. LEAVE;
  8391. out:
  8392. return rc;
  8393. out_free_irq:
  8394. ipr_free_irqs(ioa_cfg);
  8395. cleanup_nolog:
  8396. ipr_free_mem(ioa_cfg);
  8397. out_msi_disable:
  8398. ipr_wait_for_pci_err_recovery(ioa_cfg);
  8399. pci_free_irq_vectors(pdev);
  8400. cleanup_nomem:
  8401. iounmap(ipr_regs);
  8402. out_disable:
  8403. pci_disable_device(pdev);
  8404. out_release_regions:
  8405. pci_release_regions(pdev);
  8406. out_scsi_host_put:
  8407. scsi_host_put(host);
  8408. goto out;
  8409. }
  8410. /**
  8411. * ipr_initiate_ioa_bringdown - Bring down an adapter
  8412. * @ioa_cfg: ioa config struct
  8413. * @shutdown_type: shutdown type
  8414. *
  8415. * Description: This function will initiate bringing down the adapter.
  8416. * This consists of issuing an IOA shutdown to the adapter
  8417. * to flush the cache, and running BIST.
  8418. * If the caller needs to wait on the completion of the reset,
  8419. * the caller must sleep on the reset_wait_q.
  8420. *
  8421. * Return value:
  8422. * none
  8423. **/
  8424. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  8425. enum ipr_shutdown_type shutdown_type)
  8426. {
  8427. ENTER;
  8428. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8429. ioa_cfg->sdt_state = ABORT_DUMP;
  8430. ioa_cfg->reset_retries = 0;
  8431. ioa_cfg->in_ioa_bringdown = 1;
  8432. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  8433. LEAVE;
  8434. }
  8435. /**
  8436. * __ipr_remove - Remove a single adapter
  8437. * @pdev: pci device struct
  8438. *
  8439. * Adapter hot plug remove entry point.
  8440. *
  8441. * Return value:
  8442. * none
  8443. **/
  8444. static void __ipr_remove(struct pci_dev *pdev)
  8445. {
  8446. unsigned long host_lock_flags = 0;
  8447. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8448. int i;
  8449. unsigned long driver_lock_flags;
  8450. ENTER;
  8451. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8452. while (ioa_cfg->in_reset_reload) {
  8453. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8454. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8455. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8456. }
  8457. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8458. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8459. ioa_cfg->hrrq[i].removing_ioa = 1;
  8460. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8461. }
  8462. wmb();
  8463. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8464. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8465. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8466. flush_work(&ioa_cfg->work_q);
  8467. if (ioa_cfg->reset_work_q)
  8468. flush_workqueue(ioa_cfg->reset_work_q);
  8469. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8470. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8471. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8472. list_del(&ioa_cfg->queue);
  8473. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8474. if (ioa_cfg->sdt_state == ABORT_DUMP)
  8475. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  8476. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8477. ipr_free_all_resources(ioa_cfg);
  8478. LEAVE;
  8479. }
  8480. /**
  8481. * ipr_remove - IOA hot plug remove entry point
  8482. * @pdev: pci device struct
  8483. *
  8484. * Adapter hot plug remove entry point.
  8485. *
  8486. * Return value:
  8487. * none
  8488. **/
  8489. static void ipr_remove(struct pci_dev *pdev)
  8490. {
  8491. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8492. ENTER;
  8493. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8494. &ipr_trace_attr);
  8495. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8496. &ipr_dump_attr);
  8497. sysfs_remove_bin_file(&ioa_cfg->host->shost_dev.kobj,
  8498. &ipr_ioa_async_err_log);
  8499. scsi_remove_host(ioa_cfg->host);
  8500. __ipr_remove(pdev);
  8501. LEAVE;
  8502. }
  8503. /**
  8504. * ipr_probe - Adapter hot plug add entry point
  8505. * @pdev: pci device struct
  8506. * @dev_id: pci device ID
  8507. *
  8508. * Return value:
  8509. * 0 on success / non-zero on failure
  8510. **/
  8511. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  8512. {
  8513. struct ipr_ioa_cfg *ioa_cfg;
  8514. unsigned long flags;
  8515. int rc, i;
  8516. rc = ipr_probe_ioa(pdev, dev_id);
  8517. if (rc)
  8518. return rc;
  8519. ioa_cfg = pci_get_drvdata(pdev);
  8520. ipr_probe_ioa_part2(ioa_cfg);
  8521. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  8522. if (rc) {
  8523. __ipr_remove(pdev);
  8524. return rc;
  8525. }
  8526. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8527. &ipr_trace_attr);
  8528. if (rc) {
  8529. scsi_remove_host(ioa_cfg->host);
  8530. __ipr_remove(pdev);
  8531. return rc;
  8532. }
  8533. rc = sysfs_create_bin_file(&ioa_cfg->host->shost_dev.kobj,
  8534. &ipr_ioa_async_err_log);
  8535. if (rc) {
  8536. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8537. &ipr_dump_attr);
  8538. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8539. &ipr_trace_attr);
  8540. scsi_remove_host(ioa_cfg->host);
  8541. __ipr_remove(pdev);
  8542. return rc;
  8543. }
  8544. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8545. &ipr_dump_attr);
  8546. if (rc) {
  8547. sysfs_remove_bin_file(&ioa_cfg->host->shost_dev.kobj,
  8548. &ipr_ioa_async_err_log);
  8549. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8550. &ipr_trace_attr);
  8551. scsi_remove_host(ioa_cfg->host);
  8552. __ipr_remove(pdev);
  8553. return rc;
  8554. }
  8555. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8556. ioa_cfg->scan_enabled = 1;
  8557. schedule_work(&ioa_cfg->work_q);
  8558. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8559. ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight;
  8560. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  8561. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  8562. irq_poll_init(&ioa_cfg->hrrq[i].iopoll,
  8563. ioa_cfg->iopoll_weight, ipr_iopoll);
  8564. }
  8565. }
  8566. scsi_scan_host(ioa_cfg->host);
  8567. return 0;
  8568. }
  8569. /**
  8570. * ipr_shutdown - Shutdown handler.
  8571. * @pdev: pci device struct
  8572. *
  8573. * This function is invoked upon system shutdown/reboot. It will issue
  8574. * an adapter shutdown to the adapter to flush the write cache.
  8575. *
  8576. * Return value:
  8577. * none
  8578. **/
  8579. static void ipr_shutdown(struct pci_dev *pdev)
  8580. {
  8581. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8582. unsigned long lock_flags = 0;
  8583. enum ipr_shutdown_type shutdown_type = IPR_SHUTDOWN_NORMAL;
  8584. int i;
  8585. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8586. if (ioa_cfg->iopoll_weight && ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  8587. ioa_cfg->iopoll_weight = 0;
  8588. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  8589. irq_poll_disable(&ioa_cfg->hrrq[i].iopoll);
  8590. }
  8591. while (ioa_cfg->in_reset_reload) {
  8592. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8593. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8594. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8595. }
  8596. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64)
  8597. shutdown_type = IPR_SHUTDOWN_QUIESCE;
  8598. ipr_initiate_ioa_bringdown(ioa_cfg, shutdown_type);
  8599. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8600. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8601. if (ipr_fast_reboot && system_state == SYSTEM_RESTART && ioa_cfg->sis64) {
  8602. ipr_free_irqs(ioa_cfg);
  8603. pci_disable_device(ioa_cfg->pdev);
  8604. }
  8605. }
  8606. static const struct pci_device_id ipr_pci_table[] = {
  8607. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8608. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  8609. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8610. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  8611. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8612. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  8613. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8614. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  8615. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8616. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  8617. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8618. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  8619. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8620. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  8621. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8622. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  8623. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8624. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8625. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8626. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8627. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8628. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8629. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8630. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8631. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8632. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8633. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8634. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8635. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8636. IPR_USE_LONG_TRANSOP_TIMEOUT},
  8637. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8638. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8639. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8640. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8641. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  8642. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8643. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8644. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  8645. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8646. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  8647. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8648. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  8649. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  8650. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  8651. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  8652. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8653. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  8654. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8655. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  8656. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8657. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8658. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  8659. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8660. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8661. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  8662. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8663. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  8664. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8665. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  8666. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8667. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  8668. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8669. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  8670. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8671. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  8672. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8673. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  8674. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8675. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  8676. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8677. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  8678. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8679. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  8680. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8681. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  8682. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8683. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  8684. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8685. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  8686. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8687. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  8688. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8689. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  8690. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8691. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D9, 0, 0, 0 },
  8692. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8693. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57DA, 0, 0, 0 },
  8694. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8695. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EB, 0, 0, 0 },
  8696. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8697. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EC, 0, 0, 0 },
  8698. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8699. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57ED, 0, 0, 0 },
  8700. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8701. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EE, 0, 0, 0 },
  8702. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8703. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EF, 0, 0, 0 },
  8704. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8705. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57F0, 0, 0, 0 },
  8706. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8707. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCA, 0, 0, 0 },
  8708. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8709. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 },
  8710. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8711. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 },
  8712. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
  8713. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580A, 0, 0, 0 },
  8714. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
  8715. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580B, 0, 0, 0 },
  8716. { }
  8717. };
  8718. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  8719. static const struct pci_error_handlers ipr_err_handler = {
  8720. .error_detected = ipr_pci_error_detected,
  8721. .mmio_enabled = ipr_pci_mmio_enabled,
  8722. .slot_reset = ipr_pci_slot_reset,
  8723. };
  8724. static struct pci_driver ipr_driver = {
  8725. .name = IPR_NAME,
  8726. .id_table = ipr_pci_table,
  8727. .probe = ipr_probe,
  8728. .remove = ipr_remove,
  8729. .shutdown = ipr_shutdown,
  8730. .err_handler = &ipr_err_handler,
  8731. };
  8732. /**
  8733. * ipr_halt_done - Shutdown prepare completion
  8734. * @ipr_cmd: ipr command struct
  8735. *
  8736. * Return value:
  8737. * none
  8738. **/
  8739. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  8740. {
  8741. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8742. }
  8743. /**
  8744. * ipr_halt - Issue shutdown prepare to all adapters
  8745. * @nb: Notifier block
  8746. * @event: Notifier event
  8747. * @buf: Notifier data (unused)
  8748. *
  8749. * Return value:
  8750. * NOTIFY_OK on success / NOTIFY_DONE on failure
  8751. **/
  8752. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  8753. {
  8754. struct ipr_cmnd *ipr_cmd;
  8755. struct ipr_ioa_cfg *ioa_cfg;
  8756. unsigned long flags = 0, driver_lock_flags;
  8757. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  8758. return NOTIFY_DONE;
  8759. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8760. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  8761. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8762. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  8763. (ipr_fast_reboot && event == SYS_RESTART && ioa_cfg->sis64)) {
  8764. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8765. continue;
  8766. }
  8767. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  8768. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  8769. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  8770. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  8771. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  8772. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  8773. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8774. }
  8775. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8776. return NOTIFY_OK;
  8777. }
  8778. static struct notifier_block ipr_notifier = {
  8779. ipr_halt, NULL, 0
  8780. };
  8781. /**
  8782. * ipr_init - Module entry point
  8783. *
  8784. * Return value:
  8785. * 0 on success / negative value on failure
  8786. **/
  8787. static int __init ipr_init(void)
  8788. {
  8789. int rc;
  8790. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  8791. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  8792. register_reboot_notifier(&ipr_notifier);
  8793. rc = pci_register_driver(&ipr_driver);
  8794. if (rc) {
  8795. unregister_reboot_notifier(&ipr_notifier);
  8796. return rc;
  8797. }
  8798. return 0;
  8799. }
  8800. /**
  8801. * ipr_exit - Module unload
  8802. *
  8803. * Module unload entry point.
  8804. *
  8805. * Return value:
  8806. * none
  8807. **/
  8808. static void __exit ipr_exit(void)
  8809. {
  8810. unregister_reboot_notifier(&ipr_notifier);
  8811. pci_unregister_driver(&ipr_driver);
  8812. }
  8813. module_init(ipr_init);
  8814. module_exit(ipr_exit);