vnic_dev.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  4. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/errno.h>
  8. #include <linux/types.h>
  9. #include <linux/pci.h>
  10. #include <linux/delay.h>
  11. #include <linux/if_ether.h>
  12. #include <linux/slab.h>
  13. #include "vnic_resource.h"
  14. #include "vnic_devcmd.h"
  15. #include "vnic_dev.h"
  16. #include "vnic_stats.h"
  17. #include "vnic_wq.h"
  18. struct devcmd2_controller {
  19. struct vnic_wq_ctrl *wq_ctrl;
  20. struct vnic_dev_ring results_ring;
  21. struct vnic_wq wq;
  22. struct vnic_devcmd2 *cmd_ring;
  23. struct devcmd2_result *result;
  24. u16 next_result;
  25. u16 result_size;
  26. int color;
  27. };
  28. enum vnic_proxy_type {
  29. PROXY_NONE,
  30. PROXY_BY_BDF,
  31. PROXY_BY_INDEX,
  32. };
  33. struct vnic_res {
  34. void __iomem *vaddr;
  35. unsigned int count;
  36. };
  37. struct vnic_dev {
  38. void *priv;
  39. struct pci_dev *pdev;
  40. struct vnic_res res[RES_TYPE_MAX];
  41. enum vnic_dev_intr_mode intr_mode;
  42. struct vnic_devcmd __iomem *devcmd;
  43. struct vnic_devcmd_notify *notify;
  44. struct vnic_devcmd_notify notify_copy;
  45. dma_addr_t notify_pa;
  46. u32 *linkstatus;
  47. dma_addr_t linkstatus_pa;
  48. struct vnic_stats *stats;
  49. dma_addr_t stats_pa;
  50. struct vnic_devcmd_fw_info *fw_info;
  51. dma_addr_t fw_info_pa;
  52. enum vnic_proxy_type proxy;
  53. u32 proxy_index;
  54. u64 args[VNIC_DEVCMD_NARGS];
  55. struct devcmd2_controller *devcmd2;
  56. int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  57. int wait);
  58. };
  59. #define VNIC_MAX_RES_HDR_SIZE \
  60. (sizeof(struct vnic_resource_header) + \
  61. sizeof(struct vnic_resource) * RES_TYPE_MAX)
  62. #define VNIC_RES_STRIDE 128
  63. void *vnic_dev_priv(struct vnic_dev *vdev)
  64. {
  65. return vdev->priv;
  66. }
  67. static int vnic_dev_discover_res(struct vnic_dev *vdev,
  68. struct vnic_dev_bar *bar)
  69. {
  70. struct vnic_resource_header __iomem *rh;
  71. struct vnic_resource __iomem *r;
  72. u8 type;
  73. if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
  74. printk(KERN_ERR "vNIC BAR0 res hdr length error\n");
  75. return -EINVAL;
  76. }
  77. rh = bar->vaddr;
  78. if (!rh) {
  79. printk(KERN_ERR "vNIC BAR0 res hdr not mem-mapped\n");
  80. return -EINVAL;
  81. }
  82. if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
  83. ioread32(&rh->version) != VNIC_RES_VERSION) {
  84. printk(KERN_ERR "vNIC BAR0 res magic/version error "
  85. "exp (%lx/%lx) curr (%x/%x)\n",
  86. VNIC_RES_MAGIC, VNIC_RES_VERSION,
  87. ioread32(&rh->magic), ioread32(&rh->version));
  88. return -EINVAL;
  89. }
  90. r = (struct vnic_resource __iomem *)(rh + 1);
  91. while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
  92. u8 bar_num = ioread8(&r->bar);
  93. u32 bar_offset = ioread32(&r->bar_offset);
  94. u32 count = ioread32(&r->count);
  95. u32 len;
  96. r++;
  97. if (bar_num != 0) /* only mapping in BAR0 resources */
  98. continue;
  99. switch (type) {
  100. case RES_TYPE_WQ:
  101. case RES_TYPE_RQ:
  102. case RES_TYPE_CQ:
  103. case RES_TYPE_INTR_CTRL:
  104. /* each count is stride bytes long */
  105. len = count * VNIC_RES_STRIDE;
  106. if (len + bar_offset > bar->len) {
  107. printk(KERN_ERR "vNIC BAR0 resource %d "
  108. "out-of-bounds, offset 0x%x + "
  109. "size 0x%x > bar len 0x%lx\n",
  110. type, bar_offset,
  111. len,
  112. bar->len);
  113. return -EINVAL;
  114. }
  115. break;
  116. case RES_TYPE_INTR_PBA_LEGACY:
  117. case RES_TYPE_DEVCMD2:
  118. case RES_TYPE_DEVCMD:
  119. len = count;
  120. break;
  121. default:
  122. continue;
  123. }
  124. vdev->res[type].count = count;
  125. vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
  126. }
  127. pr_info("res_type_wq: %d res_type_rq: %d res_type_cq: %d res_type_intr_ctrl: %d\n",
  128. vdev->res[RES_TYPE_WQ].count, vdev->res[RES_TYPE_RQ].count,
  129. vdev->res[RES_TYPE_CQ].count, vdev->res[RES_TYPE_INTR_CTRL].count);
  130. return 0;
  131. }
  132. unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
  133. enum vnic_res_type type)
  134. {
  135. return vdev->res[type].count;
  136. }
  137. void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
  138. unsigned int index)
  139. {
  140. if (!vdev->res[type].vaddr)
  141. return NULL;
  142. switch (type) {
  143. case RES_TYPE_WQ:
  144. case RES_TYPE_RQ:
  145. case RES_TYPE_CQ:
  146. case RES_TYPE_INTR_CTRL:
  147. return (char __iomem *)vdev->res[type].vaddr +
  148. index * VNIC_RES_STRIDE;
  149. default:
  150. return (char __iomem *)vdev->res[type].vaddr;
  151. }
  152. }
  153. unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
  154. unsigned int desc_count,
  155. unsigned int desc_size)
  156. {
  157. /* The base address of the desc rings must be 512 byte aligned.
  158. * Descriptor count is aligned to groups of 32 descriptors. A
  159. * count of 0 means the maximum 4096 descriptors. Descriptor
  160. * size is aligned to 16 bytes.
  161. */
  162. unsigned int count_align = 32;
  163. unsigned int desc_align = 16;
  164. ring->base_align = 512;
  165. if (desc_count == 0)
  166. desc_count = 4096;
  167. ring->desc_count = ALIGN(desc_count, count_align);
  168. ring->desc_size = ALIGN(desc_size, desc_align);
  169. ring->size = ring->desc_count * ring->desc_size;
  170. ring->size_unaligned = ring->size + ring->base_align;
  171. return ring->size_unaligned;
  172. }
  173. void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
  174. {
  175. memset(ring->descs, 0, ring->size);
  176. }
  177. int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
  178. unsigned int desc_count, unsigned int desc_size)
  179. {
  180. vnic_dev_desc_ring_size(ring, desc_count, desc_size);
  181. ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
  182. ring->size_unaligned,
  183. &ring->base_addr_unaligned, GFP_KERNEL);
  184. if (!ring->descs_unaligned) {
  185. printk(KERN_ERR
  186. "Failed to allocate ring (size=%d), aborting\n",
  187. (int)ring->size);
  188. return -ENOMEM;
  189. }
  190. ring->base_addr = ALIGN(ring->base_addr_unaligned,
  191. ring->base_align);
  192. ring->descs = (u8 *)ring->descs_unaligned +
  193. (ring->base_addr - ring->base_addr_unaligned);
  194. vnic_dev_clear_desc_ring(ring);
  195. ring->desc_avail = ring->desc_count - 1;
  196. return 0;
  197. }
  198. void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
  199. {
  200. if (ring->descs) {
  201. dma_free_coherent(&vdev->pdev->dev,
  202. ring->size_unaligned,
  203. ring->descs_unaligned,
  204. ring->base_addr_unaligned);
  205. ring->descs = NULL;
  206. }
  207. }
  208. static int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
  209. {
  210. struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
  211. int delay;
  212. u32 status;
  213. static const int dev_cmd_err[] = {
  214. /* convert from fw's version of error.h to host's version */
  215. 0, /* ERR_SUCCESS */
  216. EINVAL, /* ERR_EINVAL */
  217. EFAULT, /* ERR_EFAULT */
  218. EPERM, /* ERR_EPERM */
  219. EBUSY, /* ERR_EBUSY */
  220. };
  221. int err;
  222. u64 *a0 = &vdev->args[0];
  223. u64 *a1 = &vdev->args[1];
  224. status = ioread32(&devcmd->status);
  225. if (status & STAT_BUSY) {
  226. printk(KERN_ERR "Busy devcmd %d\n", _CMD_N(cmd));
  227. return -EBUSY;
  228. }
  229. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  230. writeq(*a0, &devcmd->args[0]);
  231. writeq(*a1, &devcmd->args[1]);
  232. wmb();
  233. }
  234. iowrite32(cmd, &devcmd->cmd);
  235. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  236. return 0;
  237. for (delay = 0; delay < wait; delay++) {
  238. udelay(100);
  239. status = ioread32(&devcmd->status);
  240. if (!(status & STAT_BUSY)) {
  241. if (status & STAT_ERROR) {
  242. err = dev_cmd_err[(int)readq(&devcmd->args[0])];
  243. printk(KERN_ERR "Error %d devcmd %d\n",
  244. err, _CMD_N(cmd));
  245. return -err;
  246. }
  247. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  248. rmb();
  249. *a0 = readq(&devcmd->args[0]);
  250. *a1 = readq(&devcmd->args[1]);
  251. }
  252. return 0;
  253. }
  254. }
  255. printk(KERN_ERR "Timedout devcmd %d\n", _CMD_N(cmd));
  256. return -ETIMEDOUT;
  257. }
  258. static int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  259. int wait)
  260. {
  261. struct devcmd2_controller *dc2c = vdev->devcmd2;
  262. struct devcmd2_result *result;
  263. u8 color;
  264. unsigned int i;
  265. int delay;
  266. int err;
  267. u32 fetch_index;
  268. u32 posted;
  269. u32 new_posted;
  270. posted = ioread32(&dc2c->wq_ctrl->posted_index);
  271. fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
  272. if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
  273. /* Hardware surprise removal: return error */
  274. pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
  275. pci_name(vdev->pdev), _CMD_N(cmd));
  276. pr_err("%s: fetch index: %u, posted index: %u\n",
  277. pci_name(vdev->pdev), fetch_index, posted);
  278. return -ENODEV;
  279. }
  280. new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
  281. if (new_posted == fetch_index) {
  282. pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
  283. pci_name(vdev->pdev), _CMD_N(cmd));
  284. pr_err("%s: fetch index: %u, posted index: %u\n",
  285. pci_name(vdev->pdev), fetch_index, posted);
  286. return -EBUSY;
  287. }
  288. dc2c->cmd_ring[posted].cmd = cmd;
  289. dc2c->cmd_ring[posted].flags = 0;
  290. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  291. dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
  292. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  293. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  294. dc2c->cmd_ring[posted].args[i] = vdev->args[i];
  295. }
  296. /* Adding write memory barrier prevents compiler and/or CPU
  297. * reordering, thus avoiding descriptor posting before
  298. * descriptor is initialized. Otherwise, hardware can read
  299. * stale descriptor fields.
  300. */
  301. wmb();
  302. iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
  303. if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
  304. return 0;
  305. result = dc2c->result + dc2c->next_result;
  306. color = dc2c->color;
  307. dc2c->next_result++;
  308. if (dc2c->next_result == dc2c->result_size) {
  309. dc2c->next_result = 0;
  310. dc2c->color = dc2c->color ? 0 : 1;
  311. }
  312. for (delay = 0; delay < wait; delay++) {
  313. udelay(100);
  314. if (result->color == color) {
  315. if (result->error) {
  316. err = -(int) result->error;
  317. if (err != ERR_ECMDUNKNOWN ||
  318. cmd != CMD_CAPABILITY)
  319. pr_err("%s:Error %d devcmd %d\n",
  320. pci_name(vdev->pdev),
  321. err, _CMD_N(cmd));
  322. return err;
  323. }
  324. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  325. rmb(); /*prevent reorder while reding result*/
  326. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  327. vdev->args[i] = result->results[i];
  328. }
  329. return 0;
  330. }
  331. }
  332. pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
  333. return -ETIMEDOUT;
  334. }
  335. static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
  336. {
  337. vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
  338. if (!vdev->devcmd)
  339. return -ENODEV;
  340. vdev->devcmd_rtn = &vnic_dev_cmd1;
  341. return 0;
  342. }
  343. static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
  344. {
  345. int err;
  346. unsigned int fetch_index;
  347. if (vdev->devcmd2)
  348. return 0;
  349. vdev->devcmd2 = kzalloc_obj(*vdev->devcmd2, GFP_ATOMIC);
  350. if (!vdev->devcmd2)
  351. return -ENOMEM;
  352. vdev->devcmd2->color = 1;
  353. vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
  354. err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
  355. DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
  356. if (err)
  357. goto err_free_devcmd2;
  358. fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
  359. if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
  360. pr_err("error in devcmd2 init");
  361. err = -ENODEV;
  362. goto err_free_wq;
  363. }
  364. /*
  365. * Don't change fetch_index ever and
  366. * set posted_index same as fetch_index
  367. * when setting up the WQ for devcmd2.
  368. */
  369. vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
  370. fetch_index, 0, 0);
  371. vnic_wq_enable(&vdev->devcmd2->wq);
  372. err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
  373. DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
  374. if (err)
  375. goto err_disable_wq;
  376. vdev->devcmd2->result =
  377. (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
  378. vdev->devcmd2->cmd_ring =
  379. (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
  380. vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
  381. vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
  382. VNIC_PADDR_TARGET;
  383. vdev->args[1] = DEVCMD2_RING_SIZE;
  384. err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
  385. if (err)
  386. goto err_free_desc_ring;
  387. vdev->devcmd_rtn = &vnic_dev_cmd2;
  388. return 0;
  389. err_free_desc_ring:
  390. vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
  391. err_disable_wq:
  392. vnic_wq_disable(&vdev->devcmd2->wq);
  393. err_free_wq:
  394. vnic_wq_free(&vdev->devcmd2->wq);
  395. err_free_devcmd2:
  396. kfree(vdev->devcmd2);
  397. vdev->devcmd2 = NULL;
  398. return err;
  399. }
  400. static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
  401. {
  402. vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
  403. vnic_wq_disable(&vdev->devcmd2->wq);
  404. vnic_wq_free(&vdev->devcmd2->wq);
  405. kfree(vdev->devcmd2);
  406. vdev->devcmd2 = NULL;
  407. vdev->devcmd_rtn = &vnic_dev_cmd1;
  408. }
  409. static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
  410. enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
  411. {
  412. int err;
  413. vdev->args[0] = *a0;
  414. vdev->args[1] = *a1;
  415. err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
  416. *a0 = vdev->args[0];
  417. *a1 = vdev->args[1];
  418. return err;
  419. }
  420. int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  421. u64 *a0, u64 *a1, int wait)
  422. {
  423. memset(vdev->args, 0, sizeof(vdev->args));
  424. switch (vdev->proxy) {
  425. case PROXY_NONE:
  426. default:
  427. return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
  428. }
  429. }
  430. int vnic_dev_fw_info(struct vnic_dev *vdev,
  431. struct vnic_devcmd_fw_info **fw_info)
  432. {
  433. u64 a0, a1 = 0;
  434. int wait = 1000;
  435. int err = 0;
  436. if (!vdev->fw_info) {
  437. vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
  438. sizeof(struct vnic_devcmd_fw_info),
  439. &vdev->fw_info_pa, GFP_KERNEL);
  440. if (!vdev->fw_info)
  441. return -ENOMEM;
  442. a0 = vdev->fw_info_pa;
  443. /* only get fw_info once and cache it */
  444. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
  445. }
  446. *fw_info = vdev->fw_info;
  447. return err;
  448. }
  449. int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
  450. void *value)
  451. {
  452. u64 a0, a1;
  453. int wait = 1000;
  454. int err;
  455. a0 = offset;
  456. a1 = size;
  457. err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
  458. switch (size) {
  459. case 1:
  460. *(u8 *)value = (u8)a0;
  461. break;
  462. case 2:
  463. *(u16 *)value = (u16)a0;
  464. break;
  465. case 4:
  466. *(u32 *)value = (u32)a0;
  467. break;
  468. case 8:
  469. *(u64 *)value = a0;
  470. break;
  471. default:
  472. BUG();
  473. break;
  474. }
  475. return err;
  476. }
  477. int vnic_dev_stats_clear(struct vnic_dev *vdev)
  478. {
  479. u64 a0 = 0, a1 = 0;
  480. int wait = 1000;
  481. return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
  482. }
  483. int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
  484. {
  485. u64 a0, a1;
  486. int wait = 1000;
  487. if (!vdev->stats) {
  488. vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
  489. sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
  490. if (!vdev->stats)
  491. return -ENOMEM;
  492. }
  493. *stats = vdev->stats;
  494. a0 = vdev->stats_pa;
  495. a1 = sizeof(struct vnic_stats);
  496. return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
  497. }
  498. int vnic_dev_close(struct vnic_dev *vdev)
  499. {
  500. u64 a0 = 0, a1 = 0;
  501. int wait = 1000;
  502. return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
  503. }
  504. int vnic_dev_enable(struct vnic_dev *vdev)
  505. {
  506. u64 a0 = 0, a1 = 0;
  507. int wait = 1000;
  508. return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
  509. }
  510. int vnic_dev_disable(struct vnic_dev *vdev)
  511. {
  512. u64 a0 = 0, a1 = 0;
  513. int wait = 1000;
  514. return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
  515. }
  516. int vnic_dev_open(struct vnic_dev *vdev, int arg)
  517. {
  518. u64 a0 = (u32)arg, a1 = 0;
  519. int wait = 1000;
  520. return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
  521. }
  522. int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
  523. {
  524. u64 a0 = 0, a1 = 0;
  525. int wait = 1000;
  526. int err;
  527. *done = 0;
  528. err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
  529. if (err)
  530. return err;
  531. *done = (a0 == 0);
  532. return 0;
  533. }
  534. int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
  535. {
  536. u64 a0 = (u32)arg, a1 = 0;
  537. int wait = 1000;
  538. return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
  539. }
  540. int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
  541. {
  542. u64 a0 = 0, a1 = 0;
  543. int wait = 1000;
  544. int err;
  545. *done = 0;
  546. err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
  547. if (err)
  548. return err;
  549. *done = (a0 == 0);
  550. return 0;
  551. }
  552. int vnic_dev_hang_notify(struct vnic_dev *vdev)
  553. {
  554. u64 a0 = 0, a1 = 0;
  555. int wait = 1000;
  556. return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
  557. }
  558. int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  559. {
  560. u64 a[2] = {};
  561. int wait = 1000;
  562. int err, i;
  563. for (i = 0; i < ETH_ALEN; i++)
  564. mac_addr[i] = 0;
  565. err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a[0], &a[1], wait);
  566. if (err)
  567. return err;
  568. for (i = 0; i < ETH_ALEN; i++)
  569. mac_addr[i] = ((u8 *)&a)[i];
  570. return 0;
  571. }
  572. void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
  573. int broadcast, int promisc, int allmulti)
  574. {
  575. u64 a0, a1 = 0;
  576. int wait = 1000;
  577. int err;
  578. a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
  579. (multicast ? CMD_PFILTER_MULTICAST : 0) |
  580. (broadcast ? CMD_PFILTER_BROADCAST : 0) |
  581. (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
  582. (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
  583. err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
  584. if (err)
  585. printk(KERN_ERR "Can't set packet filter\n");
  586. }
  587. void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
  588. {
  589. u64 a[2] = {};
  590. int wait = 1000;
  591. int err;
  592. int i;
  593. for (i = 0; i < ETH_ALEN; i++)
  594. ((u8 *)&a)[i] = addr[i];
  595. err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a[0], &a[1], wait);
  596. if (err)
  597. pr_err("Can't add addr [%pM], %d\n", addr, err);
  598. }
  599. void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
  600. {
  601. u64 a[2] = {};
  602. int wait = 1000;
  603. int err;
  604. int i;
  605. for (i = 0; i < ETH_ALEN; i++)
  606. ((u8 *)&a)[i] = addr[i];
  607. err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a[0], &a[1], wait);
  608. if (err)
  609. pr_err("Can't del addr [%pM], %d\n", addr, err);
  610. }
  611. int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
  612. {
  613. u64 a0, a1;
  614. int wait = 1000;
  615. if (!vdev->notify) {
  616. vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
  617. sizeof(struct vnic_devcmd_notify),
  618. &vdev->notify_pa, GFP_KERNEL);
  619. if (!vdev->notify)
  620. return -ENOMEM;
  621. }
  622. a0 = vdev->notify_pa;
  623. a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
  624. a1 += sizeof(struct vnic_devcmd_notify);
  625. return vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  626. }
  627. void vnic_dev_notify_unset(struct vnic_dev *vdev)
  628. {
  629. u64 a0, a1;
  630. int wait = 1000;
  631. a0 = 0; /* paddr = 0 to unset notify buffer */
  632. a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
  633. a1 += sizeof(struct vnic_devcmd_notify);
  634. vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  635. }
  636. static int vnic_dev_notify_ready(struct vnic_dev *vdev)
  637. {
  638. u32 *words;
  639. unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
  640. unsigned int i;
  641. u32 csum;
  642. if (!vdev->notify)
  643. return 0;
  644. do {
  645. csum = 0;
  646. memcpy(&vdev->notify_copy, vdev->notify,
  647. sizeof(struct vnic_devcmd_notify));
  648. words = (u32 *)&vdev->notify_copy;
  649. for (i = 1; i < nwords; i++)
  650. csum += words[i];
  651. } while (csum != words[0]);
  652. return 1;
  653. }
  654. int vnic_dev_init(struct vnic_dev *vdev, int arg)
  655. {
  656. u64 a0 = (u32)arg, a1 = 0;
  657. int wait = 1000;
  658. return vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
  659. }
  660. u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev, u16 new_default_vlan)
  661. {
  662. u64 a0 = new_default_vlan, a1 = 0;
  663. int wait = 1000;
  664. int old_vlan = 0;
  665. old_vlan = vnic_dev_cmd(vdev, CMD_SET_DEFAULT_VLAN, &a0, &a1, wait);
  666. return (u16)old_vlan;
  667. }
  668. int vnic_dev_link_status(struct vnic_dev *vdev)
  669. {
  670. if (vdev->linkstatus)
  671. return *vdev->linkstatus;
  672. if (!vnic_dev_notify_ready(vdev))
  673. return 0;
  674. return vdev->notify_copy.link_state;
  675. }
  676. u32 vnic_dev_port_speed(struct vnic_dev *vdev)
  677. {
  678. if (!vnic_dev_notify_ready(vdev))
  679. return 0;
  680. return vdev->notify_copy.port_speed;
  681. }
  682. u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
  683. {
  684. if (!vnic_dev_notify_ready(vdev))
  685. return 0;
  686. return vdev->notify_copy.msglvl;
  687. }
  688. u32 vnic_dev_mtu(struct vnic_dev *vdev)
  689. {
  690. if (!vnic_dev_notify_ready(vdev))
  691. return 0;
  692. return vdev->notify_copy.mtu;
  693. }
  694. u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
  695. {
  696. if (!vnic_dev_notify_ready(vdev))
  697. return 0;
  698. return vdev->notify_copy.link_down_cnt;
  699. }
  700. void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
  701. enum vnic_dev_intr_mode intr_mode)
  702. {
  703. vdev->intr_mode = intr_mode;
  704. }
  705. enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
  706. struct vnic_dev *vdev)
  707. {
  708. return vdev->intr_mode;
  709. }
  710. void vnic_dev_unregister(struct vnic_dev *vdev)
  711. {
  712. if (vdev) {
  713. if (vdev->notify)
  714. dma_free_coherent(&vdev->pdev->dev,
  715. sizeof(struct vnic_devcmd_notify),
  716. vdev->notify,
  717. vdev->notify_pa);
  718. if (vdev->linkstatus)
  719. dma_free_coherent(&vdev->pdev->dev,
  720. sizeof(u32),
  721. vdev->linkstatus,
  722. vdev->linkstatus_pa);
  723. if (vdev->stats)
  724. dma_free_coherent(&vdev->pdev->dev,
  725. sizeof(struct vnic_stats),
  726. vdev->stats, vdev->stats_pa);
  727. if (vdev->fw_info)
  728. dma_free_coherent(&vdev->pdev->dev,
  729. sizeof(struct vnic_devcmd_fw_info),
  730. vdev->fw_info, vdev->fw_info_pa);
  731. if (vdev->devcmd2)
  732. vnic_dev_deinit_devcmd2(vdev);
  733. kfree(vdev);
  734. }
  735. }
  736. struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
  737. void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar)
  738. {
  739. if (!vdev) {
  740. vdev = kzalloc_obj(struct vnic_dev);
  741. if (!vdev)
  742. return NULL;
  743. }
  744. vdev->priv = priv;
  745. vdev->pdev = pdev;
  746. if (vnic_dev_discover_res(vdev, bar))
  747. goto err_out;
  748. return vdev;
  749. err_out:
  750. vnic_dev_unregister(vdev);
  751. return NULL;
  752. }
  753. int vnic_dev_cmd_init(struct vnic_dev *vdev)
  754. {
  755. int err;
  756. void *p;
  757. p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
  758. if (p) {
  759. pr_err("fnic: DEVCMD2 resource found!\n");
  760. err = vnic_dev_init_devcmd2(vdev);
  761. } else {
  762. pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
  763. err = vnic_dev_init_devcmd1(vdev);
  764. }
  765. return err;
  766. }