dc395x.c 111 KB

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  1. /*
  2. * dc395x.c
  3. *
  4. * Device Driver for Tekram DC395(U/UW/F), DC315(U)
  5. * PCI SCSI Bus Master Host Adapter
  6. * (SCSI chip set used Tekram ASIC TRM-S1040)
  7. *
  8. * Authors:
  9. * C.L. Huang <ching@tekram.com.tw>
  10. * Erich Chen <erich@tekram.com.tw>
  11. * (C) Copyright 1995-1999 Tekram Technology Co., Ltd.
  12. *
  13. * Kurt Garloff <garloff@suse.de>
  14. * (C) 1999-2000 Kurt Garloff
  15. *
  16. * Oliver Neukum <oliver@neukum.name>
  17. * Ali Akcaagac <aliakc@web.de>
  18. * Jamie Lenehan <lenehan@twibble.org>
  19. * (C) 2003
  20. *
  21. * License: GNU GPL
  22. *
  23. *************************************************************************
  24. *
  25. * Redistribution and use in source and binary forms, with or without
  26. * modification, are permitted provided that the following conditions
  27. * are met:
  28. * 1. Redistributions of source code must retain the above copyright
  29. * notice, this list of conditions and the following disclaimer.
  30. * 2. Redistributions in binary form must reproduce the above copyright
  31. * notice, this list of conditions and the following disclaimer in the
  32. * documentation and/or other materials provided with the distribution.
  33. * 3. The name of the author may not be used to endorse or promote products
  34. * derived from this software without specific prior written permission.
  35. *
  36. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  37. * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  38. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  39. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  40. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  41. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  42. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  43. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  44. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  45. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46. *
  47. ************************************************************************
  48. */
  49. #include <linux/module.h>
  50. #include <linux/moduleparam.h>
  51. #include <linux/delay.h>
  52. #include <linux/ctype.h>
  53. #include <linux/blkdev.h>
  54. #include <linux/interrupt.h>
  55. #include <linux/init.h>
  56. #include <linux/spinlock.h>
  57. #include <linux/pci.h>
  58. #include <linux/list.h>
  59. #include <linux/vmalloc.h>
  60. #include <linux/slab.h>
  61. #include <asm/io.h>
  62. #include <scsi/scsi.h>
  63. #include <scsi/scsi_cmnd.h>
  64. #include <scsi/scsi_device.h>
  65. #include <scsi/scsi_host.h>
  66. #include <scsi/scsi_transport_spi.h>
  67. #include "dc395x.h"
  68. #define DC395X_NAME "dc395x"
  69. #define DC395X_BANNER "Tekram DC395(U/UW/F), DC315(U) - ASIC TRM-S1040"
  70. #define DC395X_VERSION "v2.05, 2004/03/08"
  71. /*---------------------------------------------------------------------------
  72. Features
  73. ---------------------------------------------------------------------------*/
  74. /*
  75. * Set to disable parts of the driver
  76. */
  77. /*#define DC395x_NO_DISCONNECT*/
  78. /*#define DC395x_NO_TAGQ*/
  79. /*#define DC395x_NO_SYNC*/
  80. /*#define DC395x_NO_WIDE*/
  81. #ifndef PCI_VENDOR_ID_TEKRAM
  82. #define PCI_VENDOR_ID_TEKRAM 0x1DE1 /* Vendor ID */
  83. #endif
  84. #ifndef PCI_DEVICE_ID_TEKRAM_TRMS1040
  85. #define PCI_DEVICE_ID_TEKRAM_TRMS1040 0x0391 /* Device ID */
  86. #endif
  87. #define DC395x_LOCK_IO(dev,flags) spin_lock_irqsave(((struct Scsi_Host *)dev)->host_lock, flags)
  88. #define DC395x_UNLOCK_IO(dev,flags) spin_unlock_irqrestore(((struct Scsi_Host *)dev)->host_lock, flags)
  89. #define DC395x_read8(acb,address) (u8)(inb(acb->io_port_base + (address)))
  90. #define DC395x_read16(acb,address) (u16)(inw(acb->io_port_base + (address)))
  91. #define DC395x_read32(acb,address) (u32)(inl(acb->io_port_base + (address)))
  92. #define DC395x_write8(acb,address,value) outb((value), acb->io_port_base + (address))
  93. #define DC395x_write16(acb,address,value) outw((value), acb->io_port_base + (address))
  94. #define DC395x_write32(acb,address,value) outl((value), acb->io_port_base + (address))
  95. #define TAG_NONE 255
  96. /*
  97. * srb->segement_x is the hw sg list. It is always allocated as a
  98. * DC395x_MAX_SG_LISTENTRY entries in a linear block which does not
  99. * cross a page boundy.
  100. */
  101. #define SEGMENTX_LEN (sizeof(struct SGentry)*DC395x_MAX_SG_LISTENTRY)
  102. struct SGentry {
  103. u32 address; /* bus! address */
  104. u32 length;
  105. };
  106. /* The SEEPROM structure for TRM_S1040 */
  107. struct NVRamTarget {
  108. u8 cfg0; /* Target configuration byte 0 */
  109. u8 period; /* Target period */
  110. u8 cfg2; /* Target configuration byte 2 */
  111. u8 cfg3; /* Target configuration byte 3 */
  112. };
  113. struct NvRamType {
  114. u8 sub_vendor_id[2]; /* 0,1 Sub Vendor ID */
  115. u8 sub_sys_id[2]; /* 2,3 Sub System ID */
  116. u8 sub_class; /* 4 Sub Class */
  117. u8 vendor_id[2]; /* 5,6 Vendor ID */
  118. u8 device_id[2]; /* 7,8 Device ID */
  119. u8 reserved; /* 9 Reserved */
  120. struct NVRamTarget target[DC395x_MAX_SCSI_ID];
  121. /** 10,11,12,13
  122. ** 14,15,16,17
  123. ** ....
  124. ** ....
  125. ** 70,71,72,73
  126. */
  127. u8 scsi_id; /* 74 Host Adapter SCSI ID */
  128. u8 channel_cfg; /* 75 Channel configuration */
  129. u8 delay_time; /* 76 Power on delay time */
  130. u8 max_tag; /* 77 Maximum tags */
  131. u8 reserved0; /* 78 */
  132. u8 boot_target; /* 79 */
  133. u8 boot_lun; /* 80 */
  134. u8 reserved1; /* 81 */
  135. u16 reserved2[22]; /* 82,..125 */
  136. u16 cksum; /* 126,127 */
  137. };
  138. struct ScsiReqBlk {
  139. struct list_head list; /* next/prev ptrs for srb lists */
  140. struct DeviceCtlBlk *dcb;
  141. struct scsi_cmnd *cmd;
  142. struct SGentry *segment_x; /* Linear array of hw sg entries (up to 64 entries) */
  143. dma_addr_t sg_bus_addr; /* Bus address of sg list (ie, of segment_x) */
  144. u8 sg_count; /* No of HW sg entries for this request */
  145. u8 sg_index; /* Index of HW sg entry for this request */
  146. size_t total_xfer_length; /* Total number of bytes remaining to be transferred */
  147. size_t request_length; /* Total number of bytes in this request */
  148. /*
  149. * The sense buffer handling function, request_sense, uses
  150. * the first hw sg entry (segment_x[0]) and the transfer
  151. * length (total_xfer_length). While doing this it stores the
  152. * original values into the last sg hw list
  153. * (srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1] and the
  154. * total_xfer_length in xferred. These values are restored in
  155. * pci_unmap_srb_sense. This is the only place xferred is used.
  156. */
  157. size_t xferred; /* Saved copy of total_xfer_length */
  158. u16 state;
  159. u8 msgin_buf[6];
  160. u8 msgout_buf[6];
  161. u8 adapter_status;
  162. u8 target_status;
  163. u8 msg_count;
  164. u8 end_message;
  165. u8 tag_number;
  166. u8 status;
  167. u8 retry_count;
  168. u8 flag;
  169. u8 scsi_phase;
  170. };
  171. struct DeviceCtlBlk {
  172. struct list_head list; /* next/prev ptrs for the dcb list */
  173. struct AdapterCtlBlk *acb;
  174. struct list_head srb_going_list; /* head of going srb list */
  175. struct list_head srb_waiting_list; /* head of waiting srb list */
  176. struct ScsiReqBlk *active_srb;
  177. u32 tag_mask;
  178. u16 max_command;
  179. u8 target_id; /* SCSI Target ID (SCSI Only) */
  180. u8 target_lun; /* SCSI Log. Unit (SCSI Only) */
  181. u8 identify_msg;
  182. u8 dev_mode;
  183. u8 inquiry7; /* To store Inquiry flags */
  184. u8 sync_mode; /* 0:async mode */
  185. u8 min_nego_period; /* for nego. */
  186. u8 sync_period; /* for reg. */
  187. u8 sync_offset; /* for reg. and nego.(low nibble) */
  188. u8 flag;
  189. u8 dev_type;
  190. u8 init_tcq_flag;
  191. };
  192. struct AdapterCtlBlk {
  193. struct Scsi_Host *scsi_host;
  194. unsigned long io_port_base;
  195. unsigned long io_port_len;
  196. struct list_head dcb_list; /* head of going dcb list */
  197. struct DeviceCtlBlk *dcb_run_robin;
  198. struct DeviceCtlBlk *active_dcb;
  199. struct list_head srb_free_list; /* head of free srb list */
  200. struct ScsiReqBlk *tmp_srb;
  201. struct timer_list waiting_timer;
  202. struct timer_list selto_timer;
  203. unsigned long last_reset;
  204. u16 srb_count;
  205. u8 sel_timeout;
  206. unsigned int irq_level;
  207. u8 tag_max_num;
  208. u8 acb_flag;
  209. u8 gmode2;
  210. u8 config;
  211. u8 lun_chk;
  212. u8 scan_devices;
  213. u8 hostid_bit;
  214. u8 dcb_map[DC395x_MAX_SCSI_ID];
  215. struct DeviceCtlBlk *children[DC395x_MAX_SCSI_ID][32];
  216. struct pci_dev *dev;
  217. u8 msg_len;
  218. struct ScsiReqBlk srb_array[DC395x_MAX_SRB_CNT];
  219. struct ScsiReqBlk srb;
  220. struct NvRamType eeprom; /* eeprom settings for this adapter */
  221. };
  222. /*---------------------------------------------------------------------------
  223. Forward declarations
  224. ---------------------------------------------------------------------------*/
  225. static void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  226. u16 *pscsi_status);
  227. static void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  228. u16 *pscsi_status);
  229. static void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  230. u16 *pscsi_status);
  231. static void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  232. u16 *pscsi_status);
  233. static void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  234. u16 *pscsi_status);
  235. static void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  236. u16 *pscsi_status);
  237. static void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  238. u16 *pscsi_status);
  239. static void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  240. u16 *pscsi_status);
  241. static void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  242. u16 *pscsi_status);
  243. static void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  244. u16 *pscsi_status);
  245. static void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  246. u16 *pscsi_status);
  247. static void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  248. u16 *pscsi_status);
  249. static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  250. u16 *pscsi_status);
  251. static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  252. u16 *pscsi_status);
  253. static void set_basic_config(struct AdapterCtlBlk *acb);
  254. static void cleanup_after_transfer(struct AdapterCtlBlk *acb,
  255. struct ScsiReqBlk *srb);
  256. static void reset_scsi_bus(struct AdapterCtlBlk *acb);
  257. static void data_io_transfer(struct AdapterCtlBlk *acb,
  258. struct ScsiReqBlk *srb, u16 io_dir);
  259. static void disconnect(struct AdapterCtlBlk *acb);
  260. static void reselect(struct AdapterCtlBlk *acb);
  261. static u8 start_scsi(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  262. struct ScsiReqBlk *srb);
  263. static inline void enable_msgout_abort(struct AdapterCtlBlk *acb,
  264. struct ScsiReqBlk *srb);
  265. static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb,
  266. struct ScsiReqBlk *srb);
  267. static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_code,
  268. struct scsi_cmnd *cmd, u8 force);
  269. static void scsi_reset_detect(struct AdapterCtlBlk *acb);
  270. static void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb);
  271. static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb,
  272. struct ScsiReqBlk *srb);
  273. static void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  274. struct ScsiReqBlk *srb);
  275. static void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  276. struct ScsiReqBlk *srb);
  277. static void set_xfer_rate(struct AdapterCtlBlk *acb,
  278. struct DeviceCtlBlk *dcb);
  279. static void waiting_timeout(struct timer_list *t);
  280. /*---------------------------------------------------------------------------
  281. Static Data
  282. ---------------------------------------------------------------------------*/
  283. static u16 current_sync_offset = 0;
  284. static void *dc395x_scsi_phase0[] = {
  285. data_out_phase0,/* phase:0 */
  286. data_in_phase0, /* phase:1 */
  287. command_phase0, /* phase:2 */
  288. status_phase0, /* phase:3 */
  289. nop0, /* phase:4 PH_BUS_FREE .. initial phase */
  290. nop0, /* phase:5 PH_BUS_FREE .. initial phase */
  291. msgout_phase0, /* phase:6 */
  292. msgin_phase0, /* phase:7 */
  293. };
  294. static void *dc395x_scsi_phase1[] = {
  295. data_out_phase1,/* phase:0 */
  296. data_in_phase1, /* phase:1 */
  297. command_phase1, /* phase:2 */
  298. status_phase1, /* phase:3 */
  299. nop1, /* phase:4 PH_BUS_FREE .. initial phase */
  300. nop1, /* phase:5 PH_BUS_FREE .. initial phase */
  301. msgout_phase1, /* phase:6 */
  302. msgin_phase1, /* phase:7 */
  303. };
  304. /*
  305. *Fast20: 000 50ns, 20.0 MHz
  306. * 001 75ns, 13.3 MHz
  307. * 010 100ns, 10.0 MHz
  308. * 011 125ns, 8.0 MHz
  309. * 100 150ns, 6.6 MHz
  310. * 101 175ns, 5.7 MHz
  311. * 110 200ns, 5.0 MHz
  312. * 111 250ns, 4.0 MHz
  313. *
  314. *Fast40(LVDS): 000 25ns, 40.0 MHz
  315. * 001 50ns, 20.0 MHz
  316. * 010 75ns, 13.3 MHz
  317. * 011 100ns, 10.0 MHz
  318. * 100 125ns, 8.0 MHz
  319. * 101 150ns, 6.6 MHz
  320. * 110 175ns, 5.7 MHz
  321. * 111 200ns, 5.0 MHz
  322. */
  323. /*static u8 clock_period[] = {12,19,25,31,37,44,50,62};*/
  324. /* real period:48ns,76ns,100ns,124ns,148ns,176ns,200ns,248ns */
  325. static u8 clock_period[] = { 12, 18, 25, 31, 37, 43, 50, 62 };
  326. /*---------------------------------------------------------------------------
  327. Configuration
  328. ---------------------------------------------------------------------------*/
  329. /*
  330. * Module/boot parameters currently effect *all* instances of the
  331. * card in the system.
  332. */
  333. /*
  334. * Command line parameters are stored in a structure below.
  335. * These are the index's into the structure for the various
  336. * command line options.
  337. */
  338. #define CFG_ADAPTER_ID 0
  339. #define CFG_MAX_SPEED 1
  340. #define CFG_DEV_MODE 2
  341. #define CFG_ADAPTER_MODE 3
  342. #define CFG_TAGS 4
  343. #define CFG_RESET_DELAY 5
  344. #define CFG_NUM 6 /* number of configuration items */
  345. /*
  346. * Value used to indicate that a command line override
  347. * hasn't been used to modify the value.
  348. */
  349. #define CFG_PARAM_UNSET -1
  350. /*
  351. * Hold command line parameters.
  352. */
  353. struct ParameterData {
  354. int value; /* value of this setting */
  355. int min; /* minimum value */
  356. int max; /* maximum value */
  357. int def; /* default value */
  358. int safe; /* safe value */
  359. };
  360. static struct ParameterData cfg_data[] = {
  361. { /* adapter id */
  362. CFG_PARAM_UNSET,
  363. 0,
  364. 15,
  365. 7,
  366. 7
  367. },
  368. { /* max speed */
  369. CFG_PARAM_UNSET,
  370. 0,
  371. 7,
  372. 1, /* 13.3Mhz */
  373. 4, /* 6.7Hmz */
  374. },
  375. { /* dev mode */
  376. CFG_PARAM_UNSET,
  377. 0,
  378. 0x3f,
  379. NTC_DO_PARITY_CHK | NTC_DO_DISCONNECT | NTC_DO_SYNC_NEGO |
  380. NTC_DO_WIDE_NEGO | NTC_DO_TAG_QUEUEING |
  381. NTC_DO_SEND_START,
  382. NTC_DO_PARITY_CHK | NTC_DO_SEND_START
  383. },
  384. { /* adapter mode */
  385. CFG_PARAM_UNSET,
  386. 0,
  387. 0x2f,
  388. NAC_SCANLUN |
  389. NAC_GT2DRIVES | NAC_GREATER_1G | NAC_POWERON_SCSI_RESET
  390. /*| NAC_ACTIVE_NEG*/,
  391. NAC_GT2DRIVES | NAC_GREATER_1G | NAC_POWERON_SCSI_RESET | 0x08
  392. },
  393. { /* tags */
  394. CFG_PARAM_UNSET,
  395. 0,
  396. 5,
  397. 3, /* 16 tags (??) */
  398. 2,
  399. },
  400. { /* reset delay */
  401. CFG_PARAM_UNSET,
  402. 0,
  403. 180,
  404. 1, /* 1 second */
  405. 10, /* 10 seconds */
  406. }
  407. };
  408. /*
  409. * Safe settings. If set to zero the BIOS/default values with
  410. * command line overrides will be used. If set to 1 then safe and
  411. * slow settings will be used.
  412. */
  413. static bool use_safe_settings = 0;
  414. module_param_named(safe, use_safe_settings, bool, 0);
  415. MODULE_PARM_DESC(safe, "Use safe and slow settings only. Default: false");
  416. module_param_named(adapter_id, cfg_data[CFG_ADAPTER_ID].value, int, 0);
  417. MODULE_PARM_DESC(adapter_id, "Adapter SCSI ID. Default 7 (0-15)");
  418. module_param_named(max_speed, cfg_data[CFG_MAX_SPEED].value, int, 0);
  419. MODULE_PARM_DESC(max_speed, "Maximum bus speed. Default 1 (0-7) Speeds: 0=20, 1=13.3, 2=10, 3=8, 4=6.7, 5=5.8, 6=5, 7=4 Mhz");
  420. module_param_named(dev_mode, cfg_data[CFG_DEV_MODE].value, int, 0);
  421. MODULE_PARM_DESC(dev_mode, "Device mode.");
  422. module_param_named(adapter_mode, cfg_data[CFG_ADAPTER_MODE].value, int, 0);
  423. MODULE_PARM_DESC(adapter_mode, "Adapter mode.");
  424. module_param_named(tags, cfg_data[CFG_TAGS].value, int, 0);
  425. MODULE_PARM_DESC(tags, "Number of tags (1<<x). Default 3 (0-5)");
  426. module_param_named(reset_delay, cfg_data[CFG_RESET_DELAY].value, int, 0);
  427. MODULE_PARM_DESC(reset_delay, "Reset delay in seconds. Default 1 (0-180)");
  428. /**
  429. * set_safe_settings - if the use_safe_settings option is set then
  430. * set all values to the safe and slow values.
  431. **/
  432. static void set_safe_settings(void)
  433. {
  434. if (use_safe_settings)
  435. {
  436. int i;
  437. for (i = 0; i < CFG_NUM; i++)
  438. {
  439. cfg_data[i].value = cfg_data[i].safe;
  440. }
  441. }
  442. }
  443. /**
  444. * fix_settings - reset any boot parameters which are out of range
  445. * back to the default values.
  446. **/
  447. static void fix_settings(void)
  448. {
  449. int i;
  450. for (i = 0; i < CFG_NUM; i++)
  451. {
  452. if (cfg_data[i].value < cfg_data[i].min
  453. || cfg_data[i].value > cfg_data[i].max)
  454. cfg_data[i].value = cfg_data[i].def;
  455. }
  456. }
  457. /*
  458. * Mapping from the eeprom delay index value (index into this array)
  459. * to the number of actual seconds that the delay should be for.
  460. */
  461. static char eeprom_index_to_delay_map[] =
  462. { 1, 3, 5, 10, 16, 30, 60, 120 };
  463. /**
  464. * eeprom_index_to_delay - Take the eeprom delay setting and convert it
  465. * into a number of seconds.
  466. *
  467. * @eeprom: The eeprom structure in which we find the delay index to map.
  468. **/
  469. static void eeprom_index_to_delay(struct NvRamType *eeprom)
  470. {
  471. eeprom->delay_time = eeprom_index_to_delay_map[eeprom->delay_time];
  472. }
  473. /**
  474. * delay_to_eeprom_index - Take a delay in seconds and return the
  475. * closest eeprom index which will delay for at least that amount of
  476. * seconds.
  477. *
  478. * @delay: The delay, in seconds, to find the eeprom index for.
  479. **/
  480. static int delay_to_eeprom_index(int delay)
  481. {
  482. u8 idx = 0;
  483. while (idx < 7 && eeprom_index_to_delay_map[idx] < delay)
  484. idx++;
  485. return idx;
  486. }
  487. /**
  488. * eeprom_override - Override the eeprom settings, in the provided
  489. * eeprom structure, with values that have been set on the command
  490. * line.
  491. *
  492. * @eeprom: The eeprom data to override with command line options.
  493. **/
  494. static void eeprom_override(struct NvRamType *eeprom)
  495. {
  496. u8 id;
  497. /* Adapter Settings */
  498. if (cfg_data[CFG_ADAPTER_ID].value != CFG_PARAM_UNSET)
  499. eeprom->scsi_id = (u8)cfg_data[CFG_ADAPTER_ID].value;
  500. if (cfg_data[CFG_ADAPTER_MODE].value != CFG_PARAM_UNSET)
  501. eeprom->channel_cfg = (u8)cfg_data[CFG_ADAPTER_MODE].value;
  502. if (cfg_data[CFG_RESET_DELAY].value != CFG_PARAM_UNSET)
  503. eeprom->delay_time = delay_to_eeprom_index(
  504. cfg_data[CFG_RESET_DELAY].value);
  505. if (cfg_data[CFG_TAGS].value != CFG_PARAM_UNSET)
  506. eeprom->max_tag = (u8)cfg_data[CFG_TAGS].value;
  507. /* Device Settings */
  508. for (id = 0; id < DC395x_MAX_SCSI_ID; id++) {
  509. if (cfg_data[CFG_DEV_MODE].value != CFG_PARAM_UNSET)
  510. eeprom->target[id].cfg0 =
  511. (u8)cfg_data[CFG_DEV_MODE].value;
  512. if (cfg_data[CFG_MAX_SPEED].value != CFG_PARAM_UNSET)
  513. eeprom->target[id].period =
  514. (u8)cfg_data[CFG_MAX_SPEED].value;
  515. }
  516. }
  517. /*---------------------------------------------------------------------------
  518. ---------------------------------------------------------------------------*/
  519. static unsigned int list_size(struct list_head *head)
  520. {
  521. unsigned int count = 0;
  522. struct list_head *pos;
  523. list_for_each(pos, head)
  524. count++;
  525. return count;
  526. }
  527. static struct DeviceCtlBlk *dcb_get_next(struct list_head *head,
  528. struct DeviceCtlBlk *pos)
  529. {
  530. int use_next = 0;
  531. struct DeviceCtlBlk* next = NULL;
  532. struct DeviceCtlBlk* i;
  533. if (list_empty(head))
  534. return NULL;
  535. /* find supplied dcb and then select the next one */
  536. list_for_each_entry(i, head, list)
  537. if (use_next) {
  538. next = i;
  539. break;
  540. } else if (i == pos) {
  541. use_next = 1;
  542. }
  543. /* if no next one take the head one (ie, wraparound) */
  544. if (!next)
  545. list_for_each_entry(i, head, list) {
  546. next = i;
  547. break;
  548. }
  549. return next;
  550. }
  551. static void free_tag(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
  552. {
  553. if (srb->tag_number < 255) {
  554. dcb->tag_mask &= ~(1 << srb->tag_number); /* free tag mask */
  555. srb->tag_number = 255;
  556. }
  557. }
  558. /* Find cmd in SRB list */
  559. static inline struct ScsiReqBlk *find_cmd(struct scsi_cmnd *cmd,
  560. struct list_head *head)
  561. {
  562. struct ScsiReqBlk *i;
  563. list_for_each_entry(i, head, list)
  564. if (i->cmd == cmd)
  565. return i;
  566. return NULL;
  567. }
  568. /* Sets the timer to wake us up */
  569. static void waiting_set_timer(struct AdapterCtlBlk *acb, unsigned long to)
  570. {
  571. if (timer_pending(&acb->waiting_timer))
  572. return;
  573. if (time_before(jiffies + to, acb->last_reset - HZ / 2))
  574. acb->waiting_timer.expires =
  575. acb->last_reset - HZ / 2 + 1;
  576. else
  577. acb->waiting_timer.expires = jiffies + to + 1;
  578. add_timer(&acb->waiting_timer);
  579. }
  580. /* Send the next command from the waiting list to the bus */
  581. static void waiting_process_next(struct AdapterCtlBlk *acb)
  582. {
  583. struct DeviceCtlBlk *start = NULL;
  584. struct DeviceCtlBlk *pos;
  585. struct DeviceCtlBlk *dcb;
  586. struct ScsiReqBlk *srb;
  587. struct list_head *dcb_list_head = &acb->dcb_list;
  588. if (acb->active_dcb
  589. || (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV)))
  590. return;
  591. if (timer_pending(&acb->waiting_timer))
  592. timer_delete(&acb->waiting_timer);
  593. if (list_empty(dcb_list_head))
  594. return;
  595. /*
  596. * Find the starting dcb. Need to find it again in the list
  597. * since the list may have changed since we set the ptr to it
  598. */
  599. list_for_each_entry(dcb, dcb_list_head, list)
  600. if (dcb == acb->dcb_run_robin) {
  601. start = dcb;
  602. break;
  603. }
  604. if (!start) {
  605. /* This can happen! */
  606. start = list_entry(dcb_list_head->next, typeof(*start), list);
  607. acb->dcb_run_robin = start;
  608. }
  609. /*
  610. * Loop over the dcb, but we start somewhere (potentially) in
  611. * the middle of the loop so we need to manully do this.
  612. */
  613. pos = start;
  614. do {
  615. struct list_head *waiting_list_head = &pos->srb_waiting_list;
  616. /* Make sure, the next another device gets scheduled ... */
  617. acb->dcb_run_robin = dcb_get_next(dcb_list_head,
  618. acb->dcb_run_robin);
  619. if (list_empty(waiting_list_head) ||
  620. pos->max_command <= list_size(&pos->srb_going_list)) {
  621. /* move to next dcb */
  622. pos = dcb_get_next(dcb_list_head, pos);
  623. } else {
  624. srb = list_entry(waiting_list_head->next,
  625. struct ScsiReqBlk, list);
  626. /* Try to send to the bus */
  627. if (!start_scsi(acb, pos, srb))
  628. list_move(&srb->list, &pos->srb_going_list);
  629. else
  630. waiting_set_timer(acb, HZ/50);
  631. break;
  632. }
  633. } while (pos != start);
  634. }
  635. /* Wake up waiting queue */
  636. static void waiting_timeout(struct timer_list *t)
  637. {
  638. unsigned long flags;
  639. struct AdapterCtlBlk *acb = timer_container_of(acb, t, waiting_timer);
  640. DC395x_LOCK_IO(acb->scsi_host, flags);
  641. waiting_process_next(acb);
  642. DC395x_UNLOCK_IO(acb->scsi_host, flags);
  643. }
  644. /* Get the DCB for a given ID/LUN combination */
  645. static struct DeviceCtlBlk *find_dcb(struct AdapterCtlBlk *acb, u8 id, u8 lun)
  646. {
  647. return acb->children[id][lun];
  648. }
  649. /* Send SCSI Request Block (srb) to adapter (acb) */
  650. static void send_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
  651. {
  652. struct DeviceCtlBlk *dcb = srb->dcb;
  653. if (dcb->max_command <= list_size(&dcb->srb_going_list) ||
  654. acb->active_dcb ||
  655. (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV))) {
  656. list_add_tail(&srb->list, &dcb->srb_waiting_list);
  657. waiting_process_next(acb);
  658. return;
  659. }
  660. if (!start_scsi(acb, dcb, srb)) {
  661. list_add_tail(&srb->list, &dcb->srb_going_list);
  662. } else {
  663. list_add(&srb->list, &dcb->srb_waiting_list);
  664. waiting_set_timer(acb, HZ / 50);
  665. }
  666. }
  667. /* Prepare SRB for being sent to Device DCB w/ command *cmd */
  668. static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb,
  669. struct ScsiReqBlk *srb)
  670. {
  671. int nseg;
  672. enum dma_data_direction dir = cmd->sc_data_direction;
  673. srb->dcb = dcb;
  674. srb->cmd = cmd;
  675. srb->sg_count = 0;
  676. srb->total_xfer_length = 0;
  677. srb->sg_bus_addr = 0;
  678. srb->sg_index = 0;
  679. srb->adapter_status = 0;
  680. srb->target_status = 0;
  681. srb->msg_count = 0;
  682. srb->status = 0;
  683. srb->flag = 0;
  684. srb->state = 0;
  685. srb->retry_count = 0;
  686. srb->tag_number = TAG_NONE;
  687. srb->scsi_phase = PH_BUS_FREE; /* initial phase */
  688. srb->end_message = 0;
  689. nseg = scsi_dma_map(cmd);
  690. BUG_ON(nseg < 0);
  691. if (!(dir == DMA_NONE || !nseg)) {
  692. int i;
  693. u32 reqlen = scsi_bufflen(cmd);
  694. struct scatterlist *sg;
  695. struct SGentry *sgp = srb->segment_x;
  696. srb->sg_count = nseg;
  697. scsi_for_each_sg(cmd, sg, srb->sg_count, i) {
  698. u32 busaddr = (u32)sg_dma_address(sg);
  699. u32 seglen = (u32)sg->length;
  700. sgp[i].address = busaddr;
  701. sgp[i].length = seglen;
  702. srb->total_xfer_length += seglen;
  703. }
  704. sgp += srb->sg_count - 1;
  705. /*
  706. * adjust last page if too big as it is allocated
  707. * on even page boundaries
  708. */
  709. if (srb->total_xfer_length > reqlen) {
  710. sgp->length -= (srb->total_xfer_length - reqlen);
  711. srb->total_xfer_length = reqlen;
  712. }
  713. /* Fixup for WIDE padding - make sure length is even */
  714. if (dcb->sync_period & WIDE_SYNC &&
  715. srb->total_xfer_length % 2) {
  716. srb->total_xfer_length++;
  717. sgp->length++;
  718. }
  719. srb->sg_bus_addr = dma_map_single(&dcb->acb->dev->dev,
  720. srb->segment_x, SEGMENTX_LEN, DMA_TO_DEVICE);
  721. }
  722. srb->request_length = srb->total_xfer_length;
  723. }
  724. /**
  725. * dc395x_queue_command_lck - queue scsi command passed from the mid
  726. * layer, invoke 'done' on completion
  727. *
  728. * @cmd: pointer to scsi command object
  729. *
  730. * Returns 1 if the adapter (host) is busy, else returns 0. One
  731. * reason for an adapter to be busy is that the number
  732. * of outstanding queued commands is already equal to
  733. * struct Scsi_Host::can_queue .
  734. *
  735. * Required: if struct Scsi_Host::can_queue is ever non-zero
  736. * then this function is required.
  737. *
  738. * Locks: struct Scsi_Host::host_lock held on entry (with "irqsave")
  739. * and is expected to be held on return.
  740. *
  741. */
  742. static enum scsi_qc_status dc395x_queue_command_lck(struct scsi_cmnd *cmd)
  743. {
  744. void (*done)(struct scsi_cmnd *) = scsi_done;
  745. struct DeviceCtlBlk *dcb;
  746. struct ScsiReqBlk *srb;
  747. struct AdapterCtlBlk *acb =
  748. (struct AdapterCtlBlk *)cmd->device->host->hostdata;
  749. /* Assume BAD_TARGET; will be cleared later */
  750. set_host_byte(cmd, DID_BAD_TARGET);
  751. /* ignore invalid targets */
  752. if (cmd->device->id >= acb->scsi_host->max_id ||
  753. cmd->device->lun >= acb->scsi_host->max_lun ||
  754. cmd->device->lun > 31)
  755. goto complete;
  756. /* does the specified lun on the specified device exist */
  757. if (!(acb->dcb_map[cmd->device->id] & (1 << cmd->device->lun)))
  758. goto complete;
  759. /* do we have a DCB for the device */
  760. dcb = find_dcb(acb, cmd->device->id, cmd->device->lun);
  761. if (!dcb)
  762. goto complete;
  763. set_host_byte(cmd, DID_OK);
  764. set_status_byte(cmd, SAM_STAT_GOOD);
  765. srb = list_first_entry_or_null(&acb->srb_free_list,
  766. struct ScsiReqBlk, list);
  767. if (!srb) {
  768. /* should never happen */
  769. return 1;
  770. }
  771. list_del(&srb->list);
  772. build_srb(cmd, dcb, srb);
  773. if (!list_empty(&dcb->srb_waiting_list)) {
  774. /* append to waiting queue */
  775. list_add_tail(&srb->list, &dcb->srb_waiting_list);
  776. waiting_process_next(acb);
  777. } else {
  778. /* process immediately */
  779. send_srb(acb, srb);
  780. }
  781. return 0;
  782. complete:
  783. /*
  784. * Complete the command immediatey, and then return 0 to
  785. * indicate that we have handled the command. This is usually
  786. * done when the commad is for things like non existent
  787. * devices.
  788. */
  789. done(cmd);
  790. return 0;
  791. }
  792. static DEF_SCSI_QCMD(dc395x_queue_command)
  793. static inline void clear_fifo(struct AdapterCtlBlk *acb, char *txt)
  794. {
  795. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRFIFO);
  796. }
  797. static void reset_dev_param(struct AdapterCtlBlk *acb)
  798. {
  799. struct DeviceCtlBlk *dcb;
  800. struct NvRamType *eeprom = &acb->eeprom;
  801. list_for_each_entry(dcb, &acb->dcb_list, list) {
  802. u8 period_index;
  803. dcb->sync_mode &= ~(SYNC_NEGO_DONE + WIDE_NEGO_DONE);
  804. dcb->sync_period = 0;
  805. dcb->sync_offset = 0;
  806. dcb->dev_mode = eeprom->target[dcb->target_id].cfg0;
  807. period_index = eeprom->target[dcb->target_id].period & 0x07;
  808. dcb->min_nego_period = clock_period[period_index];
  809. if (!(dcb->dev_mode & NTC_DO_WIDE_NEGO)
  810. || !(acb->config & HCC_WIDE_CARD))
  811. dcb->sync_mode &= ~WIDE_NEGO_ENABLE;
  812. }
  813. }
  814. /*
  815. * perform a hard reset on the SCSI bus
  816. * @cmd - some command for this host (for fetching hooks)
  817. * Returns: SUCCESS (0x2002) on success, else FAILED (0x2003).
  818. */
  819. static int __dc395x_eh_bus_reset(struct scsi_cmnd *cmd)
  820. {
  821. struct AdapterCtlBlk *acb =
  822. (struct AdapterCtlBlk *)cmd->device->host->hostdata;
  823. if (timer_pending(&acb->waiting_timer))
  824. timer_delete(&acb->waiting_timer);
  825. /*
  826. * disable interrupt
  827. */
  828. DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00);
  829. DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00);
  830. DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
  831. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
  832. reset_scsi_bus(acb);
  833. udelay(500);
  834. /* We may be in serious trouble. Wait some seconds */
  835. acb->last_reset =
  836. jiffies + 3 * HZ / 2 +
  837. HZ * acb->eeprom.delay_time;
  838. /*
  839. * re-enable interrupt
  840. */
  841. /* Clear SCSI FIFO */
  842. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
  843. clear_fifo(acb, "eh_bus_reset");
  844. /* Delete pending IRQ */
  845. DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
  846. set_basic_config(acb);
  847. reset_dev_param(acb);
  848. doing_srb_done(acb, DID_RESET, cmd, 0);
  849. acb->active_dcb = NULL;
  850. acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE ,RESET_DEV */
  851. waiting_process_next(acb);
  852. return SUCCESS;
  853. }
  854. static int dc395x_eh_bus_reset(struct scsi_cmnd *cmd)
  855. {
  856. int rc;
  857. spin_lock_irq(cmd->device->host->host_lock);
  858. rc = __dc395x_eh_bus_reset(cmd);
  859. spin_unlock_irq(cmd->device->host->host_lock);
  860. return rc;
  861. }
  862. /*
  863. * abort an errant SCSI command
  864. * @cmd - command to be aborted
  865. * Returns: SUCCESS (0x2002) on success, else FAILED (0x2003).
  866. */
  867. static int dc395x_eh_abort(struct scsi_cmnd *cmd)
  868. {
  869. /*
  870. * Look into our command queues: If it has not been sent already,
  871. * we remove it and return success. Otherwise fail.
  872. */
  873. struct AdapterCtlBlk *acb =
  874. (struct AdapterCtlBlk *)cmd->device->host->hostdata;
  875. struct DeviceCtlBlk *dcb;
  876. struct ScsiReqBlk *srb;
  877. dcb = find_dcb(acb, cmd->device->id, cmd->device->lun);
  878. if (!dcb)
  879. return FAILED;
  880. srb = find_cmd(cmd, &dcb->srb_waiting_list);
  881. if (srb) {
  882. list_del(&srb->list);
  883. pci_unmap_srb_sense(acb, srb);
  884. pci_unmap_srb(acb, srb);
  885. free_tag(dcb, srb);
  886. list_add_tail(&srb->list, &acb->srb_free_list);
  887. set_host_byte(cmd, DID_ABORT);
  888. return SUCCESS;
  889. }
  890. srb = find_cmd(cmd, &dcb->srb_going_list);
  891. if (srb) {
  892. /* XXX: Should abort the command here */
  893. }
  894. return FAILED;
  895. }
  896. /* SDTR */
  897. static void build_sdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  898. struct ScsiReqBlk *srb)
  899. {
  900. u8 *ptr = srb->msgout_buf + srb->msg_count;
  901. if (srb->msg_count > 1) {
  902. return;
  903. }
  904. if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO)) {
  905. dcb->sync_offset = 0;
  906. dcb->min_nego_period = 200 >> 2;
  907. } else if (dcb->sync_offset == 0)
  908. dcb->sync_offset = SYNC_NEGO_OFFSET;
  909. srb->msg_count += spi_populate_sync_msg(ptr, dcb->min_nego_period,
  910. dcb->sync_offset);
  911. srb->state |= SRB_DO_SYNC_NEGO;
  912. }
  913. /* WDTR */
  914. static void build_wdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  915. struct ScsiReqBlk *srb)
  916. {
  917. u8 wide = ((dcb->dev_mode & NTC_DO_WIDE_NEGO) &
  918. (acb->config & HCC_WIDE_CARD)) ? 1 : 0;
  919. u8 *ptr = srb->msgout_buf + srb->msg_count;
  920. if (srb->msg_count > 1)
  921. return;
  922. srb->msg_count += spi_populate_width_msg(ptr, wide);
  923. srb->state |= SRB_DO_WIDE_NEGO;
  924. }
  925. #if 0
  926. /* Timer to work around chip flaw: When selecting and the bus is
  927. * busy, we sometimes miss a Selection timeout IRQ */
  928. void selection_timeout_missed(unsigned long ptr);
  929. /* Sets the timer to wake us up */
  930. static void selto_timer(struct AdapterCtlBlk *acb)
  931. {
  932. if (timer_pending(&acb->selto_timer))
  933. return;
  934. acb->selto_timer.function = selection_timeout_missed;
  935. acb->selto_timer.data = (unsigned long) acb;
  936. if (time_before
  937. (jiffies + HZ, acb->last_reset + HZ / 2))
  938. acb->selto_timer.expires =
  939. acb->last_reset + HZ / 2 + 1;
  940. else
  941. acb->selto_timer.expires = jiffies + HZ + 1;
  942. add_timer(&acb->selto_timer);
  943. }
  944. void selection_timeout_missed(unsigned long ptr)
  945. {
  946. unsigned long flags;
  947. struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)ptr;
  948. struct ScsiReqBlk *srb;
  949. if (!acb->active_dcb || !acb->active_dcb->active_srb)
  950. return;
  951. DC395x_LOCK_IO(acb->scsi_host, flags);
  952. srb = acb->active_dcb->active_srb;
  953. disconnect(acb);
  954. DC395x_UNLOCK_IO(acb->scsi_host, flags);
  955. }
  956. #endif
  957. static u8 start_scsi(struct AdapterCtlBlk* acb, struct DeviceCtlBlk* dcb,
  958. struct ScsiReqBlk* srb)
  959. {
  960. u16 __maybe_unused s_stat2, return_code;
  961. u8 s_stat, scsicommand, i, identify_message;
  962. u8 *ptr;
  963. srb->tag_number = TAG_NONE; /* acb->tag_max_num: had error read in eeprom */
  964. s_stat = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
  965. s_stat2 = 0;
  966. s_stat2 = DC395x_read16(acb, TRM_S1040_SCSI_STATUS);
  967. #if 1
  968. if (s_stat & 0x20 /* s_stat2 & 0x02000 */ ) {
  969. /*
  970. * Try anyway?
  971. *
  972. * We could, BUT: Sometimes the TRM_S1040 misses to produce a Selection
  973. * Timeout, a Disconnect or a Reselection IRQ, so we would be screwed!
  974. * (This is likely to be a bug in the hardware. Obviously, most people
  975. * only have one initiator per SCSI bus.)
  976. * Instead let this fail and have the timer make sure the command is
  977. * tried again after a short time
  978. */
  979. /*selto_timer (acb); */
  980. return 1;
  981. }
  982. #endif
  983. if (acb->active_dcb)
  984. return 1;
  985. if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT)
  986. return 1;
  987. /* Allow starting of SCSI commands half a second before we allow the mid-level
  988. * to queue them again after a reset */
  989. if (time_before(jiffies, acb->last_reset - HZ / 2))
  990. return 1;
  991. /* Flush FIFO */
  992. clear_fifo(acb, "start_scsi");
  993. DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id);
  994. DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id);
  995. DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period);
  996. DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset);
  997. srb->scsi_phase = PH_BUS_FREE; /* initial phase */
  998. identify_message = dcb->identify_msg;
  999. /*DC395x_TRM_write8(TRM_S1040_SCSI_IDMSG, identify_message); */
  1000. /* Don't allow disconnection for AUTO_REQSENSE: Cont.All.Cond.! */
  1001. if (srb->flag & AUTO_REQSENSE)
  1002. identify_message &= 0xBF;
  1003. if (((srb->cmd->cmnd[0] == INQUIRY)
  1004. || (srb->cmd->cmnd[0] == REQUEST_SENSE)
  1005. || (srb->flag & AUTO_REQSENSE))
  1006. && (((dcb->sync_mode & WIDE_NEGO_ENABLE)
  1007. && !(dcb->sync_mode & WIDE_NEGO_DONE))
  1008. || ((dcb->sync_mode & SYNC_NEGO_ENABLE)
  1009. && !(dcb->sync_mode & SYNC_NEGO_DONE)))
  1010. && (dcb->target_lun == 0)) {
  1011. srb->msgout_buf[0] = identify_message;
  1012. srb->msg_count = 1;
  1013. scsicommand = SCMD_SEL_ATNSTOP;
  1014. srb->state = SRB_MSGOUT;
  1015. #ifndef SYNC_FIRST
  1016. if (dcb->sync_mode & WIDE_NEGO_ENABLE
  1017. && dcb->inquiry7 & SCSI_INQ_WBUS16) {
  1018. build_wdtr(acb, dcb, srb);
  1019. goto no_cmd;
  1020. }
  1021. #endif
  1022. if (dcb->sync_mode & SYNC_NEGO_ENABLE
  1023. && dcb->inquiry7 & SCSI_INQ_SYNC) {
  1024. build_sdtr(acb, dcb, srb);
  1025. goto no_cmd;
  1026. }
  1027. if (dcb->sync_mode & WIDE_NEGO_ENABLE
  1028. && dcb->inquiry7 & SCSI_INQ_WBUS16) {
  1029. build_wdtr(acb, dcb, srb);
  1030. goto no_cmd;
  1031. }
  1032. srb->msg_count = 0;
  1033. }
  1034. /* Send identify message */
  1035. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, identify_message);
  1036. scsicommand = SCMD_SEL_ATN;
  1037. srb->state = SRB_START_;
  1038. #ifndef DC395x_NO_TAGQ
  1039. if ((dcb->sync_mode & EN_TAG_QUEUEING)
  1040. && (identify_message & 0xC0)) {
  1041. /* Send Tag message */
  1042. u32 tag_mask = 1;
  1043. u8 tag_number = 0;
  1044. while (tag_mask & dcb->tag_mask
  1045. && tag_number < dcb->max_command) {
  1046. tag_mask = tag_mask << 1;
  1047. tag_number++;
  1048. }
  1049. if (tag_number >= dcb->max_command) {
  1050. srb->state = SRB_READY;
  1051. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
  1052. DO_HWRESELECT);
  1053. return 1;
  1054. }
  1055. /* Send Tag id */
  1056. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SIMPLE_QUEUE_TAG);
  1057. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, tag_number);
  1058. dcb->tag_mask |= tag_mask;
  1059. srb->tag_number = tag_number;
  1060. scsicommand = SCMD_SEL_ATN3;
  1061. srb->state = SRB_START_;
  1062. }
  1063. #endif
  1064. /*polling:*/
  1065. /* Send CDB ..command block ......... */
  1066. if (srb->flag & AUTO_REQSENSE) {
  1067. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
  1068. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5));
  1069. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1070. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1071. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SCSI_SENSE_BUFFERSIZE);
  1072. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1073. } else {
  1074. ptr = (u8 *)srb->cmd->cmnd;
  1075. for (i = 0; i < srb->cmd->cmd_len; i++)
  1076. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++);
  1077. }
  1078. no_cmd:
  1079. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
  1080. DO_HWRESELECT | DO_DATALATCH);
  1081. if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
  1082. /*
  1083. * If start_scsi return 1:
  1084. * we caught an interrupt (must be reset or reselection ... )
  1085. * : Let's process it first!
  1086. */
  1087. srb->state = SRB_READY;
  1088. free_tag(dcb, srb);
  1089. srb->msg_count = 0;
  1090. return_code = 1;
  1091. /* This IRQ should NOT get lost, as we did not acknowledge it */
  1092. } else {
  1093. /*
  1094. * If start_scsi returns 0:
  1095. * we know that the SCSI processor is free
  1096. */
  1097. srb->scsi_phase = PH_BUS_FREE; /* initial phase */
  1098. dcb->active_srb = srb;
  1099. acb->active_dcb = dcb;
  1100. return_code = 0;
  1101. /* it's important for atn stop */
  1102. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
  1103. DO_DATALATCH | DO_HWRESELECT);
  1104. /* SCSI command */
  1105. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, scsicommand);
  1106. }
  1107. return return_code;
  1108. }
  1109. #define DC395x_ENABLE_MSGOUT \
  1110. DC395x_write16 (acb, TRM_S1040_SCSI_CONTROL, DO_SETATN); \
  1111. srb->state |= SRB_MSGOUT
  1112. /* abort command */
  1113. static inline void enable_msgout_abort(struct AdapterCtlBlk *acb,
  1114. struct ScsiReqBlk *srb)
  1115. {
  1116. srb->msgout_buf[0] = ABORT;
  1117. srb->msg_count = 1;
  1118. DC395x_ENABLE_MSGOUT;
  1119. srb->state &= ~SRB_MSGIN;
  1120. srb->state |= SRB_MSGOUT;
  1121. }
  1122. /**
  1123. * dc395x_handle_interrupt - Handle an interrupt that has been confirmed to
  1124. * have been triggered for this card.
  1125. *
  1126. * @acb: a pointer to the adpter control block
  1127. * @scsi_status: the status return when we checked the card
  1128. **/
  1129. static void dc395x_handle_interrupt(struct AdapterCtlBlk *acb,
  1130. u16 scsi_status)
  1131. {
  1132. struct DeviceCtlBlk *dcb;
  1133. struct ScsiReqBlk *srb;
  1134. u16 phase;
  1135. u8 scsi_intstatus;
  1136. unsigned long flags;
  1137. void (*dc395x_statev)(struct AdapterCtlBlk *, struct ScsiReqBlk *,
  1138. u16 *);
  1139. DC395x_LOCK_IO(acb->scsi_host, flags);
  1140. /* This acknowledges the IRQ */
  1141. scsi_intstatus = DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
  1142. if (timer_pending(&acb->selto_timer))
  1143. timer_delete(&acb->selto_timer);
  1144. if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
  1145. disconnect(acb); /* bus free interrupt */
  1146. goto out_unlock;
  1147. }
  1148. if (scsi_intstatus & INT_RESELECTED) {
  1149. reselect(acb);
  1150. goto out_unlock;
  1151. }
  1152. if (scsi_intstatus & INT_SELECT)
  1153. goto out_unlock;
  1154. if (scsi_intstatus & INT_SCSIRESET) {
  1155. scsi_reset_detect(acb);
  1156. goto out_unlock;
  1157. }
  1158. if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
  1159. dcb = acb->active_dcb;
  1160. if (!dcb)
  1161. goto out_unlock;
  1162. srb = dcb->active_srb;
  1163. if (dcb->flag & ABORT_DEV_)
  1164. enable_msgout_abort(acb, srb);
  1165. /* software sequential machine */
  1166. phase = (u16)srb->scsi_phase;
  1167. /*
  1168. * 62037 or 62137
  1169. * call dc395x_scsi_phase0[]... "phase entry"
  1170. * handle every phase before start transfer
  1171. */
  1172. /* data_out_phase0, phase:0 */
  1173. /* data_in_phase0, phase:1 */
  1174. /* command_phase0, phase:2 */
  1175. /* status_phase0, phase:3 */
  1176. /* nop0, phase:4 PH_BUS_FREE .. initial phase */
  1177. /* nop0, phase:5 PH_BUS_FREE .. initial phase */
  1178. /* msgout_phase0, phase:6 */
  1179. /* msgin_phase0, phase:7 */
  1180. dc395x_statev = dc395x_scsi_phase0[phase];
  1181. dc395x_statev(acb, srb, &scsi_status);
  1182. /*
  1183. * if there were any exception occurred scsi_status
  1184. * will be modify to bus free phase new scsi_status
  1185. * transfer out from ... previous dc395x_statev
  1186. */
  1187. srb->scsi_phase = scsi_status & PHASEMASK;
  1188. phase = (u16)scsi_status & PHASEMASK;
  1189. /*
  1190. * call dc395x_scsi_phase1[]... "phase entry" handle
  1191. * every phase to do transfer
  1192. */
  1193. /* data_out_phase1, phase:0 */
  1194. /* data_in_phase1, phase:1 */
  1195. /* command_phase1, phase:2 */
  1196. /* status_phase1, phase:3 */
  1197. /* nop1, phase:4 PH_BUS_FREE .. initial phase */
  1198. /* nop1, phase:5 PH_BUS_FREE .. initial phase */
  1199. /* msgout_phase1, phase:6 */
  1200. /* msgin_phase1, phase:7 */
  1201. dc395x_statev = dc395x_scsi_phase1[phase];
  1202. dc395x_statev(acb, srb, &scsi_status);
  1203. }
  1204. out_unlock:
  1205. DC395x_UNLOCK_IO(acb->scsi_host, flags);
  1206. }
  1207. static irqreturn_t dc395x_interrupt(int irq, void *dev_id)
  1208. {
  1209. struct AdapterCtlBlk *acb = dev_id;
  1210. u16 scsi_status;
  1211. u8 dma_status;
  1212. irqreturn_t handled = IRQ_NONE;
  1213. /*
  1214. * Check for pending interrupt
  1215. */
  1216. scsi_status = DC395x_read16(acb, TRM_S1040_SCSI_STATUS);
  1217. dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
  1218. if (scsi_status & SCSIINTERRUPT) {
  1219. /* interrupt pending - let's process it! */
  1220. dc395x_handle_interrupt(acb, scsi_status);
  1221. handled = IRQ_HANDLED;
  1222. }
  1223. else if (dma_status & 0x20) {
  1224. /* Error from the DMA engine */
  1225. #if 0
  1226. if (acb->active_dcb) {
  1227. acb->active_dcb-> flag |= ABORT_DEV_;
  1228. if (acb->active_dcb->active_srb)
  1229. enable_msgout_abort(acb, acb->active_dcb->active_srb);
  1230. }
  1231. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO);
  1232. #else
  1233. acb = NULL;
  1234. #endif
  1235. handled = IRQ_HANDLED;
  1236. }
  1237. return handled;
  1238. }
  1239. static void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1240. u16 *pscsi_status)
  1241. {
  1242. if (srb->state & (SRB_UNEXPECT_RESEL + SRB_ABORT_SENT))
  1243. *pscsi_status = PH_BUS_FREE; /*.. initial phase */
  1244. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  1245. srb->state &= ~SRB_MSGOUT;
  1246. }
  1247. static void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1248. u16 *pscsi_status)
  1249. {
  1250. u16 i;
  1251. u8 *ptr;
  1252. clear_fifo(acb, "msgout_phase1");
  1253. if (!(srb->state & SRB_MSGOUT))
  1254. srb->state |= SRB_MSGOUT;
  1255. if (!srb->msg_count) {
  1256. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, NOP);
  1257. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
  1258. /* it's important for atn stop */
  1259. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
  1260. return;
  1261. }
  1262. ptr = (u8 *)srb->msgout_buf;
  1263. for (i = 0; i < srb->msg_count; i++)
  1264. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++);
  1265. srb->msg_count = 0;
  1266. if (srb->msgout_buf[0] == ABORT_TASK_SET)
  1267. srb->state = SRB_ABORT_SENT;
  1268. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
  1269. }
  1270. static void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1271. u16 *pscsi_status)
  1272. {
  1273. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
  1274. }
  1275. static void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1276. u16 *pscsi_status)
  1277. {
  1278. struct DeviceCtlBlk *dcb;
  1279. u8 *ptr;
  1280. u16 i;
  1281. clear_fifo(acb, "command_phase1");
  1282. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRATN);
  1283. if (!(srb->flag & AUTO_REQSENSE)) {
  1284. ptr = (u8 *)srb->cmd->cmnd;
  1285. for (i = 0; i < srb->cmd->cmd_len; i++) {
  1286. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr);
  1287. ptr++;
  1288. }
  1289. } else {
  1290. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
  1291. dcb = acb->active_dcb;
  1292. /* target id */
  1293. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5));
  1294. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1295. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1296. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SCSI_SENSE_BUFFERSIZE);
  1297. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1298. }
  1299. srb->state |= SRB_COMMAND;
  1300. /* it's important for atn stop */
  1301. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
  1302. /* SCSI command */
  1303. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
  1304. }
  1305. /*
  1306. * Compute the next Scatter Gather list index and adjust its length
  1307. * and address if necessary
  1308. */
  1309. static void sg_update_list(struct ScsiReqBlk *srb, u32 left)
  1310. {
  1311. u8 idx;
  1312. u32 xferred = srb->total_xfer_length - left; /* bytes transferred */
  1313. struct SGentry *psge = srb->segment_x + srb->sg_index;
  1314. if (xferred == 0) {
  1315. /* nothing to update since we did not transfer any data */
  1316. return;
  1317. }
  1318. srb->total_xfer_length = left; /* update remaining count */
  1319. for (idx = srb->sg_index; idx < srb->sg_count; idx++) {
  1320. if (xferred >= psge->length) {
  1321. /* Complete SG entries done */
  1322. xferred -= psge->length;
  1323. } else {
  1324. /* Partial SG entry done */
  1325. dma_sync_single_for_cpu(&srb->dcb->acb->dev->dev,
  1326. srb->sg_bus_addr, SEGMENTX_LEN,
  1327. DMA_TO_DEVICE);
  1328. psge->length -= xferred;
  1329. psge->address += xferred;
  1330. srb->sg_index = idx;
  1331. dma_sync_single_for_device(&srb->dcb->acb->dev->dev,
  1332. srb->sg_bus_addr, SEGMENTX_LEN,
  1333. DMA_TO_DEVICE);
  1334. break;
  1335. }
  1336. psge++;
  1337. }
  1338. }
  1339. /*
  1340. * We have transferred a single byte (PIO mode?) and need to update
  1341. * the count of bytes remaining (total_xfer_length) and update the sg
  1342. * entry to either point to next byte in the current sg entry, or of
  1343. * already at the end to point to the start of the next sg entry
  1344. */
  1345. static void sg_subtract_one(struct ScsiReqBlk *srb)
  1346. {
  1347. sg_update_list(srb, srb->total_xfer_length - 1);
  1348. }
  1349. /*
  1350. * cleanup_after_transfer
  1351. *
  1352. * Makes sure, DMA and SCSI engine are empty, after the transfer has finished
  1353. * KG: Currently called from StatusPhase1 ()
  1354. * Should probably also be called from other places
  1355. * Best might be to call it in DataXXPhase0, if new phase will differ
  1356. */
  1357. static void cleanup_after_transfer(struct AdapterCtlBlk *acb,
  1358. struct ScsiReqBlk *srb)
  1359. {
  1360. /*DC395x_write8 (TRM_S1040_DMA_STATUS, FORCEDMACOMP); */
  1361. if (DC395x_read16(acb, TRM_S1040_DMA_COMMAND) & 0x0001) { /* read */
  1362. if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
  1363. clear_fifo(acb, "cleanup/in");
  1364. if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80))
  1365. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
  1366. } else { /* write */
  1367. if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80))
  1368. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
  1369. if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
  1370. clear_fifo(acb, "cleanup/out");
  1371. }
  1372. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
  1373. }
  1374. /*
  1375. * Those no of bytes will be transferred w/ PIO through the SCSI FIFO
  1376. * Seems to be needed for unknown reasons; could be a hardware bug :-(
  1377. */
  1378. #define DC395x_LASTPIO 4
  1379. static void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1380. u16 *pscsi_status)
  1381. {
  1382. struct DeviceCtlBlk *dcb = srb->dcb;
  1383. u16 scsi_status = *pscsi_status;
  1384. u32 d_left_counter = 0;
  1385. /*
  1386. * KG: We need to drain the buffers before we draw any conclusions!
  1387. * This means telling the DMA to push the rest into SCSI, telling
  1388. * SCSI to push the rest to the bus.
  1389. * However, the device might have been the one to stop us (phase
  1390. * change), and the data in transit just needs to be accounted so
  1391. * it can be retransmitted.)
  1392. */
  1393. /*
  1394. * KG: Stop DMA engine pushing more data into the SCSI FIFO
  1395. * If we need more data, the DMA SG list will be freshly set up, anyway
  1396. */
  1397. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO);
  1398. if (!(srb->state & SRB_XFERPAD)) {
  1399. if (scsi_status & PARITYERROR)
  1400. srb->status |= PARITY_ERROR;
  1401. /*
  1402. * KG: Right, we can't just rely on the SCSI_COUNTER, because this
  1403. * is the no of bytes it got from the DMA engine not the no it
  1404. * transferred successfully to the device. (And the difference could
  1405. * be as much as the FIFO size, I guess ...)
  1406. */
  1407. if (!(scsi_status & SCSIXFERDONE)) {
  1408. /*
  1409. * when data transfer from DMA FIFO to SCSI FIFO
  1410. * if there was some data left in SCSI FIFO
  1411. */
  1412. d_left_counter =
  1413. (u32)(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
  1414. 0x1F);
  1415. if (dcb->sync_period & WIDE_SYNC)
  1416. d_left_counter <<= 1;
  1417. }
  1418. /*
  1419. * calculate all the residue data that not yet tranfered
  1420. * SCSI transfer counter + left in SCSI FIFO data
  1421. *
  1422. * .....TRM_S1040_SCSI_COUNTER (24bits)
  1423. * The counter always decrement by one for every SCSI byte transfer.
  1424. * .....TRM_S1040_SCSI_FIFOCNT ( 5bits)
  1425. * The counter is SCSI FIFO offset counter (in units of bytes or! words)
  1426. */
  1427. if (srb->total_xfer_length > DC395x_LASTPIO)
  1428. d_left_counter +=
  1429. DC395x_read32(acb, TRM_S1040_SCSI_COUNTER);
  1430. /* Is this a good idea? */
  1431. /*clear_fifo(acb, "DOP1"); */
  1432. /* KG: What is this supposed to be useful for? WIDE padding stuff? */
  1433. if (d_left_counter == 1 && dcb->sync_period & WIDE_SYNC
  1434. && scsi_bufflen(srb->cmd) % 2) {
  1435. d_left_counter = 0;
  1436. }
  1437. /*
  1438. * KG: Oops again. Same thinko as above: The SCSI might have been
  1439. * faster than the DMA engine, so that it ran out of data.
  1440. * In that case, we have to do just nothing!
  1441. * But: Why the interrupt: No phase change. No XFERCNT_2_ZERO. Or?
  1442. */
  1443. /*
  1444. * KG: This is nonsense: We have been WRITING data to the bus
  1445. * If the SCSI engine has no bytes left, how should the DMA engine?
  1446. */
  1447. if (d_left_counter == 0) {
  1448. srb->total_xfer_length = 0;
  1449. } else {
  1450. /*
  1451. * if transfer not yet complete
  1452. * there were some data residue in SCSI FIFO or
  1453. * SCSI transfer counter not empty
  1454. */
  1455. long oldxferred =
  1456. srb->total_xfer_length - d_left_counter;
  1457. const int diff =
  1458. (dcb->sync_period & WIDE_SYNC) ? 2 : 1;
  1459. sg_update_list(srb, d_left_counter);
  1460. /* KG: Most ugly hack! Apparently, this works around a chip bug */
  1461. if ((srb->segment_x[srb->sg_index].length ==
  1462. diff && scsi_sg_count(srb->cmd))
  1463. || ((oldxferred & ~PAGE_MASK) ==
  1464. (PAGE_SIZE - diff))
  1465. ) {
  1466. d_left_counter =
  1467. srb->total_xfer_length - diff;
  1468. sg_update_list(srb, d_left_counter);
  1469. /*srb->total_xfer_length -= diff; */
  1470. /*srb->virt_addr += diff; */
  1471. /*if (srb->cmd->use_sg) */
  1472. /* srb->sg_index++; */
  1473. }
  1474. }
  1475. }
  1476. if ((*pscsi_status & PHASEMASK) != PH_DATA_OUT)
  1477. cleanup_after_transfer(acb, srb);
  1478. }
  1479. static void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1480. u16 *pscsi_status)
  1481. {
  1482. clear_fifo(acb, "data_out_phase1");
  1483. /* do prepare before transfer when data out phase */
  1484. data_io_transfer(acb, srb, XFERDATAOUT);
  1485. }
  1486. static void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1487. u16 *pscsi_status)
  1488. {
  1489. u16 scsi_status = *pscsi_status;
  1490. /*
  1491. * KG: DataIn is much more tricky than DataOut. When the device is finished
  1492. * and switches to another phase, the SCSI engine should be finished too.
  1493. * But: There might still be bytes left in its FIFO to be fetched by the DMA
  1494. * engine and transferred to memory.
  1495. * We should wait for the FIFOs to be emptied by that (is there any way to
  1496. * enforce this?) and then stop the DMA engine, because it might think, that
  1497. * there are more bytes to follow. Yes, the device might disconnect prior to
  1498. * having all bytes transferred!
  1499. * Also we should make sure that all data from the DMA engine buffer's really
  1500. * made its way to the system memory! Some documentation on this would not
  1501. * seem to be a bad idea, actually.
  1502. */
  1503. if (!(srb->state & SRB_XFERPAD)) {
  1504. u32 d_left_counter;
  1505. unsigned int sc, fc;
  1506. if (scsi_status & PARITYERROR) {
  1507. srb->status |= PARITY_ERROR;
  1508. }
  1509. /*
  1510. * KG: We should wait for the DMA FIFO to be empty ...
  1511. * but: it would be better to wait first for the SCSI FIFO and then the
  1512. * the DMA FIFO to become empty? How do we know, that the device not already
  1513. * sent data to the FIFO in a MsgIn phase, eg.?
  1514. */
  1515. if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80)) {
  1516. #if 0
  1517. int ctr = 6000000;
  1518. /*DC395x_write8 (TRM_S1040_DMA_CONTROL, STOPDMAXFER); */
  1519. /*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 7); */
  1520. /*DC395x_write8 (TRM_S1040_SCSI_COMMAND, SCMD_DMA_IN); */
  1521. while (!
  1522. (DC395x_read16(acb, TRM_S1040_DMA_FIFOSTAT) &
  1523. 0x80) && --ctr);
  1524. /*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 0); */
  1525. #endif
  1526. }
  1527. /* Now: Check remainig data: The SCSI counters should tell us ... */
  1528. sc = DC395x_read32(acb, TRM_S1040_SCSI_COUNTER);
  1529. fc = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
  1530. d_left_counter = sc + ((fc & 0x1f)
  1531. << ((srb->dcb->sync_period & WIDE_SYNC) ? 1 :
  1532. 0));
  1533. #if DC395x_LASTPIO
  1534. /* KG: Less than or equal to 4 bytes can not be transferred via DMA, it seems. */
  1535. if (d_left_counter
  1536. && srb->total_xfer_length <= DC395x_LASTPIO) {
  1537. size_t left_io = srb->total_xfer_length;
  1538. /*u32 addr = (srb->segment_x[srb->sg_index].address); */
  1539. /*sg_update_list (srb, d_left_counter); */
  1540. if (srb->dcb->sync_period & WIDE_SYNC)
  1541. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
  1542. CFG2_WIDEFIFO);
  1543. while (left_io) {
  1544. unsigned char *virt, *base = NULL;
  1545. unsigned long flags = 0;
  1546. size_t len = left_io;
  1547. size_t offset = srb->request_length - left_io;
  1548. local_irq_save(flags);
  1549. /* Assumption: it's inside one page as it's at most 4 bytes and
  1550. I just assume it's on a 4-byte boundary */
  1551. base = scsi_kmap_atomic_sg(scsi_sglist(srb->cmd),
  1552. srb->sg_count, &offset, &len);
  1553. virt = base + offset;
  1554. left_io -= len;
  1555. while (len) {
  1556. u8 byte;
  1557. byte = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1558. *virt++ = byte;
  1559. d_left_counter--;
  1560. sg_subtract_one(srb);
  1561. len--;
  1562. fc = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
  1563. if (fc == 0x40) {
  1564. left_io = 0;
  1565. break;
  1566. }
  1567. }
  1568. WARN_ON((fc != 0x40) == !d_left_counter);
  1569. if (fc == 0x40 && (srb->dcb->sync_period & WIDE_SYNC)) {
  1570. /* Read the last byte ... */
  1571. if (srb->total_xfer_length > 0) {
  1572. u8 byte = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1573. *virt++ = byte;
  1574. srb->total_xfer_length--;
  1575. }
  1576. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
  1577. }
  1578. scsi_kunmap_atomic_sg(base);
  1579. local_irq_restore(flags);
  1580. }
  1581. /*srb->total_xfer_length = 0; */
  1582. }
  1583. #endif /* DC395x_LASTPIO */
  1584. #if 0
  1585. /*
  1586. * KG: This was in DATAOUT. Does it also belong here?
  1587. * Nobody seems to know what counter and fifo_cnt count exactly ...
  1588. */
  1589. if (!(scsi_status & SCSIXFERDONE)) {
  1590. /*
  1591. * when data transfer from DMA FIFO to SCSI FIFO
  1592. * if there was some data left in SCSI FIFO
  1593. */
  1594. d_left_counter =
  1595. (u32)(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
  1596. 0x1F);
  1597. if (srb->dcb->sync_period & WIDE_SYNC)
  1598. d_left_counter <<= 1;
  1599. /*
  1600. * if WIDE scsi SCSI FIFOCNT unit is word !!!
  1601. * so need to *= 2
  1602. * KG: Seems to be correct ...
  1603. */
  1604. }
  1605. #endif
  1606. /* KG: This should not be needed any more! */
  1607. if (d_left_counter == 0
  1608. || (scsi_status & SCSIXFERCNT_2_ZERO)) {
  1609. #if 0
  1610. int ctr = 6000000;
  1611. u8 TempDMAstatus;
  1612. do {
  1613. TempDMAstatus =
  1614. DC395x_read8(acb, TRM_S1040_DMA_STATUS);
  1615. } while (!(TempDMAstatus & DMAXFERCOMP) && --ctr);
  1616. srb->total_xfer_length = 0;
  1617. #endif
  1618. srb->total_xfer_length = d_left_counter;
  1619. } else { /* phase changed */
  1620. /*
  1621. * parsing the case:
  1622. * when a transfer not yet complete
  1623. * but be disconnected by target
  1624. * if transfer not yet complete
  1625. * there were some data residue in SCSI FIFO or
  1626. * SCSI transfer counter not empty
  1627. */
  1628. sg_update_list(srb, d_left_counter);
  1629. }
  1630. }
  1631. /* KG: The target may decide to disconnect: Empty FIFO before! */
  1632. if ((*pscsi_status & PHASEMASK) != PH_DATA_IN)
  1633. cleanup_after_transfer(acb, srb);
  1634. }
  1635. static void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1636. u16 *pscsi_status)
  1637. {
  1638. data_io_transfer(acb, srb, XFERDATAIN);
  1639. }
  1640. static void data_io_transfer(struct AdapterCtlBlk *acb,
  1641. struct ScsiReqBlk *srb, u16 io_dir)
  1642. {
  1643. struct DeviceCtlBlk *dcb = srb->dcb;
  1644. u8 bval;
  1645. if (srb->sg_index >= srb->sg_count) {
  1646. /* can't happen? out of bounds error */
  1647. return;
  1648. }
  1649. if (srb->total_xfer_length > DC395x_LASTPIO) {
  1650. u8 dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
  1651. /*
  1652. * KG: What should we do: Use SCSI Cmd 0x90/0x92?
  1653. * Maybe, even ABORTXFER would be appropriate
  1654. */
  1655. if (dma_status & XFERPENDING) {
  1656. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
  1657. }
  1658. /* clear_fifo(acb, "IO"); */
  1659. /*
  1660. * load what physical address of Scatter/Gather list table
  1661. * want to be transfer
  1662. */
  1663. srb->state |= SRB_DATA_XFER;
  1664. DC395x_write32(acb, TRM_S1040_DMA_XHIGHADDR, 0);
  1665. if (scsi_sg_count(srb->cmd)) { /* with S/G */
  1666. io_dir |= DMACMD_SG;
  1667. DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR,
  1668. srb->sg_bus_addr +
  1669. sizeof(struct SGentry) *
  1670. srb->sg_index);
  1671. /* load how many bytes in the sg list table */
  1672. DC395x_write32(acb, TRM_S1040_DMA_XCNT,
  1673. ((u32)(srb->sg_count -
  1674. srb->sg_index) << 3));
  1675. } else { /* without S/G */
  1676. io_dir &= ~DMACMD_SG;
  1677. DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR,
  1678. srb->segment_x[0].address);
  1679. DC395x_write32(acb, TRM_S1040_DMA_XCNT,
  1680. srb->segment_x[0].length);
  1681. }
  1682. /* load total transfer length (24bits) max value 16Mbyte */
  1683. DC395x_write32(acb, TRM_S1040_SCSI_COUNTER,
  1684. srb->total_xfer_length);
  1685. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  1686. if (io_dir & DMACMD_DIR) { /* read */
  1687. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
  1688. SCMD_DMA_IN);
  1689. DC395x_write16(acb, TRM_S1040_DMA_COMMAND, io_dir);
  1690. } else {
  1691. DC395x_write16(acb, TRM_S1040_DMA_COMMAND, io_dir);
  1692. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
  1693. SCMD_DMA_OUT);
  1694. }
  1695. }
  1696. #if DC395x_LASTPIO
  1697. else if (srb->total_xfer_length > 0) { /* The last four bytes: Do PIO */
  1698. /*
  1699. * load what physical address of Scatter/Gather list table
  1700. * want to be transfer
  1701. */
  1702. srb->state |= SRB_DATA_XFER;
  1703. /* load total transfer length (24bits) max value 16Mbyte */
  1704. DC395x_write32(acb, TRM_S1040_SCSI_COUNTER,
  1705. srb->total_xfer_length);
  1706. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  1707. if (io_dir & DMACMD_DIR) { /* read */
  1708. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
  1709. SCMD_FIFO_IN);
  1710. } else { /* write */
  1711. int ln = srb->total_xfer_length;
  1712. size_t left_io = srb->total_xfer_length;
  1713. if (srb->dcb->sync_period & WIDE_SYNC)
  1714. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
  1715. CFG2_WIDEFIFO);
  1716. while (left_io) {
  1717. unsigned char *virt, *base = NULL;
  1718. unsigned long flags = 0;
  1719. size_t len = left_io;
  1720. size_t offset = srb->request_length - left_io;
  1721. local_irq_save(flags);
  1722. /* Again, max 4 bytes */
  1723. base = scsi_kmap_atomic_sg(scsi_sglist(srb->cmd),
  1724. srb->sg_count, &offset, &len);
  1725. virt = base + offset;
  1726. left_io -= len;
  1727. while (len--) {
  1728. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *virt++);
  1729. sg_subtract_one(srb);
  1730. }
  1731. scsi_kunmap_atomic_sg(base);
  1732. local_irq_restore(flags);
  1733. }
  1734. if (srb->dcb->sync_period & WIDE_SYNC) {
  1735. if (ln % 2) {
  1736. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
  1737. }
  1738. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
  1739. }
  1740. /*DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, ln); */
  1741. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
  1742. SCMD_FIFO_OUT);
  1743. }
  1744. }
  1745. #endif /* DC395x_LASTPIO */
  1746. else { /* xfer pad */
  1747. if (srb->sg_count) {
  1748. srb->adapter_status = H_OVER_UNDER_RUN;
  1749. srb->status |= OVER_RUN;
  1750. }
  1751. /*
  1752. * KG: despite the fact that we are using 16 bits I/O ops
  1753. * the SCSI FIFO is only 8 bits according to the docs
  1754. * (we can set bit 1 in 0x8f to serialize FIFO access ...)
  1755. */
  1756. if (dcb->sync_period & WIDE_SYNC) {
  1757. DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 2);
  1758. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
  1759. CFG2_WIDEFIFO);
  1760. if (io_dir & DMACMD_DIR) {
  1761. DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1762. DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1763. } else {
  1764. /* Danger, Robinson: If you find KGs
  1765. * scattered over the wide disk, the driver
  1766. * or chip is to blame :-( */
  1767. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'K');
  1768. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'G');
  1769. }
  1770. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
  1771. } else {
  1772. DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1);
  1773. /* Danger, Robinson: If you find a collection of Ks on your disk
  1774. * something broke :-( */
  1775. if (io_dir & DMACMD_DIR)
  1776. DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1777. else
  1778. DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'K');
  1779. }
  1780. srb->state |= SRB_XFERPAD;
  1781. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  1782. /* SCSI command */
  1783. bval = (io_dir & DMACMD_DIR) ? SCMD_FIFO_IN : SCMD_FIFO_OUT;
  1784. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, bval);
  1785. }
  1786. }
  1787. static void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1788. u16 *pscsi_status)
  1789. {
  1790. srb->target_status = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1791. srb->end_message = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); /* get message */
  1792. srb->state = SRB_COMPLETED;
  1793. *pscsi_status = PH_BUS_FREE; /*.. initial phase */
  1794. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  1795. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
  1796. }
  1797. static void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1798. u16 *pscsi_status)
  1799. {
  1800. srb->state = SRB_STATUS;
  1801. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  1802. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_COMP);
  1803. }
  1804. /* Check if the message is complete */
  1805. static inline u8 msgin_completed(u8 * msgbuf, u32 len)
  1806. {
  1807. if (*msgbuf == EXTENDED_MESSAGE) {
  1808. if (len < 2)
  1809. return 0;
  1810. if (len < msgbuf[1] + 2)
  1811. return 0;
  1812. } else if (*msgbuf >= 0x20 && *msgbuf <= 0x2f) /* two byte messages */
  1813. if (len < 2)
  1814. return 0;
  1815. return 1;
  1816. }
  1817. /* reject_msg */
  1818. static inline void msgin_reject(struct AdapterCtlBlk *acb,
  1819. struct ScsiReqBlk *srb)
  1820. {
  1821. srb->msgout_buf[0] = MESSAGE_REJECT;
  1822. srb->msg_count = 1;
  1823. DC395x_ENABLE_MSGOUT;
  1824. srb->state &= ~SRB_MSGIN;
  1825. srb->state |= SRB_MSGOUT;
  1826. }
  1827. static struct ScsiReqBlk *msgin_qtag(struct AdapterCtlBlk *acb,
  1828. struct DeviceCtlBlk *dcb, u8 tag)
  1829. {
  1830. struct ScsiReqBlk *srb = NULL;
  1831. struct ScsiReqBlk *i;
  1832. if (list_empty(&dcb->srb_going_list))
  1833. goto mingx0;
  1834. list_for_each_entry(i, &dcb->srb_going_list, list) {
  1835. if (i->tag_number == tag) {
  1836. srb = i;
  1837. break;
  1838. }
  1839. }
  1840. if (!srb)
  1841. goto mingx0;
  1842. if (dcb->flag & ABORT_DEV_) {
  1843. /*srb->state = SRB_ABORT_SENT; */
  1844. enable_msgout_abort(acb, srb);
  1845. }
  1846. if (!(srb->state & SRB_DISCONNECT))
  1847. goto mingx0;
  1848. memcpy(srb->msgin_buf, dcb->active_srb->msgin_buf, acb->msg_len);
  1849. srb->state |= dcb->active_srb->state;
  1850. srb->state |= SRB_DATA_XFER;
  1851. dcb->active_srb = srb;
  1852. /* How can we make the DORS happy? */
  1853. return srb;
  1854. mingx0:
  1855. srb = acb->tmp_srb;
  1856. srb->state = SRB_UNEXPECT_RESEL;
  1857. dcb->active_srb = srb;
  1858. srb->msgout_buf[0] = ABORT_TASK;
  1859. srb->msg_count = 1;
  1860. DC395x_ENABLE_MSGOUT;
  1861. return srb;
  1862. }
  1863. static inline void reprogram_regs(struct AdapterCtlBlk *acb,
  1864. struct DeviceCtlBlk *dcb)
  1865. {
  1866. DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id);
  1867. DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period);
  1868. DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset);
  1869. set_xfer_rate(acb, dcb);
  1870. }
  1871. /* set async transfer mode */
  1872. static void msgin_set_async(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
  1873. {
  1874. struct DeviceCtlBlk *dcb = srb->dcb;
  1875. dcb->sync_mode &= ~(SYNC_NEGO_ENABLE);
  1876. dcb->sync_mode |= SYNC_NEGO_DONE;
  1877. /*dcb->sync_period &= 0; */
  1878. dcb->sync_offset = 0;
  1879. dcb->min_nego_period = 200 >> 2; /* 200ns <=> 5 MHz */
  1880. srb->state &= ~SRB_DO_SYNC_NEGO;
  1881. reprogram_regs(acb, dcb);
  1882. if ((dcb->sync_mode & WIDE_NEGO_ENABLE)
  1883. && !(dcb->sync_mode & WIDE_NEGO_DONE)) {
  1884. build_wdtr(acb, dcb, srb);
  1885. DC395x_ENABLE_MSGOUT;
  1886. }
  1887. }
  1888. /* set sync transfer mode */
  1889. static void msgin_set_sync(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
  1890. {
  1891. struct DeviceCtlBlk *dcb = srb->dcb;
  1892. u8 bval;
  1893. int fact;
  1894. if (srb->msgin_buf[4] > 15)
  1895. srb->msgin_buf[4] = 15;
  1896. if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO))
  1897. dcb->sync_offset = 0;
  1898. else if (dcb->sync_offset == 0)
  1899. dcb->sync_offset = srb->msgin_buf[4];
  1900. if (srb->msgin_buf[4] > dcb->sync_offset)
  1901. srb->msgin_buf[4] = dcb->sync_offset;
  1902. else
  1903. dcb->sync_offset = srb->msgin_buf[4];
  1904. bval = 0;
  1905. while (bval < 7 && (srb->msgin_buf[3] > clock_period[bval]
  1906. || dcb->min_nego_period >
  1907. clock_period[bval]))
  1908. bval++;
  1909. srb->msgin_buf[3] = clock_period[bval];
  1910. dcb->sync_period &= 0xf0;
  1911. dcb->sync_period |= ALT_SYNC | bval;
  1912. dcb->min_nego_period = srb->msgin_buf[3];
  1913. if (dcb->sync_period & WIDE_SYNC)
  1914. fact = 500;
  1915. else
  1916. fact = 250;
  1917. if (!(srb->state & SRB_DO_SYNC_NEGO)) {
  1918. /* Reply with corrected SDTR Message */
  1919. memcpy(srb->msgout_buf, srb->msgin_buf, 5);
  1920. srb->msg_count = 5;
  1921. DC395x_ENABLE_MSGOUT;
  1922. dcb->sync_mode |= SYNC_NEGO_DONE;
  1923. } else {
  1924. if ((dcb->sync_mode & WIDE_NEGO_ENABLE)
  1925. && !(dcb->sync_mode & WIDE_NEGO_DONE)) {
  1926. build_wdtr(acb, dcb, srb);
  1927. DC395x_ENABLE_MSGOUT;
  1928. }
  1929. }
  1930. srb->state &= ~SRB_DO_SYNC_NEGO;
  1931. dcb->sync_mode |= SYNC_NEGO_DONE | SYNC_NEGO_ENABLE;
  1932. reprogram_regs(acb, dcb);
  1933. }
  1934. static inline void msgin_set_nowide(struct AdapterCtlBlk *acb,
  1935. struct ScsiReqBlk *srb)
  1936. {
  1937. struct DeviceCtlBlk *dcb = srb->dcb;
  1938. dcb->sync_period &= ~WIDE_SYNC;
  1939. dcb->sync_mode &= ~(WIDE_NEGO_ENABLE);
  1940. dcb->sync_mode |= WIDE_NEGO_DONE;
  1941. srb->state &= ~SRB_DO_WIDE_NEGO;
  1942. reprogram_regs(acb, dcb);
  1943. if ((dcb->sync_mode & SYNC_NEGO_ENABLE)
  1944. && !(dcb->sync_mode & SYNC_NEGO_DONE)) {
  1945. build_sdtr(acb, dcb, srb);
  1946. DC395x_ENABLE_MSGOUT;
  1947. }
  1948. }
  1949. static void msgin_set_wide(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
  1950. {
  1951. struct DeviceCtlBlk *dcb = srb->dcb;
  1952. u8 wide = (dcb->dev_mode & NTC_DO_WIDE_NEGO
  1953. && acb->config & HCC_WIDE_CARD) ? 1 : 0;
  1954. if (srb->msgin_buf[3] > wide)
  1955. srb->msgin_buf[3] = wide;
  1956. /* Completed */
  1957. if (!(srb->state & SRB_DO_WIDE_NEGO)) {
  1958. memcpy(srb->msgout_buf, srb->msgin_buf, 4);
  1959. srb->msg_count = 4;
  1960. srb->state |= SRB_DO_WIDE_NEGO;
  1961. DC395x_ENABLE_MSGOUT;
  1962. }
  1963. dcb->sync_mode |= (WIDE_NEGO_ENABLE | WIDE_NEGO_DONE);
  1964. if (srb->msgin_buf[3] > 0)
  1965. dcb->sync_period |= WIDE_SYNC;
  1966. else
  1967. dcb->sync_period &= ~WIDE_SYNC;
  1968. srb->state &= ~SRB_DO_WIDE_NEGO;
  1969. /*dcb->sync_mode &= ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE); */
  1970. reprogram_regs(acb, dcb);
  1971. if ((dcb->sync_mode & SYNC_NEGO_ENABLE)
  1972. && !(dcb->sync_mode & SYNC_NEGO_DONE)) {
  1973. build_sdtr(acb, dcb, srb);
  1974. DC395x_ENABLE_MSGOUT;
  1975. }
  1976. }
  1977. /*
  1978. * extended message codes:
  1979. *
  1980. * code description
  1981. *
  1982. * 02h Reserved
  1983. * 00h MODIFY DATA POINTER
  1984. * 01h SYNCHRONOUS DATA TRANSFER REQUEST
  1985. * 03h WIDE DATA TRANSFER REQUEST
  1986. * 04h - 7Fh Reserved
  1987. * 80h - FFh Vendor specific
  1988. */
  1989. static void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  1990. u16 *pscsi_status)
  1991. {
  1992. struct DeviceCtlBlk *dcb = acb->active_dcb;
  1993. srb->msgin_buf[acb->msg_len++] = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
  1994. if (msgin_completed(srb->msgin_buf, acb->msg_len)) {
  1995. /* Now eval the msg */
  1996. switch (srb->msgin_buf[0]) {
  1997. case DISCONNECT:
  1998. srb->state = SRB_DISCONNECT;
  1999. break;
  2000. case SIMPLE_QUEUE_TAG:
  2001. case HEAD_OF_QUEUE_TAG:
  2002. case ORDERED_QUEUE_TAG:
  2003. srb =
  2004. msgin_qtag(acb, dcb,
  2005. srb->msgin_buf[1]);
  2006. break;
  2007. case MESSAGE_REJECT:
  2008. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
  2009. DO_CLRATN | DO_DATALATCH);
  2010. /* A sync nego message was rejected ! */
  2011. if (srb->state & SRB_DO_SYNC_NEGO) {
  2012. msgin_set_async(acb, srb);
  2013. break;
  2014. }
  2015. /* A wide nego message was rejected ! */
  2016. if (srb->state & SRB_DO_WIDE_NEGO) {
  2017. msgin_set_nowide(acb, srb);
  2018. break;
  2019. }
  2020. enable_msgout_abort(acb, srb);
  2021. /*srb->state |= SRB_ABORT_SENT */
  2022. break;
  2023. case EXTENDED_MESSAGE:
  2024. /* SDTR */
  2025. if (srb->msgin_buf[1] == 3
  2026. && srb->msgin_buf[2] == EXTENDED_SDTR) {
  2027. msgin_set_sync(acb, srb);
  2028. break;
  2029. }
  2030. /* WDTR */
  2031. if (srb->msgin_buf[1] == 2
  2032. && srb->msgin_buf[2] == EXTENDED_WDTR
  2033. && srb->msgin_buf[3] <= 2) { /* sanity check ... */
  2034. msgin_set_wide(acb, srb);
  2035. break;
  2036. }
  2037. msgin_reject(acb, srb);
  2038. break;
  2039. case IGNORE_WIDE_RESIDUE:
  2040. /* Discard wide residual */
  2041. break;
  2042. case COMMAND_COMPLETE:
  2043. /* nothing has to be done */
  2044. break;
  2045. case SAVE_POINTERS:
  2046. /*
  2047. * SAVE POINTER may be ignored as we have the struct
  2048. * ScsiReqBlk* associated with the scsi command.
  2049. */
  2050. break;
  2051. case RESTORE_POINTERS:
  2052. break;
  2053. case ABORT:
  2054. dcb->flag |= ABORT_DEV_;
  2055. enable_msgout_abort(acb, srb);
  2056. break;
  2057. default:
  2058. /* reject unknown messages */
  2059. if (srb->msgin_buf[0] & IDENTIFY_BASE) {
  2060. srb->msg_count = 1;
  2061. srb->msgout_buf[0] = dcb->identify_msg;
  2062. DC395x_ENABLE_MSGOUT;
  2063. srb->state |= SRB_MSGOUT;
  2064. /*break; */
  2065. }
  2066. msgin_reject(acb, srb);
  2067. }
  2068. /* Clear counter and MsgIn state */
  2069. srb->state &= ~SRB_MSGIN;
  2070. acb->msg_len = 0;
  2071. }
  2072. *pscsi_status = PH_BUS_FREE;
  2073. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important ... you know! */
  2074. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
  2075. }
  2076. static void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  2077. u16 *pscsi_status)
  2078. {
  2079. clear_fifo(acb, "msgin_phase1");
  2080. DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1);
  2081. if (!(srb->state & SRB_MSGIN)) {
  2082. srb->state &= ~SRB_DISCONNECT;
  2083. srb->state |= SRB_MSGIN;
  2084. }
  2085. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  2086. /* SCSI command */
  2087. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_IN);
  2088. }
  2089. static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  2090. u16 *pscsi_status)
  2091. {
  2092. }
  2093. static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
  2094. u16 *pscsi_status)
  2095. {
  2096. }
  2097. static void set_xfer_rate(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb)
  2098. {
  2099. struct DeviceCtlBlk *i;
  2100. /* set all lun device's period, offset */
  2101. if (dcb->identify_msg & 0x07)
  2102. return;
  2103. if (acb->scan_devices) {
  2104. current_sync_offset = dcb->sync_offset;
  2105. return;
  2106. }
  2107. list_for_each_entry(i, &acb->dcb_list, list)
  2108. if (i->target_id == dcb->target_id) {
  2109. i->sync_period = dcb->sync_period;
  2110. i->sync_offset = dcb->sync_offset;
  2111. i->sync_mode = dcb->sync_mode;
  2112. i->min_nego_period = dcb->min_nego_period;
  2113. }
  2114. }
  2115. static void disconnect(struct AdapterCtlBlk *acb)
  2116. {
  2117. struct DeviceCtlBlk *dcb = acb->active_dcb;
  2118. struct ScsiReqBlk *srb;
  2119. if (!dcb) {
  2120. udelay(500);
  2121. /* Suspend queue for a while */
  2122. acb->last_reset =
  2123. jiffies + HZ / 2 +
  2124. HZ * acb->eeprom.delay_time;
  2125. clear_fifo(acb, "disconnectEx");
  2126. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
  2127. return;
  2128. }
  2129. srb = dcb->active_srb;
  2130. acb->active_dcb = NULL;
  2131. srb->scsi_phase = PH_BUS_FREE; /* initial phase */
  2132. clear_fifo(acb, "disconnect");
  2133. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
  2134. if (srb->state & SRB_UNEXPECT_RESEL) {
  2135. srb->state = 0;
  2136. waiting_process_next(acb);
  2137. } else if (srb->state & SRB_ABORT_SENT) {
  2138. dcb->flag &= ~ABORT_DEV_;
  2139. acb->last_reset = jiffies + HZ / 2 + 1;
  2140. doing_srb_done(acb, DID_ABORT, srb->cmd, 1);
  2141. waiting_process_next(acb);
  2142. } else {
  2143. if ((srb->state & (SRB_START_ + SRB_MSGOUT))
  2144. || !(srb->
  2145. state & (SRB_DISCONNECT | SRB_COMPLETED))) {
  2146. /*
  2147. * Selection time out
  2148. * SRB_START_ || SRB_MSGOUT || (!SRB_DISCONNECT && !SRB_COMPLETED)
  2149. */
  2150. /* Unexp. Disc / Sel Timeout */
  2151. if (srb->state != SRB_START_
  2152. && srb->state != SRB_MSGOUT) {
  2153. srb->state = SRB_READY;
  2154. srb->target_status = SCSI_STAT_SEL_TIMEOUT;
  2155. goto disc1;
  2156. } else {
  2157. /* Normal selection timeout */
  2158. if (srb->retry_count++ > DC395x_MAX_RETRIES
  2159. || acb->scan_devices) {
  2160. srb->target_status =
  2161. SCSI_STAT_SEL_TIMEOUT;
  2162. goto disc1;
  2163. }
  2164. free_tag(dcb, srb);
  2165. list_move(&srb->list, &dcb->srb_waiting_list);
  2166. waiting_set_timer(acb, HZ / 20);
  2167. }
  2168. } else if (srb->state & SRB_DISCONNECT) {
  2169. u8 bval = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
  2170. /*
  2171. * SRB_DISCONNECT (This is what we expect!)
  2172. */
  2173. if (bval & 0x40) {
  2174. /* It could come from another initiator, therefore don't do much ! */
  2175. } else
  2176. waiting_process_next(acb);
  2177. } else if (srb->state & SRB_COMPLETED) {
  2178. disc1:
  2179. /*
  2180. ** SRB_COMPLETED
  2181. */
  2182. free_tag(dcb, srb);
  2183. dcb->active_srb = NULL;
  2184. srb->state = SRB_FREE;
  2185. srb_done(acb, dcb, srb);
  2186. }
  2187. }
  2188. }
  2189. static void reselect(struct AdapterCtlBlk *acb)
  2190. {
  2191. struct DeviceCtlBlk *dcb = acb->active_dcb;
  2192. struct ScsiReqBlk *srb = NULL;
  2193. u16 rsel_tar_lun_id;
  2194. u8 id, lun;
  2195. clear_fifo(acb, "reselect");
  2196. /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT | DO_DATALATCH); */
  2197. /* Read Reselected Target ID and LUN */
  2198. rsel_tar_lun_id = DC395x_read16(acb, TRM_S1040_SCSI_TARGETID);
  2199. if (dcb) { /* Arbitration lost but Reselection win */
  2200. srb = dcb->active_srb;
  2201. if (!srb) {
  2202. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  2203. return;
  2204. }
  2205. /* Why the if ? */
  2206. if (!acb->scan_devices) {
  2207. /*srb->state |= SRB_DISCONNECT; */
  2208. srb->state = SRB_READY;
  2209. free_tag(dcb, srb);
  2210. list_move(&srb->list, &dcb->srb_waiting_list);
  2211. waiting_set_timer(acb, HZ / 20);
  2212. /* return; */
  2213. }
  2214. }
  2215. /* Read Reselected Target Id and LUN */
  2216. id = rsel_tar_lun_id & 0xff;
  2217. lun = (rsel_tar_lun_id >> 8) & 7;
  2218. dcb = find_dcb(acb, id, lun);
  2219. if (!dcb) {
  2220. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  2221. return;
  2222. }
  2223. acb->active_dcb = dcb;
  2224. if (dcb->sync_mode & EN_TAG_QUEUEING) {
  2225. srb = acb->tmp_srb;
  2226. dcb->active_srb = srb;
  2227. } else {
  2228. /* There can be only one! */
  2229. srb = dcb->active_srb;
  2230. if (!srb || !(srb->state & SRB_DISCONNECT)) {
  2231. /*
  2232. * abort command
  2233. */
  2234. srb = acb->tmp_srb;
  2235. srb->state = SRB_UNEXPECT_RESEL;
  2236. dcb->active_srb = srb;
  2237. enable_msgout_abort(acb, srb);
  2238. } else {
  2239. if (dcb->flag & ABORT_DEV_) {
  2240. /*srb->state = SRB_ABORT_SENT; */
  2241. enable_msgout_abort(acb, srb);
  2242. } else
  2243. srb->state = SRB_DATA_XFER;
  2244. }
  2245. }
  2246. srb->scsi_phase = PH_BUS_FREE; /* initial phase */
  2247. /* Program HA ID, target ID, period and offset */
  2248. DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id); /* host ID */
  2249. DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id); /* target ID */
  2250. DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset); /* offset */
  2251. DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); /* sync period, wide */
  2252. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
  2253. /* SCSI command */
  2254. DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
  2255. }
  2256. static inline u8 tagq_blacklist(char *name)
  2257. {
  2258. #ifndef DC395x_NO_TAGQ
  2259. #if 0
  2260. u8 i;
  2261. for (i = 0; i < BADDEVCNT; i++)
  2262. if (memcmp(name, DC395x_baddevname1[i], 28) == 0)
  2263. return 1;
  2264. #endif
  2265. return 0;
  2266. #else
  2267. return 1;
  2268. #endif
  2269. }
  2270. static void disc_tagq_set(struct DeviceCtlBlk *dcb, struct ScsiInqData *ptr)
  2271. {
  2272. /* Check for SCSI format (ANSI and Response data format) */
  2273. if ((ptr->Vers & 0x07) >= 2 || (ptr->RDF & 0x0F) == 2) {
  2274. if ((ptr->Flags & SCSI_INQ_CMDQUEUE)
  2275. && (dcb->dev_mode & NTC_DO_TAG_QUEUEING) &&
  2276. /*(dcb->dev_mode & NTC_DO_DISCONNECT) */
  2277. /* ((dcb->dev_type == TYPE_DISK)
  2278. || (dcb->dev_type == TYPE_MOD)) && */
  2279. !tagq_blacklist(((char *)ptr) + 8)) {
  2280. if (dcb->max_command == 1)
  2281. dcb->max_command =
  2282. dcb->acb->tag_max_num;
  2283. dcb->sync_mode |= EN_TAG_QUEUEING;
  2284. /*dcb->tag_mask = 0; */
  2285. } else
  2286. dcb->max_command = 1;
  2287. }
  2288. }
  2289. static void add_dev(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  2290. struct ScsiInqData *ptr)
  2291. {
  2292. u8 bval1 = ptr->DevType & SCSI_DEVTYPE;
  2293. dcb->dev_type = bval1;
  2294. /* if (bval1 == TYPE_DISK || bval1 == TYPE_MOD) */
  2295. disc_tagq_set(dcb, ptr);
  2296. }
  2297. /* unmap mapped pci regions from SRB */
  2298. static void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
  2299. {
  2300. struct scsi_cmnd *cmd = srb->cmd;
  2301. enum dma_data_direction dir = cmd->sc_data_direction;
  2302. if (scsi_sg_count(cmd) && dir != DMA_NONE) {
  2303. /* unmap DC395x SG list */
  2304. dma_unmap_single(&acb->dev->dev, srb->sg_bus_addr, SEGMENTX_LEN,
  2305. DMA_TO_DEVICE);
  2306. /* unmap the sg segments */
  2307. scsi_dma_unmap(cmd);
  2308. }
  2309. }
  2310. /* unmap mapped pci sense buffer from SRB */
  2311. static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb,
  2312. struct ScsiReqBlk *srb)
  2313. {
  2314. if (!(srb->flag & AUTO_REQSENSE))
  2315. return;
  2316. /* Unmap sense buffer */
  2317. dma_unmap_single(&acb->dev->dev, srb->segment_x[0].address,
  2318. srb->segment_x[0].length, DMA_FROM_DEVICE);
  2319. /* Restore SG stuff */
  2320. srb->total_xfer_length = srb->xferred;
  2321. srb->segment_x[0].address =
  2322. srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address;
  2323. srb->segment_x[0].length =
  2324. srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length;
  2325. }
  2326. /*
  2327. * Complete execution of a SCSI command
  2328. * Signal completion to the generic SCSI driver
  2329. */
  2330. static void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  2331. struct ScsiReqBlk *srb)
  2332. {
  2333. u8 tempcnt, status;
  2334. struct scsi_cmnd *cmd = srb->cmd;
  2335. enum dma_data_direction dir = cmd->sc_data_direction;
  2336. int ckc_only = 1;
  2337. status = srb->target_status;
  2338. set_host_byte(cmd, DID_OK);
  2339. set_status_byte(cmd, SAM_STAT_GOOD);
  2340. if (srb->flag & AUTO_REQSENSE) {
  2341. pci_unmap_srb_sense(acb, srb);
  2342. /*
  2343. ** target status..........................
  2344. */
  2345. srb->flag &= ~AUTO_REQSENSE;
  2346. srb->adapter_status = 0;
  2347. srb->target_status = SAM_STAT_CHECK_CONDITION;
  2348. if (status == SAM_STAT_CHECK_CONDITION) {
  2349. set_host_byte(cmd, DID_BAD_TARGET);
  2350. goto ckc_e;
  2351. }
  2352. set_status_byte(cmd, SAM_STAT_CHECK_CONDITION);
  2353. goto ckc_e;
  2354. }
  2355. /*************************************************************/
  2356. if (status) {
  2357. /*
  2358. * target status..........................
  2359. */
  2360. if (status == SAM_STAT_CHECK_CONDITION) {
  2361. request_sense(acb, dcb, srb);
  2362. return;
  2363. } else if (status == SAM_STAT_TASK_SET_FULL) {
  2364. tempcnt = (u8)list_size(&dcb->srb_going_list);
  2365. if (tempcnt > 1)
  2366. tempcnt--;
  2367. dcb->max_command = tempcnt;
  2368. free_tag(dcb, srb);
  2369. list_move(&srb->list, &dcb->srb_waiting_list);
  2370. waiting_set_timer(acb, HZ / 20);
  2371. srb->adapter_status = 0;
  2372. srb->target_status = 0;
  2373. return;
  2374. } else if (status == SCSI_STAT_SEL_TIMEOUT) {
  2375. srb->adapter_status = H_SEL_TIMEOUT;
  2376. srb->target_status = 0;
  2377. set_host_byte(cmd, DID_NO_CONNECT);
  2378. } else {
  2379. srb->adapter_status = 0;
  2380. set_host_byte(cmd, DID_ERROR);
  2381. set_status_byte(cmd, status);
  2382. }
  2383. } else {
  2384. /*
  2385. ** process initiator status..........................
  2386. */
  2387. status = srb->adapter_status;
  2388. if (status & H_OVER_UNDER_RUN) {
  2389. srb->target_status = 0;
  2390. scsi_msg_to_host_byte(cmd, srb->end_message);
  2391. } else if (srb->status & PARITY_ERROR) {
  2392. set_host_byte(cmd, DID_PARITY);
  2393. } else { /* No error */
  2394. srb->adapter_status = 0;
  2395. srb->target_status = 0;
  2396. }
  2397. }
  2398. ckc_only = 0;
  2399. /* Check Error Conditions */
  2400. ckc_e:
  2401. pci_unmap_srb(acb, srb);
  2402. if (cmd->cmnd[0] == INQUIRY) {
  2403. unsigned char *base = NULL;
  2404. struct ScsiInqData *ptr;
  2405. unsigned long flags = 0;
  2406. struct scatterlist* sg = scsi_sglist(cmd);
  2407. size_t offset = 0, len = sizeof(struct ScsiInqData);
  2408. local_irq_save(flags);
  2409. base = scsi_kmap_atomic_sg(sg, scsi_sg_count(cmd), &offset, &len);
  2410. ptr = (struct ScsiInqData *)(base + offset);
  2411. if (!ckc_only && get_host_byte(cmd) == DID_OK
  2412. && cmd->cmnd[2] == 0 && scsi_bufflen(cmd) >= 8
  2413. && dir != DMA_NONE && ptr && (ptr->Vers & 0x07) >= 2)
  2414. dcb->inquiry7 = ptr->Flags;
  2415. /*if( srb->cmd->cmnd[0] == INQUIRY && */
  2416. /* (host_byte(cmd->result) == DID_OK || status_byte(cmd->result) & CHECK_CONDITION) ) */
  2417. if ((get_host_byte(cmd) == DID_OK) ||
  2418. (get_status_byte(cmd) == SAM_STAT_CHECK_CONDITION)) {
  2419. if (!dcb->init_tcq_flag) {
  2420. add_dev(acb, dcb, ptr);
  2421. dcb->init_tcq_flag = 1;
  2422. }
  2423. }
  2424. scsi_kunmap_atomic_sg(base);
  2425. local_irq_restore(flags);
  2426. }
  2427. /* Here is the info for Doug Gilbert's sg3 ... */
  2428. scsi_set_resid(cmd, srb->total_xfer_length);
  2429. if (srb != acb->tmp_srb) {
  2430. /* Add to free list */
  2431. list_move_tail(&srb->list, &acb->srb_free_list);
  2432. }
  2433. scsi_done(cmd);
  2434. waiting_process_next(acb);
  2435. }
  2436. /* abort all cmds in our queues */
  2437. static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_flag,
  2438. struct scsi_cmnd *cmd, u8 force)
  2439. {
  2440. struct DeviceCtlBlk *dcb;
  2441. list_for_each_entry(dcb, &acb->dcb_list, list) {
  2442. struct ScsiReqBlk *srb;
  2443. struct ScsiReqBlk *tmp;
  2444. struct scsi_cmnd *p;
  2445. list_for_each_entry_safe(srb, tmp, &dcb->srb_going_list, list) {
  2446. p = srb->cmd;
  2447. printk("G:%p(%02i-%i) ", p,
  2448. p->device->id, (u8)p->device->lun);
  2449. list_del(&srb->list);
  2450. free_tag(dcb, srb);
  2451. list_add_tail(&srb->list, &acb->srb_free_list);
  2452. set_host_byte(p, did_flag);
  2453. set_status_byte(p, SAM_STAT_GOOD);
  2454. pci_unmap_srb_sense(acb, srb);
  2455. pci_unmap_srb(acb, srb);
  2456. if (force) {
  2457. /* For new EH, we normally don't need to give commands back,
  2458. * as they all complete or all time out */
  2459. scsi_done(p);
  2460. }
  2461. }
  2462. /* Waiting queue */
  2463. list_for_each_entry_safe(srb, tmp, &dcb->srb_waiting_list, list) {
  2464. p = srb->cmd;
  2465. printk("W:%p<%02i-%i>", p, p->device->id,
  2466. (u8)p->device->lun);
  2467. list_move_tail(&srb->list, &acb->srb_free_list);
  2468. set_host_byte(p, did_flag);
  2469. set_status_byte(p, SAM_STAT_GOOD);
  2470. pci_unmap_srb_sense(acb, srb);
  2471. pci_unmap_srb(acb, srb);
  2472. if (force) {
  2473. /* For new EH, we normally don't need to give commands back,
  2474. * as they all complete or all time out */
  2475. scsi_done(cmd);
  2476. }
  2477. }
  2478. dcb->flag &= ~ABORT_DEV_;
  2479. }
  2480. }
  2481. static void reset_scsi_bus(struct AdapterCtlBlk *acb)
  2482. {
  2483. acb->acb_flag |= RESET_DEV; /* RESET_DETECT, RESET_DONE, RESET_DEV */
  2484. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
  2485. while (!(DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET))
  2486. /* nothing */;
  2487. }
  2488. static void set_basic_config(struct AdapterCtlBlk *acb)
  2489. {
  2490. u8 bval;
  2491. u16 wval;
  2492. DC395x_write8(acb, TRM_S1040_SCSI_TIMEOUT, acb->sel_timeout);
  2493. if (acb->config & HCC_PARITY)
  2494. bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
  2495. else
  2496. bval = PHASELATCH | INITIATOR | BLOCKRST;
  2497. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG0, bval);
  2498. /* program configuration 1: Act_Neg (+ Act_Neg_Enh? + Fast_Filter? + DataDis?) */
  2499. DC395x_write8(acb, TRM_S1040_SCSI_CONFIG1, 0x03); /* was 0x13: default */
  2500. /* program Host ID */
  2501. DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id);
  2502. /* set ansynchronous transfer */
  2503. DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, 0x00);
  2504. /* Turn LED control off */
  2505. wval = DC395x_read16(acb, TRM_S1040_GEN_CONTROL) & 0x7F;
  2506. DC395x_write16(acb, TRM_S1040_GEN_CONTROL, wval);
  2507. /* DMA config */
  2508. wval = DC395x_read16(acb, TRM_S1040_DMA_CONFIG) & ~DMA_FIFO_CTRL;
  2509. wval |=
  2510. DMA_FIFO_HALF_HALF | DMA_ENHANCE /*| DMA_MEM_MULTI_READ */ ;
  2511. DC395x_write16(acb, TRM_S1040_DMA_CONFIG, wval);
  2512. /* Clear pending interrupt status */
  2513. DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
  2514. /* Enable SCSI interrupt */
  2515. DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x7F);
  2516. DC395x_write8(acb, TRM_S1040_DMA_INTEN, EN_SCSIINTR | EN_DMAXFERERROR
  2517. /*| EN_DMAXFERABORT | EN_DMAXFERCOMP | EN_FORCEDMACOMP */
  2518. );
  2519. }
  2520. static void scsi_reset_detect(struct AdapterCtlBlk *acb)
  2521. {
  2522. /* delay half a second */
  2523. if (timer_pending(&acb->waiting_timer))
  2524. timer_delete(&acb->waiting_timer);
  2525. DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
  2526. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
  2527. /*DC395x_write8(acb, TRM_S1040_DMA_CONTROL,STOPDMAXFER); */
  2528. udelay(500);
  2529. /* Maybe we locked up the bus? Then lets wait even longer ... */
  2530. acb->last_reset =
  2531. jiffies + 5 * HZ / 2 +
  2532. HZ * acb->eeprom.delay_time;
  2533. clear_fifo(acb, "scsi_reset_detect");
  2534. set_basic_config(acb);
  2535. /*1.25 */
  2536. /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); */
  2537. if (acb->acb_flag & RESET_DEV) { /* RESET_DETECT, RESET_DONE, RESET_DEV */
  2538. acb->acb_flag |= RESET_DONE;
  2539. } else {
  2540. acb->acb_flag |= RESET_DETECT;
  2541. reset_dev_param(acb);
  2542. doing_srb_done(acb, DID_RESET, NULL, 1);
  2543. /*DC395x_RecoverSRB( acb ); */
  2544. acb->active_dcb = NULL;
  2545. acb->acb_flag = 0;
  2546. waiting_process_next(acb);
  2547. }
  2548. }
  2549. static void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
  2550. struct ScsiReqBlk *srb)
  2551. {
  2552. struct scsi_cmnd *cmd = srb->cmd;
  2553. srb->flag |= AUTO_REQSENSE;
  2554. srb->adapter_status = 0;
  2555. srb->target_status = 0;
  2556. /* KG: Can this prevent crap sense data ? */
  2557. memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  2558. /* Save some data */
  2559. srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address =
  2560. srb->segment_x[0].address;
  2561. srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length =
  2562. srb->segment_x[0].length;
  2563. srb->xferred = srb->total_xfer_length;
  2564. /* srb->segment_x : a one entry of S/G list table */
  2565. srb->total_xfer_length = SCSI_SENSE_BUFFERSIZE;
  2566. srb->segment_x[0].length = SCSI_SENSE_BUFFERSIZE;
  2567. /* Map sense buffer */
  2568. srb->segment_x[0].address = dma_map_single(&acb->dev->dev,
  2569. cmd->sense_buffer, SCSI_SENSE_BUFFERSIZE,
  2570. DMA_FROM_DEVICE);
  2571. srb->sg_count = 1;
  2572. srb->sg_index = 0;
  2573. if (start_scsi(acb, dcb, srb)) { /* Should only happen, if sb. else grabs the bus */
  2574. list_move(&srb->list, &dcb->srb_waiting_list);
  2575. waiting_set_timer(acb, HZ / 100);
  2576. }
  2577. }
  2578. /**
  2579. * device_alloc - Allocate a new device instance. This create the
  2580. * devices instance and sets up all the data items. The adapter
  2581. * instance is required to obtain confiuration information for this
  2582. * device. This does *not* add this device to the adapters device
  2583. * list.
  2584. *
  2585. * @acb: The adapter to obtain configuration information from.
  2586. * @target: The target for the new device.
  2587. * @lun: The lun for the new device.
  2588. *
  2589. * Return the new device if successful or NULL on failure.
  2590. **/
  2591. static struct DeviceCtlBlk *device_alloc(struct AdapterCtlBlk *acb,
  2592. u8 target, u8 lun)
  2593. {
  2594. struct NvRamType *eeprom = &acb->eeprom;
  2595. u8 period_index = eeprom->target[target].period & 0x07;
  2596. struct DeviceCtlBlk *dcb;
  2597. dcb = kmalloc_obj(struct DeviceCtlBlk, GFP_ATOMIC);
  2598. if (!dcb)
  2599. return NULL;
  2600. dcb->acb = NULL;
  2601. INIT_LIST_HEAD(&dcb->srb_going_list);
  2602. INIT_LIST_HEAD(&dcb->srb_waiting_list);
  2603. dcb->active_srb = NULL;
  2604. dcb->tag_mask = 0;
  2605. dcb->max_command = 1;
  2606. dcb->target_id = target;
  2607. dcb->target_lun = lun;
  2608. dcb->dev_mode = eeprom->target[target].cfg0;
  2609. #ifndef DC395x_NO_DISCONNECT
  2610. dcb->identify_msg =
  2611. IDENTIFY(dcb->dev_mode & NTC_DO_DISCONNECT, lun);
  2612. #else
  2613. dcb->identify_msg = IDENTIFY(0, lun);
  2614. #endif
  2615. dcb->inquiry7 = 0;
  2616. dcb->sync_mode = 0;
  2617. dcb->min_nego_period = clock_period[period_index];
  2618. dcb->sync_period = 0;
  2619. dcb->sync_offset = 0;
  2620. dcb->flag = 0;
  2621. #ifndef DC395x_NO_WIDE
  2622. if ((dcb->dev_mode & NTC_DO_WIDE_NEGO)
  2623. && (acb->config & HCC_WIDE_CARD))
  2624. dcb->sync_mode |= WIDE_NEGO_ENABLE;
  2625. #endif
  2626. #ifndef DC395x_NO_SYNC
  2627. if (dcb->dev_mode & NTC_DO_SYNC_NEGO)
  2628. if (!(lun) || current_sync_offset)
  2629. dcb->sync_mode |= SYNC_NEGO_ENABLE;
  2630. #endif
  2631. if (dcb->target_lun != 0) {
  2632. /* Copy settings */
  2633. struct DeviceCtlBlk *p = NULL, *iter;
  2634. list_for_each_entry(iter, &acb->dcb_list, list)
  2635. if (iter->target_id == dcb->target_id) {
  2636. p = iter;
  2637. break;
  2638. }
  2639. if (!p) {
  2640. kfree(dcb);
  2641. return NULL;
  2642. }
  2643. dcb->sync_mode = p->sync_mode;
  2644. dcb->sync_period = p->sync_period;
  2645. dcb->min_nego_period = p->min_nego_period;
  2646. dcb->sync_offset = p->sync_offset;
  2647. dcb->inquiry7 = p->inquiry7;
  2648. }
  2649. return dcb;
  2650. }
  2651. /**
  2652. * adapter_add_device - Adds the device instance to the adaptor instance.
  2653. *
  2654. * @acb: The adapter device to be updated
  2655. * @dcb: A newly created and initialised device instance to add.
  2656. **/
  2657. static void adapter_add_device(struct AdapterCtlBlk *acb,
  2658. struct DeviceCtlBlk *dcb)
  2659. {
  2660. /* backpointer to adapter */
  2661. dcb->acb = acb;
  2662. /* set run_robin to this device if it is currently empty */
  2663. if (list_empty(&acb->dcb_list))
  2664. acb->dcb_run_robin = dcb;
  2665. /* add device to list */
  2666. list_add_tail(&dcb->list, &acb->dcb_list);
  2667. /* update device maps */
  2668. acb->dcb_map[dcb->target_id] |= (1 << dcb->target_lun);
  2669. acb->children[dcb->target_id][dcb->target_lun] = dcb;
  2670. }
  2671. /**
  2672. * adapter_remove_device - Removes the device instance from the adaptor
  2673. * instance. The device instance is not check in any way or freed by this.
  2674. * The caller is expected to take care of that. This will simply remove the
  2675. * device from the adapters data strcutures.
  2676. *
  2677. * @acb: The adapter device to be updated
  2678. * @dcb: A device that has previously been added to the adapter.
  2679. **/
  2680. static void adapter_remove_device(struct AdapterCtlBlk *acb,
  2681. struct DeviceCtlBlk *dcb)
  2682. {
  2683. struct DeviceCtlBlk *i;
  2684. struct DeviceCtlBlk *tmp;
  2685. /* fix up any pointers to this device that we have in the adapter */
  2686. if (acb->active_dcb == dcb)
  2687. acb->active_dcb = NULL;
  2688. if (acb->dcb_run_robin == dcb)
  2689. acb->dcb_run_robin = dcb_get_next(&acb->dcb_list, dcb);
  2690. /* unlink from list */
  2691. list_for_each_entry_safe(i, tmp, &acb->dcb_list, list)
  2692. if (dcb == i) {
  2693. list_del(&i->list);
  2694. break;
  2695. }
  2696. /* clear map and children */
  2697. acb->dcb_map[dcb->target_id] &= ~(1 << dcb->target_lun);
  2698. acb->children[dcb->target_id][dcb->target_lun] = NULL;
  2699. dcb->acb = NULL;
  2700. }
  2701. /**
  2702. * adapter_remove_and_free_device - Removes a single device from the adapter
  2703. * and then frees the device information.
  2704. *
  2705. * @acb: The adapter device to be updated
  2706. * @dcb: A device that has previously been added to the adapter.
  2707. */
  2708. static void adapter_remove_and_free_device(struct AdapterCtlBlk *acb,
  2709. struct DeviceCtlBlk *dcb)
  2710. {
  2711. if (list_size(&dcb->srb_going_list) > 1) {
  2712. return;
  2713. }
  2714. adapter_remove_device(acb, dcb);
  2715. kfree(dcb);
  2716. }
  2717. /**
  2718. * adapter_remove_and_free_all_devices - Removes and frees all of the
  2719. * devices associated with the specified adapter.
  2720. *
  2721. * @acb: The adapter from which all devices should be removed.
  2722. **/
  2723. static void adapter_remove_and_free_all_devices(struct AdapterCtlBlk* acb)
  2724. {
  2725. struct DeviceCtlBlk *dcb;
  2726. struct DeviceCtlBlk *tmp;
  2727. list_for_each_entry_safe(dcb, tmp, &acb->dcb_list, list)
  2728. adapter_remove_and_free_device(acb, dcb);
  2729. }
  2730. /**
  2731. * dc395x_sdev_init - Called by the scsi mid layer to tell us about a new
  2732. * scsi device that we need to deal with. We allocate a new device and then
  2733. * insert that device into the adapters device list.
  2734. *
  2735. * @scsi_device: The new scsi device that we need to handle.
  2736. **/
  2737. static int dc395x_sdev_init(struct scsi_device *scsi_device)
  2738. {
  2739. struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)scsi_device->host->hostdata;
  2740. struct DeviceCtlBlk *dcb;
  2741. dcb = device_alloc(acb, scsi_device->id, scsi_device->lun);
  2742. if (!dcb)
  2743. return -ENOMEM;
  2744. adapter_add_device(acb, dcb);
  2745. return 0;
  2746. }
  2747. /**
  2748. * dc395x_sdev_destroy - Called by the scsi mid layer to tell us about a
  2749. * device that is going away.
  2750. *
  2751. * @scsi_device: The new scsi device that we need to handle.
  2752. **/
  2753. static void dc395x_sdev_destroy(struct scsi_device *scsi_device)
  2754. {
  2755. struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)scsi_device->host->hostdata;
  2756. struct DeviceCtlBlk *dcb = find_dcb(acb, scsi_device->id, scsi_device->lun);
  2757. if (dcb)
  2758. adapter_remove_and_free_device(acb, dcb);
  2759. }
  2760. /**
  2761. * trms1040_wait_30us: wait for 30 us
  2762. *
  2763. * Waits for 30us (using the chip by the looks of it..)
  2764. *
  2765. * @io_port: base I/O address
  2766. **/
  2767. static void trms1040_wait_30us(unsigned long io_port)
  2768. {
  2769. /* ScsiPortStallExecution(30); wait 30 us */
  2770. outb(5, io_port + TRM_S1040_GEN_TIMER);
  2771. while (!(inb(io_port + TRM_S1040_GEN_STATUS) & GTIMEOUT))
  2772. /* nothing */ ;
  2773. }
  2774. /**
  2775. * trms1040_write_cmd - write the secified command and address to
  2776. * chip
  2777. *
  2778. * @io_port: base I/O address
  2779. * @cmd: SB + op code (command) to send
  2780. * @addr: address to send
  2781. **/
  2782. static void trms1040_write_cmd(unsigned long io_port, u8 cmd, u8 addr)
  2783. {
  2784. int i;
  2785. u8 send_data;
  2786. /* program SB + OP code */
  2787. for (i = 0; i < 3; i++, cmd <<= 1) {
  2788. send_data = NVR_SELECT;
  2789. if (cmd & 0x04) /* Start from bit 2 */
  2790. send_data |= NVR_BITOUT;
  2791. outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
  2792. trms1040_wait_30us(io_port);
  2793. outb((send_data | NVR_CLOCK),
  2794. io_port + TRM_S1040_GEN_NVRAM);
  2795. trms1040_wait_30us(io_port);
  2796. }
  2797. /* send address */
  2798. for (i = 0; i < 7; i++, addr <<= 1) {
  2799. send_data = NVR_SELECT;
  2800. if (addr & 0x40) /* Start from bit 6 */
  2801. send_data |= NVR_BITOUT;
  2802. outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
  2803. trms1040_wait_30us(io_port);
  2804. outb((send_data | NVR_CLOCK),
  2805. io_port + TRM_S1040_GEN_NVRAM);
  2806. trms1040_wait_30us(io_port);
  2807. }
  2808. outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
  2809. trms1040_wait_30us(io_port);
  2810. }
  2811. /**
  2812. * trms1040_set_data - store a single byte in the eeprom
  2813. *
  2814. * Called from write all to write a single byte into the SSEEPROM
  2815. * Which is done one bit at a time.
  2816. *
  2817. * @io_port: base I/O address
  2818. * @addr: offset into EEPROM
  2819. * @byte: bytes to write
  2820. **/
  2821. static void trms1040_set_data(unsigned long io_port, u8 addr, u8 byte)
  2822. {
  2823. int i;
  2824. u8 send_data;
  2825. /* Send write command & address */
  2826. trms1040_write_cmd(io_port, 0x05, addr);
  2827. /* Write data */
  2828. for (i = 0; i < 8; i++, byte <<= 1) {
  2829. send_data = NVR_SELECT;
  2830. if (byte & 0x80) /* Start from bit 7 */
  2831. send_data |= NVR_BITOUT;
  2832. outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
  2833. trms1040_wait_30us(io_port);
  2834. outb((send_data | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
  2835. trms1040_wait_30us(io_port);
  2836. }
  2837. outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
  2838. trms1040_wait_30us(io_port);
  2839. /* Disable chip select */
  2840. outb(0, io_port + TRM_S1040_GEN_NVRAM);
  2841. trms1040_wait_30us(io_port);
  2842. outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
  2843. trms1040_wait_30us(io_port);
  2844. /* Wait for write ready */
  2845. while (1) {
  2846. outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
  2847. trms1040_wait_30us(io_port);
  2848. outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
  2849. trms1040_wait_30us(io_port);
  2850. if (inb(io_port + TRM_S1040_GEN_NVRAM) & NVR_BITIN)
  2851. break;
  2852. }
  2853. /* Disable chip select */
  2854. outb(0, io_port + TRM_S1040_GEN_NVRAM);
  2855. }
  2856. /**
  2857. * trms1040_write_all - write 128 bytes to the eeprom
  2858. *
  2859. * Write the supplied 128 bytes to the chips SEEPROM
  2860. *
  2861. * @eeprom: the data to write
  2862. * @io_port: the base io port
  2863. **/
  2864. static void trms1040_write_all(struct NvRamType *eeprom, unsigned long io_port)
  2865. {
  2866. u8 *b_eeprom = (u8 *)eeprom;
  2867. u8 addr;
  2868. /* Enable SEEPROM */
  2869. outb((inb(io_port + TRM_S1040_GEN_CONTROL) | EN_EEPROM),
  2870. io_port + TRM_S1040_GEN_CONTROL);
  2871. /* write enable */
  2872. trms1040_write_cmd(io_port, 0x04, 0xFF);
  2873. outb(0, io_port + TRM_S1040_GEN_NVRAM);
  2874. trms1040_wait_30us(io_port);
  2875. /* write */
  2876. for (addr = 0; addr < 128; addr++, b_eeprom++)
  2877. trms1040_set_data(io_port, addr, *b_eeprom);
  2878. /* write disable */
  2879. trms1040_write_cmd(io_port, 0x04, 0x00);
  2880. outb(0, io_port + TRM_S1040_GEN_NVRAM);
  2881. trms1040_wait_30us(io_port);
  2882. /* Disable SEEPROM */
  2883. outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM),
  2884. io_port + TRM_S1040_GEN_CONTROL);
  2885. }
  2886. /**
  2887. * trms1040_get_data - get a single byte from the eeprom
  2888. *
  2889. * Called from read all to read a single byte into the SSEEPROM
  2890. * Which is done one bit at a time.
  2891. *
  2892. * @io_port: base I/O address
  2893. * @addr: offset into SEEPROM
  2894. *
  2895. * Returns the byte read.
  2896. **/
  2897. static u8 trms1040_get_data(unsigned long io_port, u8 addr)
  2898. {
  2899. int i;
  2900. u8 read_byte;
  2901. u8 result = 0;
  2902. /* Send read command & address */
  2903. trms1040_write_cmd(io_port, 0x06, addr);
  2904. /* read data */
  2905. for (i = 0; i < 8; i++) {
  2906. outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
  2907. trms1040_wait_30us(io_port);
  2908. outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
  2909. /* Get data bit while falling edge */
  2910. read_byte = inb(io_port + TRM_S1040_GEN_NVRAM);
  2911. result <<= 1;
  2912. if (read_byte & NVR_BITIN)
  2913. result |= 1;
  2914. trms1040_wait_30us(io_port);
  2915. }
  2916. /* Disable chip select */
  2917. outb(0, io_port + TRM_S1040_GEN_NVRAM);
  2918. return result;
  2919. }
  2920. /**
  2921. * trms1040_read_all - read all bytes from the eeprom
  2922. *
  2923. * Read the 128 bytes from the SEEPROM.
  2924. *
  2925. * @eeprom: where to store the data
  2926. * @io_port: the base io port
  2927. **/
  2928. static void trms1040_read_all(struct NvRamType *eeprom, unsigned long io_port)
  2929. {
  2930. u8 *b_eeprom = (u8 *)eeprom;
  2931. u8 addr;
  2932. /* Enable SEEPROM */
  2933. outb((inb(io_port + TRM_S1040_GEN_CONTROL) | EN_EEPROM),
  2934. io_port + TRM_S1040_GEN_CONTROL);
  2935. /* read details */
  2936. for (addr = 0; addr < 128; addr++, b_eeprom++)
  2937. *b_eeprom = trms1040_get_data(io_port, addr);
  2938. /* Disable SEEPROM */
  2939. outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM),
  2940. io_port + TRM_S1040_GEN_CONTROL);
  2941. }
  2942. /**
  2943. * check_eeprom - get and check contents of the eeprom
  2944. *
  2945. * Read seeprom 128 bytes into the memory provider in eeprom.
  2946. * Checks the checksum and if it's not correct it uses a set of default
  2947. * values.
  2948. *
  2949. * @eeprom: caller allocated strcuture to read the eeprom data into
  2950. * @io_port: io port to read from
  2951. **/
  2952. static void check_eeprom(struct NvRamType *eeprom, unsigned long io_port)
  2953. {
  2954. u16 *w_eeprom = (u16 *)eeprom;
  2955. u16 w_addr;
  2956. u16 cksum;
  2957. u32 d_addr;
  2958. u32 *d_eeprom;
  2959. trms1040_read_all(eeprom, io_port); /* read eeprom */
  2960. cksum = 0;
  2961. for (w_addr = 0, w_eeprom = (u16 *)eeprom; w_addr < 64;
  2962. w_addr++, w_eeprom++)
  2963. cksum += *w_eeprom;
  2964. if (cksum != 0x1234) {
  2965. /*
  2966. * Checksum is wrong.
  2967. * Load a set of defaults into the eeprom buffer
  2968. */
  2969. eeprom->sub_vendor_id[0] = (u8)PCI_VENDOR_ID_TEKRAM;
  2970. eeprom->sub_vendor_id[1] = (u8)(PCI_VENDOR_ID_TEKRAM >> 8);
  2971. eeprom->sub_sys_id[0] = (u8)PCI_DEVICE_ID_TEKRAM_TRMS1040;
  2972. eeprom->sub_sys_id[1] =
  2973. (u8)(PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8);
  2974. eeprom->sub_class = 0x00;
  2975. eeprom->vendor_id[0] = (u8)PCI_VENDOR_ID_TEKRAM;
  2976. eeprom->vendor_id[1] = (u8)(PCI_VENDOR_ID_TEKRAM >> 8);
  2977. eeprom->device_id[0] = (u8)PCI_DEVICE_ID_TEKRAM_TRMS1040;
  2978. eeprom->device_id[1] =
  2979. (u8)(PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8);
  2980. eeprom->reserved = 0x00;
  2981. for (d_addr = 0, d_eeprom = (u32 *)eeprom->target;
  2982. d_addr < 16; d_addr++, d_eeprom++)
  2983. *d_eeprom = 0x00000077; /* cfg3,cfg2,period,cfg0 */
  2984. *d_eeprom++ = 0x04000F07; /* max_tag,delay_time,channel_cfg,scsi_id */
  2985. *d_eeprom++ = 0x00000015; /* reserved1,boot_lun,boot_target,reserved0 */
  2986. for (d_addr = 0; d_addr < 12; d_addr++, d_eeprom++)
  2987. *d_eeprom = 0x00;
  2988. /* Now load defaults (maybe set by boot/module params) */
  2989. set_safe_settings();
  2990. fix_settings();
  2991. eeprom_override(eeprom);
  2992. eeprom->cksum = 0x00;
  2993. for (w_addr = 0, cksum = 0, w_eeprom = (u16 *)eeprom;
  2994. w_addr < 63; w_addr++, w_eeprom++)
  2995. cksum += *w_eeprom;
  2996. *w_eeprom = 0x1234 - cksum;
  2997. trms1040_write_all(eeprom, io_port);
  2998. eeprom->delay_time = cfg_data[CFG_RESET_DELAY].value;
  2999. } else {
  3000. set_safe_settings();
  3001. eeprom_index_to_delay(eeprom);
  3002. eeprom_override(eeprom);
  3003. }
  3004. }
  3005. /**
  3006. * print_eeprom_settings - output the eeprom settings
  3007. * to the kernel log so people can see what they were.
  3008. *
  3009. * @eeprom: The eeprom data strucutre to show details for.
  3010. **/
  3011. static void print_eeprom_settings(struct NvRamType *eeprom)
  3012. {
  3013. }
  3014. /* Free SG tables */
  3015. static void adapter_sg_tables_free(struct AdapterCtlBlk *acb)
  3016. {
  3017. int i;
  3018. const unsigned srbs_per_page = PAGE_SIZE/SEGMENTX_LEN;
  3019. for (i = 0; i < DC395x_MAX_SRB_CNT; i += srbs_per_page)
  3020. kfree(acb->srb_array[i].segment_x);
  3021. }
  3022. /*
  3023. * Allocate SG tables; as we have to pci_map them, an SG list (struct SGentry*)
  3024. * should never cross a page boundary */
  3025. static int adapter_sg_tables_alloc(struct AdapterCtlBlk *acb)
  3026. {
  3027. const unsigned mem_needed = (DC395x_MAX_SRB_CNT+1)
  3028. *SEGMENTX_LEN;
  3029. int pages = (mem_needed+(PAGE_SIZE-1))/PAGE_SIZE;
  3030. const unsigned srbs_per_page = PAGE_SIZE/SEGMENTX_LEN;
  3031. int srb_idx = 0;
  3032. unsigned i = 0;
  3033. struct SGentry *ptr;
  3034. for (i = 0; i < DC395x_MAX_SRB_CNT; i++)
  3035. acb->srb_array[i].segment_x = NULL;
  3036. while (pages--) {
  3037. ptr = kmalloc(PAGE_SIZE, GFP_KERNEL);
  3038. if (!ptr) {
  3039. adapter_sg_tables_free(acb);
  3040. return 1;
  3041. }
  3042. i = 0;
  3043. while (i < srbs_per_page && srb_idx < DC395x_MAX_SRB_CNT)
  3044. acb->srb_array[srb_idx++].segment_x =
  3045. ptr + (i++ * DC395x_MAX_SG_LISTENTRY);
  3046. }
  3047. if (i < srbs_per_page)
  3048. acb->srb.segment_x =
  3049. ptr + (i * DC395x_MAX_SG_LISTENTRY);
  3050. return 0;
  3051. }
  3052. /**
  3053. * adapter_print_config - print adapter connection and termination
  3054. * config
  3055. *
  3056. * The io port in the adapter needs to have been set before calling
  3057. * this function.
  3058. *
  3059. * @acb: The adapter to print the information for.
  3060. **/
  3061. static void adapter_print_config(struct AdapterCtlBlk *acb)
  3062. {
  3063. u8 bval;
  3064. bval = DC395x_read8(acb, TRM_S1040_GEN_STATUS);
  3065. if (!(bval & CON5068))
  3066. printk("ext%s ", !(bval & EXT68HIGH) ? "68" : "50");
  3067. if (!(bval & CON68))
  3068. printk("int68%s ", !(bval & INT68HIGH) ? "" : "(50)");
  3069. if (!(bval & CON50))
  3070. printk("int50 ");
  3071. if ((bval & (CON5068 | CON50 | CON68)) ==
  3072. 0 /*(CON5068 | CON50 | CON68) */ )
  3073. printk(" Oops! (All 3?) ");
  3074. bval = DC395x_read8(acb, TRM_S1040_GEN_CONTROL);
  3075. printk(" Termination: ");
  3076. if (bval & DIS_TERM)
  3077. printk("Disabled\n");
  3078. else {
  3079. if (bval & AUTOTERM)
  3080. printk("Auto ");
  3081. if (bval & LOW8TERM)
  3082. printk("Low ");
  3083. if (bval & UP8TERM)
  3084. printk("High ");
  3085. printk("\n");
  3086. }
  3087. }
  3088. /**
  3089. * adapter_init_params - Initialize the various parameters in the
  3090. * adapter structure. Note that the pointer to the scsi_host is set
  3091. * early (when this instance is created) and the io_port and irq
  3092. * values are set later after they have been reserved. This just gets
  3093. * everything set to a good starting position.
  3094. *
  3095. * The eeprom structure in the adapter needs to have been set before
  3096. * calling this function.
  3097. *
  3098. * @acb: The adapter to initialize.
  3099. **/
  3100. static void adapter_init_params(struct AdapterCtlBlk *acb)
  3101. {
  3102. struct NvRamType *eeprom = &acb->eeprom;
  3103. int i;
  3104. /* NOTE: acb->scsi_host is set at scsi_host/acb creation time */
  3105. /* NOTE: acb->io_port_base is set at port registration time */
  3106. /* NOTE: acb->io_port_len is set at port registration time */
  3107. INIT_LIST_HEAD(&acb->dcb_list);
  3108. acb->dcb_run_robin = NULL;
  3109. acb->active_dcb = NULL;
  3110. INIT_LIST_HEAD(&acb->srb_free_list);
  3111. /* temp SRB for Q tag used or abort command used */
  3112. acb->tmp_srb = &acb->srb;
  3113. timer_setup(&acb->waiting_timer, waiting_timeout, 0);
  3114. timer_setup(&acb->selto_timer, NULL, 0);
  3115. acb->srb_count = DC395x_MAX_SRB_CNT;
  3116. acb->sel_timeout = DC395x_SEL_TIMEOUT; /* timeout=250ms */
  3117. /* NOTE: acb->irq_level is set at IRQ registration time */
  3118. acb->tag_max_num = 1 << eeprom->max_tag;
  3119. if (acb->tag_max_num > 30)
  3120. acb->tag_max_num = 30;
  3121. acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE, RESET_DEV */
  3122. acb->gmode2 = eeprom->channel_cfg;
  3123. acb->config = 0; /* NOTE: actually set in adapter_init_chip */
  3124. if (eeprom->channel_cfg & NAC_SCANLUN)
  3125. acb->lun_chk = 1;
  3126. acb->scan_devices = 1;
  3127. acb->scsi_host->this_id = eeprom->scsi_id;
  3128. acb->hostid_bit = (1 << acb->scsi_host->this_id);
  3129. for (i = 0; i < DC395x_MAX_SCSI_ID; i++)
  3130. acb->dcb_map[i] = 0;
  3131. acb->msg_len = 0;
  3132. /* link static array of srbs into the srb free list */
  3133. for (i = 0; i < acb->srb_count - 1; i++)
  3134. list_add_tail(&acb->srb_array[i].list, &acb->srb_free_list);
  3135. }
  3136. /**
  3137. * adapter_init_scsi_host - Initialize the scsi host instance based on
  3138. * values that we have already stored in the adapter instance. There's
  3139. * some mention that a lot of these are deprecated, so we won't use
  3140. * them (we'll use the ones in the adapter instance) but we'll fill
  3141. * them in in case something else needs them.
  3142. *
  3143. * The eeprom structure, irq and io ports in the adapter need to have
  3144. * been set before calling this function.
  3145. *
  3146. * @host: The scsi host instance to fill in the values for.
  3147. **/
  3148. static void adapter_init_scsi_host(struct Scsi_Host *host)
  3149. {
  3150. struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata;
  3151. struct NvRamType *eeprom = &acb->eeprom;
  3152. host->max_cmd_len = 24;
  3153. host->can_queue = DC395x_MAX_CMD_QUEUE;
  3154. host->cmd_per_lun = DC395x_MAX_CMD_PER_LUN;
  3155. host->this_id = (int)eeprom->scsi_id;
  3156. host->io_port = acb->io_port_base;
  3157. host->n_io_port = acb->io_port_len;
  3158. host->dma_channel = -1;
  3159. host->unique_id = acb->io_port_base;
  3160. host->irq = acb->irq_level;
  3161. acb->last_reset = jiffies;
  3162. host->max_id = 16;
  3163. if (host->max_id - 1 == eeprom->scsi_id)
  3164. host->max_id--;
  3165. if (eeprom->channel_cfg & NAC_SCANLUN)
  3166. host->max_lun = 8;
  3167. else
  3168. host->max_lun = 1;
  3169. }
  3170. /**
  3171. * adapter_init_chip - Get the chip into a know state and figure out
  3172. * some of the settings that apply to this adapter.
  3173. *
  3174. * The io port in the adapter needs to have been set before calling
  3175. * this function. The config will be configured correctly on return.
  3176. *
  3177. * @acb: The adapter which we are to init.
  3178. **/
  3179. static void adapter_init_chip(struct AdapterCtlBlk *acb)
  3180. {
  3181. struct NvRamType *eeprom = &acb->eeprom;
  3182. /* Mask all the interrupt */
  3183. DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00);
  3184. DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00);
  3185. /* Reset SCSI module */
  3186. DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
  3187. /* Reset PCI/DMA module */
  3188. DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
  3189. udelay(20);
  3190. /* program configuration 0 */
  3191. acb->config = HCC_AUTOTERM | HCC_PARITY;
  3192. if (DC395x_read8(acb, TRM_S1040_GEN_STATUS) & WIDESCSI)
  3193. acb->config |= HCC_WIDE_CARD;
  3194. if (eeprom->channel_cfg & NAC_POWERON_SCSI_RESET)
  3195. acb->config |= HCC_SCSI_RESET;
  3196. if (acb->config & HCC_SCSI_RESET) {
  3197. DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
  3198. /*while (!( DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET )); */
  3199. /*spin_unlock_irq (&io_request_lock); */
  3200. udelay(500);
  3201. acb->last_reset =
  3202. jiffies + HZ / 2 +
  3203. HZ * acb->eeprom.delay_time;
  3204. /*spin_lock_irq (&io_request_lock); */
  3205. }
  3206. }
  3207. /**
  3208. * adapter_init - Grab the resource for the card, setup the adapter
  3209. * information, set the card into a known state, create the various
  3210. * tables etc etc. This basically gets all adapter information all up
  3211. * to date, initialised and gets the chip in sync with it.
  3212. *
  3213. * @acb: The adapter which we are to init.
  3214. * @io_port: The base I/O port
  3215. * @io_port_len: The I/O port size
  3216. * @irq: IRQ
  3217. *
  3218. * Returns 0 if the initialization succeeds, any other value on
  3219. * failure.
  3220. **/
  3221. static int adapter_init(struct AdapterCtlBlk *acb, unsigned long io_port,
  3222. u32 io_port_len, unsigned int irq)
  3223. {
  3224. if (!request_region(io_port, io_port_len, DC395X_NAME)) {
  3225. goto failed;
  3226. }
  3227. /* store port base to indicate we have registered it */
  3228. acb->io_port_base = io_port;
  3229. acb->io_port_len = io_port_len;
  3230. if (request_irq(irq, dc395x_interrupt, IRQF_SHARED, DC395X_NAME, acb)) {
  3231. /* release the region we just claimed */
  3232. goto failed;
  3233. }
  3234. /* store irq to indicate we have registered it */
  3235. acb->irq_level = irq;
  3236. /* get eeprom configuration information and command line settings etc */
  3237. check_eeprom(&acb->eeprom, io_port);
  3238. print_eeprom_settings(&acb->eeprom);
  3239. /* setup adapter control block */
  3240. adapter_init_params(acb);
  3241. /* display card connectors/termination settings */
  3242. adapter_print_config(acb);
  3243. if (adapter_sg_tables_alloc(acb)) {
  3244. goto failed;
  3245. }
  3246. adapter_init_scsi_host(acb->scsi_host);
  3247. adapter_init_chip(acb);
  3248. set_basic_config(acb);
  3249. return 0;
  3250. failed:
  3251. if (acb->irq_level)
  3252. free_irq(acb->irq_level, acb);
  3253. if (acb->io_port_base)
  3254. release_region(acb->io_port_base, acb->io_port_len);
  3255. adapter_sg_tables_free(acb);
  3256. return 1;
  3257. }
  3258. /**
  3259. * adapter_uninit_chip - cleanly shut down the scsi controller chip,
  3260. * stopping all operations and disabling interrupt generation on the
  3261. * card.
  3262. *
  3263. * @acb: The adapter which we are to shutdown.
  3264. **/
  3265. static void adapter_uninit_chip(struct AdapterCtlBlk *acb)
  3266. {
  3267. /* disable interrupts */
  3268. DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0);
  3269. DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0);
  3270. /* reset the scsi bus */
  3271. if (acb->config & HCC_SCSI_RESET)
  3272. reset_scsi_bus(acb);
  3273. /* clear any pending interrupt state */
  3274. DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
  3275. }
  3276. /**
  3277. * adapter_uninit - Shut down the chip and release any resources that
  3278. * we had allocated. Once this returns the adapter should not be used
  3279. * anymore.
  3280. *
  3281. * @acb: The adapter which we are to un-initialize.
  3282. **/
  3283. static void adapter_uninit(struct AdapterCtlBlk *acb)
  3284. {
  3285. unsigned long flags;
  3286. DC395x_LOCK_IO(acb->scsi_host, flags);
  3287. /* remove timers */
  3288. if (timer_pending(&acb->waiting_timer))
  3289. timer_delete(&acb->waiting_timer);
  3290. if (timer_pending(&acb->selto_timer))
  3291. timer_delete(&acb->selto_timer);
  3292. adapter_uninit_chip(acb);
  3293. adapter_remove_and_free_all_devices(acb);
  3294. DC395x_UNLOCK_IO(acb->scsi_host, flags);
  3295. if (acb->irq_level)
  3296. free_irq(acb->irq_level, acb);
  3297. if (acb->io_port_base)
  3298. release_region(acb->io_port_base, acb->io_port_len);
  3299. adapter_sg_tables_free(acb);
  3300. }
  3301. #undef YESNO
  3302. #define YESNO(YN) \
  3303. if (YN) seq_printf(m, " Yes ");\
  3304. else seq_printf(m, " No ")
  3305. static int dc395x_show_info(struct seq_file *m, struct Scsi_Host *host)
  3306. {
  3307. struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata;
  3308. int spd, spd1;
  3309. struct DeviceCtlBlk *dcb;
  3310. unsigned long flags;
  3311. int dev;
  3312. seq_puts(m, DC395X_BANNER " PCI SCSI Host Adapter\n"
  3313. " Driver Version " DC395X_VERSION "\n");
  3314. DC395x_LOCK_IO(acb->scsi_host, flags);
  3315. seq_printf(m, "SCSI Host Nr %i, ", host->host_no);
  3316. seq_printf(m, "DC395U/UW/F DC315/U %s\n",
  3317. (acb->config & HCC_WIDE_CARD) ? "Wide" : "");
  3318. seq_printf(m, "io_port_base 0x%04lx, ", acb->io_port_base);
  3319. seq_printf(m, "irq_level 0x%04x, ", acb->irq_level);
  3320. seq_printf(m, " SelTimeout %ims\n", (1638 * acb->sel_timeout) / 1000);
  3321. seq_printf(m, "MaxID %i, MaxLUN %llu, ", host->max_id, host->max_lun);
  3322. seq_printf(m, "AdapterID %i\n", host->this_id);
  3323. seq_printf(m, "tag_max_num %i", acb->tag_max_num);
  3324. /*seq_printf(m, ", DMA_Status %i\n", DC395x_read8(acb, TRM_S1040_DMA_STATUS)); */
  3325. seq_printf(m, ", FilterCfg 0x%02x",
  3326. DC395x_read8(acb, TRM_S1040_SCSI_CONFIG1));
  3327. seq_printf(m, ", DelayReset %is\n", acb->eeprom.delay_time);
  3328. /*seq_printf(m, "\n"); */
  3329. seq_printf(m, "Nr of DCBs: %i\n", list_size(&acb->dcb_list));
  3330. seq_printf(m, "Map of attached LUNs: %8ph\n", &acb->dcb_map[0]);
  3331. seq_printf(m, " %8ph\n", &acb->dcb_map[8]);
  3332. seq_puts(m,
  3333. "Un ID LUN Prty Sync Wide DsCn SndS TagQ nego_period SyncFreq SyncOffs MaxCmd\n");
  3334. dev = 0;
  3335. list_for_each_entry(dcb, &acb->dcb_list, list) {
  3336. int nego_period;
  3337. seq_printf(m, "%02i %02i %02i ", dev, dcb->target_id,
  3338. dcb->target_lun);
  3339. YESNO(dcb->dev_mode & NTC_DO_PARITY_CHK);
  3340. YESNO(dcb->sync_offset);
  3341. YESNO(dcb->sync_period & WIDE_SYNC);
  3342. YESNO(dcb->dev_mode & NTC_DO_DISCONNECT);
  3343. YESNO(dcb->dev_mode & NTC_DO_SEND_START);
  3344. YESNO(dcb->sync_mode & EN_TAG_QUEUEING);
  3345. nego_period = clock_period[dcb->sync_period & 0x07] << 2;
  3346. if (dcb->sync_offset)
  3347. seq_printf(m, " %03i ns ", nego_period);
  3348. else
  3349. seq_printf(m, " (%03i ns)", (dcb->min_nego_period << 2));
  3350. if (dcb->sync_offset & 0x0f) {
  3351. spd = 1000 / (nego_period);
  3352. spd1 = 1000 % (nego_period);
  3353. spd1 = (spd1 * 10 + nego_period / 2) / (nego_period);
  3354. seq_printf(m, " %2i.%1i M %02i ", spd, spd1,
  3355. (dcb->sync_offset & 0x0f));
  3356. } else
  3357. seq_puts(m, " ");
  3358. /* Add more info ... */
  3359. seq_printf(m, " %02i\n", dcb->max_command);
  3360. dev++;
  3361. }
  3362. if (timer_pending(&acb->waiting_timer))
  3363. seq_puts(m, "Waiting queue timer running\n");
  3364. else
  3365. seq_putc(m, '\n');
  3366. list_for_each_entry(dcb, &acb->dcb_list, list) {
  3367. struct ScsiReqBlk *srb;
  3368. if (!list_empty(&dcb->srb_waiting_list))
  3369. seq_printf(m, "DCB (%02i-%i): Waiting: %i:",
  3370. dcb->target_id, dcb->target_lun,
  3371. list_size(&dcb->srb_waiting_list));
  3372. list_for_each_entry(srb, &dcb->srb_waiting_list, list)
  3373. seq_printf(m, " %p", srb->cmd);
  3374. if (!list_empty(&dcb->srb_going_list))
  3375. seq_printf(m, "\nDCB (%02i-%i): Going : %i:",
  3376. dcb->target_id, dcb->target_lun,
  3377. list_size(&dcb->srb_going_list));
  3378. list_for_each_entry(srb, &dcb->srb_going_list, list)
  3379. seq_printf(m, " %p", srb->cmd);
  3380. if (!list_empty(&dcb->srb_waiting_list) || !list_empty(&dcb->srb_going_list))
  3381. seq_putc(m, '\n');
  3382. }
  3383. DC395x_UNLOCK_IO(acb->scsi_host, flags);
  3384. return 0;
  3385. }
  3386. static const struct scsi_host_template dc395x_driver_template = {
  3387. .module = THIS_MODULE,
  3388. .proc_name = DC395X_NAME,
  3389. .show_info = dc395x_show_info,
  3390. .name = DC395X_BANNER " " DC395X_VERSION,
  3391. .queuecommand = dc395x_queue_command,
  3392. .sdev_init = dc395x_sdev_init,
  3393. .sdev_destroy = dc395x_sdev_destroy,
  3394. .can_queue = DC395x_MAX_CAN_QUEUE,
  3395. .this_id = 7,
  3396. .sg_tablesize = DC395x_MAX_SG_TABLESIZE,
  3397. .cmd_per_lun = DC395x_MAX_CMD_PER_LUN,
  3398. .eh_abort_handler = dc395x_eh_abort,
  3399. .eh_bus_reset_handler = dc395x_eh_bus_reset,
  3400. .dma_boundary = PAGE_SIZE - 1,
  3401. };
  3402. /**
  3403. * dc395x_init_one - Initialise a single instance of the adapter.
  3404. *
  3405. * The PCI layer will call this once for each instance of the adapter
  3406. * that it finds in the system. The pci_dev strcuture indicates which
  3407. * instance we are being called from.
  3408. *
  3409. * @dev: The PCI device to initialize.
  3410. * @id: Looks like a pointer to the entry in our pci device table
  3411. * that was actually matched by the PCI subsystem.
  3412. *
  3413. * Returns 0 on success, or an error code (-ve) on failure.
  3414. **/
  3415. static int dc395x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  3416. {
  3417. struct Scsi_Host *scsi_host = NULL;
  3418. struct AdapterCtlBlk *acb = NULL;
  3419. unsigned long io_port_base;
  3420. unsigned int io_port_len;
  3421. unsigned int irq;
  3422. if (pci_enable_device(dev))
  3423. return -ENODEV;
  3424. io_port_base = pci_resource_start(dev, 0) & PCI_BASE_ADDRESS_IO_MASK;
  3425. io_port_len = pci_resource_len(dev, 0);
  3426. irq = dev->irq;
  3427. /* allocate scsi host information (includes out adapter) */
  3428. scsi_host = scsi_host_alloc(&dc395x_driver_template,
  3429. sizeof(struct AdapterCtlBlk));
  3430. if (!scsi_host)
  3431. goto fail;
  3432. acb = (struct AdapterCtlBlk*)scsi_host->hostdata;
  3433. acb->scsi_host = scsi_host;
  3434. acb->dev = dev;
  3435. /* initialise the adapter and everything we need */
  3436. if (adapter_init(acb, io_port_base, io_port_len, irq)) {
  3437. acb = NULL;
  3438. goto fail;
  3439. }
  3440. pci_set_master(dev);
  3441. /* get the scsi mid level to scan for new devices on the bus */
  3442. if (scsi_add_host(scsi_host, &dev->dev))
  3443. goto fail;
  3444. pci_set_drvdata(dev, scsi_host);
  3445. scsi_scan_host(scsi_host);
  3446. return 0;
  3447. fail:
  3448. if (acb != NULL)
  3449. adapter_uninit(acb);
  3450. if (scsi_host != NULL)
  3451. scsi_host_put(scsi_host);
  3452. pci_disable_device(dev);
  3453. return -ENODEV;
  3454. }
  3455. /**
  3456. * dc395x_remove_one - Called to remove a single instance of the
  3457. * adapter.
  3458. *
  3459. * @dev: The PCI device to initialize.
  3460. **/
  3461. static void dc395x_remove_one(struct pci_dev *dev)
  3462. {
  3463. struct Scsi_Host *scsi_host = pci_get_drvdata(dev);
  3464. struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)(scsi_host->hostdata);
  3465. scsi_remove_host(scsi_host);
  3466. adapter_uninit(acb);
  3467. pci_disable_device(dev);
  3468. scsi_host_put(scsi_host);
  3469. }
  3470. static const struct pci_device_id dc395x_pci_table[] = {
  3471. {
  3472. .vendor = PCI_VENDOR_ID_TEKRAM,
  3473. .device = PCI_DEVICE_ID_TEKRAM_TRMS1040,
  3474. .subvendor = PCI_ANY_ID,
  3475. .subdevice = PCI_ANY_ID,
  3476. },
  3477. {} /* Terminating entry */
  3478. };
  3479. MODULE_DEVICE_TABLE(pci, dc395x_pci_table);
  3480. static struct pci_driver dc395x_driver = {
  3481. .name = DC395X_NAME,
  3482. .id_table = dc395x_pci_table,
  3483. .probe = dc395x_init_one,
  3484. .remove = dc395x_remove_one,
  3485. };
  3486. module_pci_driver(dc395x_driver);
  3487. MODULE_AUTHOR("C.L. Huang / Erich Chen / Kurt Garloff");
  3488. MODULE_DESCRIPTION("SCSI host adapter driver for Tekram TRM-S1040 based adapters: Tekram DC395 and DC315 series");
  3489. MODULE_LICENSE("GPL");