ism_drv.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * ISM driver for s390.
  4. *
  5. * Copyright IBM Corp. 2018
  6. */
  7. #define pr_fmt(fmt) "ism: " fmt
  8. #include <linux/export.h>
  9. #include <linux/module.h>
  10. #include <linux/types.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/device.h>
  13. #include <linux/err.h>
  14. #include <linux/ctype.h>
  15. #include <linux/processor.h>
  16. #include "ism.h"
  17. MODULE_DESCRIPTION("ISM driver for s390");
  18. MODULE_LICENSE("GPL");
  19. #define DRV_NAME "ism"
  20. static const struct pci_device_id ism_device_table[] = {
  21. { PCI_VDEVICE(IBM, PCI_DEVICE_ID_IBM_ISM), 0 },
  22. { 0, }
  23. };
  24. MODULE_DEVICE_TABLE(pci, ism_device_table);
  25. static debug_info_t *ism_debug_info;
  26. static int ism_cmd(struct ism_dev *ism, void *cmd)
  27. {
  28. struct ism_req_hdr *req = cmd;
  29. struct ism_resp_hdr *resp = cmd;
  30. spin_lock(&ism->cmd_lock);
  31. __ism_write_cmd(ism, req + 1, sizeof(*req), req->len - sizeof(*req));
  32. __ism_write_cmd(ism, req, 0, sizeof(*req));
  33. WRITE_ONCE(resp->ret, ISM_ERROR);
  34. __ism_read_cmd(ism, resp, 0, sizeof(*resp));
  35. if (resp->ret) {
  36. debug_text_event(ism_debug_info, 0, "cmd failure");
  37. debug_event(ism_debug_info, 0, resp, sizeof(*resp));
  38. goto out;
  39. }
  40. __ism_read_cmd(ism, resp + 1, sizeof(*resp), resp->len - sizeof(*resp));
  41. out:
  42. spin_unlock(&ism->cmd_lock);
  43. return resp->ret;
  44. }
  45. static int ism_cmd_simple(struct ism_dev *ism, u32 cmd_code)
  46. {
  47. union ism_cmd_simple cmd;
  48. memset(&cmd, 0, sizeof(cmd));
  49. cmd.request.hdr.cmd = cmd_code;
  50. cmd.request.hdr.len = sizeof(cmd.request);
  51. return ism_cmd(ism, &cmd);
  52. }
  53. static int query_info(struct ism_dev *ism)
  54. {
  55. union ism_qi cmd;
  56. memset(&cmd, 0, sizeof(cmd));
  57. cmd.request.hdr.cmd = ISM_QUERY_INFO;
  58. cmd.request.hdr.len = sizeof(cmd.request);
  59. if (ism_cmd(ism, &cmd))
  60. goto out;
  61. debug_text_event(ism_debug_info, 3, "query info");
  62. debug_event(ism_debug_info, 3, &cmd.response, sizeof(cmd.response));
  63. out:
  64. return 0;
  65. }
  66. static int register_sba(struct ism_dev *ism)
  67. {
  68. union ism_reg_sba cmd;
  69. dma_addr_t dma_handle;
  70. struct ism_sba *sba;
  71. sba = dma_alloc_coherent(&ism->pdev->dev, PAGE_SIZE, &dma_handle,
  72. GFP_KERNEL);
  73. if (!sba)
  74. return -ENOMEM;
  75. memset(&cmd, 0, sizeof(cmd));
  76. cmd.request.hdr.cmd = ISM_REG_SBA;
  77. cmd.request.hdr.len = sizeof(cmd.request);
  78. cmd.request.sba = dma_handle;
  79. if (ism_cmd(ism, &cmd)) {
  80. dma_free_coherent(&ism->pdev->dev, PAGE_SIZE, sba, dma_handle);
  81. return -EIO;
  82. }
  83. ism->sba = sba;
  84. ism->sba_dma_addr = dma_handle;
  85. return 0;
  86. }
  87. static int register_ieq(struct ism_dev *ism)
  88. {
  89. union ism_reg_ieq cmd;
  90. dma_addr_t dma_handle;
  91. struct ism_eq *ieq;
  92. ieq = dma_alloc_coherent(&ism->pdev->dev, PAGE_SIZE, &dma_handle,
  93. GFP_KERNEL);
  94. if (!ieq)
  95. return -ENOMEM;
  96. memset(&cmd, 0, sizeof(cmd));
  97. cmd.request.hdr.cmd = ISM_REG_IEQ;
  98. cmd.request.hdr.len = sizeof(cmd.request);
  99. cmd.request.ieq = dma_handle;
  100. cmd.request.len = sizeof(*ieq);
  101. if (ism_cmd(ism, &cmd)) {
  102. dma_free_coherent(&ism->pdev->dev, PAGE_SIZE, ieq, dma_handle);
  103. return -EIO;
  104. }
  105. ism->ieq = ieq;
  106. ism->ieq_idx = -1;
  107. ism->ieq_dma_addr = dma_handle;
  108. return 0;
  109. }
  110. static int unregister_sba(struct ism_dev *ism)
  111. {
  112. int ret;
  113. if (!ism->sba)
  114. return 0;
  115. ret = ism_cmd_simple(ism, ISM_UNREG_SBA);
  116. if (ret && ret != ISM_ERROR)
  117. return -EIO;
  118. dma_free_coherent(&ism->pdev->dev, PAGE_SIZE,
  119. ism->sba, ism->sba_dma_addr);
  120. ism->sba = NULL;
  121. ism->sba_dma_addr = 0;
  122. return 0;
  123. }
  124. static int unregister_ieq(struct ism_dev *ism)
  125. {
  126. int ret;
  127. if (!ism->ieq)
  128. return 0;
  129. ret = ism_cmd_simple(ism, ISM_UNREG_IEQ);
  130. if (ret && ret != ISM_ERROR)
  131. return -EIO;
  132. dma_free_coherent(&ism->pdev->dev, PAGE_SIZE,
  133. ism->ieq, ism->ieq_dma_addr);
  134. ism->ieq = NULL;
  135. ism->ieq_dma_addr = 0;
  136. return 0;
  137. }
  138. static int ism_read_local_gid(struct dibs_dev *dibs)
  139. {
  140. struct ism_dev *ism = dibs->drv_priv;
  141. union ism_read_gid cmd;
  142. int ret;
  143. memset(&cmd, 0, sizeof(cmd));
  144. cmd.request.hdr.cmd = ISM_READ_GID;
  145. cmd.request.hdr.len = sizeof(cmd.request);
  146. ret = ism_cmd(ism, &cmd);
  147. if (ret)
  148. goto out;
  149. memset(&dibs->gid, 0, sizeof(dibs->gid));
  150. memcpy(&dibs->gid, &cmd.response.gid, sizeof(cmd.response.gid));
  151. out:
  152. return ret;
  153. }
  154. static int ism_query_rgid(struct dibs_dev *dibs, const uuid_t *rgid,
  155. u32 vid_valid, u32 vid)
  156. {
  157. struct ism_dev *ism = dibs->drv_priv;
  158. union ism_query_rgid cmd;
  159. memset(&cmd, 0, sizeof(cmd));
  160. cmd.request.hdr.cmd = ISM_QUERY_RGID;
  161. cmd.request.hdr.len = sizeof(cmd.request);
  162. memcpy(&cmd.request.rgid, rgid, sizeof(cmd.request.rgid));
  163. cmd.request.vlan_valid = vid_valid;
  164. cmd.request.vlan_id = vid;
  165. return ism_cmd(ism, &cmd);
  166. }
  167. static int ism_max_dmbs(void)
  168. {
  169. return ISM_NR_DMBS;
  170. }
  171. static void ism_free_dmb(struct ism_dev *ism, struct dibs_dmb *dmb)
  172. {
  173. clear_bit(dmb->idx, ism->sba_bitmap);
  174. dma_unmap_page(&ism->pdev->dev, dmb->dma_addr, dmb->dmb_len,
  175. DMA_FROM_DEVICE);
  176. folio_put(virt_to_folio(dmb->cpu_addr));
  177. }
  178. static int ism_alloc_dmb(struct ism_dev *ism, struct dibs_dmb *dmb)
  179. {
  180. struct folio *folio;
  181. unsigned long bit;
  182. int rc;
  183. if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(&ism->pdev->dev))
  184. return -EINVAL;
  185. if (!dmb->idx) {
  186. bit = find_next_zero_bit(ism->sba_bitmap, ISM_NR_DMBS,
  187. ISM_DMB_BIT_OFFSET);
  188. if (bit == ISM_NR_DMBS)
  189. return -ENOSPC;
  190. dmb->idx = bit;
  191. }
  192. if (dmb->idx < ISM_DMB_BIT_OFFSET ||
  193. test_and_set_bit(dmb->idx, ism->sba_bitmap))
  194. return -EINVAL;
  195. folio = folio_alloc(GFP_KERNEL | __GFP_NOWARN | __GFP_NOMEMALLOC |
  196. __GFP_NORETRY, get_order(dmb->dmb_len));
  197. if (!folio) {
  198. rc = -ENOMEM;
  199. goto out_bit;
  200. }
  201. dmb->cpu_addr = folio_address(folio);
  202. dmb->dma_addr = dma_map_page(&ism->pdev->dev,
  203. virt_to_page(dmb->cpu_addr), 0,
  204. dmb->dmb_len, DMA_FROM_DEVICE);
  205. if (dma_mapping_error(&ism->pdev->dev, dmb->dma_addr)) {
  206. rc = -ENOMEM;
  207. goto out_free;
  208. }
  209. return 0;
  210. out_free:
  211. kfree(dmb->cpu_addr);
  212. out_bit:
  213. clear_bit(dmb->idx, ism->sba_bitmap);
  214. return rc;
  215. }
  216. static int ism_register_dmb(struct dibs_dev *dibs, struct dibs_dmb *dmb,
  217. struct dibs_client *client)
  218. {
  219. struct ism_dev *ism = dibs->drv_priv;
  220. union ism_reg_dmb cmd;
  221. unsigned long flags;
  222. int ret;
  223. ret = ism_alloc_dmb(ism, dmb);
  224. if (ret)
  225. goto out;
  226. memset(&cmd, 0, sizeof(cmd));
  227. cmd.request.hdr.cmd = ISM_REG_DMB;
  228. cmd.request.hdr.len = sizeof(cmd.request);
  229. cmd.request.dmb = dmb->dma_addr;
  230. cmd.request.dmb_len = dmb->dmb_len;
  231. cmd.request.sba_idx = dmb->idx;
  232. cmd.request.vlan_valid = dmb->vlan_valid;
  233. cmd.request.vlan_id = dmb->vlan_id;
  234. memcpy(&cmd.request.rgid, &dmb->rgid, sizeof(u64));
  235. ret = ism_cmd(ism, &cmd);
  236. if (ret) {
  237. ism_free_dmb(ism, dmb);
  238. goto out;
  239. }
  240. dmb->dmb_tok = cmd.response.dmb_tok;
  241. spin_lock_irqsave(&dibs->lock, flags);
  242. dibs->dmb_clientid_arr[dmb->idx - ISM_DMB_BIT_OFFSET] = client->id;
  243. spin_unlock_irqrestore(&dibs->lock, flags);
  244. out:
  245. return ret;
  246. }
  247. static int ism_unregister_dmb(struct dibs_dev *dibs, struct dibs_dmb *dmb)
  248. {
  249. struct ism_dev *ism = dibs->drv_priv;
  250. union ism_unreg_dmb cmd;
  251. unsigned long flags;
  252. int ret;
  253. memset(&cmd, 0, sizeof(cmd));
  254. cmd.request.hdr.cmd = ISM_UNREG_DMB;
  255. cmd.request.hdr.len = sizeof(cmd.request);
  256. cmd.request.dmb_tok = dmb->dmb_tok;
  257. spin_lock_irqsave(&dibs->lock, flags);
  258. dibs->dmb_clientid_arr[dmb->idx - ISM_DMB_BIT_OFFSET] = NO_DIBS_CLIENT;
  259. spin_unlock_irqrestore(&dibs->lock, flags);
  260. ret = ism_cmd(ism, &cmd);
  261. if (ret && ret != ISM_ERROR)
  262. goto out;
  263. ism_free_dmb(ism, dmb);
  264. out:
  265. return ret;
  266. }
  267. static int ism_add_vlan_id(struct dibs_dev *dibs, u64 vlan_id)
  268. {
  269. struct ism_dev *ism = dibs->drv_priv;
  270. union ism_set_vlan_id cmd;
  271. memset(&cmd, 0, sizeof(cmd));
  272. cmd.request.hdr.cmd = ISM_ADD_VLAN_ID;
  273. cmd.request.hdr.len = sizeof(cmd.request);
  274. cmd.request.vlan_id = vlan_id;
  275. return ism_cmd(ism, &cmd);
  276. }
  277. static int ism_del_vlan_id(struct dibs_dev *dibs, u64 vlan_id)
  278. {
  279. struct ism_dev *ism = dibs->drv_priv;
  280. union ism_set_vlan_id cmd;
  281. memset(&cmd, 0, sizeof(cmd));
  282. cmd.request.hdr.cmd = ISM_DEL_VLAN_ID;
  283. cmd.request.hdr.len = sizeof(cmd.request);
  284. cmd.request.vlan_id = vlan_id;
  285. return ism_cmd(ism, &cmd);
  286. }
  287. static int ism_signal_ieq(struct dibs_dev *dibs, const uuid_t *rgid,
  288. u32 trigger_irq, u32 event_code, u64 info)
  289. {
  290. struct ism_dev *ism = dibs->drv_priv;
  291. union ism_sig_ieq cmd;
  292. memset(&cmd, 0, sizeof(cmd));
  293. cmd.request.hdr.cmd = ISM_SIGNAL_IEQ;
  294. cmd.request.hdr.len = sizeof(cmd.request);
  295. memcpy(&cmd.request.rgid, rgid, sizeof(cmd.request.rgid));
  296. cmd.request.trigger_irq = trigger_irq;
  297. cmd.request.event_code = event_code;
  298. cmd.request.info = info;
  299. return ism_cmd(ism, &cmd);
  300. }
  301. static unsigned int max_bytes(unsigned int start, unsigned int len,
  302. unsigned int boundary)
  303. {
  304. return min(boundary - (start & (boundary - 1)), len);
  305. }
  306. static int ism_move(struct dibs_dev *dibs, u64 dmb_tok, unsigned int idx,
  307. bool sf, unsigned int offset, void *data,
  308. unsigned int size)
  309. {
  310. struct ism_dev *ism = dibs->drv_priv;
  311. unsigned int bytes;
  312. u64 dmb_req;
  313. int ret;
  314. while (size) {
  315. bytes = max_bytes(offset, size, PAGE_SIZE);
  316. dmb_req = ISM_CREATE_REQ(dmb_tok, idx, size == bytes ? sf : 0,
  317. offset);
  318. ret = __ism_move(ism, dmb_req, data, bytes);
  319. if (ret)
  320. return ret;
  321. size -= bytes;
  322. data += bytes;
  323. offset += bytes;
  324. }
  325. return 0;
  326. }
  327. static u16 ism_get_chid(struct dibs_dev *dibs)
  328. {
  329. struct ism_dev *ism = dibs->drv_priv;
  330. if (!ism || !ism->pdev)
  331. return 0;
  332. return to_zpci(ism->pdev)->pchid;
  333. }
  334. static int ism_match_event_type(u32 s390_event_type)
  335. {
  336. switch (s390_event_type) {
  337. case ISM_EVENT_BUF:
  338. return DIBS_BUF_EVENT;
  339. case ISM_EVENT_DEV:
  340. return DIBS_DEV_EVENT;
  341. case ISM_EVENT_SWR:
  342. return DIBS_SW_EVENT;
  343. default:
  344. return DIBS_OTHER_TYPE;
  345. }
  346. }
  347. static int ism_match_event_subtype(u32 s390_event_subtype)
  348. {
  349. switch (s390_event_subtype) {
  350. case ISM_BUF_DMB_UNREGISTERED:
  351. return DIBS_BUF_UNREGISTERED;
  352. case ISM_DEV_GID_DISABLED:
  353. return DIBS_DEV_DISABLED;
  354. case ISM_DEV_GID_ERR_STATE:
  355. return DIBS_DEV_ERR_STATE;
  356. default:
  357. return DIBS_OTHER_SUBTYPE;
  358. }
  359. }
  360. static void ism_handle_event(struct ism_dev *ism)
  361. {
  362. struct dibs_dev *dibs = ism->dibs;
  363. struct dibs_event event;
  364. struct ism_event *entry;
  365. struct dibs_client *clt;
  366. int i;
  367. while ((ism->ieq_idx + 1) != READ_ONCE(ism->ieq->header.idx)) {
  368. if (++ism->ieq_idx == ARRAY_SIZE(ism->ieq->entry))
  369. ism->ieq_idx = 0;
  370. entry = &ism->ieq->entry[ism->ieq_idx];
  371. debug_event(ism_debug_info, 2, entry, sizeof(*entry));
  372. __memset(&event, 0, sizeof(event));
  373. event.type = ism_match_event_type(entry->type);
  374. if (event.type == DIBS_SW_EVENT)
  375. event.subtype = entry->code;
  376. else
  377. event.subtype = ism_match_event_subtype(entry->code);
  378. event.time = entry->time;
  379. event.data = entry->info;
  380. switch (event.type) {
  381. case DIBS_BUF_EVENT:
  382. event.buffer_tok = entry->tok;
  383. break;
  384. case DIBS_DEV_EVENT:
  385. case DIBS_SW_EVENT:
  386. memcpy(&event.gid, &entry->tok, sizeof(u64));
  387. }
  388. for (i = 0; i < MAX_DIBS_CLIENTS; ++i) {
  389. clt = dibs->subs[i];
  390. if (clt)
  391. clt->ops->handle_event(dibs, &event);
  392. }
  393. }
  394. }
  395. static irqreturn_t ism_handle_irq(int irq, void *data)
  396. {
  397. struct ism_dev *ism = data;
  398. unsigned long bit, end;
  399. struct dibs_dev *dibs;
  400. unsigned long *bv;
  401. u16 dmbemask;
  402. u8 client_id;
  403. dibs = ism->dibs;
  404. bv = (void *) &ism->sba->dmb_bits[ISM_DMB_WORD_OFFSET];
  405. end = sizeof(ism->sba->dmb_bits) * BITS_PER_BYTE - ISM_DMB_BIT_OFFSET;
  406. spin_lock(&dibs->lock);
  407. ism->sba->s = 0;
  408. barrier();
  409. for (bit = 0;;) {
  410. bit = find_next_bit_inv(bv, end, bit);
  411. if (bit >= end)
  412. break;
  413. clear_bit_inv(bit, bv);
  414. dmbemask = ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET];
  415. ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET] = 0;
  416. barrier();
  417. client_id = dibs->dmb_clientid_arr[bit];
  418. if (unlikely(client_id == NO_DIBS_CLIENT ||
  419. !dibs->subs[client_id]))
  420. continue;
  421. dibs->subs[client_id]->ops->handle_irq(dibs,
  422. bit + ISM_DMB_BIT_OFFSET,
  423. dmbemask);
  424. }
  425. if (ism->sba->e) {
  426. ism->sba->e = 0;
  427. barrier();
  428. ism_handle_event(ism);
  429. }
  430. spin_unlock(&dibs->lock);
  431. return IRQ_HANDLED;
  432. }
  433. static const struct dibs_dev_ops ism_ops = {
  434. .get_fabric_id = ism_get_chid,
  435. .query_remote_gid = ism_query_rgid,
  436. .max_dmbs = ism_max_dmbs,
  437. .register_dmb = ism_register_dmb,
  438. .unregister_dmb = ism_unregister_dmb,
  439. .move_data = ism_move,
  440. .add_vlan_id = ism_add_vlan_id,
  441. .del_vlan_id = ism_del_vlan_id,
  442. .signal_event = ism_signal_ieq,
  443. };
  444. static int ism_dev_init(struct ism_dev *ism)
  445. {
  446. struct pci_dev *pdev = ism->pdev;
  447. int ret;
  448. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
  449. if (ret <= 0)
  450. goto out;
  451. ret = request_irq(pci_irq_vector(pdev, 0), ism_handle_irq, 0,
  452. pci_name(pdev), ism);
  453. if (ret)
  454. goto free_vectors;
  455. ret = register_sba(ism);
  456. if (ret)
  457. goto free_irq;
  458. ret = register_ieq(ism);
  459. if (ret)
  460. goto unreg_sba;
  461. query_info(ism);
  462. return 0;
  463. unreg_sba:
  464. unregister_sba(ism);
  465. free_irq:
  466. free_irq(pci_irq_vector(pdev, 0), ism);
  467. free_vectors:
  468. pci_free_irq_vectors(pdev);
  469. out:
  470. return ret;
  471. }
  472. static void ism_dev_exit(struct ism_dev *ism)
  473. {
  474. struct pci_dev *pdev = ism->pdev;
  475. unregister_ieq(ism);
  476. unregister_sba(ism);
  477. free_irq(pci_irq_vector(pdev, 0), ism);
  478. pci_free_irq_vectors(pdev);
  479. }
  480. static int ism_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  481. {
  482. struct dibs_dev *dibs;
  483. struct zpci_dev *zdev;
  484. struct ism_dev *ism;
  485. int ret;
  486. ism = kzalloc_obj(*ism);
  487. if (!ism)
  488. return -ENOMEM;
  489. spin_lock_init(&ism->cmd_lock);
  490. dev_set_drvdata(&pdev->dev, ism);
  491. ism->pdev = pdev;
  492. ret = pci_enable_device_mem(pdev);
  493. if (ret)
  494. goto err_dev;
  495. ret = pci_request_mem_regions(pdev, DRV_NAME);
  496. if (ret)
  497. goto err_disable;
  498. ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  499. if (ret)
  500. goto err_resource;
  501. dma_set_seg_boundary(&pdev->dev, SZ_1M - 1);
  502. dma_set_max_seg_size(&pdev->dev, SZ_1M);
  503. pci_set_master(pdev);
  504. dibs = dibs_dev_alloc();
  505. if (!dibs) {
  506. ret = -ENOMEM;
  507. goto err_resource;
  508. }
  509. /* set this up before we enable interrupts */
  510. ism->dibs = dibs;
  511. dibs->drv_priv = ism;
  512. dibs->ops = &ism_ops;
  513. /* enable ism device, but any interrupts and events will be ignored
  514. * before dibs_dev_add() adds it to any clients.
  515. */
  516. ret = ism_dev_init(ism);
  517. if (ret)
  518. goto err_dibs;
  519. /* after ism_dev_init() we can call ism function to set gid */
  520. ret = ism_read_local_gid(dibs);
  521. if (ret)
  522. goto err_ism;
  523. dibs->dev.parent = &pdev->dev;
  524. zdev = to_zpci(pdev);
  525. dev_set_name(&dibs->dev, "ism%x", zdev->uid ? zdev->uid : zdev->fid);
  526. ret = dibs_dev_add(dibs);
  527. if (ret)
  528. goto err_ism;
  529. return 0;
  530. err_ism:
  531. ism_dev_exit(ism);
  532. err_dibs:
  533. /* pairs with dibs_dev_alloc() */
  534. put_device(&dibs->dev);
  535. err_resource:
  536. pci_release_mem_regions(pdev);
  537. err_disable:
  538. pci_disable_device(pdev);
  539. err_dev:
  540. dev_set_drvdata(&pdev->dev, NULL);
  541. kfree(ism);
  542. return ret;
  543. }
  544. static void ism_remove(struct pci_dev *pdev)
  545. {
  546. struct ism_dev *ism = dev_get_drvdata(&pdev->dev);
  547. struct dibs_dev *dibs = ism->dibs;
  548. dibs_dev_del(dibs);
  549. ism_dev_exit(ism);
  550. /* pairs with dibs_dev_alloc() */
  551. put_device(&dibs->dev);
  552. pci_release_mem_regions(pdev);
  553. pci_disable_device(pdev);
  554. dev_set_drvdata(&pdev->dev, NULL);
  555. kfree(ism);
  556. }
  557. static struct pci_driver ism_driver = {
  558. .name = DRV_NAME,
  559. .id_table = ism_device_table,
  560. .probe = ism_probe,
  561. .remove = ism_remove,
  562. };
  563. static int __init ism_init(void)
  564. {
  565. int ret;
  566. ism_debug_info = debug_register("ism", 2, 1, 16);
  567. if (!ism_debug_info)
  568. return -ENODEV;
  569. debug_register_view(ism_debug_info, &debug_hex_ascii_view);
  570. ret = pci_register_driver(&ism_driver);
  571. if (ret)
  572. debug_unregister(ism_debug_info);
  573. return ret;
  574. }
  575. static void __exit ism_exit(void)
  576. {
  577. pci_unregister_driver(&ism_driver);
  578. debug_unregister(ism_debug_info);
  579. }
  580. module_init(ism_init);
  581. module_exit(ism_exit);