ctcm_fsms.c 74 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2001, 2007
  4. * Authors: Fritz Elfert (felfert@millenux.com)
  5. * Peter Tiedemann (ptiedem@de.ibm.com)
  6. * MPC additions :
  7. * Belinda Thompson (belindat@us.ibm.com)
  8. * Andy Richter (richtera@us.ibm.com)
  9. */
  10. #undef DEBUG
  11. #undef DEBUGDATA
  12. #undef DEBUGCCW
  13. #define pr_fmt(fmt) "ctcm: " fmt
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/kernel.h>
  17. #include <linux/slab.h>
  18. #include <linux/errno.h>
  19. #include <linux/types.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/timer.h>
  22. #include <linux/bitops.h>
  23. #include <linux/signal.h>
  24. #include <linux/string.h>
  25. #include <linux/ip.h>
  26. #include <linux/if_arp.h>
  27. #include <linux/tcp.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/ctype.h>
  30. #include <net/dst.h>
  31. #include <linux/io.h>
  32. #include <asm/ccwdev.h>
  33. #include <asm/ccwgroup.h>
  34. #include <linux/uaccess.h>
  35. #include <asm/idals.h>
  36. #include "fsm.h"
  37. #include "ctcm_dbug.h"
  38. #include "ctcm_main.h"
  39. #include "ctcm_fsms.h"
  40. const char *dev_state_names[] = {
  41. [DEV_STATE_STOPPED] = "Stopped",
  42. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  43. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  44. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  45. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  46. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  47. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  48. [DEV_STATE_RUNNING] = "Running",
  49. };
  50. const char *dev_event_names[] = {
  51. [DEV_EVENT_START] = "Start",
  52. [DEV_EVENT_STOP] = "Stop",
  53. [DEV_EVENT_RXUP] = "RX up",
  54. [DEV_EVENT_TXUP] = "TX up",
  55. [DEV_EVENT_RXDOWN] = "RX down",
  56. [DEV_EVENT_TXDOWN] = "TX down",
  57. [DEV_EVENT_RESTART] = "Restart",
  58. };
  59. const char *ctc_ch_event_names[] = {
  60. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  61. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  62. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  63. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  64. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  65. [CTC_EVENT_ATTN] = "Status ATTN",
  66. [CTC_EVENT_BUSY] = "Status BUSY",
  67. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  68. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  69. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  70. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  71. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  72. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  73. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  74. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  75. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  76. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  77. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  78. [CTC_EVENT_IRQ] = "IRQ normal",
  79. [CTC_EVENT_FINSTAT] = "IRQ final",
  80. [CTC_EVENT_TIMER] = "Timer",
  81. [CTC_EVENT_START] = "Start",
  82. [CTC_EVENT_STOP] = "Stop",
  83. /*
  84. * additional MPC events
  85. */
  86. [CTC_EVENT_SEND_XID] = "XID Exchange",
  87. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  88. };
  89. const char *ctc_ch_state_names[] = {
  90. [CTC_STATE_IDLE] = "Idle",
  91. [CTC_STATE_STOPPED] = "Stopped",
  92. [CTC_STATE_STARTWAIT] = "StartWait",
  93. [CTC_STATE_STARTRETRY] = "StartRetry",
  94. [CTC_STATE_SETUPWAIT] = "SetupWait",
  95. [CTC_STATE_RXINIT] = "RX init",
  96. [CTC_STATE_TXINIT] = "TX init",
  97. [CTC_STATE_RX] = "RX",
  98. [CTC_STATE_TX] = "TX",
  99. [CTC_STATE_RXIDLE] = "RX idle",
  100. [CTC_STATE_TXIDLE] = "TX idle",
  101. [CTC_STATE_RXERR] = "RX error",
  102. [CTC_STATE_TXERR] = "TX error",
  103. [CTC_STATE_TERM] = "Terminating",
  104. [CTC_STATE_DTERM] = "Restarting",
  105. [CTC_STATE_NOTOP] = "Not operational",
  106. /*
  107. * additional MPC states
  108. */
  109. [CH_XID0_PENDING] = "Pending XID0 Start",
  110. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  111. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  112. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  113. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  114. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  115. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  116. };
  117. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  118. /*
  119. * ----- static ctcm actions for channel statemachine -----
  120. *
  121. */
  122. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  123. static void chx_rx(fsm_instance *fi, int event, void *arg);
  124. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  125. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  126. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  127. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  140. /*
  141. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  142. *
  143. */
  144. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  145. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  146. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  147. /* shared :
  148. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  149. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  150. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  162. */
  163. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  164. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  165. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  166. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  167. /*
  168. * Check return code of a preceding ccw_device call, halt_IO etc...
  169. *
  170. * ch : The channel, the error belongs to.
  171. * Returns the error code (!= 0) to inspect.
  172. */
  173. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  174. {
  175. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  176. "%s(%s): %s: %04x\n",
  177. CTCM_FUNTAIL, ch->id, msg, rc);
  178. switch (rc) {
  179. case -EBUSY:
  180. pr_info("%s: The communication peer is busy\n",
  181. ch->id);
  182. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  183. break;
  184. case -ENODEV:
  185. pr_err("%s: The specified target device is not valid\n",
  186. ch->id);
  187. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  188. break;
  189. default:
  190. pr_err("An I/O operation resulted in error %04x\n",
  191. rc);
  192. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  193. }
  194. }
  195. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  196. {
  197. struct sk_buff *skb;
  198. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  199. while ((skb = skb_dequeue(q))) {
  200. refcount_dec(&skb->users);
  201. dev_kfree_skb_any(skb);
  202. }
  203. }
  204. /*
  205. * NOP action for statemachines
  206. */
  207. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  208. {
  209. }
  210. /*
  211. * Actions for channel - statemachines.
  212. */
  213. /*
  214. * Normal data has been send. Free the corresponding
  215. * skb (it's in io_queue), reset dev->tbusy and
  216. * revert to idle state.
  217. *
  218. * fi An instance of a channel statemachine.
  219. * event The event, just happened.
  220. * arg Generic pointer, casted from channel * upon call.
  221. */
  222. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  223. {
  224. struct channel *ch = arg;
  225. struct net_device *dev = ch->netdev;
  226. struct ctcm_priv *priv = dev->ml_priv;
  227. struct sk_buff *skb;
  228. int first = 1;
  229. int i;
  230. unsigned long duration;
  231. unsigned long done_stamp = jiffies;
  232. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  233. duration = done_stamp - ch->prof.send_stamp;
  234. if (duration > ch->prof.tx_time)
  235. ch->prof.tx_time = duration;
  236. if (ch->irb->scsw.cmd.count != 0)
  237. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  238. "%s(%s): TX not complete, remaining %d bytes",
  239. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  240. fsm_deltimer(&ch->timer);
  241. while ((skb = skb_dequeue(&ch->io_queue))) {
  242. priv->stats.tx_packets++;
  243. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  244. if (first) {
  245. priv->stats.tx_bytes += 2;
  246. first = 0;
  247. }
  248. refcount_dec(&skb->users);
  249. dev_kfree_skb_irq(skb);
  250. }
  251. spin_lock(&ch->collect_lock);
  252. clear_normalized_cda(&ch->ccw[4]);
  253. if (ch->collect_len > 0) {
  254. int rc;
  255. if (ctcm_checkalloc_buffer(ch)) {
  256. spin_unlock(&ch->collect_lock);
  257. return;
  258. }
  259. ch->trans_skb->data = ch->trans_skb_data;
  260. skb_reset_tail_pointer(ch->trans_skb);
  261. ch->trans_skb->len = 0;
  262. if (ch->prof.maxmulti < (ch->collect_len + 2))
  263. ch->prof.maxmulti = ch->collect_len + 2;
  264. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  265. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  266. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  267. i = 0;
  268. while ((skb = skb_dequeue(&ch->collect_queue))) {
  269. skb_copy_from_linear_data(skb,
  270. skb_put(ch->trans_skb, skb->len), skb->len);
  271. priv->stats.tx_packets++;
  272. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  273. refcount_dec(&skb->users);
  274. dev_kfree_skb_irq(skb);
  275. i++;
  276. }
  277. ch->collect_len = 0;
  278. spin_unlock(&ch->collect_lock);
  279. ch->ccw[1].count = ch->trans_skb->len;
  280. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  281. ch->prof.send_stamp = jiffies;
  282. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  283. ch->prof.doios_multi++;
  284. if (rc != 0) {
  285. priv->stats.tx_dropped += i;
  286. priv->stats.tx_errors += i;
  287. fsm_deltimer(&ch->timer);
  288. ctcm_ccw_check_rc(ch, rc, "chained TX");
  289. }
  290. } else {
  291. spin_unlock(&ch->collect_lock);
  292. fsm_newstate(fi, CTC_STATE_TXIDLE);
  293. }
  294. ctcm_clear_busy_do(dev);
  295. }
  296. /*
  297. * Initial data is sent.
  298. * Notify device statemachine that we are up and
  299. * running.
  300. *
  301. * fi An instance of a channel statemachine.
  302. * event The event, just happened.
  303. * arg Generic pointer, casted from channel * upon call.
  304. */
  305. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  306. {
  307. struct channel *ch = arg;
  308. struct net_device *dev = ch->netdev;
  309. struct ctcm_priv *priv = dev->ml_priv;
  310. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  311. fsm_deltimer(&ch->timer);
  312. fsm_newstate(fi, CTC_STATE_TXIDLE);
  313. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  314. }
  315. /*
  316. * Got normal data, check for sanity, queue it up, allocate new buffer
  317. * trigger bottom half, and initiate next read.
  318. *
  319. * fi An instance of a channel statemachine.
  320. * event The event, just happened.
  321. * arg Generic pointer, casted from channel * upon call.
  322. */
  323. static void chx_rx(fsm_instance *fi, int event, void *arg)
  324. {
  325. struct channel *ch = arg;
  326. struct net_device *dev = ch->netdev;
  327. struct ctcm_priv *priv = dev->ml_priv;
  328. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  329. struct sk_buff *skb = ch->trans_skb;
  330. __u16 block_len = *((__u16 *)skb->data);
  331. int check_len;
  332. int rc;
  333. fsm_deltimer(&ch->timer);
  334. if (len < 8) {
  335. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  336. "%s(%s): got packet with length %d < 8\n",
  337. CTCM_FUNTAIL, dev->name, len);
  338. priv->stats.rx_dropped++;
  339. priv->stats.rx_length_errors++;
  340. goto again;
  341. }
  342. if (len > ch->max_bufsize) {
  343. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  344. "%s(%s): got packet with length %d > %d\n",
  345. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  346. priv->stats.rx_dropped++;
  347. priv->stats.rx_length_errors++;
  348. goto again;
  349. }
  350. /*
  351. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  352. */
  353. switch (ch->protocol) {
  354. case CTCM_PROTO_S390:
  355. case CTCM_PROTO_OS390:
  356. check_len = block_len + 2;
  357. break;
  358. default:
  359. check_len = block_len;
  360. break;
  361. }
  362. if ((len < block_len) || (len > check_len)) {
  363. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  364. "%s(%s): got block length %d != rx length %d\n",
  365. CTCM_FUNTAIL, dev->name, block_len, len);
  366. if (do_debug)
  367. ctcmpc_dump_skb(skb, 0);
  368. *((__u16 *)skb->data) = len;
  369. priv->stats.rx_dropped++;
  370. priv->stats.rx_length_errors++;
  371. goto again;
  372. }
  373. if (block_len > 2) {
  374. *((__u16 *)skb->data) = block_len - 2;
  375. ctcm_unpack_skb(ch, skb);
  376. }
  377. again:
  378. skb->data = ch->trans_skb_data;
  379. skb_reset_tail_pointer(skb);
  380. skb->len = 0;
  381. if (ctcm_checkalloc_buffer(ch))
  382. return;
  383. ch->ccw[1].count = ch->max_bufsize;
  384. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  385. if (rc != 0)
  386. ctcm_ccw_check_rc(ch, rc, "normal RX");
  387. }
  388. /*
  389. * Initialize connection by sending a __u16 of value 0.
  390. *
  391. * fi An instance of a channel statemachine.
  392. * event The event, just happened.
  393. * arg Generic pointer, casted from channel * upon call.
  394. */
  395. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  396. {
  397. int rc;
  398. struct channel *ch = arg;
  399. int fsmstate = fsm_getstate(fi);
  400. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  401. "%s(%s) : %02x",
  402. CTCM_FUNTAIL, ch->id, fsmstate);
  403. ch->sense_rc = 0; /* reset unit check report control */
  404. if (fsmstate == CTC_STATE_TXIDLE)
  405. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  406. "%s(%s): remote side issued READ?, init.\n",
  407. CTCM_FUNTAIL, ch->id);
  408. fsm_deltimer(&ch->timer);
  409. if (ctcm_checkalloc_buffer(ch))
  410. return;
  411. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  412. (ch->protocol == CTCM_PROTO_OS390)) {
  413. /* OS/390 resp. z/OS */
  414. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  415. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  416. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  417. CTC_EVENT_TIMER, ch);
  418. chx_rxidle(fi, event, arg);
  419. } else {
  420. struct net_device *dev = ch->netdev;
  421. struct ctcm_priv *priv = dev->ml_priv;
  422. fsm_newstate(fi, CTC_STATE_TXIDLE);
  423. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  424. }
  425. return;
  426. }
  427. /*
  428. * Don't setup a timer for receiving the initial RX frame
  429. * if in compatibility mode, since VM TCP delays the initial
  430. * frame until it has some data to send.
  431. */
  432. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_WRITE) ||
  433. (ch->protocol != CTCM_PROTO_S390))
  434. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  435. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  436. ch->ccw[1].count = 2; /* Transfer only length */
  437. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  438. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  439. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  440. if (rc != 0) {
  441. fsm_deltimer(&ch->timer);
  442. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  443. ctcm_ccw_check_rc(ch, rc, "init IO");
  444. }
  445. /*
  446. * If in compatibility mode since we don't setup a timer, we
  447. * also signal RX channel up immediately. This enables us
  448. * to send packets early which in turn usually triggers some
  449. * reply from VM TCP which brings up the RX channel to it's
  450. * final state.
  451. */
  452. if ((CHANNEL_DIRECTION(ch->flags) == CTCM_READ) &&
  453. (ch->protocol == CTCM_PROTO_S390)) {
  454. struct net_device *dev = ch->netdev;
  455. struct ctcm_priv *priv = dev->ml_priv;
  456. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  457. }
  458. }
  459. /*
  460. * Got initial data, check it. If OK,
  461. * notify device statemachine that we are up and
  462. * running.
  463. *
  464. * fi An instance of a channel statemachine.
  465. * event The event, just happened.
  466. * arg Generic pointer, casted from channel * upon call.
  467. */
  468. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  469. {
  470. struct channel *ch = arg;
  471. struct net_device *dev = ch->netdev;
  472. struct ctcm_priv *priv = dev->ml_priv;
  473. __u16 buflen;
  474. int rc;
  475. fsm_deltimer(&ch->timer);
  476. buflen = *((__u16 *)ch->trans_skb->data);
  477. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  478. __func__, dev->name, buflen);
  479. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  480. if (ctcm_checkalloc_buffer(ch))
  481. return;
  482. ch->ccw[1].count = ch->max_bufsize;
  483. fsm_newstate(fi, CTC_STATE_RXIDLE);
  484. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  485. if (rc != 0) {
  486. fsm_newstate(fi, CTC_STATE_RXINIT);
  487. ctcm_ccw_check_rc(ch, rc, "initial RX");
  488. } else
  489. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  490. } else {
  491. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  492. __func__, dev->name,
  493. buflen, CTCM_INITIAL_BLOCKLEN);
  494. chx_firstio(fi, event, arg);
  495. }
  496. }
  497. /*
  498. * Set channel into extended mode.
  499. *
  500. * fi An instance of a channel statemachine.
  501. * event The event, just happened.
  502. * arg Generic pointer, casted from channel * upon call.
  503. */
  504. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  505. {
  506. struct channel *ch = arg;
  507. int rc;
  508. unsigned long saveflags = 0;
  509. int timeout = CTCM_TIME_5_SEC;
  510. fsm_deltimer(&ch->timer);
  511. if (IS_MPC(ch)) {
  512. timeout = 1500;
  513. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  514. __func__, smp_processor_id(), ch, ch->id);
  515. }
  516. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  517. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  518. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  519. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  520. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  521. /* Such conditional locking is undeterministic in
  522. * static view. => ignore sparse warnings here. */
  523. rc = ccw_device_start(ch->cdev, &ch->ccw[6], 0, 0xff, 0);
  524. if (event == CTC_EVENT_TIMER) /* see above comments */
  525. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  526. if (rc != 0) {
  527. fsm_deltimer(&ch->timer);
  528. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  529. ctcm_ccw_check_rc(ch, rc, "set Mode");
  530. } else
  531. ch->retry = 0;
  532. }
  533. /*
  534. * Setup channel.
  535. *
  536. * fi An instance of a channel statemachine.
  537. * event The event, just happened.
  538. * arg Generic pointer, casted from channel * upon call.
  539. */
  540. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  541. {
  542. struct channel *ch = arg;
  543. unsigned long saveflags;
  544. int rc;
  545. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  546. CTCM_FUNTAIL, ch->id,
  547. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX");
  548. if (ch->trans_skb != NULL) {
  549. clear_normalized_cda(&ch->ccw[1]);
  550. dev_kfree_skb(ch->trans_skb);
  551. ch->trans_skb = NULL;
  552. }
  553. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  554. ch->ccw[1].cmd_code = CCW_CMD_READ;
  555. ch->ccw[1].flags = CCW_FLAG_SLI;
  556. ch->ccw[1].count = 0;
  557. } else {
  558. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  559. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  560. ch->ccw[1].count = 0;
  561. }
  562. if (ctcm_checkalloc_buffer(ch)) {
  563. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  564. "%s(%s): %s trans_skb alloc delayed "
  565. "until first transfer",
  566. CTCM_FUNTAIL, ch->id,
  567. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ?
  568. "RX" : "TX");
  569. }
  570. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  571. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  572. ch->ccw[0].count = 0;
  573. ch->ccw[0].cda = 0;
  574. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  575. ch->ccw[2].flags = CCW_FLAG_SLI;
  576. ch->ccw[2].count = 0;
  577. ch->ccw[2].cda = 0;
  578. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  579. ch->ccw[4].cda = 0;
  580. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  581. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  582. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  583. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  584. rc = ccw_device_halt(ch->cdev, 0);
  585. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  586. if (rc != 0) {
  587. if (rc != -EBUSY)
  588. fsm_deltimer(&ch->timer);
  589. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  590. }
  591. }
  592. /*
  593. * Shutdown a channel.
  594. *
  595. * fi An instance of a channel statemachine.
  596. * event The event, just happened.
  597. * arg Generic pointer, casted from channel * upon call.
  598. */
  599. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  600. {
  601. struct channel *ch = arg;
  602. unsigned long saveflags = 0;
  603. int rc;
  604. int oldstate;
  605. fsm_deltimer(&ch->timer);
  606. if (IS_MPC(ch))
  607. fsm_deltimer(&ch->sweep_timer);
  608. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  609. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  610. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  611. /* Such conditional locking is undeterministic in
  612. * static view. => ignore sparse warnings here. */
  613. oldstate = fsm_getstate(fi);
  614. fsm_newstate(fi, CTC_STATE_TERM);
  615. rc = ccw_device_halt(ch->cdev, 0);
  616. if (event == CTC_EVENT_STOP)
  617. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  618. /* see remark above about conditional locking */
  619. if (rc != 0 && rc != -EBUSY) {
  620. fsm_deltimer(&ch->timer);
  621. if (event != CTC_EVENT_STOP) {
  622. fsm_newstate(fi, oldstate);
  623. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  624. }
  625. }
  626. }
  627. /*
  628. * Cleanup helper for chx_fail and chx_stopped
  629. * cleanup channels queue and notify interface statemachine.
  630. *
  631. * fi An instance of a channel statemachine.
  632. * state The next state (depending on caller).
  633. * ch The channel to operate on.
  634. */
  635. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  636. struct channel *ch)
  637. {
  638. struct net_device *dev = ch->netdev;
  639. struct ctcm_priv *priv = dev->ml_priv;
  640. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  641. "%s(%s): %s[%d]\n",
  642. CTCM_FUNTAIL, dev->name, ch->id, state);
  643. fsm_deltimer(&ch->timer);
  644. if (IS_MPC(ch))
  645. fsm_deltimer(&ch->sweep_timer);
  646. fsm_newstate(fi, state);
  647. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  648. clear_normalized_cda(&ch->ccw[1]);
  649. dev_kfree_skb_any(ch->trans_skb);
  650. ch->trans_skb = NULL;
  651. }
  652. ch->th_seg = 0x00;
  653. ch->th_seq_num = 0x00;
  654. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  655. skb_queue_purge(&ch->io_queue);
  656. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  657. } else {
  658. ctcm_purge_skb_queue(&ch->io_queue);
  659. if (IS_MPC(ch))
  660. ctcm_purge_skb_queue(&ch->sweep_queue);
  661. spin_lock(&ch->collect_lock);
  662. ctcm_purge_skb_queue(&ch->collect_queue);
  663. ch->collect_len = 0;
  664. spin_unlock(&ch->collect_lock);
  665. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  666. }
  667. }
  668. /*
  669. * A channel has successfully been halted.
  670. * Cleanup it's queue and notify interface statemachine.
  671. *
  672. * fi An instance of a channel statemachine.
  673. * event The event, just happened.
  674. * arg Generic pointer, casted from channel * upon call.
  675. */
  676. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  677. {
  678. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  679. }
  680. /*
  681. * A stop command from device statemachine arrived and we are in
  682. * not operational mode. Set state to stopped.
  683. *
  684. * fi An instance of a channel statemachine.
  685. * event The event, just happened.
  686. * arg Generic pointer, casted from channel * upon call.
  687. */
  688. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  689. {
  690. fsm_newstate(fi, CTC_STATE_STOPPED);
  691. }
  692. /*
  693. * A machine check for no path, not operational status or gone device has
  694. * happened.
  695. * Cleanup queue and notify interface statemachine.
  696. *
  697. * fi An instance of a channel statemachine.
  698. * event The event, just happened.
  699. * arg Generic pointer, casted from channel * upon call.
  700. */
  701. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  702. {
  703. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  704. }
  705. /*
  706. * Handle error during setup of channel.
  707. *
  708. * fi An instance of a channel statemachine.
  709. * event The event, just happened.
  710. * arg Generic pointer, casted from channel * upon call.
  711. */
  712. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  713. {
  714. struct channel *ch = arg;
  715. struct net_device *dev = ch->netdev;
  716. struct ctcm_priv *priv = dev->ml_priv;
  717. /*
  718. * Special case: Got UC_RCRESET on setmode.
  719. * This means that remote side isn't setup. In this case
  720. * simply retry after some 10 secs...
  721. */
  722. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  723. ((event == CTC_EVENT_UC_RCRESET) ||
  724. (event == CTC_EVENT_UC_RSRESET))) {
  725. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  726. fsm_deltimer(&ch->timer);
  727. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  728. if (!IS_MPC(ch) &&
  729. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)) {
  730. int rc = ccw_device_halt(ch->cdev, 0);
  731. if (rc != 0)
  732. ctcm_ccw_check_rc(ch, rc,
  733. "HaltIO in chx_setuperr");
  734. }
  735. return;
  736. }
  737. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  738. "%s(%s) : %s error during %s channel setup state=%s\n",
  739. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  740. (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) ? "RX" : "TX",
  741. fsm_getstate_str(fi));
  742. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  743. fsm_newstate(fi, CTC_STATE_RXERR);
  744. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  745. } else {
  746. fsm_newstate(fi, CTC_STATE_TXERR);
  747. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  748. }
  749. }
  750. /*
  751. * Restart a channel after an error.
  752. *
  753. * fi An instance of a channel statemachine.
  754. * event The event, just happened.
  755. * arg Generic pointer, casted from channel * upon call.
  756. */
  757. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  758. {
  759. struct channel *ch = arg;
  760. struct net_device *dev = ch->netdev;
  761. unsigned long saveflags = 0;
  762. int oldstate;
  763. int rc;
  764. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  765. "%s: %s[%d] of %s\n",
  766. CTCM_FUNTAIL, ch->id, event, dev->name);
  767. fsm_deltimer(&ch->timer);
  768. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  769. oldstate = fsm_getstate(fi);
  770. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  771. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  772. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  773. /* Such conditional locking is a known problem for
  774. * sparse because its undeterministic in static view.
  775. * Warnings should be ignored here. */
  776. rc = ccw_device_halt(ch->cdev, 0);
  777. if (event == CTC_EVENT_TIMER)
  778. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  779. if (rc != 0) {
  780. if (rc != -EBUSY) {
  781. fsm_deltimer(&ch->timer);
  782. fsm_newstate(fi, oldstate);
  783. }
  784. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  785. }
  786. }
  787. /*
  788. * Handle error during RX initial handshake (exchange of
  789. * 0-length block header)
  790. *
  791. * fi An instance of a channel statemachine.
  792. * event The event, just happened.
  793. * arg Generic pointer, casted from channel * upon call.
  794. */
  795. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  796. {
  797. struct channel *ch = arg;
  798. struct net_device *dev = ch->netdev;
  799. struct ctcm_priv *priv = dev->ml_priv;
  800. if (event == CTC_EVENT_TIMER) {
  801. if (!IS_MPCDEV(dev))
  802. /* TODO : check if MPC deletes timer somewhere */
  803. fsm_deltimer(&ch->timer);
  804. if (ch->retry++ < 3)
  805. ctcm_chx_restart(fi, event, arg);
  806. else {
  807. fsm_newstate(fi, CTC_STATE_RXERR);
  808. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  809. }
  810. } else if (event == CTC_EVENT_UC_RCRESET) {
  811. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  812. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  813. ctc_ch_event_names[event], fsm_getstate_str(fi));
  814. dev_info(&dev->dev,
  815. "Init handshake not received, peer not ready yet\n");
  816. } else {
  817. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  818. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  819. ctc_ch_event_names[event], fsm_getstate_str(fi));
  820. dev_warn(&dev->dev,
  821. "Initialization failed with RX/TX init handshake "
  822. "error %s\n", ctc_ch_event_names[event]);
  823. }
  824. }
  825. /*
  826. * Notify device statemachine if we gave up initialization
  827. * of RX channel.
  828. *
  829. * fi An instance of a channel statemachine.
  830. * event The event, just happened.
  831. * arg Generic pointer, casted from channel * upon call.
  832. */
  833. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  834. {
  835. struct channel *ch = arg;
  836. struct net_device *dev = ch->netdev;
  837. struct ctcm_priv *priv = dev->ml_priv;
  838. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  839. "%s(%s): RX %s busy, init. fail",
  840. CTCM_FUNTAIL, dev->name, ch->id);
  841. fsm_newstate(fi, CTC_STATE_RXERR);
  842. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  843. }
  844. /*
  845. * Handle RX Unit check remote reset (remote disconnected)
  846. *
  847. * fi An instance of a channel statemachine.
  848. * event The event, just happened.
  849. * arg Generic pointer, casted from channel * upon call.
  850. */
  851. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  852. {
  853. struct channel *ch = arg;
  854. struct channel *ch2;
  855. struct net_device *dev = ch->netdev;
  856. struct ctcm_priv *priv = dev->ml_priv;
  857. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  858. "%s: %s: remote disconnect - re-init ...",
  859. CTCM_FUNTAIL, dev->name);
  860. fsm_deltimer(&ch->timer);
  861. /*
  862. * Notify device statemachine
  863. */
  864. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  865. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  866. fsm_newstate(fi, CTC_STATE_DTERM);
  867. ch2 = priv->channel[CTCM_WRITE];
  868. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  869. ccw_device_halt(ch->cdev, 0);
  870. ccw_device_halt(ch2->cdev, 0);
  871. }
  872. /*
  873. * Handle error during TX channel initialization.
  874. *
  875. * fi An instance of a channel statemachine.
  876. * event The event, just happened.
  877. * arg Generic pointer, casted from channel * upon call.
  878. */
  879. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  880. {
  881. struct channel *ch = arg;
  882. struct net_device *dev = ch->netdev;
  883. struct ctcm_priv *priv = dev->ml_priv;
  884. if (event == CTC_EVENT_TIMER) {
  885. fsm_deltimer(&ch->timer);
  886. if (ch->retry++ < 3)
  887. ctcm_chx_restart(fi, event, arg);
  888. else {
  889. fsm_newstate(fi, CTC_STATE_TXERR);
  890. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  891. }
  892. } else if (event == CTC_EVENT_UC_RCRESET) {
  893. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  894. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  895. ctc_ch_event_names[event], fsm_getstate_str(fi));
  896. dev_info(&dev->dev,
  897. "Init handshake not sent, peer not ready yet\n");
  898. } else {
  899. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  900. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  901. ctc_ch_event_names[event], fsm_getstate_str(fi));
  902. dev_warn(&dev->dev,
  903. "Initialization failed with RX/TX init handshake "
  904. "error %s\n", ctc_ch_event_names[event]);
  905. }
  906. }
  907. /*
  908. * Handle TX timeout by retrying operation.
  909. *
  910. * fi An instance of a channel statemachine.
  911. * event The event, just happened.
  912. * arg Generic pointer, casted from channel * upon call.
  913. */
  914. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  915. {
  916. struct channel *ch = arg;
  917. struct net_device *dev = ch->netdev;
  918. struct ctcm_priv *priv = dev->ml_priv;
  919. struct sk_buff *skb;
  920. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  921. __func__, smp_processor_id(), ch, ch->id);
  922. fsm_deltimer(&ch->timer);
  923. if (ch->retry++ > 3) {
  924. struct mpc_group *gptr = priv->mpcg;
  925. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  926. "%s: %s: retries exceeded",
  927. CTCM_FUNTAIL, ch->id);
  928. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  929. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  930. use gptr as mpc indicator */
  931. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  932. ctcm_chx_restart(fi, event, arg);
  933. goto done;
  934. }
  935. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  936. "%s : %s: retry %d",
  937. CTCM_FUNTAIL, ch->id, ch->retry);
  938. skb = skb_peek(&ch->io_queue);
  939. if (skb) {
  940. int rc = 0;
  941. unsigned long saveflags = 0;
  942. clear_normalized_cda(&ch->ccw[4]);
  943. ch->ccw[4].count = skb->len;
  944. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  945. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  946. "%s: %s: IDAL alloc failed",
  947. CTCM_FUNTAIL, ch->id);
  948. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  949. ctcm_chx_restart(fi, event, arg);
  950. goto done;
  951. }
  952. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  953. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  954. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  955. /* Such conditional locking is a known problem for
  956. * sparse because its undeterministic in static view.
  957. * Warnings should be ignored here. */
  958. if (do_debug_ccw)
  959. ctcmpc_dumpit((char *)&ch->ccw[3],
  960. sizeof(struct ccw1) * 3);
  961. rc = ccw_device_start(ch->cdev, &ch->ccw[3], 0, 0xff, 0);
  962. if (event == CTC_EVENT_TIMER)
  963. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  964. saveflags);
  965. if (rc != 0) {
  966. fsm_deltimer(&ch->timer);
  967. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  968. ctcm_purge_skb_queue(&ch->io_queue);
  969. }
  970. }
  971. done:
  972. return;
  973. }
  974. /*
  975. * Handle fatal errors during an I/O command.
  976. *
  977. * fi An instance of a channel statemachine.
  978. * event The event, just happened.
  979. * arg Generic pointer, casted from channel * upon call.
  980. */
  981. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  982. {
  983. struct channel *ch = arg;
  984. struct net_device *dev = ch->netdev;
  985. struct ctcm_priv *priv = dev->ml_priv;
  986. int rd = CHANNEL_DIRECTION(ch->flags);
  987. fsm_deltimer(&ch->timer);
  988. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  989. "%s: %s: %s unrecoverable channel error",
  990. CTCM_FUNTAIL, ch->id, rd == CTCM_READ ? "RX" : "TX");
  991. if (IS_MPC(ch)) {
  992. priv->stats.tx_dropped++;
  993. priv->stats.tx_errors++;
  994. }
  995. if (rd == CTCM_READ) {
  996. fsm_newstate(fi, CTC_STATE_RXERR);
  997. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  998. } else {
  999. fsm_newstate(fi, CTC_STATE_TXERR);
  1000. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  1001. }
  1002. }
  1003. /*
  1004. * The ctcm statemachine for a channel.
  1005. */
  1006. const fsm_node ch_fsm[] = {
  1007. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1008. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1009. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1010. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1011. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1012. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1013. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1014. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1015. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1016. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1017. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1018. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1019. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1020. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1021. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1022. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1023. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1024. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1025. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1026. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1027. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1028. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1029. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1030. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1031. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1032. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1033. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1034. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1035. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1036. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1037. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1038. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1039. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1040. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1041. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1042. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1043. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1044. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1045. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1046. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1047. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1048. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1049. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1050. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1051. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1052. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1053. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1054. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1055. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1056. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1057. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1058. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1059. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1060. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1061. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1062. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1063. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1064. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1065. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1066. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1067. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1068. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1069. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1070. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1071. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1072. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1073. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1074. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1075. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1076. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1077. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1078. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1079. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1080. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1081. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1082. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1083. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1084. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1085. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1086. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1087. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1088. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1089. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1090. };
  1091. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1092. /*
  1093. * MPC actions for mpc channel statemachine
  1094. * handling of MPC protocol requires extra
  1095. * statemachine and actions which are prefixed ctcmpc_ .
  1096. * The ctc_ch_states and ctc_ch_state_names,
  1097. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1098. * which are expanded by some elements.
  1099. */
  1100. /*
  1101. * Actions for mpc channel statemachine.
  1102. */
  1103. /*
  1104. * Normal data has been send. Free the corresponding
  1105. * skb (it's in io_queue), reset dev->tbusy and
  1106. * revert to idle state.
  1107. *
  1108. * fi An instance of a channel statemachine.
  1109. * event The event, just happened.
  1110. * arg Generic pointer, casted from channel * upon call.
  1111. */
  1112. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1113. {
  1114. struct channel *ch = arg;
  1115. struct net_device *dev = ch->netdev;
  1116. struct ctcm_priv *priv = dev->ml_priv;
  1117. struct mpc_group *grp = priv->mpcg;
  1118. struct sk_buff *skb;
  1119. int first = 1;
  1120. int i;
  1121. __u32 data_space;
  1122. unsigned long duration;
  1123. struct sk_buff *peekskb;
  1124. int rc;
  1125. struct th_header *header;
  1126. struct pdu *p_header;
  1127. unsigned long done_stamp = jiffies;
  1128. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1129. __func__, dev->name, smp_processor_id());
  1130. duration = done_stamp - ch->prof.send_stamp;
  1131. if (duration > ch->prof.tx_time)
  1132. ch->prof.tx_time = duration;
  1133. if (ch->irb->scsw.cmd.count != 0)
  1134. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1135. "%s(%s): TX not complete, remaining %d bytes",
  1136. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1137. fsm_deltimer(&ch->timer);
  1138. while ((skb = skb_dequeue(&ch->io_queue))) {
  1139. priv->stats.tx_packets++;
  1140. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1141. if (first) {
  1142. priv->stats.tx_bytes += 2;
  1143. first = 0;
  1144. }
  1145. refcount_dec(&skb->users);
  1146. dev_kfree_skb_irq(skb);
  1147. }
  1148. spin_lock(&ch->collect_lock);
  1149. clear_normalized_cda(&ch->ccw[4]);
  1150. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1151. spin_unlock(&ch->collect_lock);
  1152. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1153. goto done;
  1154. }
  1155. if (ctcm_checkalloc_buffer(ch)) {
  1156. spin_unlock(&ch->collect_lock);
  1157. goto done;
  1158. }
  1159. ch->trans_skb->data = ch->trans_skb_data;
  1160. skb_reset_tail_pointer(ch->trans_skb);
  1161. ch->trans_skb->len = 0;
  1162. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1163. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1164. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1165. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1166. i = 0;
  1167. p_header = NULL;
  1168. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1169. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1170. " data_space:%04x\n",
  1171. __func__, data_space);
  1172. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1173. skb_put_data(ch->trans_skb, skb->data, skb->len);
  1174. p_header = (struct pdu *)
  1175. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1176. p_header->pdu_flag = 0x00;
  1177. if (be16_to_cpu(skb->protocol) == ETH_P_SNAP)
  1178. p_header->pdu_flag |= 0x60;
  1179. else
  1180. p_header->pdu_flag |= 0x20;
  1181. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1182. __func__, ch->trans_skb->len);
  1183. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1184. " to 32 bytes sent to vtam\n", __func__);
  1185. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1186. ch->collect_len -= skb->len;
  1187. data_space -= skb->len;
  1188. priv->stats.tx_packets++;
  1189. priv->stats.tx_bytes += skb->len;
  1190. refcount_dec(&skb->users);
  1191. dev_kfree_skb_any(skb);
  1192. peekskb = skb_peek(&ch->collect_queue);
  1193. if (peekskb->len > data_space)
  1194. break;
  1195. i++;
  1196. }
  1197. /* p_header points to the last one we handled */
  1198. if (p_header)
  1199. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1200. header = skb_push(ch->trans_skb, TH_HEADER_LENGTH);
  1201. memset(header, 0, TH_HEADER_LENGTH);
  1202. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1203. ch->th_seq_num++;
  1204. header->th_seq_num = ch->th_seq_num;
  1205. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1206. __func__, ch->th_seq_num);
  1207. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1208. __func__, ch->trans_skb->len);
  1209. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1210. "data to vtam from collect_q\n", __func__);
  1211. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1212. min_t(int, ch->trans_skb->len, 50));
  1213. spin_unlock(&ch->collect_lock);
  1214. clear_normalized_cda(&ch->ccw[1]);
  1215. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1216. (void *)(u64)dma32_to_u32(ch->ccw[1].cda),
  1217. ch->trans_skb->data);
  1218. ch->ccw[1].count = ch->max_bufsize;
  1219. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1220. dev_kfree_skb_any(ch->trans_skb);
  1221. ch->trans_skb = NULL;
  1222. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1223. "%s: %s: IDAL alloc failed",
  1224. CTCM_FUNTAIL, ch->id);
  1225. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1226. return;
  1227. }
  1228. CTCM_PR_DBGDATA("ccwcda=0x%p data=0x%p\n",
  1229. (void *)(u64)dma32_to_u32(ch->ccw[1].cda),
  1230. ch->trans_skb->data);
  1231. ch->ccw[1].count = ch->trans_skb->len;
  1232. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1233. ch->prof.send_stamp = jiffies;
  1234. if (do_debug_ccw)
  1235. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1236. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  1237. ch->prof.doios_multi++;
  1238. if (rc != 0) {
  1239. priv->stats.tx_dropped += i;
  1240. priv->stats.tx_errors += i;
  1241. fsm_deltimer(&ch->timer);
  1242. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1243. }
  1244. done:
  1245. ctcm_clear_busy(dev);
  1246. return;
  1247. }
  1248. /*
  1249. * Got normal data, check for sanity, queue it up, allocate new buffer
  1250. * trigger bottom half, and initiate next read.
  1251. *
  1252. * fi An instance of a channel statemachine.
  1253. * event The event, just happened.
  1254. * arg Generic pointer, casted from channel * upon call.
  1255. */
  1256. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1257. {
  1258. struct channel *ch = arg;
  1259. struct net_device *dev = ch->netdev;
  1260. struct ctcm_priv *priv = dev->ml_priv;
  1261. struct mpc_group *grp = priv->mpcg;
  1262. struct sk_buff *skb = ch->trans_skb;
  1263. struct sk_buff *new_skb;
  1264. unsigned long saveflags = 0; /* avoids compiler warning */
  1265. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1266. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1267. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1268. ch->id, ch->max_bufsize, len);
  1269. fsm_deltimer(&ch->timer);
  1270. if (skb == NULL) {
  1271. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1272. "%s(%s): TRANS_SKB = NULL",
  1273. CTCM_FUNTAIL, dev->name);
  1274. goto again;
  1275. }
  1276. if (len < TH_HEADER_LENGTH) {
  1277. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1278. "%s(%s): packet length %d too short",
  1279. CTCM_FUNTAIL, dev->name, len);
  1280. priv->stats.rx_dropped++;
  1281. priv->stats.rx_length_errors++;
  1282. } else {
  1283. /* must have valid th header or game over */
  1284. __u32 block_len = len;
  1285. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1286. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1287. if (new_skb == NULL) {
  1288. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1289. "%s(%s): skb allocation failed",
  1290. CTCM_FUNTAIL, dev->name);
  1291. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1292. goto again;
  1293. }
  1294. switch (fsm_getstate(grp->fsm)) {
  1295. case MPCG_STATE_RESET:
  1296. case MPCG_STATE_INOP:
  1297. dev_kfree_skb_any(new_skb);
  1298. break;
  1299. case MPCG_STATE_FLOWC:
  1300. case MPCG_STATE_READY:
  1301. skb_put_data(new_skb, skb->data, block_len);
  1302. skb_queue_tail(&ch->io_queue, new_skb);
  1303. tasklet_schedule(&ch->ch_tasklet);
  1304. break;
  1305. default:
  1306. skb_put_data(new_skb, skb->data, len);
  1307. skb_queue_tail(&ch->io_queue, new_skb);
  1308. tasklet_hi_schedule(&ch->ch_tasklet);
  1309. break;
  1310. }
  1311. }
  1312. again:
  1313. switch (fsm_getstate(grp->fsm)) {
  1314. int rc, dolock;
  1315. case MPCG_STATE_FLOWC:
  1316. case MPCG_STATE_READY:
  1317. if (ctcm_checkalloc_buffer(ch))
  1318. break;
  1319. ch->trans_skb->data = ch->trans_skb_data;
  1320. skb_reset_tail_pointer(ch->trans_skb);
  1321. ch->trans_skb->len = 0;
  1322. ch->ccw[1].count = ch->max_bufsize;
  1323. if (do_debug_ccw)
  1324. ctcmpc_dumpit((char *)&ch->ccw[0],
  1325. sizeof(struct ccw1) * 3);
  1326. dolock = !in_hardirq();
  1327. if (dolock)
  1328. spin_lock_irqsave(
  1329. get_ccwdev_lock(ch->cdev), saveflags);
  1330. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  1331. if (dolock) /* see remark about conditional locking */
  1332. spin_unlock_irqrestore(
  1333. get_ccwdev_lock(ch->cdev), saveflags);
  1334. if (rc != 0)
  1335. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1336. break;
  1337. default:
  1338. break;
  1339. }
  1340. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1341. __func__, dev->name, ch, ch->id);
  1342. }
  1343. /*
  1344. * Initialize connection by sending a __u16 of value 0.
  1345. *
  1346. * fi An instance of a channel statemachine.
  1347. * event The event, just happened.
  1348. * arg Generic pointer, casted from channel * upon call.
  1349. */
  1350. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1351. {
  1352. struct channel *ch = arg;
  1353. struct net_device *dev = ch->netdev;
  1354. struct ctcm_priv *priv = dev->ml_priv;
  1355. struct mpc_group *gptr = priv->mpcg;
  1356. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1357. __func__, ch->id, ch);
  1358. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1359. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1360. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1361. fsm_getstate(gptr->fsm), ch->protocol);
  1362. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1363. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1364. fsm_deltimer(&ch->timer);
  1365. if (ctcm_checkalloc_buffer(ch))
  1366. goto done;
  1367. switch (fsm_getstate(fi)) {
  1368. case CTC_STATE_STARTRETRY:
  1369. case CTC_STATE_SETUPWAIT:
  1370. if (CHANNEL_DIRECTION(ch->flags) == CTCM_READ) {
  1371. ctcmpc_chx_rxidle(fi, event, arg);
  1372. } else {
  1373. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1374. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1375. }
  1376. goto done;
  1377. default:
  1378. break;
  1379. }
  1380. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == CTCM_READ)
  1381. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1382. done:
  1383. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1384. __func__, ch->id, ch);
  1385. return;
  1386. }
  1387. /*
  1388. * Got initial data, check it. If OK,
  1389. * notify device statemachine that we are up and
  1390. * running.
  1391. *
  1392. * fi An instance of a channel statemachine.
  1393. * event The event, just happened.
  1394. * arg Generic pointer, casted from channel * upon call.
  1395. */
  1396. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1397. {
  1398. struct channel *ch = arg;
  1399. struct net_device *dev = ch->netdev;
  1400. struct ctcm_priv *priv = dev->ml_priv;
  1401. struct mpc_group *grp = priv->mpcg;
  1402. int rc;
  1403. unsigned long saveflags = 0; /* avoids compiler warning */
  1404. fsm_deltimer(&ch->timer);
  1405. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1406. __func__, ch->id, dev->name, smp_processor_id(),
  1407. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1408. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1409. /* XID processing complete */
  1410. switch (fsm_getstate(grp->fsm)) {
  1411. case MPCG_STATE_FLOWC:
  1412. case MPCG_STATE_READY:
  1413. if (ctcm_checkalloc_buffer(ch))
  1414. goto done;
  1415. ch->trans_skb->data = ch->trans_skb_data;
  1416. skb_reset_tail_pointer(ch->trans_skb);
  1417. ch->trans_skb->len = 0;
  1418. ch->ccw[1].count = ch->max_bufsize;
  1419. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1420. if (event == CTC_EVENT_START)
  1421. /* see remark about conditional locking */
  1422. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1423. rc = ccw_device_start(ch->cdev, &ch->ccw[0], 0, 0xff, 0);
  1424. if (event == CTC_EVENT_START)
  1425. spin_unlock_irqrestore(
  1426. get_ccwdev_lock(ch->cdev), saveflags);
  1427. if (rc != 0) {
  1428. fsm_newstate(fi, CTC_STATE_RXINIT);
  1429. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1430. goto done;
  1431. }
  1432. break;
  1433. default:
  1434. break;
  1435. }
  1436. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1437. done:
  1438. return;
  1439. }
  1440. /*
  1441. * ctcmpc channel FSM action
  1442. * called from several points in ctcmpc_ch_fsm
  1443. * ctcmpc only
  1444. */
  1445. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1446. {
  1447. struct channel *ch = arg;
  1448. struct net_device *dev = ch->netdev;
  1449. struct ctcm_priv *priv = dev->ml_priv;
  1450. struct mpc_group *grp = priv->mpcg;
  1451. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1452. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1453. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1454. switch (fsm_getstate(grp->fsm)) {
  1455. case MPCG_STATE_XID2INITW:
  1456. /* ok..start yside xid exchanges */
  1457. if (!ch->in_mpcgroup)
  1458. break;
  1459. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1460. fsm_deltimer(&grp->timer);
  1461. fsm_addtimer(&grp->timer,
  1462. MPC_XID_TIMEOUT_VALUE,
  1463. MPCG_EVENT_TIMER, dev);
  1464. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1465. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1466. /* attn rcvd before xid0 processed via bh */
  1467. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1468. break;
  1469. case MPCG_STATE_XID2INITX:
  1470. case MPCG_STATE_XID0IOWAIT:
  1471. case MPCG_STATE_XID0IOWAIX:
  1472. /* attn rcvd before xid0 processed on ch
  1473. but mid-xid0 processing for group */
  1474. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1475. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1476. break;
  1477. case MPCG_STATE_XID7INITW:
  1478. case MPCG_STATE_XID7INITX:
  1479. case MPCG_STATE_XID7INITI:
  1480. case MPCG_STATE_XID7INITZ:
  1481. switch (fsm_getstate(ch->fsm)) {
  1482. case CH_XID7_PENDING:
  1483. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1484. break;
  1485. case CH_XID7_PENDING2:
  1486. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1487. break;
  1488. }
  1489. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1490. break;
  1491. }
  1492. return;
  1493. }
  1494. /*
  1495. * ctcmpc channel FSM action
  1496. * called from one point in ctcmpc_ch_fsm
  1497. * ctcmpc only
  1498. */
  1499. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1500. {
  1501. struct channel *ch = arg;
  1502. struct net_device *dev = ch->netdev;
  1503. struct ctcm_priv *priv = dev->ml_priv;
  1504. struct mpc_group *grp = priv->mpcg;
  1505. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1506. __func__, dev->name, ch->id,
  1507. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1508. fsm_deltimer(&ch->timer);
  1509. switch (fsm_getstate(grp->fsm)) {
  1510. case MPCG_STATE_XID0IOWAIT:
  1511. /* vtam wants to be primary.start yside xid exchanges*/
  1512. /* only receive one attn-busy at a time so must not */
  1513. /* change state each time */
  1514. grp->changed_side = 1;
  1515. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1516. break;
  1517. case MPCG_STATE_XID2INITW:
  1518. if (grp->changed_side == 1) {
  1519. grp->changed_side = 2;
  1520. break;
  1521. }
  1522. /* process began via call to establish_conn */
  1523. /* so must report failure instead of reverting */
  1524. /* back to ready-for-xid passive state */
  1525. if (grp->estconnfunc)
  1526. goto done;
  1527. /* this attnbusy is NOT the result of xside xid */
  1528. /* collisions so yside must have been triggered */
  1529. /* by an ATTN that was not intended to start XID */
  1530. /* processing. Revert back to ready-for-xid and */
  1531. /* wait for ATTN interrupt to signal xid start */
  1532. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1533. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1534. fsm_deltimer(&grp->timer);
  1535. goto done;
  1536. }
  1537. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1538. goto done;
  1539. case MPCG_STATE_XID2INITX:
  1540. /* XID2 was received before ATTN Busy for second
  1541. channel.Send yside xid for second channel.
  1542. */
  1543. if (grp->changed_side == 1) {
  1544. grp->changed_side = 2;
  1545. break;
  1546. }
  1547. fallthrough;
  1548. case MPCG_STATE_XID0IOWAIX:
  1549. case MPCG_STATE_XID7INITW:
  1550. case MPCG_STATE_XID7INITX:
  1551. case MPCG_STATE_XID7INITI:
  1552. case MPCG_STATE_XID7INITZ:
  1553. default:
  1554. /* multiple attn-busy indicates too out-of-sync */
  1555. /* and they are certainly not being received as part */
  1556. /* of valid mpc group negotiations.. */
  1557. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1558. goto done;
  1559. }
  1560. if (grp->changed_side == 1) {
  1561. fsm_deltimer(&grp->timer);
  1562. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1563. MPCG_EVENT_TIMER, dev);
  1564. }
  1565. if (ch->in_mpcgroup)
  1566. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1567. else
  1568. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1569. "%s(%s): channel %s not added to group",
  1570. CTCM_FUNTAIL, dev->name, ch->id);
  1571. done:
  1572. return;
  1573. }
  1574. /*
  1575. * ctcmpc channel FSM action
  1576. * called from several points in ctcmpc_ch_fsm
  1577. * ctcmpc only
  1578. */
  1579. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1580. {
  1581. struct channel *ch = arg;
  1582. struct net_device *dev = ch->netdev;
  1583. struct ctcm_priv *priv = dev->ml_priv;
  1584. struct mpc_group *grp = priv->mpcg;
  1585. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1586. return;
  1587. }
  1588. /*
  1589. * ctcmpc channel FSM action
  1590. * called from several points in ctcmpc_ch_fsm
  1591. * ctcmpc only
  1592. */
  1593. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1594. {
  1595. struct channel *ach = arg;
  1596. struct net_device *dev = ach->netdev;
  1597. struct ctcm_priv *priv = dev->ml_priv;
  1598. struct mpc_group *grp = priv->mpcg;
  1599. struct channel *wch = priv->channel[CTCM_WRITE];
  1600. struct channel *rch = priv->channel[CTCM_READ];
  1601. struct sk_buff *skb;
  1602. struct th_sweep *header;
  1603. int rc = 0;
  1604. unsigned long saveflags = 0;
  1605. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1606. __func__, smp_processor_id(), ach, ach->id);
  1607. if (grp->in_sweep == 0)
  1608. goto done;
  1609. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1610. __func__, wch->th_seq_num);
  1611. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1612. __func__, rch->th_seq_num);
  1613. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1614. /* give the previous IO time to complete */
  1615. fsm_addtimer(&wch->sweep_timer,
  1616. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1617. goto done;
  1618. }
  1619. skb = skb_dequeue(&wch->sweep_queue);
  1620. if (!skb)
  1621. goto done;
  1622. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1623. grp->in_sweep = 0;
  1624. ctcm_clear_busy_do(dev);
  1625. dev_kfree_skb_any(skb);
  1626. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1627. goto done;
  1628. } else {
  1629. refcount_inc(&skb->users);
  1630. skb_queue_tail(&wch->io_queue, skb);
  1631. }
  1632. /* send out the sweep */
  1633. wch->ccw[4].count = skb->len;
  1634. header = (struct th_sweep *)skb->data;
  1635. switch (header->th.th_ch_flag) {
  1636. case TH_SWEEP_REQ:
  1637. grp->sweep_req_pend_num--;
  1638. break;
  1639. case TH_SWEEP_RESP:
  1640. grp->sweep_rsp_pend_num--;
  1641. break;
  1642. }
  1643. header->sw.th_last_seq = wch->th_seq_num;
  1644. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1645. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1646. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1647. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1648. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1649. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1650. wch->prof.send_stamp = jiffies;
  1651. rc = ccw_device_start(wch->cdev, &wch->ccw[3], 0, 0xff, 0);
  1652. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1653. if ((grp->sweep_req_pend_num == 0) &&
  1654. (grp->sweep_rsp_pend_num == 0)) {
  1655. grp->in_sweep = 0;
  1656. rch->th_seq_num = 0x00;
  1657. wch->th_seq_num = 0x00;
  1658. ctcm_clear_busy_do(dev);
  1659. }
  1660. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1661. __func__, wch->th_seq_num, rch->th_seq_num);
  1662. if (rc != 0)
  1663. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1664. done:
  1665. return;
  1666. }
  1667. /*
  1668. * The ctcmpc statemachine for a channel.
  1669. */
  1670. const fsm_node ctcmpc_ch_fsm[] = {
  1671. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1672. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1673. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1674. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1675. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1676. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1677. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1678. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1679. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1680. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1681. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1682. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1683. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1684. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1685. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1686. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1687. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1688. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1689. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1690. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1691. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1692. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1693. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1694. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1695. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1696. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1697. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1698. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1699. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1700. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1701. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1702. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1703. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1704. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1705. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1706. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1707. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1708. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1709. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1710. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1711. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1712. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1713. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1714. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1715. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1716. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1717. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1718. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1719. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1720. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1721. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1722. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1723. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1724. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1725. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1726. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1727. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1728. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1729. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1730. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1731. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1732. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1733. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1734. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1735. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1736. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1737. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1738. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1739. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1740. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1741. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1742. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1743. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1744. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1745. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1746. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1747. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1748. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1749. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1750. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1751. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1752. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1753. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1754. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1755. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1756. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1757. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1758. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1759. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1760. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1761. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1762. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1763. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1764. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1765. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1766. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1767. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1768. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1769. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1770. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1771. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1772. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1773. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1774. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1775. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1776. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1777. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1778. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1779. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1780. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1781. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1782. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1783. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1784. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1785. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1786. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1787. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1788. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1789. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1790. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1791. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1792. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1793. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1794. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1795. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1796. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1797. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1798. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1799. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1800. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1801. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1802. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1803. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1804. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1805. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1806. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1807. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1808. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1809. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1810. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1811. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1812. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1813. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1814. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1815. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1816. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1817. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1818. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1819. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1820. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1821. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1822. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1823. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1824. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1825. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1826. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1827. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1828. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1829. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1830. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1831. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1832. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1833. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1834. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1835. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1836. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1837. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1838. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1839. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1840. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1841. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1842. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1843. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1844. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1845. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1846. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1847. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1848. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1849. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1850. };
  1851. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1852. /*
  1853. * Actions for interface - statemachine.
  1854. */
  1855. /*
  1856. * Startup channels by sending CTC_EVENT_START to each channel.
  1857. *
  1858. * fi An instance of an interface statemachine.
  1859. * event The event, just happened.
  1860. * arg Generic pointer, casted from struct net_device * upon call.
  1861. */
  1862. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1863. {
  1864. struct net_device *dev = arg;
  1865. struct ctcm_priv *priv = dev->ml_priv;
  1866. int direction;
  1867. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1868. fsm_deltimer(&priv->restart_timer);
  1869. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1870. if (IS_MPC(priv))
  1871. priv->mpcg->channels_terminating = 0;
  1872. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1873. struct channel *ch = priv->channel[direction];
  1874. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1875. }
  1876. }
  1877. /*
  1878. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1879. *
  1880. * fi An instance of an interface statemachine.
  1881. * event The event, just happened.
  1882. * arg Generic pointer, casted from struct net_device * upon call.
  1883. */
  1884. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1885. {
  1886. int direction;
  1887. struct net_device *dev = arg;
  1888. struct ctcm_priv *priv = dev->ml_priv;
  1889. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1890. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1891. for (direction = CTCM_READ; direction <= CTCM_WRITE; direction++) {
  1892. struct channel *ch = priv->channel[direction];
  1893. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1894. ch->th_seq_num = 0x00;
  1895. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1896. __func__, ch->th_seq_num);
  1897. }
  1898. if (IS_MPC(priv))
  1899. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1900. }
  1901. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1902. {
  1903. int restart_timer;
  1904. struct net_device *dev = arg;
  1905. struct ctcm_priv *priv = dev->ml_priv;
  1906. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1907. if (IS_MPC(priv)) {
  1908. restart_timer = CTCM_TIME_1_SEC;
  1909. } else {
  1910. restart_timer = CTCM_TIME_5_SEC;
  1911. }
  1912. dev_info(&dev->dev, "Restarting device\n");
  1913. dev_action_stop(fi, event, arg);
  1914. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1915. if (IS_MPC(priv))
  1916. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1917. /* going back into start sequence too quickly can */
  1918. /* result in the other side becoming unreachable due */
  1919. /* to sense reported when IO is aborted */
  1920. fsm_addtimer(&priv->restart_timer, restart_timer,
  1921. DEV_EVENT_START, dev);
  1922. }
  1923. /*
  1924. * Called from channel statemachine
  1925. * when a channel is up and running.
  1926. *
  1927. * fi An instance of an interface statemachine.
  1928. * event The event, just happened.
  1929. * arg Generic pointer, casted from struct net_device * upon call.
  1930. */
  1931. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1932. {
  1933. struct net_device *dev = arg;
  1934. struct ctcm_priv *priv = dev->ml_priv;
  1935. int dev_stat = fsm_getstate(fi);
  1936. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1937. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1938. dev->name, dev->ml_priv, dev_stat, event);
  1939. switch (fsm_getstate(fi)) {
  1940. case DEV_STATE_STARTWAIT_RXTX:
  1941. if (event == DEV_EVENT_RXUP)
  1942. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1943. else
  1944. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1945. break;
  1946. case DEV_STATE_STARTWAIT_RX:
  1947. if (event == DEV_EVENT_RXUP) {
  1948. fsm_newstate(fi, DEV_STATE_RUNNING);
  1949. dev_info(&dev->dev,
  1950. "Connected with remote side\n");
  1951. ctcm_clear_busy(dev);
  1952. }
  1953. break;
  1954. case DEV_STATE_STARTWAIT_TX:
  1955. if (event == DEV_EVENT_TXUP) {
  1956. fsm_newstate(fi, DEV_STATE_RUNNING);
  1957. dev_info(&dev->dev,
  1958. "Connected with remote side\n");
  1959. ctcm_clear_busy(dev);
  1960. }
  1961. break;
  1962. case DEV_STATE_STOPWAIT_TX:
  1963. if (event == DEV_EVENT_RXUP)
  1964. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1965. break;
  1966. case DEV_STATE_STOPWAIT_RX:
  1967. if (event == DEV_EVENT_TXUP)
  1968. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1969. break;
  1970. }
  1971. if (IS_MPC(priv)) {
  1972. if (event == DEV_EVENT_RXUP)
  1973. mpc_channel_action(priv->channel[CTCM_READ],
  1974. CTCM_READ, MPC_CHANNEL_ADD);
  1975. else
  1976. mpc_channel_action(priv->channel[CTCM_WRITE],
  1977. CTCM_WRITE, MPC_CHANNEL_ADD);
  1978. }
  1979. }
  1980. /*
  1981. * Called from device statemachine
  1982. * when a channel has been shutdown.
  1983. *
  1984. * fi An instance of an interface statemachine.
  1985. * event The event, just happened.
  1986. * arg Generic pointer, casted from struct net_device * upon call.
  1987. */
  1988. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1989. {
  1990. struct net_device *dev = arg;
  1991. struct ctcm_priv *priv = dev->ml_priv;
  1992. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1993. switch (fsm_getstate(fi)) {
  1994. case DEV_STATE_RUNNING:
  1995. if (event == DEV_EVENT_TXDOWN)
  1996. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1997. else
  1998. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1999. break;
  2000. case DEV_STATE_STARTWAIT_RX:
  2001. if (event == DEV_EVENT_TXDOWN)
  2002. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2003. break;
  2004. case DEV_STATE_STARTWAIT_TX:
  2005. if (event == DEV_EVENT_RXDOWN)
  2006. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2007. break;
  2008. case DEV_STATE_STOPWAIT_RXTX:
  2009. if (event == DEV_EVENT_TXDOWN)
  2010. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2011. else
  2012. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2013. break;
  2014. case DEV_STATE_STOPWAIT_RX:
  2015. if (event == DEV_EVENT_RXDOWN)
  2016. fsm_newstate(fi, DEV_STATE_STOPPED);
  2017. break;
  2018. case DEV_STATE_STOPWAIT_TX:
  2019. if (event == DEV_EVENT_TXDOWN)
  2020. fsm_newstate(fi, DEV_STATE_STOPPED);
  2021. break;
  2022. }
  2023. if (IS_MPC(priv)) {
  2024. if (event == DEV_EVENT_RXDOWN)
  2025. mpc_channel_action(priv->channel[CTCM_READ],
  2026. CTCM_READ, MPC_CHANNEL_REMOVE);
  2027. else
  2028. mpc_channel_action(priv->channel[CTCM_WRITE],
  2029. CTCM_WRITE, MPC_CHANNEL_REMOVE);
  2030. }
  2031. }
  2032. const fsm_node dev_fsm[] = {
  2033. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2034. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2035. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2036. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2037. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2038. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2039. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2040. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2041. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2042. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2043. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2044. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2045. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2046. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2047. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2048. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2049. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2050. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2051. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2052. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2053. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2054. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2055. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2056. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2057. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2058. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2059. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2060. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2061. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2062. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2063. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2064. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2065. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2066. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2067. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2068. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2069. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2070. };
  2071. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2072. /* --- This is the END my friend --- */