qdio_main.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  4. *
  5. * Copyright IBM Corp. 2000, 2008
  6. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  7. * Jan Glauber <jang@linux.vnet.ibm.com>
  8. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  9. */
  10. #include <linux/export.h>
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/kmemleak.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/io.h>
  18. #include <linux/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include <asm/asm.h>
  22. #include <asm/ipl.h>
  23. #include "cio.h"
  24. #include "css.h"
  25. #include "device.h"
  26. #include "qdio.h"
  27. #include "qdio_debug.h"
  28. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  29. "Jan Glauber <jang@linux.vnet.ibm.com>");
  30. MODULE_DESCRIPTION("QDIO base support");
  31. MODULE_LICENSE("GPL");
  32. static inline int do_siga_sync(unsigned long schid,
  33. unsigned long out_mask, unsigned long in_mask,
  34. unsigned int fc)
  35. {
  36. int cc;
  37. asm volatile(
  38. " lgr 0,%[fc]\n"
  39. " lgr 1,%[schid]\n"
  40. " lgr 2,%[out]\n"
  41. " lgr 3,%[in]\n"
  42. " siga 0\n"
  43. CC_IPM(cc)
  44. : CC_OUT(cc, cc)
  45. : [fc] "d" (fc), [schid] "d" (schid),
  46. [out] "d" (out_mask), [in] "d" (in_mask)
  47. : CC_CLOBBER_LIST("0", "1", "2", "3"));
  48. return CC_TRANSFORM(cc);
  49. }
  50. static inline int do_siga_input(unsigned long schid, unsigned long mask,
  51. unsigned long fc)
  52. {
  53. int cc;
  54. asm volatile(
  55. " lgr 0,%[fc]\n"
  56. " lgr 1,%[schid]\n"
  57. " lgr 2,%[mask]\n"
  58. " siga 0\n"
  59. CC_IPM(cc)
  60. : CC_OUT(cc, cc)
  61. : [fc] "d" (fc), [schid] "d" (schid), [mask] "d" (mask)
  62. : CC_CLOBBER_LIST("0", "1", "2"));
  63. return CC_TRANSFORM(cc);
  64. }
  65. /**
  66. * do_siga_output - perform SIGA-w/wt function
  67. * @schid: subchannel id or in case of QEBSM the subchannel token
  68. * @mask: which output queues to process
  69. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  70. * @fc: function code to perform
  71. * @aob: asynchronous operation block
  72. *
  73. * Returns condition code.
  74. * Note: For IQDC unicast queues only the highest priority queue is processed.
  75. */
  76. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  77. unsigned int *bb, unsigned long fc,
  78. dma64_t aob)
  79. {
  80. int cc;
  81. asm volatile(
  82. " lgr 0,%[fc]\n"
  83. " lgr 1,%[schid]\n"
  84. " lgr 2,%[mask]\n"
  85. " lgr 3,%[aob]\n"
  86. " siga 0\n"
  87. " lgr %[fc],0\n"
  88. CC_IPM(cc)
  89. : CC_OUT(cc, cc), [fc] "+&d" (fc)
  90. : [schid] "d" (schid), [mask] "d" (mask), [aob] "d" (aob)
  91. : CC_CLOBBER_LIST("0", "1", "2", "3"));
  92. *bb = fc >> 31;
  93. return CC_TRANSFORM(cc);
  94. }
  95. /**
  96. * qdio_do_eqbs - extract buffer states for QEBSM
  97. * @q: queue to manipulate
  98. * @state: state of the extracted buffers
  99. * @start: buffer number to start at
  100. * @count: count of buffers to examine
  101. * @auto_ack: automatically acknowledge buffers
  102. *
  103. * Returns the number of successfully extracted equal buffer states.
  104. * Stops processing if a state is different from the last buffers state.
  105. */
  106. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  107. int start, int count, int auto_ack)
  108. {
  109. int tmp_count = count, tmp_start = start, nr = q->nr;
  110. unsigned int ccq = 0;
  111. qperf_inc(q, eqbs);
  112. if (!q->is_input_q)
  113. nr += q->irq_ptr->nr_input_qs;
  114. again:
  115. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  116. auto_ack);
  117. switch (ccq) {
  118. case 0:
  119. case 32:
  120. /* all done, or next buffer state different */
  121. return count - tmp_count;
  122. case 96:
  123. /* not all buffers processed */
  124. qperf_inc(q, eqbs_partial);
  125. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "EQBS part:%02x",
  126. tmp_count);
  127. return count - tmp_count;
  128. case 97:
  129. /* no buffer processed */
  130. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  131. goto again;
  132. default:
  133. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  134. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  135. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  136. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr,
  137. q->first_to_check, count, q->irq_ptr->int_parm);
  138. return 0;
  139. }
  140. }
  141. /**
  142. * qdio_do_sqbs - set buffer states for QEBSM
  143. * @q: queue to manipulate
  144. * @state: new state of the buffers
  145. * @start: first buffer number to change
  146. * @count: how many buffers to change
  147. *
  148. * Returns the number of successfully changed buffers.
  149. * Does retrying until the specified count of buffer states is set or an
  150. * error occurs.
  151. */
  152. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  153. int count)
  154. {
  155. unsigned int ccq = 0;
  156. int tmp_count = count, tmp_start = start;
  157. int nr = q->nr;
  158. qperf_inc(q, sqbs);
  159. if (!q->is_input_q)
  160. nr += q->irq_ptr->nr_input_qs;
  161. again:
  162. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  163. switch (ccq) {
  164. case 0:
  165. case 32:
  166. /* all done, or active buffer adapter-owned */
  167. WARN_ON_ONCE(tmp_count);
  168. return count - tmp_count;
  169. case 96:
  170. /* not all buffers processed */
  171. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  172. qperf_inc(q, sqbs_partial);
  173. goto again;
  174. default:
  175. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  176. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  177. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  178. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr,
  179. q->first_to_check, count, q->irq_ptr->int_parm);
  180. return 0;
  181. }
  182. }
  183. /*
  184. * Returns number of examined buffers and their common state in *state.
  185. * Requested number of buffers-to-examine must be > 0.
  186. */
  187. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  188. unsigned char *state, unsigned int count,
  189. int auto_ack)
  190. {
  191. unsigned char __state = 0;
  192. int i = 1;
  193. if (is_qebsm(q))
  194. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  195. /* get initial state: */
  196. __state = q->slsb.val[bufnr];
  197. /* Bail out early if there is no work on the queue: */
  198. if (__state & SLSB_OWNER_CU)
  199. goto out;
  200. for (; i < count; i++) {
  201. bufnr = next_buf(bufnr);
  202. /* stop if next state differs from initial state: */
  203. if (q->slsb.val[bufnr] != __state)
  204. break;
  205. }
  206. out:
  207. *state = __state;
  208. return i;
  209. }
  210. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  211. unsigned char *state, int auto_ack)
  212. {
  213. return get_buf_states(q, bufnr, state, 1, auto_ack);
  214. }
  215. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  216. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  217. unsigned char state, int count)
  218. {
  219. int i;
  220. if (is_qebsm(q))
  221. return qdio_do_sqbs(q, state, bufnr, count);
  222. /* Ensure that all preceding changes to the SBALs are visible: */
  223. mb();
  224. for (i = 0; i < count; i++) {
  225. WRITE_ONCE(q->slsb.val[bufnr], state);
  226. bufnr = next_buf(bufnr);
  227. }
  228. /* Make our SLSB changes visible: */
  229. mb();
  230. return count;
  231. }
  232. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  233. unsigned char state)
  234. {
  235. return set_buf_states(q, bufnr, state, 1);
  236. }
  237. /* set slsb states to initial state */
  238. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  239. {
  240. struct qdio_q *q;
  241. int i;
  242. for_each_input_queue(irq_ptr, q, i)
  243. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  244. QDIO_MAX_BUFFERS_PER_Q);
  245. for_each_output_queue(irq_ptr, q, i)
  246. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  247. QDIO_MAX_BUFFERS_PER_Q);
  248. }
  249. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  250. unsigned int input)
  251. {
  252. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  253. unsigned int fc = QDIO_SIGA_SYNC;
  254. int cc;
  255. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  256. qperf_inc(q, siga_sync);
  257. if (is_qebsm(q)) {
  258. schid = q->irq_ptr->sch_token;
  259. fc |= QDIO_SIGA_QEBSM_FLAG;
  260. }
  261. cc = do_siga_sync(schid, output, input, fc);
  262. if (unlikely(cc))
  263. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  264. return (cc) ? -EIO : 0;
  265. }
  266. static inline int qdio_sync_input_queue(struct qdio_q *q)
  267. {
  268. return qdio_siga_sync(q, 0, q->mask);
  269. }
  270. static inline int qdio_sync_output_queue(struct qdio_q *q)
  271. {
  272. return qdio_siga_sync(q, q->mask, 0);
  273. }
  274. static inline int qdio_siga_sync_q(struct qdio_q *q)
  275. {
  276. if (q->is_input_q)
  277. return qdio_sync_input_queue(q);
  278. else
  279. return qdio_sync_output_queue(q);
  280. }
  281. static int qdio_siga_output(struct qdio_q *q, unsigned int count,
  282. unsigned int *busy_bit, dma64_t aob)
  283. {
  284. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  285. unsigned int fc = QDIO_SIGA_WRITE;
  286. u64 start_time = 0;
  287. int retries = 0, cc;
  288. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) {
  289. if (count > 1)
  290. fc = QDIO_SIGA_WRITEM;
  291. else if (aob)
  292. fc = QDIO_SIGA_WRITEQ;
  293. }
  294. if (is_qebsm(q)) {
  295. schid = q->irq_ptr->sch_token;
  296. fc |= QDIO_SIGA_QEBSM_FLAG;
  297. }
  298. again:
  299. cc = do_siga_output(schid, q->mask, busy_bit, fc, aob);
  300. /* hipersocket busy condition */
  301. if (unlikely(*busy_bit)) {
  302. retries++;
  303. if (!start_time) {
  304. start_time = get_tod_clock_fast();
  305. goto again;
  306. }
  307. if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
  308. goto again;
  309. }
  310. if (retries) {
  311. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  312. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  313. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  314. }
  315. return cc;
  316. }
  317. static inline int qdio_siga_input(struct qdio_q *q)
  318. {
  319. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  320. unsigned int fc = QDIO_SIGA_READ;
  321. int cc;
  322. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  323. qperf_inc(q, siga_read);
  324. if (is_qebsm(q)) {
  325. schid = q->irq_ptr->sch_token;
  326. fc |= QDIO_SIGA_QEBSM_FLAG;
  327. }
  328. cc = do_siga_input(schid, q->mask, fc);
  329. if (unlikely(cc))
  330. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  331. return (cc) ? -EIO : 0;
  332. }
  333. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  334. unsigned char *state)
  335. {
  336. if (qdio_need_siga_sync(q->irq_ptr))
  337. qdio_siga_sync_q(q);
  338. return get_buf_state(q, bufnr, state, 0);
  339. }
  340. static inline void qdio_stop_polling(struct qdio_q *q)
  341. {
  342. if (!q->u.in.batch_count)
  343. return;
  344. qperf_inc(q, stop_polling);
  345. /* show the card that we are not polling anymore */
  346. set_buf_states(q, q->u.in.batch_start, SLSB_P_INPUT_NOT_INIT,
  347. q->u.in.batch_count);
  348. q->u.in.batch_count = 0;
  349. }
  350. static inline void account_sbals(struct qdio_q *q, unsigned int count)
  351. {
  352. q->q_stats.nr_sbal_total += count;
  353. q->q_stats.nr_sbals[ilog2(count)]++;
  354. }
  355. static void process_buffer_error(struct qdio_q *q, unsigned int start,
  356. int count)
  357. {
  358. /* special handling for no target buffer empty */
  359. if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q &&
  360. q->sbal[start]->element[15].sflags == 0x10) {
  361. qperf_inc(q, target_full);
  362. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", start);
  363. return;
  364. }
  365. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  366. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  367. DBF_ERROR("FTC:%3d C:%3d", start, count);
  368. DBF_ERROR("F14:%2x F15:%2x",
  369. q->sbal[start]->element[14].sflags,
  370. q->sbal[start]->element[15].sflags);
  371. }
  372. static inline void inbound_handle_work(struct qdio_q *q, unsigned int start,
  373. int count, bool auto_ack)
  374. {
  375. /* ACK the newest SBAL: */
  376. if (!auto_ack)
  377. set_buf_state(q, add_buf(start, count - 1), SLSB_P_INPUT_ACK);
  378. if (!q->u.in.batch_count)
  379. q->u.in.batch_start = start;
  380. q->u.in.batch_count += count;
  381. }
  382. static int get_inbound_buffer_frontier(struct qdio_q *q, unsigned int start,
  383. unsigned int *error)
  384. {
  385. unsigned char state = 0;
  386. int count;
  387. q->timestamp = get_tod_clock_fast();
  388. count = atomic_read(&q->nr_buf_used);
  389. if (!count)
  390. return 0;
  391. if (qdio_need_siga_sync(q->irq_ptr))
  392. qdio_sync_input_queue(q);
  393. count = get_buf_states(q, start, &state, count, 1);
  394. if (!count)
  395. return 0;
  396. switch (state) {
  397. case SLSB_P_INPUT_PRIMED:
  398. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr,
  399. count);
  400. inbound_handle_work(q, start, count, is_qebsm(q));
  401. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  402. qperf_inc(q, inbound_queue_full);
  403. if (q->irq_ptr->perf_stat_enabled)
  404. account_sbals(q, count);
  405. return count;
  406. case SLSB_P_INPUT_ERROR:
  407. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in err:%1d %02x", q->nr,
  408. count);
  409. *error = QDIO_ERROR_SLSB_STATE;
  410. process_buffer_error(q, start, count);
  411. inbound_handle_work(q, start, count, false);
  412. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  413. qperf_inc(q, inbound_queue_full);
  414. if (q->irq_ptr->perf_stat_enabled)
  415. account_sbals_error(q, count);
  416. return count;
  417. case SLSB_CU_INPUT_EMPTY:
  418. if (q->irq_ptr->perf_stat_enabled)
  419. q->q_stats.nr_sbal_nop++;
  420. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
  421. q->nr, start);
  422. return 0;
  423. case SLSB_P_INPUT_NOT_INIT:
  424. case SLSB_P_INPUT_ACK:
  425. /* We should never see this state, throw a WARN: */
  426. default:
  427. dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1,
  428. "found state %#x at index %u on queue %u\n",
  429. state, start, q->nr);
  430. return 0;
  431. }
  432. }
  433. int qdio_inspect_input_queue(struct ccw_device *cdev, unsigned int nr,
  434. unsigned int *bufnr, unsigned int *error)
  435. {
  436. struct qdio_irq *irq = cdev->private->qdio_data;
  437. unsigned int start;
  438. struct qdio_q *q;
  439. int count;
  440. if (!irq)
  441. return -ENODEV;
  442. q = irq->input_qs[nr];
  443. start = q->first_to_check;
  444. *error = 0;
  445. count = get_inbound_buffer_frontier(q, start, error);
  446. if (count == 0)
  447. return 0;
  448. *bufnr = start;
  449. q->first_to_check = add_buf(start, count);
  450. return count;
  451. }
  452. EXPORT_SYMBOL_GPL(qdio_inspect_input_queue);
  453. static inline int qdio_inbound_q_done(struct qdio_q *q, unsigned int start)
  454. {
  455. unsigned char state = 0;
  456. if (!atomic_read(&q->nr_buf_used))
  457. return 1;
  458. if (qdio_need_siga_sync(q->irq_ptr))
  459. qdio_sync_input_queue(q);
  460. get_buf_state(q, start, &state, 0);
  461. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  462. /* more work coming */
  463. return 0;
  464. return 1;
  465. }
  466. static int get_outbound_buffer_frontier(struct qdio_q *q, unsigned int start,
  467. unsigned int *error)
  468. {
  469. unsigned char state = 0;
  470. int count;
  471. q->timestamp = get_tod_clock_fast();
  472. count = atomic_read(&q->nr_buf_used);
  473. if (!count)
  474. return 0;
  475. if (qdio_need_siga_sync(q->irq_ptr))
  476. qdio_sync_output_queue(q);
  477. count = get_buf_states(q, start, &state, count, 0);
  478. if (!count)
  479. return 0;
  480. switch (state) {
  481. case SLSB_P_OUTPUT_PENDING:
  482. *error = QDIO_ERROR_SLSB_PENDING;
  483. fallthrough;
  484. case SLSB_P_OUTPUT_EMPTY:
  485. /* the adapter got it */
  486. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  487. "out empty:%1d %02x", q->nr, count);
  488. atomic_sub(count, &q->nr_buf_used);
  489. if (q->irq_ptr->perf_stat_enabled)
  490. account_sbals(q, count);
  491. return count;
  492. case SLSB_P_OUTPUT_ERROR:
  493. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out error:%1d %02x",
  494. q->nr, count);
  495. *error = QDIO_ERROR_SLSB_STATE;
  496. process_buffer_error(q, start, count);
  497. atomic_sub(count, &q->nr_buf_used);
  498. if (q->irq_ptr->perf_stat_enabled)
  499. account_sbals_error(q, count);
  500. return count;
  501. case SLSB_CU_OUTPUT_PRIMED:
  502. /* the adapter has not fetched the output yet */
  503. if (q->irq_ptr->perf_stat_enabled)
  504. q->q_stats.nr_sbal_nop++;
  505. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  506. q->nr);
  507. return 0;
  508. case SLSB_P_OUTPUT_HALTED:
  509. return 0;
  510. case SLSB_P_OUTPUT_NOT_INIT:
  511. /* We should never see this state, throw a WARN: */
  512. default:
  513. dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1,
  514. "found state %#x at index %u on queue %u\n",
  515. state, start, q->nr);
  516. return 0;
  517. }
  518. }
  519. int qdio_inspect_output_queue(struct ccw_device *cdev, unsigned int nr,
  520. unsigned int *bufnr, unsigned int *error)
  521. {
  522. struct qdio_irq *irq = cdev->private->qdio_data;
  523. unsigned int start;
  524. struct qdio_q *q;
  525. int count;
  526. if (!irq)
  527. return -ENODEV;
  528. q = irq->output_qs[nr];
  529. start = q->first_to_check;
  530. *error = 0;
  531. count = get_outbound_buffer_frontier(q, start, error);
  532. if (count == 0)
  533. return 0;
  534. *bufnr = start;
  535. q->first_to_check = add_buf(start, count);
  536. return count;
  537. }
  538. EXPORT_SYMBOL_GPL(qdio_inspect_output_queue);
  539. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned int count,
  540. dma64_t aob)
  541. {
  542. int retries = 0, cc;
  543. unsigned int busy_bit;
  544. if (!qdio_need_siga_out(q->irq_ptr))
  545. return 0;
  546. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  547. retry:
  548. qperf_inc(q, siga_write);
  549. cc = qdio_siga_output(q, count, &busy_bit, aob);
  550. switch (cc) {
  551. case 0:
  552. break;
  553. case 2:
  554. if (busy_bit) {
  555. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  556. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  557. goto retry;
  558. }
  559. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  560. cc = -EBUSY;
  561. } else {
  562. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  563. cc = -ENOBUFS;
  564. }
  565. break;
  566. case 1:
  567. case 3:
  568. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  569. cc = -EIO;
  570. break;
  571. }
  572. if (retries) {
  573. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  574. DBF_ERROR("count:%u", retries);
  575. }
  576. return cc;
  577. }
  578. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  579. enum qdio_irq_states state)
  580. {
  581. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  582. irq_ptr->state = state;
  583. mb();
  584. }
  585. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  586. {
  587. if (irb->esw.esw0.erw.cons) {
  588. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  589. DBF_ERROR_HEX(irb, 64);
  590. DBF_ERROR_HEX(irb->ecw, 64);
  591. }
  592. }
  593. /* PCI interrupt handler */
  594. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  595. {
  596. if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  597. return;
  598. qdio_deliver_irq(irq_ptr);
  599. irq_ptr->last_data_irq_time = get_lowcore()->int_clock;
  600. }
  601. static void qdio_handle_activate_check(struct qdio_irq *irq_ptr,
  602. unsigned long intparm, int cstat,
  603. int dstat)
  604. {
  605. unsigned int first_to_check = 0;
  606. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  607. DBF_ERROR("intp :%lx", intparm);
  608. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  609. /* zfcp wants this: */
  610. if (irq_ptr->nr_input_qs)
  611. first_to_check = irq_ptr->input_qs[0]->first_to_check;
  612. irq_ptr->error_handler(irq_ptr->cdev, QDIO_ERROR_ACTIVATE, 0,
  613. first_to_check, 0, irq_ptr->int_parm);
  614. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  615. /*
  616. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  617. * Therefore we call the LGR detection function here.
  618. */
  619. lgr_info_log();
  620. }
  621. static int qdio_establish_handle_irq(struct qdio_irq *irq_ptr, int cstat,
  622. int dstat, int dcc)
  623. {
  624. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  625. if (cstat)
  626. goto error;
  627. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  628. goto error;
  629. if (dcc == 1)
  630. return -EAGAIN;
  631. if (!(dstat & DEV_STAT_DEV_END))
  632. goto error;
  633. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  634. return 0;
  635. error:
  636. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  637. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  638. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  639. return -EIO;
  640. }
  641. /* qdio interrupt handler */
  642. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  643. struct irb *irb)
  644. {
  645. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  646. struct subchannel_id schid;
  647. int cstat, dstat, rc, dcc;
  648. if (!intparm || !irq_ptr) {
  649. ccw_device_get_schid(cdev, &schid);
  650. DBF_ERROR("qint:%4x", schid.sch_no);
  651. return;
  652. }
  653. if (irq_ptr->perf_stat_enabled)
  654. irq_ptr->perf_stat.qdio_int++;
  655. if (IS_ERR(irb)) {
  656. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  657. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  658. wake_up(&cdev->private->wait_q);
  659. return;
  660. }
  661. qdio_irq_check_sense(irq_ptr, irb);
  662. cstat = irb->scsw.cmd.cstat;
  663. dstat = irb->scsw.cmd.dstat;
  664. dcc = scsw_cmd_is_valid_cc(&irb->scsw) ? irb->scsw.cmd.cc : 0;
  665. rc = 0;
  666. switch (irq_ptr->state) {
  667. case QDIO_IRQ_STATE_INACTIVE:
  668. rc = qdio_establish_handle_irq(irq_ptr, cstat, dstat, dcc);
  669. break;
  670. case QDIO_IRQ_STATE_CLEANUP:
  671. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  672. break;
  673. case QDIO_IRQ_STATE_ESTABLISHED:
  674. case QDIO_IRQ_STATE_ACTIVE:
  675. if (cstat & SCHN_STAT_PCI) {
  676. qdio_int_handler_pci(irq_ptr);
  677. return;
  678. }
  679. if (cstat || dstat)
  680. qdio_handle_activate_check(irq_ptr, intparm, cstat,
  681. dstat);
  682. else if (dcc == 1)
  683. rc = -EAGAIN;
  684. break;
  685. case QDIO_IRQ_STATE_STOPPED:
  686. break;
  687. default:
  688. WARN_ON_ONCE(1);
  689. }
  690. if (rc == -EAGAIN) {
  691. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qint retry");
  692. rc = ccw_device_start(cdev, irq_ptr->ccw, intparm, 0, 0);
  693. if (!rc)
  694. return;
  695. DBF_ERROR("%4x RETRY ERR", irq_ptr->schid.sch_no);
  696. DBF_ERROR("rc:%4x", rc);
  697. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  698. }
  699. wake_up(&cdev->private->wait_q);
  700. }
  701. /**
  702. * qdio_get_ssqd_desc - get qdio subchannel description
  703. * @cdev: ccw device to get description for
  704. * @data: where to store the ssqd
  705. *
  706. * Returns 0 or an error code. The results of the chsc are stored in the
  707. * specified structure.
  708. */
  709. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  710. struct qdio_ssqd_desc *data)
  711. {
  712. struct subchannel_id schid;
  713. if (!cdev || !cdev->private)
  714. return -EINVAL;
  715. ccw_device_get_schid(cdev, &schid);
  716. DBF_EVENT("get ssqd:%4x", schid.sch_no);
  717. return qdio_setup_get_ssqd(NULL, &schid, data);
  718. }
  719. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  720. static int qdio_cancel_ccw(struct qdio_irq *irq, int how)
  721. {
  722. struct ccw_device *cdev = irq->cdev;
  723. long timeout;
  724. int rc;
  725. spin_lock_irq(get_ccwdev_lock(cdev));
  726. qdio_set_state(irq, QDIO_IRQ_STATE_CLEANUP);
  727. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  728. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  729. else
  730. /* default behaviour is halt */
  731. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  732. spin_unlock_irq(get_ccwdev_lock(cdev));
  733. if (rc) {
  734. DBF_ERROR("%4x SHUTD ERR", irq->schid.sch_no);
  735. DBF_ERROR("rc:%4d", rc);
  736. return rc;
  737. }
  738. timeout = wait_event_interruptible_timeout(cdev->private->wait_q,
  739. irq->state == QDIO_IRQ_STATE_INACTIVE ||
  740. irq->state == QDIO_IRQ_STATE_ERR,
  741. 10 * HZ);
  742. if (timeout <= 0)
  743. rc = (timeout == -ERESTARTSYS) ? -EINTR : -ETIME;
  744. return rc;
  745. }
  746. /**
  747. * qdio_shutdown - shut down a qdio subchannel
  748. * @cdev: associated ccw device
  749. * @how: use halt or clear to shutdown
  750. */
  751. int qdio_shutdown(struct ccw_device *cdev, int how)
  752. {
  753. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  754. struct subchannel_id schid;
  755. int rc;
  756. if (!irq_ptr)
  757. return -ENODEV;
  758. WARN_ON_ONCE(irqs_disabled());
  759. ccw_device_get_schid(cdev, &schid);
  760. DBF_EVENT("qshutdown:%4x", schid.sch_no);
  761. mutex_lock(&irq_ptr->setup_mutex);
  762. /*
  763. * Subchannel was already shot down. We cannot prevent being called
  764. * twice since cio may trigger a shutdown asynchronously.
  765. */
  766. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  767. mutex_unlock(&irq_ptr->setup_mutex);
  768. return 0;
  769. }
  770. /*
  771. * Indicate that the device is going down.
  772. */
  773. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  774. qdio_shutdown_debug_entries(irq_ptr);
  775. rc = qdio_cancel_ccw(irq_ptr, how);
  776. qdio_shutdown_thinint(irq_ptr);
  777. qdio_shutdown_irq(irq_ptr);
  778. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  779. mutex_unlock(&irq_ptr->setup_mutex);
  780. if (rc)
  781. return rc;
  782. return 0;
  783. }
  784. EXPORT_SYMBOL_GPL(qdio_shutdown);
  785. /**
  786. * qdio_free - free data structures for a qdio subchannel
  787. * @cdev: associated ccw device
  788. */
  789. int qdio_free(struct ccw_device *cdev)
  790. {
  791. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  792. struct subchannel_id schid;
  793. if (!irq_ptr)
  794. return -ENODEV;
  795. ccw_device_get_schid(cdev, &schid);
  796. DBF_EVENT("qfree:%4x", schid.sch_no);
  797. DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
  798. mutex_lock(&irq_ptr->setup_mutex);
  799. irq_ptr->debug_area = NULL;
  800. cdev->private->qdio_data = NULL;
  801. mutex_unlock(&irq_ptr->setup_mutex);
  802. qdio_free_queues(irq_ptr);
  803. free_page((unsigned long) irq_ptr->qdr);
  804. free_page(irq_ptr->chsc_page);
  805. kfree(irq_ptr->ccw);
  806. free_page((unsigned long) irq_ptr);
  807. return 0;
  808. }
  809. EXPORT_SYMBOL_GPL(qdio_free);
  810. /**
  811. * qdio_allocate - allocate qdio queues and associated data
  812. * @cdev: associated ccw device
  813. * @no_input_qs: allocate this number of Input Queues
  814. * @no_output_qs: allocate this number of Output Queues
  815. */
  816. int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs,
  817. unsigned int no_output_qs)
  818. {
  819. struct subchannel_id schid;
  820. struct qdio_irq *irq_ptr;
  821. int rc = -ENOMEM;
  822. ccw_device_get_schid(cdev, &schid);
  823. DBF_EVENT("qallocate:%4x", schid.sch_no);
  824. if (no_input_qs > QDIO_MAX_QUEUES_PER_IRQ ||
  825. no_output_qs > QDIO_MAX_QUEUES_PER_IRQ)
  826. return -EINVAL;
  827. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL);
  828. if (!irq_ptr)
  829. return -ENOMEM;
  830. irq_ptr->ccw = kmalloc_obj(*irq_ptr->ccw, GFP_KERNEL | GFP_DMA);
  831. if (!irq_ptr->ccw)
  832. goto err_ccw;
  833. /* kmemleak doesn't scan the page-allocated irq_ptr: */
  834. kmemleak_not_leak(irq_ptr->ccw);
  835. irq_ptr->cdev = cdev;
  836. mutex_init(&irq_ptr->setup_mutex);
  837. if (qdio_allocate_dbf(irq_ptr))
  838. goto err_dbf;
  839. DBF_DEV_EVENT(DBF_ERR, irq_ptr, "alloc niq:%1u noq:%1u", no_input_qs,
  840. no_output_qs);
  841. /*
  842. * Allocate a page for the chsc calls in qdio_establish.
  843. * Must be pre-allocated since a zfcp recovery will call
  844. * qdio_establish. In case of low memory and swap on a zfcp disk
  845. * we may not be able to allocate memory otherwise.
  846. */
  847. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  848. if (!irq_ptr->chsc_page)
  849. goto err_chsc;
  850. /* qdr is used in ccw1.cda which is u32 */
  851. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  852. if (!irq_ptr->qdr)
  853. goto err_qdr;
  854. rc = qdio_allocate_qs(irq_ptr, no_input_qs, no_output_qs);
  855. if (rc)
  856. goto err_queues;
  857. cdev->private->qdio_data = irq_ptr;
  858. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  859. return 0;
  860. err_queues:
  861. free_page((unsigned long) irq_ptr->qdr);
  862. err_qdr:
  863. free_page(irq_ptr->chsc_page);
  864. err_chsc:
  865. err_dbf:
  866. kfree(irq_ptr->ccw);
  867. err_ccw:
  868. free_page((unsigned long) irq_ptr);
  869. return rc;
  870. }
  871. EXPORT_SYMBOL_GPL(qdio_allocate);
  872. static void qdio_trace_init_data(struct qdio_irq *irq,
  873. struct qdio_initialize *data)
  874. {
  875. DBF_DEV_EVENT(DBF_ERR, irq, "qfmt:%1u", data->q_format);
  876. DBF_DEV_EVENT(DBF_ERR, irq, "qpff%4x", data->qib_param_field_format);
  877. DBF_DEV_HEX(irq, &data->qib_param_field, sizeof(void *), DBF_ERR);
  878. DBF_DEV_EVENT(DBF_ERR, irq, "niq:%1u noq:%1u", data->no_input_qs,
  879. data->no_output_qs);
  880. DBF_DEV_HEX(irq, &data->input_handler, sizeof(void *), DBF_ERR);
  881. DBF_DEV_HEX(irq, &data->output_handler, sizeof(void *), DBF_ERR);
  882. DBF_DEV_HEX(irq, &data->int_parm, sizeof(long), DBF_ERR);
  883. DBF_DEV_HEX(irq, &data->input_sbal_addr_array, sizeof(void *), DBF_ERR);
  884. DBF_DEV_HEX(irq, &data->output_sbal_addr_array, sizeof(void *),
  885. DBF_ERR);
  886. }
  887. /**
  888. * qdio_establish - establish queues on a qdio subchannel
  889. * @cdev: associated ccw device
  890. * @init_data: initialization data
  891. */
  892. int qdio_establish(struct ccw_device *cdev,
  893. struct qdio_initialize *init_data)
  894. {
  895. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  896. struct subchannel_id schid;
  897. struct ciw *ciw;
  898. long timeout;
  899. int rc;
  900. ccw_device_get_schid(cdev, &schid);
  901. DBF_EVENT("qestablish:%4x", schid.sch_no);
  902. if (!irq_ptr)
  903. return -ENODEV;
  904. if (init_data->no_input_qs > irq_ptr->max_input_qs ||
  905. init_data->no_output_qs > irq_ptr->max_output_qs)
  906. return -EINVAL;
  907. /* Needed as error_handler: */
  908. if (!init_data->input_handler)
  909. return -EINVAL;
  910. if (init_data->no_output_qs && !init_data->output_handler)
  911. return -EINVAL;
  912. if (!init_data->input_sbal_addr_array ||
  913. !init_data->output_sbal_addr_array)
  914. return -EINVAL;
  915. if (!init_data->irq_poll)
  916. return -EINVAL;
  917. ciw = ccw_device_get_ciw(cdev, CIW_TYPE_EQUEUE);
  918. if (!ciw) {
  919. DBF_ERROR("%4x NO EQ", schid.sch_no);
  920. return -EIO;
  921. }
  922. mutex_lock(&irq_ptr->setup_mutex);
  923. qdio_trace_init_data(irq_ptr, init_data);
  924. qdio_setup_irq(irq_ptr, init_data);
  925. rc = qdio_establish_thinint(irq_ptr);
  926. if (rc)
  927. goto err_thinint;
  928. /* establish q */
  929. irq_ptr->ccw->cmd_code = ciw->cmd;
  930. irq_ptr->ccw->flags = CCW_FLAG_SLI;
  931. irq_ptr->ccw->count = ciw->count;
  932. irq_ptr->ccw->cda = virt_to_dma32(irq_ptr->qdr);
  933. spin_lock_irq(get_ccwdev_lock(cdev));
  934. ccw_device_set_options_mask(cdev, 0);
  935. rc = ccw_device_start(cdev, irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  936. spin_unlock_irq(get_ccwdev_lock(cdev));
  937. if (rc) {
  938. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  939. DBF_ERROR("rc:%4x", rc);
  940. goto err_ccw_start;
  941. }
  942. timeout = wait_event_interruptible_timeout(cdev->private->wait_q,
  943. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  944. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  945. if (timeout <= 0) {
  946. rc = (timeout == -ERESTARTSYS) ? -EINTR : -ETIME;
  947. goto err_ccw_timeout;
  948. }
  949. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  950. rc = -EIO;
  951. goto err_ccw_error;
  952. }
  953. qdio_setup_ssqd_info(irq_ptr);
  954. /* qebsm is now setup if available, initialize buffer states */
  955. qdio_init_buf_states(irq_ptr);
  956. mutex_unlock(&irq_ptr->setup_mutex);
  957. qdio_print_subchannel_info(irq_ptr);
  958. qdio_setup_debug_entries(irq_ptr);
  959. return 0;
  960. err_ccw_timeout:
  961. qdio_cancel_ccw(irq_ptr, QDIO_FLAG_CLEANUP_USING_CLEAR);
  962. err_ccw_error:
  963. err_ccw_start:
  964. qdio_shutdown_thinint(irq_ptr);
  965. err_thinint:
  966. qdio_shutdown_irq(irq_ptr);
  967. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  968. mutex_unlock(&irq_ptr->setup_mutex);
  969. return rc;
  970. }
  971. EXPORT_SYMBOL_GPL(qdio_establish);
  972. /**
  973. * qdio_activate - activate queues on a qdio subchannel
  974. * @cdev: associated cdev
  975. */
  976. int qdio_activate(struct ccw_device *cdev)
  977. {
  978. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  979. struct subchannel_id schid;
  980. struct ciw *ciw;
  981. int rc;
  982. ccw_device_get_schid(cdev, &schid);
  983. DBF_EVENT("qactivate:%4x", schid.sch_no);
  984. if (!irq_ptr)
  985. return -ENODEV;
  986. ciw = ccw_device_get_ciw(cdev, CIW_TYPE_AQUEUE);
  987. if (!ciw) {
  988. DBF_ERROR("%4x NO AQ", schid.sch_no);
  989. return -EIO;
  990. }
  991. mutex_lock(&irq_ptr->setup_mutex);
  992. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  993. rc = -EBUSY;
  994. goto out;
  995. }
  996. irq_ptr->ccw->cmd_code = ciw->cmd;
  997. irq_ptr->ccw->flags = CCW_FLAG_SLI;
  998. irq_ptr->ccw->count = ciw->count;
  999. irq_ptr->ccw->cda = 0;
  1000. spin_lock_irq(get_ccwdev_lock(cdev));
  1001. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1002. rc = ccw_device_start(cdev, irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1003. 0, DOIO_DENY_PREFETCH);
  1004. spin_unlock_irq(get_ccwdev_lock(cdev));
  1005. if (rc) {
  1006. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1007. DBF_ERROR("rc:%4x", rc);
  1008. goto out;
  1009. }
  1010. /* wait for subchannel to become active */
  1011. msleep(5);
  1012. switch (irq_ptr->state) {
  1013. case QDIO_IRQ_STATE_STOPPED:
  1014. case QDIO_IRQ_STATE_ERR:
  1015. rc = -EIO;
  1016. break;
  1017. default:
  1018. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1019. rc = 0;
  1020. }
  1021. out:
  1022. mutex_unlock(&irq_ptr->setup_mutex);
  1023. return rc;
  1024. }
  1025. EXPORT_SYMBOL_GPL(qdio_activate);
  1026. /**
  1027. * handle_inbound - reset processed input buffers
  1028. * @q: queue containing the buffers
  1029. * @bufnr: first buffer to process
  1030. * @count: how many buffers are emptied
  1031. */
  1032. static int handle_inbound(struct qdio_q *q, int bufnr, int count)
  1033. {
  1034. int overlap;
  1035. qperf_inc(q, inbound_call);
  1036. /* If any processed SBALs are returned to HW, adjust our tracking: */
  1037. overlap = min_t(int, count - sub_buf(q->u.in.batch_start, bufnr),
  1038. q->u.in.batch_count);
  1039. if (overlap > 0) {
  1040. q->u.in.batch_start = add_buf(q->u.in.batch_start, overlap);
  1041. q->u.in.batch_count -= overlap;
  1042. }
  1043. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1044. atomic_add(count, &q->nr_buf_used);
  1045. if (qdio_need_siga_in(q->irq_ptr))
  1046. return qdio_siga_input(q);
  1047. return 0;
  1048. }
  1049. /**
  1050. * qdio_add_bufs_to_input_queue - process buffers on an Input Queue
  1051. * @cdev: associated ccw_device for the qdio subchannel
  1052. * @q_nr: queue number
  1053. * @bufnr: buffer number
  1054. * @count: how many buffers to process
  1055. */
  1056. int qdio_add_bufs_to_input_queue(struct ccw_device *cdev, unsigned int q_nr,
  1057. unsigned int bufnr, unsigned int count)
  1058. {
  1059. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1060. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1061. return -EINVAL;
  1062. if (!irq_ptr)
  1063. return -ENODEV;
  1064. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "addi b:%02x c:%02x", bufnr, count);
  1065. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1066. return -EIO;
  1067. if (!count)
  1068. return 0;
  1069. return handle_inbound(irq_ptr->input_qs[q_nr], bufnr, count);
  1070. }
  1071. EXPORT_SYMBOL_GPL(qdio_add_bufs_to_input_queue);
  1072. /**
  1073. * handle_outbound - process filled outbound buffers
  1074. * @q: queue containing the buffers
  1075. * @bufnr: first buffer to process
  1076. * @count: how many buffers are filled
  1077. * @aob: asynchronous operation block
  1078. */
  1079. static int handle_outbound(struct qdio_q *q, unsigned int bufnr, unsigned int count,
  1080. struct qaob *aob)
  1081. {
  1082. unsigned char state = 0;
  1083. int used, rc = 0;
  1084. qperf_inc(q, outbound_call);
  1085. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1086. used = atomic_add_return(count, &q->nr_buf_used);
  1087. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1088. qperf_inc(q, outbound_queue_full);
  1089. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1090. dma64_t phys_aob = aob ? virt_to_dma64(aob) : 0;
  1091. WARN_ON_ONCE(!IS_ALIGNED(dma64_to_u64(phys_aob), 256));
  1092. rc = qdio_kick_outbound_q(q, count, phys_aob);
  1093. } else if (qdio_need_siga_sync(q->irq_ptr)) {
  1094. rc = qdio_sync_output_queue(q);
  1095. } else if (count < QDIO_MAX_BUFFERS_PER_Q &&
  1096. get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 &&
  1097. state == SLSB_CU_OUTPUT_PRIMED) {
  1098. /* The previous buffer is not processed yet, tack on. */
  1099. qperf_inc(q, fast_requeue);
  1100. } else {
  1101. rc = qdio_kick_outbound_q(q, count, 0);
  1102. }
  1103. return rc;
  1104. }
  1105. /**
  1106. * qdio_add_bufs_to_output_queue - process buffers on an Output Queue
  1107. * @cdev: associated ccw_device for the qdio subchannel
  1108. * @q_nr: queue number
  1109. * @bufnr: buffer number
  1110. * @count: how many buffers to process
  1111. * @aob: asynchronous operation block
  1112. */
  1113. int qdio_add_bufs_to_output_queue(struct ccw_device *cdev, unsigned int q_nr,
  1114. unsigned int bufnr, unsigned int count,
  1115. struct qaob *aob)
  1116. {
  1117. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1118. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1119. return -EINVAL;
  1120. if (!irq_ptr)
  1121. return -ENODEV;
  1122. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "addo b:%02x c:%02x", bufnr, count);
  1123. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1124. return -EIO;
  1125. if (!count)
  1126. return 0;
  1127. return handle_outbound(irq_ptr->output_qs[q_nr], bufnr, count, aob);
  1128. }
  1129. EXPORT_SYMBOL_GPL(qdio_add_bufs_to_output_queue);
  1130. /**
  1131. * qdio_start_irq - enable interrupt processing for the device
  1132. * @cdev: associated ccw_device for the qdio subchannel
  1133. *
  1134. * Return codes
  1135. * 0 - success
  1136. * 1 - irqs not started since new data is available
  1137. */
  1138. int qdio_start_irq(struct ccw_device *cdev)
  1139. {
  1140. struct qdio_q *q;
  1141. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1142. unsigned int i;
  1143. if (!irq_ptr)
  1144. return -ENODEV;
  1145. for_each_input_queue(irq_ptr, q, i)
  1146. qdio_stop_polling(q);
  1147. clear_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state);
  1148. /*
  1149. * We need to check again to not lose initiative after
  1150. * resetting the ACK state.
  1151. */
  1152. if (test_nonshared_ind(irq_ptr))
  1153. goto rescan;
  1154. for_each_input_queue(irq_ptr, q, i) {
  1155. if (!qdio_inbound_q_done(q, q->first_to_check))
  1156. goto rescan;
  1157. }
  1158. return 0;
  1159. rescan:
  1160. if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state))
  1161. return 0;
  1162. else
  1163. return 1;
  1164. }
  1165. EXPORT_SYMBOL(qdio_start_irq);
  1166. /**
  1167. * qdio_stop_irq - disable interrupt processing for the device
  1168. * @cdev: associated ccw_device for the qdio subchannel
  1169. *
  1170. * Return codes
  1171. * 0 - interrupts were already disabled
  1172. * 1 - interrupts successfully disabled
  1173. */
  1174. int qdio_stop_irq(struct ccw_device *cdev)
  1175. {
  1176. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1177. if (!irq_ptr)
  1178. return -ENODEV;
  1179. if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state))
  1180. return 0;
  1181. else
  1182. return 1;
  1183. }
  1184. EXPORT_SYMBOL(qdio_stop_irq);
  1185. static int __init init_QDIO(void)
  1186. {
  1187. int rc;
  1188. rc = qdio_debug_init();
  1189. if (rc)
  1190. return rc;
  1191. rc = qdio_setup_init();
  1192. if (rc)
  1193. goto out_debug;
  1194. rc = qdio_thinint_init();
  1195. if (rc)
  1196. goto out_cache;
  1197. return 0;
  1198. out_cache:
  1199. qdio_setup_exit();
  1200. out_debug:
  1201. qdio_debug_exit();
  1202. return rc;
  1203. }
  1204. static void __exit exit_QDIO(void)
  1205. {
  1206. qdio_thinint_exit();
  1207. qdio_setup_exit();
  1208. qdio_debug_exit();
  1209. }
  1210. module_init(init_QDIO);
  1211. module_exit(exit_QDIO);