rtc-rx8111.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Driver for Epson RX8111 RTC.
  4. *
  5. * Copyright (C) 2023 Axis Communications AB
  6. */
  7. #include <linux/bcd.h>
  8. #include <linux/bitfield.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/regmap.h>
  12. #include <linux/rtc.h>
  13. #define RX8111_REG_SEC 0x10 /* Second counter. */
  14. #define RX8111_REG_MIN 0x11 /* Minute counter */
  15. #define RX8111_REG_HOUR 0x12 /* Hour counter. */
  16. #define RX8111_REG_WEEK 0x13 /* Week day counter. */
  17. #define RX8111_REG_DAY 0x14 /* Month day counter. */
  18. #define RX8111_REG_MONTH 0x15 /* Month counter. */
  19. #define RX8111_REG_YEAR 0x16 /* Year counter. */
  20. #define RX8111_REG_ALARM_MIN 0x17 /* Alarm minute. */
  21. #define RX8111_REG_ALARM_HOUR 0x18 /* Alarm hour. */
  22. #define RX8111_REG_ALARM_WEEK_DAY 0x19 /* Alarm week or month day. */
  23. #define RX8111_REG_TIMER_COUNTER0 0x1a /* Timer counter LSB. */
  24. #define RX8111_REG_TIMER_COUNTER1 0x1b /* Timer counter. */
  25. #define RX8111_REG_TIMER_COUNTER2 0x1c /* Timer counter MSB. */
  26. #define RX8111_REG_EXT 0x1d /* Extension register. */
  27. #define RX8111_REG_FLAG 0x1e /* Flag register. */
  28. #define RX8111_REG_CTRL 0x1f /* Control register. */
  29. #define RX8111_REG_TS_1_1000_SEC 0x20 /* Timestamp 256 or 512 Hz . */
  30. #define RX8111_REG_TS_1_100_SEC 0x21 /* Timestamp 1 - 128 Hz. */
  31. #define RX8111_REG_TS_SEC 0x22 /* Timestamp second. */
  32. #define RX8111_REG_TS_MIN 0x23 /* Timestamp minute. */
  33. #define RX8111_REG_TS_HOUR 0x24 /* Timestamp hour. */
  34. #define RX8111_REG_TS_WEEK 0x25 /* Timestamp week day. */
  35. #define RX8111_REG_TS_DAY 0x26 /* Timestamp month day. */
  36. #define RX8111_REG_TS_MONTH 0x27 /* Timestamp month. */
  37. #define RX8111_REG_TS_YEAR 0x28 /* Timestamp year. */
  38. #define RX8111_REG_TS_STATUS 0x29 /* Timestamp status. */
  39. #define RX8111_REG_EVIN_SETTING 0x2b /* Timestamp trigger setting. */
  40. #define RX8111_REG_ALARM_SEC 0x2c /* Alarm second. */
  41. #define RX8111_REG_TIMER_CTRL 0x2d /* Timer control. */
  42. #define RX8111_REG_TS_CTRL0 0x2e /* Timestamp control 0. */
  43. #define RX8111_REG_CMD_TRIGGER 0x2f /* Timestamp trigger. */
  44. #define RX8111_REG_PWR_SWITCH_CTRL 0x32 /* Power switch control. */
  45. #define RX8111_REG_STATUS_MON 0x33 /* Status monitor. */
  46. #define RX8111_REG_TS_CTRL1 0x34 /* Timestamp control 1. */
  47. #define RX8111_REG_TS_CTRL2 0x35 /* Timestamp control 2. */
  48. #define RX8111_REG_TS_CTRL3 0x36 /* Timestamp control 3. */
  49. #define RX8111_FLAG_XST_BIT BIT(0)
  50. #define RX8111_FLAG_VLF_BIT BIT(1)
  51. #define RX8111_TIME_BUF_SZ (RX8111_REG_YEAR - RX8111_REG_SEC + 1)
  52. enum rx8111_regfield {
  53. /* RX8111_REG_EXT. */
  54. RX8111_REGF_TSEL0,
  55. RX8111_REGF_TSEL1,
  56. RX8111_REGF_ETS,
  57. RX8111_REGF_WADA,
  58. RX8111_REGF_TE,
  59. RX8111_REGF_USEL,
  60. RX8111_REGF_FSEL0,
  61. RX8111_REGF_FSEL1,
  62. /* RX8111_REG_FLAG. */
  63. RX8111_REGF_XST,
  64. RX8111_REGF_VLF,
  65. RX8111_REGF_EVF,
  66. RX8111_REGF_AF,
  67. RX8111_REGF_TF,
  68. RX8111_REGF_UF,
  69. RX8111_REGF_POR,
  70. /* RX8111_REG_CTRL. */
  71. RX8111_REGF_STOP,
  72. RX8111_REGF_EIE,
  73. RX8111_REGF_AIE,
  74. RX8111_REGF_TIE,
  75. RX8111_REGF_UIE,
  76. /* RX8111_REG_PWR_SWITCH_CTRL. */
  77. RX8111_REGF_SMPT0,
  78. RX8111_REGF_SMPT1,
  79. RX8111_REGF_SWSEL0,
  80. RX8111_REGF_SWSEL1,
  81. RX8111_REGF_INIEN,
  82. RX8111_REGF_CHGEN,
  83. /* RX8111_REG_STATUS_MON. */
  84. RX8111_REGF_VLOW,
  85. /* Sentinel value. */
  86. RX8111_REGF_MAX
  87. };
  88. static const struct reg_field rx8111_regfields[] = {
  89. [RX8111_REGF_TSEL0] = REG_FIELD(RX8111_REG_EXT, 0, 0),
  90. [RX8111_REGF_TSEL1] = REG_FIELD(RX8111_REG_EXT, 1, 1),
  91. [RX8111_REGF_ETS] = REG_FIELD(RX8111_REG_EXT, 2, 2),
  92. [RX8111_REGF_WADA] = REG_FIELD(RX8111_REG_EXT, 3, 3),
  93. [RX8111_REGF_TE] = REG_FIELD(RX8111_REG_EXT, 4, 4),
  94. [RX8111_REGF_USEL] = REG_FIELD(RX8111_REG_EXT, 5, 5),
  95. [RX8111_REGF_FSEL0] = REG_FIELD(RX8111_REG_EXT, 6, 6),
  96. [RX8111_REGF_FSEL1] = REG_FIELD(RX8111_REG_EXT, 7, 7),
  97. [RX8111_REGF_XST] = REG_FIELD(RX8111_REG_FLAG, 0, 0),
  98. [RX8111_REGF_VLF] = REG_FIELD(RX8111_REG_FLAG, 1, 1),
  99. [RX8111_REGF_EVF] = REG_FIELD(RX8111_REG_FLAG, 2, 2),
  100. [RX8111_REGF_AF] = REG_FIELD(RX8111_REG_FLAG, 3, 3),
  101. [RX8111_REGF_TF] = REG_FIELD(RX8111_REG_FLAG, 4, 4),
  102. [RX8111_REGF_UF] = REG_FIELD(RX8111_REG_FLAG, 5, 5),
  103. [RX8111_REGF_POR] = REG_FIELD(RX8111_REG_FLAG, 7, 7),
  104. [RX8111_REGF_STOP] = REG_FIELD(RX8111_REG_CTRL, 0, 0),
  105. [RX8111_REGF_EIE] = REG_FIELD(RX8111_REG_CTRL, 2, 2),
  106. [RX8111_REGF_AIE] = REG_FIELD(RX8111_REG_CTRL, 3, 3),
  107. [RX8111_REGF_TIE] = REG_FIELD(RX8111_REG_CTRL, 4, 4),
  108. [RX8111_REGF_UIE] = REG_FIELD(RX8111_REG_CTRL, 5, 5),
  109. [RX8111_REGF_SMPT0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 0, 0),
  110. [RX8111_REGF_SMPT1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 1, 1),
  111. [RX8111_REGF_SWSEL0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 2, 2),
  112. [RX8111_REGF_SWSEL1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 3, 3),
  113. [RX8111_REGF_INIEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 6, 6),
  114. [RX8111_REGF_CHGEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 7, 7),
  115. [RX8111_REGF_VLOW] = REG_FIELD(RX8111_REG_STATUS_MON, 1, 1),
  116. };
  117. static const struct regmap_config rx8111_regmap_config = {
  118. .reg_bits = 8,
  119. .val_bits = 8,
  120. .max_register = RX8111_REG_TS_CTRL3,
  121. };
  122. struct rx8111_data {
  123. struct regmap *regmap;
  124. struct regmap_field *regfields[RX8111_REGF_MAX];
  125. struct device *dev;
  126. struct rtc_device *rtc;
  127. };
  128. static int rx8111_read_vl_flag(struct rx8111_data *data, unsigned int *vlval)
  129. {
  130. int ret;
  131. ret = regmap_field_read(data->regfields[RX8111_REGF_VLF], vlval);
  132. if (ret)
  133. dev_dbg(data->dev, "Could not read VL flag (%d)", ret);
  134. return ret;
  135. }
  136. static int rx8111_read_time(struct device *dev, struct rtc_time *tm)
  137. {
  138. struct rx8111_data *data = dev_get_drvdata(dev);
  139. u8 buf[RX8111_TIME_BUF_SZ];
  140. unsigned int regval;
  141. int ret;
  142. /* Check status. */
  143. ret = regmap_read(data->regmap, RX8111_REG_FLAG, &regval);
  144. if (ret) {
  145. dev_dbg(data->dev, "Could not read flag register (%d)\n", ret);
  146. return ret;
  147. }
  148. if (FIELD_GET(RX8111_FLAG_XST_BIT, regval)) {
  149. dev_dbg(data->dev,
  150. "Crystal oscillation stopped, time is not reliable\n");
  151. return -EINVAL;
  152. }
  153. if (FIELD_GET(RX8111_FLAG_VLF_BIT, regval)) {
  154. dev_dbg(data->dev,
  155. "Low voltage detected, time is not reliable\n");
  156. return -EINVAL;
  157. }
  158. ret = regmap_field_read(data->regfields[RX8111_REGF_STOP], &regval);
  159. if (ret) {
  160. dev_dbg(data->dev, "Could not read clock status (%d)\n", ret);
  161. return ret;
  162. }
  163. if (regval) {
  164. dev_dbg(data->dev, "Clock stopped, time is not reliable\n");
  165. return -EINVAL;
  166. }
  167. /* Read time. */
  168. ret = regmap_bulk_read(data->regmap, RX8111_REG_SEC, buf,
  169. ARRAY_SIZE(buf));
  170. if (ret) {
  171. dev_dbg(data->dev, "Could not bulk read time (%d)\n", ret);
  172. return ret;
  173. }
  174. tm->tm_sec = bcd2bin(buf[0]);
  175. tm->tm_min = bcd2bin(buf[1]);
  176. tm->tm_hour = bcd2bin(buf[2]);
  177. tm->tm_wday = ffs(buf[3]) - 1;
  178. tm->tm_mday = bcd2bin(buf[4]);
  179. tm->tm_mon = bcd2bin(buf[5]) - 1;
  180. tm->tm_year = bcd2bin(buf[6]) + 100;
  181. return 0;
  182. }
  183. static int rx8111_set_time(struct device *dev, struct rtc_time *tm)
  184. {
  185. struct rx8111_data *data = dev_get_drvdata(dev);
  186. u8 buf[RX8111_TIME_BUF_SZ];
  187. int ret;
  188. buf[0] = bin2bcd(tm->tm_sec);
  189. buf[1] = bin2bcd(tm->tm_min);
  190. buf[2] = bin2bcd(tm->tm_hour);
  191. buf[3] = BIT(tm->tm_wday);
  192. buf[4] = bin2bcd(tm->tm_mday);
  193. buf[5] = bin2bcd(tm->tm_mon + 1);
  194. buf[6] = bin2bcd(tm->tm_year - 100);
  195. ret = regmap_clear_bits(data->regmap, RX8111_REG_FLAG,
  196. RX8111_FLAG_XST_BIT | RX8111_FLAG_VLF_BIT);
  197. if (ret)
  198. return ret;
  199. /* Stop the clock. */
  200. ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 1);
  201. if (ret) {
  202. dev_dbg(data->dev, "Could not stop the clock (%d)\n", ret);
  203. return ret;
  204. }
  205. /* Set the time. */
  206. ret = regmap_bulk_write(data->regmap, RX8111_REG_SEC, buf,
  207. ARRAY_SIZE(buf));
  208. if (ret) {
  209. dev_dbg(data->dev, "Could not bulk write time (%d)\n", ret);
  210. /*
  211. * We don't bother with trying to start the clock again. We
  212. * check for this in rx8111_read_time() (and thus force user to
  213. * call rx8111_set_time() to try again).
  214. */
  215. return ret;
  216. }
  217. /* Start the clock. */
  218. ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 0);
  219. if (ret) {
  220. dev_dbg(data->dev, "Could not start the clock (%d)\n", ret);
  221. return ret;
  222. }
  223. return 0;
  224. }
  225. static int rx8111_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  226. {
  227. struct rx8111_data *data = dev_get_drvdata(dev);
  228. unsigned int regval;
  229. unsigned int vlval;
  230. int ret;
  231. switch (cmd) {
  232. case RTC_VL_READ:
  233. ret = rx8111_read_vl_flag(data, &regval);
  234. if (ret)
  235. return ret;
  236. vlval = regval ? RTC_VL_DATA_INVALID : 0;
  237. ret = regmap_field_read(data->regfields[RX8111_REGF_VLOW],
  238. &regval);
  239. if (ret)
  240. return ret;
  241. vlval |= regval ? RTC_VL_BACKUP_LOW : 0;
  242. return put_user(vlval, (typeof(vlval) __user *)arg);
  243. default:
  244. return -ENOIOCTLCMD;
  245. }
  246. }
  247. static const struct rtc_class_ops rx8111_rtc_ops = {
  248. .read_time = rx8111_read_time,
  249. .set_time = rx8111_set_time,
  250. .ioctl = rx8111_ioctl,
  251. };
  252. static int rx8111_probe(struct i2c_client *client)
  253. {
  254. struct rx8111_data *data;
  255. struct rtc_device *rtc;
  256. size_t i;
  257. data = devm_kmalloc(&client->dev, sizeof(*data), GFP_KERNEL);
  258. if (!data) {
  259. dev_dbg(&client->dev, "Could not allocate device data\n");
  260. return -ENOMEM;
  261. }
  262. data->dev = &client->dev;
  263. dev_set_drvdata(data->dev, data);
  264. data->regmap = devm_regmap_init_i2c(client, &rx8111_regmap_config);
  265. if (IS_ERR(data->regmap)) {
  266. dev_dbg(data->dev, "Could not initialize regmap\n");
  267. return PTR_ERR(data->regmap);
  268. }
  269. for (i = 0; i < RX8111_REGF_MAX; ++i) {
  270. data->regfields[i] = devm_regmap_field_alloc(
  271. data->dev, data->regmap, rx8111_regfields[i]);
  272. if (IS_ERR(data->regfields[i])) {
  273. dev_dbg(data->dev,
  274. "Could not allocate register field %zu\n", i);
  275. return PTR_ERR(data->regfields[i]);
  276. }
  277. }
  278. rtc = devm_rtc_allocate_device(data->dev);
  279. if (IS_ERR(rtc)) {
  280. dev_dbg(data->dev, "Could not allocate rtc device\n");
  281. return PTR_ERR(rtc);
  282. }
  283. rtc->ops = &rx8111_rtc_ops;
  284. rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
  285. rtc->range_max = RTC_TIMESTAMP_END_2099;
  286. clear_bit(RTC_FEATURE_ALARM, rtc->features);
  287. return devm_rtc_register_device(rtc);
  288. }
  289. static const struct of_device_id rx8111_of_match[] = {
  290. {
  291. .compatible = "epson,rx8111",
  292. },
  293. {}
  294. };
  295. MODULE_DEVICE_TABLE(of, rx8111_of_match);
  296. static struct i2c_driver rx8111_driver = {
  297. .driver = {
  298. .name = "rtc-rx8111",
  299. .of_match_table = rx8111_of_match,
  300. },
  301. .probe = rx8111_probe,
  302. };
  303. module_i2c_driver(rx8111_driver);
  304. MODULE_AUTHOR("Waqar Hameed <waqar.hameed@axis.com>");
  305. MODULE_DESCRIPTION("Epson RX8111 RTC driver");
  306. MODULE_LICENSE("GPL");