rtc-rv3028.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * RTC driver for the Micro Crystal RV3028
  4. *
  5. * Copyright (C) 2019 Micro Crystal SA
  6. *
  7. * Alexandre Belloni <alexandre.belloni@bootlin.com>
  8. *
  9. */
  10. #include <linux/clk-provider.h>
  11. #include <linux/bcd.h>
  12. #include <linux/bitfield.h>
  13. #include <linux/bitops.h>
  14. #include <linux/i2c.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/log2.h>
  18. #include <linux/module.h>
  19. #include <linux/of.h>
  20. #include <linux/regmap.h>
  21. #include <linux/rtc.h>
  22. #define RV3028_SEC 0x00
  23. #define RV3028_MIN 0x01
  24. #define RV3028_HOUR 0x02
  25. #define RV3028_WDAY 0x03
  26. #define RV3028_DAY 0x04
  27. #define RV3028_MONTH 0x05
  28. #define RV3028_YEAR 0x06
  29. #define RV3028_ALARM_MIN 0x07
  30. #define RV3028_ALARM_HOUR 0x08
  31. #define RV3028_ALARM_DAY 0x09
  32. #define RV3028_STATUS 0x0E
  33. #define RV3028_CTRL1 0x0F
  34. #define RV3028_CTRL2 0x10
  35. #define RV3028_EVT_CTRL 0x13
  36. #define RV3028_TS_COUNT 0x14
  37. #define RV3028_TS_SEC 0x15
  38. #define RV3028_RAM1 0x1F
  39. #define RV3028_EEPROM_ADDR 0x25
  40. #define RV3028_EEPROM_DATA 0x26
  41. #define RV3028_EEPROM_CMD 0x27
  42. #define RV3028_CLKOUT 0x35
  43. #define RV3028_OFFSET 0x36
  44. #define RV3028_BACKUP 0x37
  45. #define RV3028_STATUS_PORF BIT(0)
  46. #define RV3028_STATUS_EVF BIT(1)
  47. #define RV3028_STATUS_AF BIT(2)
  48. #define RV3028_STATUS_TF BIT(3)
  49. #define RV3028_STATUS_UF BIT(4)
  50. #define RV3028_STATUS_BSF BIT(5)
  51. #define RV3028_STATUS_CLKF BIT(6)
  52. #define RV3028_STATUS_EEBUSY BIT(7)
  53. #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0)
  54. #define RV3028_CLKOUT_PORIE BIT(3)
  55. #define RV3028_CLKOUT_CLKSY BIT(6)
  56. #define RV3028_CLKOUT_CLKOE BIT(7)
  57. #define RV3028_CTRL1_EERD BIT(3)
  58. #define RV3028_CTRL1_WADA BIT(5)
  59. #define RV3028_CTRL2_RESET BIT(0)
  60. #define RV3028_CTRL2_12_24 BIT(1)
  61. #define RV3028_CTRL2_EIE BIT(2)
  62. #define RV3028_CTRL2_AIE BIT(3)
  63. #define RV3028_CTRL2_TIE BIT(4)
  64. #define RV3028_CTRL2_UIE BIT(5)
  65. #define RV3028_CTRL2_TSE BIT(7)
  66. #define RV3028_EVT_CTRL_TSR BIT(2)
  67. #define RV3028_EEPROM_CMD_UPDATE 0x11
  68. #define RV3028_EEPROM_CMD_WRITE 0x21
  69. #define RV3028_EEPROM_CMD_READ 0x22
  70. #define RV3028_EEBUSY_POLL 10000
  71. #define RV3028_EEBUSY_TIMEOUT 100000
  72. #define RV3028_BACKUP_TCE BIT(5)
  73. #define RV3028_BACKUP_TCR_MASK GENMASK(1,0)
  74. #define RV3028_BACKUP_BSM GENMASK(3,2)
  75. #define RV3028_BACKUP_BSM_DSM 0x1
  76. #define RV3028_BACKUP_BSM_LSM 0x3
  77. #define OFFSET_STEP_PPT 953674
  78. enum rv3028_type {
  79. rv_3028,
  80. };
  81. struct rv3028_data {
  82. struct regmap *regmap;
  83. struct rtc_device *rtc;
  84. enum rv3028_type type;
  85. #ifdef CONFIG_COMMON_CLK
  86. struct clk_hw clkout_hw;
  87. #endif
  88. };
  89. static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000};
  90. static ssize_t timestamp0_store(struct device *dev,
  91. struct device_attribute *attr,
  92. const char *buf, size_t count)
  93. {
  94. struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
  95. regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR,
  96. RV3028_EVT_CTRL_TSR);
  97. return count;
  98. };
  99. static ssize_t timestamp0_show(struct device *dev,
  100. struct device_attribute *attr, char *buf)
  101. {
  102. struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
  103. struct rtc_time tm;
  104. unsigned int count;
  105. u8 date[6];
  106. int ret;
  107. ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
  108. if (ret)
  109. return ret;
  110. if (!count)
  111. return 0;
  112. ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date,
  113. sizeof(date));
  114. if (ret)
  115. return ret;
  116. tm.tm_sec = bcd2bin(date[0]);
  117. tm.tm_min = bcd2bin(date[1]);
  118. tm.tm_hour = bcd2bin(date[2]);
  119. tm.tm_mday = bcd2bin(date[3]);
  120. tm.tm_mon = bcd2bin(date[4]) - 1;
  121. tm.tm_year = bcd2bin(date[5]) + 100;
  122. ret = rtc_valid_tm(&tm);
  123. if (ret)
  124. return ret;
  125. return sprintf(buf, "%llu\n",
  126. (unsigned long long)rtc_tm_to_time64(&tm));
  127. };
  128. static DEVICE_ATTR_RW(timestamp0);
  129. static ssize_t timestamp0_count_show(struct device *dev,
  130. struct device_attribute *attr, char *buf)
  131. {
  132. struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
  133. unsigned int count;
  134. int ret;
  135. ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
  136. if (ret)
  137. return ret;
  138. return sprintf(buf, "%u\n", count);
  139. };
  140. static DEVICE_ATTR_RO(timestamp0_count);
  141. static struct attribute *rv3028_attrs[] = {
  142. &dev_attr_timestamp0.attr,
  143. &dev_attr_timestamp0_count.attr,
  144. NULL
  145. };
  146. static const struct attribute_group rv3028_attr_group = {
  147. .attrs = rv3028_attrs,
  148. };
  149. static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd)
  150. {
  151. if (eerd)
  152. return 0;
  153. return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0);
  154. }
  155. static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd)
  156. {
  157. u32 ctrl1, status;
  158. int ret;
  159. ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1);
  160. if (ret)
  161. return ret;
  162. *eerd = ctrl1 & RV3028_CTRL1_EERD;
  163. if (*eerd)
  164. return 0;
  165. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
  166. RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
  167. if (ret)
  168. return ret;
  169. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  170. !(status & RV3028_STATUS_EEBUSY),
  171. RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
  172. if (ret) {
  173. rv3028_exit_eerd(rv3028, *eerd);
  174. return ret;
  175. }
  176. return 0;
  177. }
  178. static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd)
  179. {
  180. u32 status;
  181. int ret;
  182. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
  183. if (ret)
  184. goto exit_eerd;
  185. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE);
  186. if (ret)
  187. goto exit_eerd;
  188. usleep_range(63000, RV3028_EEBUSY_TIMEOUT);
  189. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  190. !(status & RV3028_STATUS_EEBUSY),
  191. RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
  192. exit_eerd:
  193. rv3028_exit_eerd(rv3028, eerd);
  194. return ret;
  195. }
  196. static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg,
  197. unsigned int mask, unsigned int val)
  198. {
  199. u32 eerd;
  200. int ret;
  201. ret = rv3028_enter_eerd(rv3028, &eerd);
  202. if (ret)
  203. return ret;
  204. ret = regmap_update_bits(rv3028->regmap, reg, mask, val);
  205. if (ret) {
  206. rv3028_exit_eerd(rv3028, eerd);
  207. return ret;
  208. }
  209. return rv3028_update_eeprom(rv3028, eerd);
  210. }
  211. static irqreturn_t rv3028_handle_irq(int irq, void *dev_id)
  212. {
  213. struct rv3028_data *rv3028 = dev_id;
  214. unsigned long events = 0;
  215. u32 status = 0, ctrl = 0;
  216. if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 ||
  217. status == 0) {
  218. return IRQ_NONE;
  219. }
  220. status &= ~RV3028_STATUS_PORF;
  221. if (status & RV3028_STATUS_TF) {
  222. status |= RV3028_STATUS_TF;
  223. ctrl |= RV3028_CTRL2_TIE;
  224. events |= RTC_PF;
  225. }
  226. if (status & RV3028_STATUS_AF) {
  227. status |= RV3028_STATUS_AF;
  228. ctrl |= RV3028_CTRL2_AIE;
  229. events |= RTC_AF;
  230. }
  231. if (status & RV3028_STATUS_UF) {
  232. status |= RV3028_STATUS_UF;
  233. ctrl |= RV3028_CTRL2_UIE;
  234. events |= RTC_UF;
  235. }
  236. if (events) {
  237. rtc_update_irq(rv3028->rtc, 1, events);
  238. regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0);
  239. regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0);
  240. }
  241. if (status & RV3028_STATUS_EVF) {
  242. sysfs_notify(&rv3028->rtc->dev.kobj, NULL,
  243. dev_attr_timestamp0.attr.name);
  244. dev_warn(&rv3028->rtc->dev, "event detected");
  245. }
  246. return IRQ_HANDLED;
  247. }
  248. static int rv3028_get_time(struct device *dev, struct rtc_time *tm)
  249. {
  250. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  251. u8 date[7];
  252. int ret, status;
  253. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  254. if (ret < 0)
  255. return ret;
  256. if (status & RV3028_STATUS_PORF)
  257. return -EINVAL;
  258. ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date));
  259. if (ret)
  260. return ret;
  261. tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f);
  262. tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f);
  263. tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f);
  264. tm->tm_wday = date[RV3028_WDAY] & 0x7f;
  265. tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f);
  266. tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1;
  267. tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100;
  268. return 0;
  269. }
  270. static int rv3028_set_time(struct device *dev, struct rtc_time *tm)
  271. {
  272. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  273. u8 date[7];
  274. int ret;
  275. date[RV3028_SEC] = bin2bcd(tm->tm_sec);
  276. date[RV3028_MIN] = bin2bcd(tm->tm_min);
  277. date[RV3028_HOUR] = bin2bcd(tm->tm_hour);
  278. date[RV3028_WDAY] = tm->tm_wday;
  279. date[RV3028_DAY] = bin2bcd(tm->tm_mday);
  280. date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1);
  281. date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100);
  282. /*
  283. * Writing to the Seconds register has the same effect as setting RESET
  284. * bit to 1
  285. */
  286. ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date,
  287. sizeof(date));
  288. if (ret)
  289. return ret;
  290. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  291. RV3028_STATUS_PORF, 0);
  292. return ret;
  293. }
  294. static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  295. {
  296. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  297. u8 alarmvals[3];
  298. int status, ctrl, ret;
  299. ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
  300. sizeof(alarmvals));
  301. if (ret)
  302. return ret;
  303. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  304. if (ret < 0)
  305. return ret;
  306. ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl);
  307. if (ret < 0)
  308. return ret;
  309. alrm->time.tm_sec = 0;
  310. alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
  311. alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
  312. alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
  313. alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE);
  314. alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled;
  315. return 0;
  316. }
  317. static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  318. {
  319. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  320. u8 alarmvals[3];
  321. u8 ctrl = 0;
  322. int ret;
  323. /* The alarm has no seconds, round up to nearest minute */
  324. if (alrm->time.tm_sec) {
  325. time64_t alarm_time = rtc_tm_to_time64(&alrm->time);
  326. alarm_time += 60 - alrm->time.tm_sec;
  327. rtc_time64_to_tm(alarm_time, &alrm->time);
  328. }
  329. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  330. RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0);
  331. if (ret)
  332. return ret;
  333. alarmvals[0] = bin2bcd(alrm->time.tm_min);
  334. alarmvals[1] = bin2bcd(alrm->time.tm_hour);
  335. alarmvals[2] = bin2bcd(alrm->time.tm_mday);
  336. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  337. RV3028_STATUS_AF, 0);
  338. if (ret)
  339. return ret;
  340. ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
  341. sizeof(alarmvals));
  342. if (ret)
  343. return ret;
  344. if (alrm->enabled) {
  345. if (rv3028->rtc->uie_rtctimer.enabled)
  346. ctrl |= RV3028_CTRL2_UIE;
  347. if (rv3028->rtc->aie_timer.enabled)
  348. ctrl |= RV3028_CTRL2_AIE;
  349. }
  350. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  351. RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
  352. return ret;
  353. }
  354. static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled)
  355. {
  356. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  357. int ctrl = 0, ret;
  358. if (enabled) {
  359. if (rv3028->rtc->uie_rtctimer.enabled)
  360. ctrl |= RV3028_CTRL2_UIE;
  361. if (rv3028->rtc->aie_timer.enabled)
  362. ctrl |= RV3028_CTRL2_AIE;
  363. }
  364. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  365. RV3028_STATUS_AF | RV3028_STATUS_UF, 0);
  366. if (ret)
  367. return ret;
  368. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  369. RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
  370. if (ret)
  371. return ret;
  372. return 0;
  373. }
  374. static int rv3028_read_offset(struct device *dev, long *offset)
  375. {
  376. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  377. int ret, value, steps;
  378. ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value);
  379. if (ret < 0)
  380. return ret;
  381. steps = sign_extend32(value << 1, 8);
  382. ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
  383. if (ret < 0)
  384. return ret;
  385. steps += value >> 7;
  386. *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
  387. return 0;
  388. }
  389. static int rv3028_set_offset(struct device *dev, long offset)
  390. {
  391. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  392. u32 eerd;
  393. int ret;
  394. offset = clamp(offset, -244141L, 243187L) * 1000;
  395. offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
  396. ret = rv3028_enter_eerd(rv3028, &eerd);
  397. if (ret)
  398. return ret;
  399. ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1);
  400. if (ret < 0)
  401. goto exit_eerd;
  402. ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7),
  403. offset << 7);
  404. if (ret < 0)
  405. goto exit_eerd;
  406. return rv3028_update_eeprom(rv3028, eerd);
  407. exit_eerd:
  408. rv3028_exit_eerd(rv3028, eerd);
  409. return ret;
  410. }
  411. static int rv3028_param_get(struct device *dev, struct rtc_param *param)
  412. {
  413. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  414. int ret;
  415. u32 value;
  416. switch(param->param) {
  417. case RTC_PARAM_BACKUP_SWITCH_MODE:
  418. ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
  419. if (ret < 0)
  420. return ret;
  421. value = FIELD_GET(RV3028_BACKUP_BSM, value);
  422. switch(value) {
  423. case RV3028_BACKUP_BSM_DSM:
  424. param->uvalue = RTC_BSM_DIRECT;
  425. break;
  426. case RV3028_BACKUP_BSM_LSM:
  427. param->uvalue = RTC_BSM_LEVEL;
  428. break;
  429. default:
  430. param->uvalue = RTC_BSM_DISABLED;
  431. }
  432. break;
  433. default:
  434. return -EINVAL;
  435. }
  436. return 0;
  437. }
  438. static int rv3028_param_set(struct device *dev, struct rtc_param *param)
  439. {
  440. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  441. u8 mode;
  442. switch(param->param) {
  443. case RTC_PARAM_BACKUP_SWITCH_MODE:
  444. switch (param->uvalue) {
  445. case RTC_BSM_DISABLED:
  446. mode = 0;
  447. break;
  448. case RTC_BSM_DIRECT:
  449. mode = RV3028_BACKUP_BSM_DSM;
  450. break;
  451. case RTC_BSM_LEVEL:
  452. mode = RV3028_BACKUP_BSM_LSM;
  453. break;
  454. default:
  455. return -EINVAL;
  456. }
  457. return rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_BSM,
  458. FIELD_PREP(RV3028_BACKUP_BSM, mode));
  459. default:
  460. return -EINVAL;
  461. }
  462. return 0;
  463. }
  464. static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  465. {
  466. struct rv3028_data *rv3028 = dev_get_drvdata(dev);
  467. int status, ret = 0;
  468. switch (cmd) {
  469. case RTC_VL_READ:
  470. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  471. if (ret < 0)
  472. return ret;
  473. status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0;
  474. return put_user(status, (unsigned int __user *)arg);
  475. default:
  476. return -ENOIOCTLCMD;
  477. }
  478. }
  479. static int rv3028_nvram_write(void *priv, unsigned int offset, void *val,
  480. size_t bytes)
  481. {
  482. return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes);
  483. }
  484. static int rv3028_nvram_read(void *priv, unsigned int offset, void *val,
  485. size_t bytes)
  486. {
  487. return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes);
  488. }
  489. static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val,
  490. size_t bytes)
  491. {
  492. struct rv3028_data *rv3028 = priv;
  493. u32 status, eerd;
  494. int i, ret;
  495. u8 *buf = val;
  496. ret = rv3028_enter_eerd(rv3028, &eerd);
  497. if (ret)
  498. return ret;
  499. for (i = 0; i < bytes; i++) {
  500. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
  501. if (ret)
  502. goto restore_eerd;
  503. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]);
  504. if (ret)
  505. goto restore_eerd;
  506. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
  507. if (ret)
  508. goto restore_eerd;
  509. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
  510. RV3028_EEPROM_CMD_WRITE);
  511. if (ret)
  512. goto restore_eerd;
  513. usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
  514. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  515. !(status & RV3028_STATUS_EEBUSY),
  516. RV3028_EEBUSY_POLL,
  517. RV3028_EEBUSY_TIMEOUT);
  518. if (ret)
  519. goto restore_eerd;
  520. }
  521. restore_eerd:
  522. rv3028_exit_eerd(rv3028, eerd);
  523. return ret;
  524. }
  525. static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val,
  526. size_t bytes)
  527. {
  528. struct rv3028_data *rv3028 = priv;
  529. u32 status, eerd, data;
  530. int i, ret;
  531. u8 *buf = val;
  532. ret = rv3028_enter_eerd(rv3028, &eerd);
  533. if (ret)
  534. return ret;
  535. for (i = 0; i < bytes; i++) {
  536. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
  537. if (ret)
  538. goto restore_eerd;
  539. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
  540. if (ret)
  541. goto restore_eerd;
  542. ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
  543. RV3028_EEPROM_CMD_READ);
  544. if (ret)
  545. goto restore_eerd;
  546. ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
  547. !(status & RV3028_STATUS_EEBUSY),
  548. RV3028_EEBUSY_POLL,
  549. RV3028_EEBUSY_TIMEOUT);
  550. if (ret)
  551. goto restore_eerd;
  552. ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data);
  553. if (ret)
  554. goto restore_eerd;
  555. buf[i] = data;
  556. }
  557. restore_eerd:
  558. rv3028_exit_eerd(rv3028, eerd);
  559. return ret;
  560. }
  561. #ifdef CONFIG_COMMON_CLK
  562. #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw)
  563. static int clkout_rates[] = {
  564. 32768,
  565. 8192,
  566. 1024,
  567. 64,
  568. 32,
  569. 1,
  570. };
  571. static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw,
  572. unsigned long parent_rate)
  573. {
  574. int clkout, ret;
  575. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  576. ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
  577. if (ret < 0)
  578. return 0;
  579. clkout &= RV3028_CLKOUT_FD_MASK;
  580. return clkout_rates[clkout];
  581. }
  582. static int rv3028_clkout_determine_rate(struct clk_hw *hw,
  583. struct clk_rate_request *req)
  584. {
  585. int i;
  586. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  587. if (clkout_rates[i] <= req->rate) {
  588. req->rate = clkout_rates[i];
  589. return 0;
  590. }
  591. req->rate = clkout_rates[0];
  592. return 0;
  593. }
  594. static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
  595. unsigned long parent_rate)
  596. {
  597. int i, ret;
  598. u32 enabled;
  599. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  600. ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled);
  601. if (ret < 0)
  602. return ret;
  603. ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
  604. if (ret < 0)
  605. return ret;
  606. enabled &= RV3028_CLKOUT_CLKOE;
  607. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  608. if (clkout_rates[i] == rate)
  609. return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff,
  610. RV3028_CLKOUT_CLKSY | enabled | i);
  611. return -EINVAL;
  612. }
  613. static int rv3028_clkout_prepare(struct clk_hw *hw)
  614. {
  615. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  616. return regmap_write(rv3028->regmap, RV3028_CLKOUT,
  617. RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE);
  618. }
  619. static void rv3028_clkout_unprepare(struct clk_hw *hw)
  620. {
  621. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  622. regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
  623. regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  624. RV3028_STATUS_CLKF, 0);
  625. }
  626. static int rv3028_clkout_is_prepared(struct clk_hw *hw)
  627. {
  628. int clkout, ret;
  629. struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
  630. ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
  631. if (ret < 0)
  632. return ret;
  633. return !!(clkout & RV3028_CLKOUT_CLKOE);
  634. }
  635. static const struct clk_ops rv3028_clkout_ops = {
  636. .prepare = rv3028_clkout_prepare,
  637. .unprepare = rv3028_clkout_unprepare,
  638. .is_prepared = rv3028_clkout_is_prepared,
  639. .recalc_rate = rv3028_clkout_recalc_rate,
  640. .determine_rate = rv3028_clkout_determine_rate,
  641. .set_rate = rv3028_clkout_set_rate,
  642. };
  643. static int rv3028_clkout_register_clk(struct rv3028_data *rv3028,
  644. struct i2c_client *client)
  645. {
  646. int ret;
  647. struct clk *clk;
  648. struct clk_init_data init;
  649. struct device_node *node = client->dev.of_node;
  650. ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
  651. RV3028_STATUS_CLKF, 0);
  652. if (ret < 0)
  653. return ret;
  654. init.name = "rv3028-clkout";
  655. init.ops = &rv3028_clkout_ops;
  656. init.flags = 0;
  657. init.parent_names = NULL;
  658. init.num_parents = 0;
  659. rv3028->clkout_hw.init = &init;
  660. /* optional override of the clockname */
  661. of_property_read_string(node, "clock-output-names", &init.name);
  662. /* register the clock */
  663. clk = devm_clk_register(&client->dev, &rv3028->clkout_hw);
  664. if (!IS_ERR(clk))
  665. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  666. return 0;
  667. }
  668. #endif
  669. static const struct rtc_class_ops rv3028_rtc_ops = {
  670. .read_time = rv3028_get_time,
  671. .set_time = rv3028_set_time,
  672. .read_alarm = rv3028_get_alarm,
  673. .set_alarm = rv3028_set_alarm,
  674. .alarm_irq_enable = rv3028_alarm_irq_enable,
  675. .read_offset = rv3028_read_offset,
  676. .set_offset = rv3028_set_offset,
  677. .ioctl = rv3028_ioctl,
  678. .param_get = rv3028_param_get,
  679. .param_set = rv3028_param_set,
  680. };
  681. static const struct regmap_config regmap_config = {
  682. .reg_bits = 8,
  683. .val_bits = 8,
  684. .max_register = 0x37,
  685. };
  686. static u8 rv3028_set_trickle_charger(struct rv3028_data *rv3028,
  687. struct i2c_client *client)
  688. {
  689. int ret, val_old, val;
  690. u32 ohms, chargeable;
  691. ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &val_old);
  692. if (ret < 0)
  693. return ret;
  694. /* mask out only trickle charger bits */
  695. val_old = val_old & (RV3028_BACKUP_TCE | RV3028_BACKUP_TCR_MASK);
  696. val = val_old;
  697. /* setup trickle charger */
  698. if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms",
  699. &ohms)) {
  700. int i;
  701. for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++)
  702. if (ohms == rv3028_trickle_resistors[i])
  703. break;
  704. if (i < ARRAY_SIZE(rv3028_trickle_resistors)) {
  705. /* enable trickle charger and its resistor */
  706. val = RV3028_BACKUP_TCE | i;
  707. } else {
  708. dev_warn(&client->dev, "invalid trickle resistor value\n");
  709. }
  710. }
  711. if (!device_property_read_u32(&client->dev, "aux-voltage-chargeable",
  712. &chargeable)) {
  713. switch (chargeable) {
  714. case 0:
  715. val &= ~RV3028_BACKUP_TCE;
  716. break;
  717. case 1:
  718. val |= RV3028_BACKUP_TCE;
  719. break;
  720. default:
  721. dev_warn(&client->dev,
  722. "unsupported aux-voltage-chargeable value\n");
  723. break;
  724. }
  725. }
  726. /* only update EEPROM if changes are necessary */
  727. if (val_old != val) {
  728. ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE |
  729. RV3028_BACKUP_TCR_MASK, val);
  730. if (ret)
  731. return ret;
  732. }
  733. return ret;
  734. }
  735. static int rv3028_probe(struct i2c_client *client)
  736. {
  737. struct rv3028_data *rv3028;
  738. int ret, status;
  739. struct nvmem_config nvmem_cfg = {
  740. .name = "rv3028_nvram",
  741. .word_size = 1,
  742. .stride = 1,
  743. .size = 2,
  744. .type = NVMEM_TYPE_BATTERY_BACKED,
  745. .reg_read = rv3028_nvram_read,
  746. .reg_write = rv3028_nvram_write,
  747. };
  748. struct nvmem_config eeprom_cfg = {
  749. .name = "rv3028_eeprom",
  750. .word_size = 1,
  751. .stride = 1,
  752. .size = 43,
  753. .type = NVMEM_TYPE_EEPROM,
  754. .reg_read = rv3028_eeprom_read,
  755. .reg_write = rv3028_eeprom_write,
  756. };
  757. rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data),
  758. GFP_KERNEL);
  759. if (!rv3028)
  760. return -ENOMEM;
  761. rv3028->regmap = devm_regmap_init_i2c(client, &regmap_config);
  762. if (IS_ERR(rv3028->regmap))
  763. return PTR_ERR(rv3028->regmap);
  764. i2c_set_clientdata(client, rv3028);
  765. ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
  766. if (ret < 0)
  767. return ret;
  768. if (status & RV3028_STATUS_AF)
  769. dev_warn(&client->dev, "An alarm may have been missed.\n");
  770. rv3028->rtc = devm_rtc_allocate_device(&client->dev);
  771. if (IS_ERR(rv3028->rtc))
  772. return PTR_ERR(rv3028->rtc);
  773. if (client->irq > 0) {
  774. unsigned long flags;
  775. /*
  776. * If flags = 0, devm_request_threaded_irq() will use IRQ flags
  777. * obtained from device tree.
  778. */
  779. if (dev_fwnode(&client->dev))
  780. flags = 0;
  781. else
  782. flags = IRQF_TRIGGER_LOW;
  783. ret = devm_request_threaded_irq(&client->dev, client->irq,
  784. NULL, rv3028_handle_irq,
  785. flags | IRQF_ONESHOT,
  786. "rv3028", rv3028);
  787. if (ret) {
  788. dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
  789. client->irq = 0;
  790. }
  791. }
  792. if (!client->irq)
  793. clear_bit(RTC_FEATURE_ALARM, rv3028->rtc->features);
  794. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
  795. RV3028_CTRL1_WADA, RV3028_CTRL1_WADA);
  796. if (ret)
  797. return ret;
  798. /* setup timestamping */
  799. ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
  800. RV3028_CTRL2_EIE | RV3028_CTRL2_TSE,
  801. RV3028_CTRL2_EIE | RV3028_CTRL2_TSE);
  802. if (ret)
  803. return ret;
  804. ret = rv3028_set_trickle_charger(rv3028, client);
  805. if (ret)
  806. return ret;
  807. ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group);
  808. if (ret)
  809. return ret;
  810. set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, rv3028->rtc->features);
  811. rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
  812. rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099;
  813. rv3028->rtc->ops = &rv3028_rtc_ops;
  814. ret = devm_rtc_register_device(rv3028->rtc);
  815. if (ret)
  816. return ret;
  817. nvmem_cfg.priv = rv3028->regmap;
  818. devm_rtc_nvmem_register(rv3028->rtc, &nvmem_cfg);
  819. eeprom_cfg.priv = rv3028;
  820. devm_rtc_nvmem_register(rv3028->rtc, &eeprom_cfg);
  821. #ifdef CONFIG_COMMON_CLK
  822. rv3028_clkout_register_clk(rv3028, client);
  823. #endif
  824. return 0;
  825. }
  826. static const struct acpi_device_id rv3028_i2c_acpi_match[] = {
  827. { "MCRY3028" },
  828. { }
  829. };
  830. MODULE_DEVICE_TABLE(acpi, rv3028_i2c_acpi_match);
  831. static const __maybe_unused struct of_device_id rv3028_of_match[] = {
  832. { .compatible = "microcrystal,rv3028", },
  833. { }
  834. };
  835. MODULE_DEVICE_TABLE(of, rv3028_of_match);
  836. static const struct i2c_device_id rv3028_id_table[] = {
  837. { .name = "rv3028", },
  838. { }
  839. };
  840. MODULE_DEVICE_TABLE(i2c, rv3028_id_table);
  841. static struct i2c_driver rv3028_driver = {
  842. .driver = {
  843. .name = "rtc-rv3028",
  844. .acpi_match_table = rv3028_i2c_acpi_match,
  845. .of_match_table = of_match_ptr(rv3028_of_match),
  846. },
  847. .id_table = rv3028_id_table,
  848. .probe = rv3028_probe,
  849. };
  850. module_i2c_driver(rv3028_driver);
  851. MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
  852. MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver");
  853. MODULE_LICENSE("GPL v2");