rtc-lpc24xx.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
  4. *
  5. * Copyright (C) 2011 NXP Semiconductors
  6. * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/mod_devicetable.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/rtc.h>
  15. /* LPC24xx RTC register offsets and bits */
  16. #define LPC24XX_ILR 0x00
  17. #define LPC24XX_RTCCIF BIT(0)
  18. #define LPC24XX_RTCALF BIT(1)
  19. #define LPC24XX_CTC 0x04
  20. #define LPC24XX_CCR 0x08
  21. #define LPC24XX_CLKEN BIT(0)
  22. #define LPC178X_CCALEN BIT(4)
  23. #define LPC24XX_CIIR 0x0c
  24. #define LPC24XX_AMR 0x10
  25. #define LPC24XX_ALARM_DISABLE 0xff
  26. #define LPC24XX_CTIME0 0x14
  27. #define LPC24XX_CTIME1 0x18
  28. #define LPC24XX_CTIME2 0x1c
  29. #define LPC24XX_SEC 0x20
  30. #define LPC24XX_MIN 0x24
  31. #define LPC24XX_HOUR 0x28
  32. #define LPC24XX_DOM 0x2c
  33. #define LPC24XX_DOW 0x30
  34. #define LPC24XX_DOY 0x34
  35. #define LPC24XX_MONTH 0x38
  36. #define LPC24XX_YEAR 0x3c
  37. #define LPC24XX_ALSEC 0x60
  38. #define LPC24XX_ALMIN 0x64
  39. #define LPC24XX_ALHOUR 0x68
  40. #define LPC24XX_ALDOM 0x6c
  41. #define LPC24XX_ALDOW 0x70
  42. #define LPC24XX_ALDOY 0x74
  43. #define LPC24XX_ALMON 0x78
  44. #define LPC24XX_ALYEAR 0x7c
  45. /* Macros to read fields in consolidated time (CT) registers */
  46. #define CT0_SECS(x) (((x) >> 0) & 0x3f)
  47. #define CT0_MINS(x) (((x) >> 8) & 0x3f)
  48. #define CT0_HOURS(x) (((x) >> 16) & 0x1f)
  49. #define CT0_DOW(x) (((x) >> 24) & 0x07)
  50. #define CT1_DOM(x) (((x) >> 0) & 0x1f)
  51. #define CT1_MONTH(x) (((x) >> 8) & 0x0f)
  52. #define CT1_YEAR(x) (((x) >> 16) & 0xfff)
  53. #define CT2_DOY(x) (((x) >> 0) & 0xfff)
  54. #define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
  55. #define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg))
  56. struct lpc24xx_rtc {
  57. void __iomem *rtc_base;
  58. struct rtc_device *rtc;
  59. struct clk *clk_rtc;
  60. struct clk *clk_reg;
  61. };
  62. static int lpc24xx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  63. {
  64. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  65. /* Disable RTC during update */
  66. rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
  67. rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec);
  68. rtc_writel(rtc, LPC24XX_MIN, tm->tm_min);
  69. rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour);
  70. rtc_writel(rtc, LPC24XX_DOW, tm->tm_wday);
  71. rtc_writel(rtc, LPC24XX_DOM, tm->tm_mday);
  72. rtc_writel(rtc, LPC24XX_DOY, tm->tm_yday);
  73. rtc_writel(rtc, LPC24XX_MONTH, tm->tm_mon);
  74. rtc_writel(rtc, LPC24XX_YEAR, tm->tm_year);
  75. rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
  76. return 0;
  77. }
  78. static int lpc24xx_rtc_read_time(struct device *dev, struct rtc_time *tm)
  79. {
  80. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  81. u32 ct0, ct1, ct2;
  82. ct0 = rtc_readl(rtc, LPC24XX_CTIME0);
  83. ct1 = rtc_readl(rtc, LPC24XX_CTIME1);
  84. ct2 = rtc_readl(rtc, LPC24XX_CTIME2);
  85. tm->tm_sec = CT0_SECS(ct0);
  86. tm->tm_min = CT0_MINS(ct0);
  87. tm->tm_hour = CT0_HOURS(ct0);
  88. tm->tm_wday = CT0_DOW(ct0);
  89. tm->tm_mon = CT1_MONTH(ct1);
  90. tm->tm_mday = CT1_DOM(ct1);
  91. tm->tm_year = CT1_YEAR(ct1);
  92. tm->tm_yday = CT2_DOY(ct2);
  93. return 0;
  94. }
  95. static int lpc24xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  96. {
  97. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  98. struct rtc_time *tm = &wkalrm->time;
  99. tm->tm_sec = rtc_readl(rtc, LPC24XX_ALSEC);
  100. tm->tm_min = rtc_readl(rtc, LPC24XX_ALMIN);
  101. tm->tm_hour = rtc_readl(rtc, LPC24XX_ALHOUR);
  102. tm->tm_mday = rtc_readl(rtc, LPC24XX_ALDOM);
  103. tm->tm_wday = rtc_readl(rtc, LPC24XX_ALDOW);
  104. tm->tm_yday = rtc_readl(rtc, LPC24XX_ALDOY);
  105. tm->tm_mon = rtc_readl(rtc, LPC24XX_ALMON);
  106. tm->tm_year = rtc_readl(rtc, LPC24XX_ALYEAR);
  107. wkalrm->enabled = rtc_readl(rtc, LPC24XX_AMR) == 0;
  108. wkalrm->pending = !!(rtc_readl(rtc, LPC24XX_ILR) & LPC24XX_RTCCIF);
  109. return rtc_valid_tm(&wkalrm->time);
  110. }
  111. static int lpc24xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  112. {
  113. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  114. struct rtc_time *tm = &wkalrm->time;
  115. /* Disable alarm irq during update */
  116. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  117. rtc_writel(rtc, LPC24XX_ALSEC, tm->tm_sec);
  118. rtc_writel(rtc, LPC24XX_ALMIN, tm->tm_min);
  119. rtc_writel(rtc, LPC24XX_ALHOUR, tm->tm_hour);
  120. rtc_writel(rtc, LPC24XX_ALDOM, tm->tm_mday);
  121. rtc_writel(rtc, LPC24XX_ALDOW, tm->tm_wday);
  122. rtc_writel(rtc, LPC24XX_ALDOY, tm->tm_yday);
  123. rtc_writel(rtc, LPC24XX_ALMON, tm->tm_mon);
  124. rtc_writel(rtc, LPC24XX_ALYEAR, tm->tm_year);
  125. if (wkalrm->enabled)
  126. rtc_writel(rtc, LPC24XX_AMR, 0);
  127. return 0;
  128. }
  129. static int lpc24xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
  130. {
  131. struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
  132. if (enable)
  133. rtc_writel(rtc, LPC24XX_AMR, 0);
  134. else
  135. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  136. return 0;
  137. }
  138. static irqreturn_t lpc24xx_rtc_interrupt(int irq, void *data)
  139. {
  140. unsigned long events = RTC_IRQF;
  141. struct lpc24xx_rtc *rtc = data;
  142. u32 rtc_iir;
  143. /* Check interrupt cause */
  144. rtc_iir = rtc_readl(rtc, LPC24XX_ILR);
  145. if (rtc_iir & LPC24XX_RTCALF) {
  146. events |= RTC_AF;
  147. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  148. }
  149. /* Clear interrupt status and report event */
  150. rtc_writel(rtc, LPC24XX_ILR, rtc_iir);
  151. rtc_update_irq(rtc->rtc, 1, events);
  152. return IRQ_HANDLED;
  153. }
  154. static const struct rtc_class_ops lpc24xx_rtc_ops = {
  155. .read_time = lpc24xx_rtc_read_time,
  156. .set_time = lpc24xx_rtc_set_time,
  157. .read_alarm = lpc24xx_rtc_read_alarm,
  158. .set_alarm = lpc24xx_rtc_set_alarm,
  159. .alarm_irq_enable = lpc24xx_rtc_alarm_irq_enable,
  160. };
  161. static int lpc24xx_rtc_probe(struct platform_device *pdev)
  162. {
  163. struct lpc24xx_rtc *rtc;
  164. int irq, ret;
  165. rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
  166. if (!rtc)
  167. return -ENOMEM;
  168. rtc->rtc_base = devm_platform_ioremap_resource(pdev, 0);
  169. if (IS_ERR(rtc->rtc_base))
  170. return PTR_ERR(rtc->rtc_base);
  171. irq = platform_get_irq(pdev, 0);
  172. if (irq < 0)
  173. return irq;
  174. rtc->clk_rtc = devm_clk_get(&pdev->dev, "rtc");
  175. if (IS_ERR(rtc->clk_rtc)) {
  176. dev_err(&pdev->dev, "error getting rtc clock\n");
  177. return PTR_ERR(rtc->clk_rtc);
  178. }
  179. rtc->clk_reg = devm_clk_get(&pdev->dev, "reg");
  180. if (IS_ERR(rtc->clk_reg)) {
  181. dev_err(&pdev->dev, "error getting reg clock\n");
  182. return PTR_ERR(rtc->clk_reg);
  183. }
  184. ret = clk_prepare_enable(rtc->clk_rtc);
  185. if (ret) {
  186. dev_err(&pdev->dev, "unable to enable rtc clock\n");
  187. return ret;
  188. }
  189. ret = clk_prepare_enable(rtc->clk_reg);
  190. if (ret) {
  191. dev_err(&pdev->dev, "unable to enable reg clock\n");
  192. goto disable_rtc_clk;
  193. }
  194. platform_set_drvdata(pdev, rtc);
  195. /* Clear any pending interrupts */
  196. rtc_writel(rtc, LPC24XX_ILR, LPC24XX_RTCCIF | LPC24XX_RTCALF);
  197. /* Enable RTC count */
  198. rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN | LPC178X_CCALEN);
  199. ret = devm_request_irq(&pdev->dev, irq, lpc24xx_rtc_interrupt, 0,
  200. pdev->name, rtc);
  201. if (ret < 0) {
  202. dev_warn(&pdev->dev, "can't request interrupt\n");
  203. goto disable_clks;
  204. }
  205. rtc->rtc = devm_rtc_device_register(&pdev->dev, "lpc24xx-rtc",
  206. &lpc24xx_rtc_ops, THIS_MODULE);
  207. if (IS_ERR(rtc->rtc)) {
  208. dev_err(&pdev->dev, "can't register rtc device\n");
  209. ret = PTR_ERR(rtc->rtc);
  210. goto disable_clks;
  211. }
  212. return 0;
  213. disable_clks:
  214. clk_disable_unprepare(rtc->clk_reg);
  215. disable_rtc_clk:
  216. clk_disable_unprepare(rtc->clk_rtc);
  217. return ret;
  218. }
  219. static void lpc24xx_rtc_remove(struct platform_device *pdev)
  220. {
  221. struct lpc24xx_rtc *rtc = platform_get_drvdata(pdev);
  222. /* Ensure all interrupt sources are masked */
  223. rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
  224. rtc_writel(rtc, LPC24XX_CIIR, 0);
  225. rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
  226. clk_disable_unprepare(rtc->clk_rtc);
  227. clk_disable_unprepare(rtc->clk_reg);
  228. }
  229. static const struct of_device_id lpc24xx_rtc_match[] = {
  230. { .compatible = "nxp,lpc1788-rtc" },
  231. { }
  232. };
  233. MODULE_DEVICE_TABLE(of, lpc24xx_rtc_match);
  234. static struct platform_driver lpc24xx_rtc_driver = {
  235. .probe = lpc24xx_rtc_probe,
  236. .remove = lpc24xx_rtc_remove,
  237. .driver = {
  238. .name = "lpc24xx-rtc",
  239. .of_match_table = lpc24xx_rtc_match,
  240. },
  241. };
  242. module_platform_driver(lpc24xx_rtc_driver);
  243. MODULE_AUTHOR("Kevin Wells <wellsk40@gmail.com>");
  244. MODULE_DESCRIPTION("RTC driver for the LPC178x/18xx/408x/43xx SoCs");
  245. MODULE_LICENSE("GPL");