rtc-hym8563.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Haoyu HYM8563 RTC driver
  4. *
  5. * Copyright (C) 2013 MundoReader S.L.
  6. * Author: Heiko Stuebner <heiko@sntech.de>
  7. *
  8. * based on rtc-HYM8563
  9. * Copyright (C) 2010 ROCKCHIP, Inc.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/clk-provider.h>
  13. #include <linux/i2c.h>
  14. #include <linux/bcd.h>
  15. #include <linux/rtc.h>
  16. #define HYM8563_CTL1 0x00
  17. #define HYM8563_CTL1_TEST BIT(7)
  18. #define HYM8563_CTL1_STOP BIT(5)
  19. #define HYM8563_CTL1_TESTC BIT(3)
  20. #define HYM8563_CTL2 0x01
  21. #define HYM8563_CTL2_TI_TP BIT(4)
  22. #define HYM8563_CTL2_AF BIT(3)
  23. #define HYM8563_CTL2_TF BIT(2)
  24. #define HYM8563_CTL2_AIE BIT(1)
  25. #define HYM8563_CTL2_TIE BIT(0)
  26. #define HYM8563_SEC 0x02
  27. #define HYM8563_SEC_VL BIT(7)
  28. #define HYM8563_SEC_MASK 0x7f
  29. #define HYM8563_MIN 0x03
  30. #define HYM8563_MIN_MASK 0x7f
  31. #define HYM8563_HOUR 0x04
  32. #define HYM8563_HOUR_MASK 0x3f
  33. #define HYM8563_DAY 0x05
  34. #define HYM8563_DAY_MASK 0x3f
  35. #define HYM8563_WEEKDAY 0x06
  36. #define HYM8563_WEEKDAY_MASK 0x07
  37. #define HYM8563_MONTH 0x07
  38. #define HYM8563_MONTH_CENTURY BIT(7)
  39. #define HYM8563_MONTH_MASK 0x1f
  40. #define HYM8563_YEAR 0x08
  41. #define HYM8563_ALM_MIN 0x09
  42. #define HYM8563_ALM_HOUR 0x0a
  43. #define HYM8563_ALM_DAY 0x0b
  44. #define HYM8563_ALM_WEEK 0x0c
  45. /* Each alarm check can be disabled by setting this bit in the register */
  46. #define HYM8563_ALM_BIT_DISABLE BIT(7)
  47. #define HYM8563_CLKOUT 0x0d
  48. #define HYM8563_CLKOUT_ENABLE BIT(7)
  49. #define HYM8563_CLKOUT_32768 0
  50. #define HYM8563_CLKOUT_1024 1
  51. #define HYM8563_CLKOUT_32 2
  52. #define HYM8563_CLKOUT_1 3
  53. #define HYM8563_CLKOUT_MASK 3
  54. #define HYM8563_TMR_CTL 0x0e
  55. #define HYM8563_TMR_CTL_ENABLE BIT(7)
  56. #define HYM8563_TMR_CTL_4096 0
  57. #define HYM8563_TMR_CTL_64 1
  58. #define HYM8563_TMR_CTL_1 2
  59. #define HYM8563_TMR_CTL_1_60 3
  60. #define HYM8563_TMR_CTL_MASK 3
  61. #define HYM8563_TMR_CNT 0x0f
  62. struct hym8563 {
  63. struct i2c_client *client;
  64. struct rtc_device *rtc;
  65. #ifdef CONFIG_COMMON_CLK
  66. struct clk_hw clkout_hw;
  67. #endif
  68. };
  69. /*
  70. * RTC handling
  71. */
  72. static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
  73. {
  74. struct i2c_client *client = to_i2c_client(dev);
  75. u8 buf[7];
  76. int ret;
  77. ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
  78. if (ret < 0)
  79. return ret;
  80. if (buf[0] & HYM8563_SEC_VL) {
  81. dev_warn(&client->dev,
  82. "no valid clock/calendar values available\n");
  83. return -EINVAL;
  84. }
  85. tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
  86. tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
  87. tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
  88. tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
  89. tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
  90. tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
  91. tm->tm_year = bcd2bin(buf[6]) + 100;
  92. return 0;
  93. }
  94. static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
  95. {
  96. struct i2c_client *client = to_i2c_client(dev);
  97. u8 buf[7];
  98. int ret;
  99. /* Years >= 2100 are to far in the future, 19XX is to early */
  100. if (tm->tm_year < 100 || tm->tm_year >= 200)
  101. return -EINVAL;
  102. buf[0] = bin2bcd(tm->tm_sec);
  103. buf[1] = bin2bcd(tm->tm_min);
  104. buf[2] = bin2bcd(tm->tm_hour);
  105. buf[3] = bin2bcd(tm->tm_mday);
  106. buf[4] = bin2bcd(tm->tm_wday);
  107. buf[5] = bin2bcd(tm->tm_mon + 1);
  108. /*
  109. * While the HYM8563 has a century flag in the month register,
  110. * it does not seem to carry it over a subsequent write/read.
  111. * So we'll limit ourself to 100 years, starting at 2000 for now.
  112. */
  113. buf[6] = bin2bcd(tm->tm_year - 100);
  114. /*
  115. * CTL1 only contains TEST-mode bits apart from stop,
  116. * so no need to read the value first
  117. */
  118. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
  119. HYM8563_CTL1_STOP);
  120. if (ret < 0)
  121. return ret;
  122. ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
  123. if (ret < 0)
  124. return ret;
  125. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
  126. if (ret < 0)
  127. return ret;
  128. return 0;
  129. }
  130. static int hym8563_rtc_alarm_irq_enable(struct device *dev,
  131. unsigned int enabled)
  132. {
  133. struct i2c_client *client = to_i2c_client(dev);
  134. int data;
  135. data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  136. if (data < 0)
  137. return data;
  138. if (enabled)
  139. data |= HYM8563_CTL2_AIE;
  140. else
  141. data &= ~HYM8563_CTL2_AIE;
  142. return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
  143. };
  144. static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  145. {
  146. struct i2c_client *client = to_i2c_client(dev);
  147. struct rtc_time *alm_tm = &alm->time;
  148. u8 buf[4];
  149. int ret;
  150. ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
  151. if (ret < 0)
  152. return ret;
  153. /* The alarm only has a minute accuracy */
  154. alm_tm->tm_sec = 0;
  155. alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
  156. -1 :
  157. bcd2bin(buf[0] & HYM8563_MIN_MASK);
  158. alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
  159. -1 :
  160. bcd2bin(buf[1] & HYM8563_HOUR_MASK);
  161. alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
  162. -1 :
  163. bcd2bin(buf[2] & HYM8563_DAY_MASK);
  164. alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
  165. -1 :
  166. bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
  167. ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  168. if (ret < 0)
  169. return ret;
  170. if (ret & HYM8563_CTL2_AIE)
  171. alm->enabled = 1;
  172. return 0;
  173. }
  174. static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  175. {
  176. struct i2c_client *client = to_i2c_client(dev);
  177. struct rtc_time *alm_tm = &alm->time;
  178. u8 buf[4];
  179. int ret;
  180. ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  181. if (ret < 0)
  182. return ret;
  183. ret &= ~HYM8563_CTL2_AIE;
  184. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
  185. if (ret < 0)
  186. return ret;
  187. buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
  188. bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
  189. buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
  190. bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
  191. buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
  192. bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
  193. buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
  194. bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
  195. ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
  196. if (ret < 0)
  197. return ret;
  198. return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
  199. }
  200. static const struct rtc_class_ops hym8563_rtc_ops = {
  201. .read_time = hym8563_rtc_read_time,
  202. .set_time = hym8563_rtc_set_time,
  203. .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
  204. .read_alarm = hym8563_rtc_read_alarm,
  205. .set_alarm = hym8563_rtc_set_alarm,
  206. };
  207. /*
  208. * Handling of the clkout
  209. */
  210. #ifdef CONFIG_COMMON_CLK
  211. #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
  212. static int clkout_rates[] = {
  213. 32768,
  214. 1024,
  215. 32,
  216. 1,
  217. };
  218. static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
  219. unsigned long parent_rate)
  220. {
  221. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  222. struct i2c_client *client = hym8563->client;
  223. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  224. if (ret < 0)
  225. return 0;
  226. ret &= HYM8563_CLKOUT_MASK;
  227. return clkout_rates[ret];
  228. }
  229. static int hym8563_clkout_determine_rate(struct clk_hw *hw,
  230. struct clk_rate_request *req)
  231. {
  232. int i;
  233. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  234. if (clkout_rates[i] <= req->rate) {
  235. req->rate = clkout_rates[i];
  236. return 0;
  237. }
  238. req->rate = clkout_rates[0];
  239. return 0;
  240. }
  241. static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
  242. unsigned long parent_rate)
  243. {
  244. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  245. struct i2c_client *client = hym8563->client;
  246. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  247. int i;
  248. if (ret < 0)
  249. return ret;
  250. for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
  251. if (clkout_rates[i] == rate) {
  252. ret &= ~HYM8563_CLKOUT_MASK;
  253. ret |= i;
  254. return i2c_smbus_write_byte_data(client,
  255. HYM8563_CLKOUT, ret);
  256. }
  257. return -EINVAL;
  258. }
  259. static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
  260. {
  261. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  262. struct i2c_client *client = hym8563->client;
  263. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  264. if (ret < 0)
  265. return ret;
  266. if (enable)
  267. ret |= HYM8563_CLKOUT_ENABLE;
  268. else
  269. ret &= ~HYM8563_CLKOUT_ENABLE;
  270. return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
  271. }
  272. static int hym8563_clkout_prepare(struct clk_hw *hw)
  273. {
  274. return hym8563_clkout_control(hw, 1);
  275. }
  276. static void hym8563_clkout_unprepare(struct clk_hw *hw)
  277. {
  278. hym8563_clkout_control(hw, 0);
  279. }
  280. static int hym8563_clkout_is_prepared(struct clk_hw *hw)
  281. {
  282. struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
  283. struct i2c_client *client = hym8563->client;
  284. int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
  285. if (ret < 0)
  286. return ret;
  287. return !!(ret & HYM8563_CLKOUT_ENABLE);
  288. }
  289. static const struct clk_ops hym8563_clkout_ops = {
  290. .prepare = hym8563_clkout_prepare,
  291. .unprepare = hym8563_clkout_unprepare,
  292. .is_prepared = hym8563_clkout_is_prepared,
  293. .recalc_rate = hym8563_clkout_recalc_rate,
  294. .determine_rate = hym8563_clkout_determine_rate,
  295. .set_rate = hym8563_clkout_set_rate,
  296. };
  297. static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
  298. {
  299. struct i2c_client *client = hym8563->client;
  300. struct device_node *node = client->dev.of_node;
  301. struct clk *clk;
  302. struct clk_init_data init;
  303. int ret;
  304. ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
  305. 0);
  306. if (ret < 0)
  307. return ERR_PTR(ret);
  308. init.name = "hym8563-clkout";
  309. init.ops = &hym8563_clkout_ops;
  310. init.flags = 0;
  311. init.parent_names = NULL;
  312. init.num_parents = 0;
  313. hym8563->clkout_hw.init = &init;
  314. /* optional override of the clockname */
  315. of_property_read_string(node, "clock-output-names", &init.name);
  316. /* register the clock */
  317. clk = clk_register(&client->dev, &hym8563->clkout_hw);
  318. if (!IS_ERR(clk))
  319. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  320. return clk;
  321. }
  322. #endif
  323. /*
  324. * The alarm interrupt is implemented as a level-low interrupt in the
  325. * hym8563, while the timer interrupt uses a falling edge.
  326. * We don't use the timer at all, so the interrupt is requested to
  327. * use the level-low trigger.
  328. */
  329. static irqreturn_t hym8563_irq(int irq, void *dev_id)
  330. {
  331. struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
  332. struct i2c_client *client = hym8563->client;
  333. int data, ret;
  334. rtc_lock(hym8563->rtc);
  335. /* Clear the alarm flag */
  336. data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  337. if (data < 0) {
  338. dev_err(&client->dev, "%s: error reading i2c data %d\n",
  339. __func__, data);
  340. goto out;
  341. }
  342. data &= ~HYM8563_CTL2_AF;
  343. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
  344. if (ret < 0) {
  345. dev_err(&client->dev, "%s: error writing i2c data %d\n",
  346. __func__, ret);
  347. }
  348. out:
  349. rtc_unlock(hym8563->rtc);
  350. return IRQ_HANDLED;
  351. }
  352. static int hym8563_init_device(struct i2c_client *client)
  353. {
  354. int ret;
  355. /* Clear stop flag if present */
  356. ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
  357. if (ret < 0)
  358. return ret;
  359. ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
  360. if (ret < 0)
  361. return ret;
  362. /* Disable alarm and timer interrupts */
  363. ret &= ~HYM8563_CTL2_AIE;
  364. ret &= ~HYM8563_CTL2_TIE;
  365. /* Clear any pending alarm and timer flags */
  366. if (ret & HYM8563_CTL2_AF)
  367. ret &= ~HYM8563_CTL2_AF;
  368. if (ret & HYM8563_CTL2_TF)
  369. ret &= ~HYM8563_CTL2_TF;
  370. ret &= ~HYM8563_CTL2_TI_TP;
  371. return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
  372. }
  373. #ifdef CONFIG_PM_SLEEP
  374. static int hym8563_suspend(struct device *dev)
  375. {
  376. struct i2c_client *client = to_i2c_client(dev);
  377. int ret;
  378. if (device_may_wakeup(dev)) {
  379. ret = enable_irq_wake(client->irq);
  380. if (ret) {
  381. dev_err(dev, "enable_irq_wake failed, %d\n", ret);
  382. return ret;
  383. }
  384. }
  385. return 0;
  386. }
  387. static int hym8563_resume(struct device *dev)
  388. {
  389. struct i2c_client *client = to_i2c_client(dev);
  390. if (device_may_wakeup(dev))
  391. disable_irq_wake(client->irq);
  392. return 0;
  393. }
  394. #endif
  395. static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
  396. static int hym8563_probe(struct i2c_client *client)
  397. {
  398. struct hym8563 *hym8563;
  399. int ret;
  400. hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
  401. if (!hym8563)
  402. return -ENOMEM;
  403. hym8563->rtc = devm_rtc_allocate_device(&client->dev);
  404. if (IS_ERR(hym8563->rtc))
  405. return PTR_ERR(hym8563->rtc);
  406. hym8563->client = client;
  407. i2c_set_clientdata(client, hym8563);
  408. ret = hym8563_init_device(client);
  409. if (ret) {
  410. dev_err(&client->dev, "could not init device, %d\n", ret);
  411. return ret;
  412. }
  413. if (client->irq > 0) {
  414. unsigned long irqflags = IRQF_TRIGGER_LOW;
  415. if (dev_fwnode(&client->dev))
  416. irqflags = 0;
  417. ret = devm_request_threaded_irq(&client->dev, client->irq,
  418. NULL, hym8563_irq,
  419. irqflags | IRQF_ONESHOT,
  420. client->name, hym8563);
  421. if (ret < 0) {
  422. dev_err(&client->dev, "irq %d request failed, %d\n",
  423. client->irq, ret);
  424. return ret;
  425. }
  426. }
  427. if (client->irq > 0 ||
  428. device_property_read_bool(&client->dev, "wakeup-source")) {
  429. device_init_wakeup(&client->dev, true);
  430. }
  431. /* check state of calendar information */
  432. ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
  433. if (ret < 0)
  434. return ret;
  435. dev_dbg(&client->dev, "rtc information is %s\n",
  436. (ret & HYM8563_SEC_VL) ? "invalid" : "valid");
  437. hym8563->rtc->ops = &hym8563_rtc_ops;
  438. set_bit(RTC_FEATURE_ALARM_RES_MINUTE, hym8563->rtc->features);
  439. clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, hym8563->rtc->features);
  440. #ifdef CONFIG_COMMON_CLK
  441. hym8563_clkout_register_clk(hym8563);
  442. #endif
  443. return devm_rtc_register_device(hym8563->rtc);
  444. }
  445. static const struct i2c_device_id hym8563_id[] = {
  446. { "hym8563" },
  447. {}
  448. };
  449. MODULE_DEVICE_TABLE(i2c, hym8563_id);
  450. static const struct of_device_id hym8563_dt_idtable[] = {
  451. { .compatible = "haoyu,hym8563" },
  452. {},
  453. };
  454. MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
  455. static struct i2c_driver hym8563_driver = {
  456. .driver = {
  457. .name = "rtc-hym8563",
  458. .pm = &hym8563_pm_ops,
  459. .of_match_table = hym8563_dt_idtable,
  460. },
  461. .probe = hym8563_probe,
  462. .id_table = hym8563_id,
  463. };
  464. module_i2c_driver(hym8563_driver);
  465. MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
  466. MODULE_DESCRIPTION("HYM8563 RTC driver");
  467. MODULE_LICENSE("GPL");