omap_remoteproc.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * OMAP Remote Processor driver
  4. *
  5. * Copyright (C) 2011-2020 Texas Instruments Incorporated - http://www.ti.com/
  6. * Copyright (C) 2011 Google, Inc.
  7. *
  8. * Ohad Ben-Cohen <ohad@wizery.com>
  9. * Brian Swetland <swetland@google.com>
  10. * Fernando Guzman Lugo <fernando.lugo@ti.com>
  11. * Mark Grosen <mgrosen@ti.com>
  12. * Suman Anna <s-anna@ti.com>
  13. * Hari Kanigeri <h-kanigeri2@ti.com>
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/clk.h>
  18. #include <linux/clk/ti.h>
  19. #include <linux/err.h>
  20. #include <linux/io.h>
  21. #include <linux/of.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/of_reserved_mem.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/remoteproc.h>
  29. #include <linux/mailbox_client.h>
  30. #include <linux/omap-iommu.h>
  31. #include <linux/omap-mailbox.h>
  32. #include <linux/regmap.h>
  33. #include <linux/mfd/syscon.h>
  34. #include <linux/reset.h>
  35. #include <clocksource/timer-ti-dm.h>
  36. #include <linux/platform_data/dmtimer-omap.h>
  37. #ifdef CONFIG_ARM_DMA_USE_IOMMU
  38. #include <asm/dma-iommu.h>
  39. #endif
  40. #include "omap_remoteproc.h"
  41. #include "remoteproc_internal.h"
  42. /* default auto-suspend delay (ms) */
  43. #define DEFAULT_AUTOSUSPEND_DELAY 10000
  44. /**
  45. * struct omap_rproc_boot_data - boot data structure for the DSP omap rprocs
  46. * @syscon: regmap handle for the system control configuration module
  47. * @boot_reg: boot register offset within the @syscon regmap
  48. * @boot_reg_shift: bit-field shift required for the boot address value in
  49. * @boot_reg
  50. */
  51. struct omap_rproc_boot_data {
  52. struct regmap *syscon;
  53. unsigned int boot_reg;
  54. unsigned int boot_reg_shift;
  55. };
  56. /**
  57. * struct omap_rproc_mem - internal memory structure
  58. * @cpu_addr: MPU virtual address of the memory region
  59. * @bus_addr: bus address used to access the memory region
  60. * @dev_addr: device address of the memory region from DSP view
  61. * @size: size of the memory region
  62. */
  63. struct omap_rproc_mem {
  64. void __iomem *cpu_addr;
  65. phys_addr_t bus_addr;
  66. u32 dev_addr;
  67. size_t size;
  68. };
  69. /**
  70. * struct omap_rproc_timer - data structure for a timer used by a omap rproc
  71. * @odt: timer pointer
  72. * @timer_ops: OMAP dmtimer ops for @odt timer
  73. * @irq: timer irq
  74. */
  75. struct omap_rproc_timer {
  76. struct omap_dm_timer *odt;
  77. const struct omap_dm_timer_ops *timer_ops;
  78. int irq;
  79. };
  80. /**
  81. * struct omap_rproc - omap remote processor state
  82. * @mbox: mailbox channel handle
  83. * @client: mailbox client to request the mailbox channel
  84. * @boot_data: boot data structure for setting processor boot address
  85. * @mem: internal memory regions data
  86. * @num_mems: number of internal memory regions
  87. * @num_timers: number of rproc timer(s)
  88. * @num_wd_timers: number of rproc watchdog timers
  89. * @timers: timer(s) info used by rproc
  90. * @autosuspend_delay: auto-suspend delay value to be used for runtime pm
  91. * @need_resume: if true a resume is needed in the system resume callback
  92. * @rproc: rproc handle
  93. * @reset: reset handle
  94. * @pm_comp: completion primitive to sync for suspend response
  95. * @fck: functional clock for the remoteproc
  96. * @suspend_acked: state machine flag to store the suspend request ack
  97. */
  98. struct omap_rproc {
  99. struct mbox_chan *mbox;
  100. struct mbox_client client;
  101. struct omap_rproc_boot_data *boot_data;
  102. struct omap_rproc_mem *mem;
  103. int num_mems;
  104. int num_timers;
  105. int num_wd_timers;
  106. struct omap_rproc_timer *timers;
  107. int autosuspend_delay;
  108. bool need_resume;
  109. struct rproc *rproc;
  110. struct reset_control *reset;
  111. struct completion pm_comp;
  112. struct clk *fck;
  113. bool suspend_acked;
  114. };
  115. /**
  116. * struct omap_rproc_mem_data - memory definitions for an omap remote processor
  117. * @name: name for this memory entry
  118. * @dev_addr: device address for the memory entry
  119. */
  120. struct omap_rproc_mem_data {
  121. const char *name;
  122. const u32 dev_addr;
  123. };
  124. /**
  125. * struct omap_rproc_dev_data - device data for the omap remote processor
  126. * @device_name: device name of the remote processor
  127. * @mems: memory definitions for this remote processor
  128. */
  129. struct omap_rproc_dev_data {
  130. const char *device_name;
  131. const struct omap_rproc_mem_data *mems;
  132. };
  133. /**
  134. * omap_rproc_request_timer() - request a timer for a remoteproc
  135. * @dev: device requesting the timer
  136. * @np: device node pointer to the desired timer
  137. * @timer: handle to a struct omap_rproc_timer to return the timer handle
  138. *
  139. * This helper function is used primarily to request a timer associated with
  140. * a remoteproc. The returned handle is stored in the .odt field of the
  141. * @timer structure passed in, and is used to invoke other timer specific
  142. * ops (like starting a timer either during device initialization or during
  143. * a resume operation, or for stopping/freeing a timer).
  144. *
  145. * Return: 0 on success, otherwise an appropriate failure
  146. */
  147. static int omap_rproc_request_timer(struct device *dev, struct device_node *np,
  148. struct omap_rproc_timer *timer)
  149. {
  150. int ret;
  151. timer->odt = timer->timer_ops->request_by_node(np);
  152. if (!timer->odt) {
  153. dev_err(dev, "request for timer node %p failed\n", np);
  154. return -EBUSY;
  155. }
  156. ret = timer->timer_ops->set_source(timer->odt, OMAP_TIMER_SRC_SYS_CLK);
  157. if (ret) {
  158. dev_err(dev, "error setting OMAP_TIMER_SRC_SYS_CLK as source for timer node %p\n",
  159. np);
  160. timer->timer_ops->free(timer->odt);
  161. return ret;
  162. }
  163. /* clean counter, remoteproc code will set the value */
  164. timer->timer_ops->set_load(timer->odt, 0);
  165. return 0;
  166. }
  167. /**
  168. * omap_rproc_start_timer() - start a timer for a remoteproc
  169. * @timer: handle to a OMAP rproc timer
  170. *
  171. * This helper function is used to start a timer associated with a remoteproc,
  172. * obtained using the request_timer ops. The helper function needs to be
  173. * invoked by the driver to start the timer (during device initialization)
  174. * or to just resume the timer.
  175. *
  176. * Return: 0 on success, otherwise a failure as returned by DMTimer ops
  177. */
  178. static inline int omap_rproc_start_timer(struct omap_rproc_timer *timer)
  179. {
  180. return timer->timer_ops->start(timer->odt);
  181. }
  182. /**
  183. * omap_rproc_stop_timer() - stop a timer for a remoteproc
  184. * @timer: handle to a OMAP rproc timer
  185. *
  186. * This helper function is used to disable a timer associated with a
  187. * remoteproc, and needs to be called either during a device shutdown
  188. * or suspend operation. The separate helper function allows the driver
  189. * to just stop a timer without having to release the timer during a
  190. * suspend operation.
  191. *
  192. * Return: 0 on success, otherwise a failure as returned by DMTimer ops
  193. */
  194. static inline int omap_rproc_stop_timer(struct omap_rproc_timer *timer)
  195. {
  196. return timer->timer_ops->stop(timer->odt);
  197. }
  198. /**
  199. * omap_rproc_release_timer() - release a timer for a remoteproc
  200. * @timer: handle to a OMAP rproc timer
  201. *
  202. * This helper function is used primarily to release a timer associated
  203. * with a remoteproc. The dmtimer will be available for other clients to
  204. * use once released.
  205. *
  206. * Return: 0 on success, otherwise a failure as returned by DMTimer ops
  207. */
  208. static inline int omap_rproc_release_timer(struct omap_rproc_timer *timer)
  209. {
  210. return timer->timer_ops->free(timer->odt);
  211. }
  212. /**
  213. * omap_rproc_get_timer_irq() - get the irq for a timer
  214. * @timer: handle to a OMAP rproc timer
  215. *
  216. * This function is used to get the irq associated with a watchdog timer. The
  217. * function is called by the OMAP remoteproc driver to register a interrupt
  218. * handler to handle watchdog events on the remote processor.
  219. *
  220. * Return: irq id on success, otherwise a failure as returned by DMTimer ops
  221. */
  222. static inline int omap_rproc_get_timer_irq(struct omap_rproc_timer *timer)
  223. {
  224. return timer->timer_ops->get_irq(timer->odt);
  225. }
  226. /**
  227. * omap_rproc_ack_timer_irq() - acknowledge a timer irq
  228. * @timer: handle to a OMAP rproc timer
  229. *
  230. * This function is used to clear the irq associated with a watchdog timer.
  231. * The function is called by the OMAP remoteproc upon a watchdog event on the
  232. * remote processor to clear the interrupt status of the watchdog timer.
  233. */
  234. static inline void omap_rproc_ack_timer_irq(struct omap_rproc_timer *timer)
  235. {
  236. timer->timer_ops->write_status(timer->odt, OMAP_TIMER_INT_OVERFLOW);
  237. }
  238. /**
  239. * omap_rproc_watchdog_isr() - Watchdog ISR handler for remoteproc device
  240. * @irq: IRQ number associated with a watchdog timer
  241. * @data: IRQ handler data
  242. *
  243. * This ISR routine executes the required necessary low-level code to
  244. * acknowledge a watchdog timer interrupt. There can be multiple watchdog
  245. * timers associated with a rproc (like IPUs which have 2 watchdog timers,
  246. * one per Cortex M3/M4 core), so a lookup has to be performed to identify
  247. * the timer to acknowledge its interrupt.
  248. *
  249. * The function also invokes rproc_report_crash to report the watchdog event
  250. * to the remoteproc driver core, to trigger a recovery.
  251. *
  252. * Return: IRQ_HANDLED on success, otherwise IRQ_NONE
  253. */
  254. static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data)
  255. {
  256. struct rproc *rproc = data;
  257. struct omap_rproc *oproc = rproc->priv;
  258. struct device *dev = rproc->dev.parent;
  259. struct omap_rproc_timer *timers = oproc->timers;
  260. struct omap_rproc_timer *wd_timer = NULL;
  261. int num_timers = oproc->num_timers + oproc->num_wd_timers;
  262. int i;
  263. for (i = oproc->num_timers; i < num_timers; i++) {
  264. if (timers[i].irq > 0 && irq == timers[i].irq) {
  265. wd_timer = &timers[i];
  266. break;
  267. }
  268. }
  269. if (!wd_timer) {
  270. dev_err(dev, "invalid timer\n");
  271. return IRQ_NONE;
  272. }
  273. omap_rproc_ack_timer_irq(wd_timer);
  274. rproc_report_crash(rproc, RPROC_WATCHDOG);
  275. return IRQ_HANDLED;
  276. }
  277. /**
  278. * omap_rproc_enable_timers() - enable the timers for a remoteproc
  279. * @rproc: handle of a remote processor
  280. * @configure: boolean flag used to acquire and configure the timer handle
  281. *
  282. * This function is used primarily to enable the timers associated with
  283. * a remoteproc. The configure flag is provided to allow the driver
  284. * to either acquire and start a timer (during device initialization) or
  285. * to just start a timer (during a resume operation).
  286. *
  287. * Return: 0 on success, otherwise an appropriate failure
  288. */
  289. static int omap_rproc_enable_timers(struct rproc *rproc, bool configure)
  290. {
  291. int i;
  292. int ret = 0;
  293. struct platform_device *tpdev;
  294. struct dmtimer_platform_data *tpdata;
  295. const struct omap_dm_timer_ops *timer_ops;
  296. struct omap_rproc *oproc = rproc->priv;
  297. struct omap_rproc_timer *timers = oproc->timers;
  298. struct device *dev = rproc->dev.parent;
  299. struct device_node *np = NULL;
  300. int num_timers = oproc->num_timers + oproc->num_wd_timers;
  301. if (!num_timers)
  302. return 0;
  303. if (!configure)
  304. goto start_timers;
  305. for (i = 0; i < num_timers; i++) {
  306. if (i < oproc->num_timers)
  307. np = of_parse_phandle(dev->of_node, "ti,timers", i);
  308. else
  309. np = of_parse_phandle(dev->of_node,
  310. "ti,watchdog-timers",
  311. (i - oproc->num_timers));
  312. if (!np) {
  313. ret = -ENXIO;
  314. dev_err(dev, "device node lookup for timer at index %d failed: %d\n",
  315. i < oproc->num_timers ? i :
  316. i - oproc->num_timers, ret);
  317. goto free_timers;
  318. }
  319. tpdev = of_find_device_by_node(np);
  320. if (!tpdev) {
  321. ret = -ENODEV;
  322. dev_err(dev, "could not get timer platform device\n");
  323. goto put_node;
  324. }
  325. tpdata = dev_get_platdata(&tpdev->dev);
  326. put_device(&tpdev->dev);
  327. if (!tpdata) {
  328. ret = -EINVAL;
  329. dev_err(dev, "dmtimer pdata structure NULL\n");
  330. goto put_node;
  331. }
  332. timer_ops = tpdata->timer_ops;
  333. if (!timer_ops || !timer_ops->request_by_node ||
  334. !timer_ops->set_source || !timer_ops->set_load ||
  335. !timer_ops->free || !timer_ops->start ||
  336. !timer_ops->stop || !timer_ops->get_irq ||
  337. !timer_ops->write_status) {
  338. ret = -EINVAL;
  339. dev_err(dev, "device does not have required timer ops\n");
  340. goto put_node;
  341. }
  342. timers[i].irq = -1;
  343. timers[i].timer_ops = timer_ops;
  344. ret = omap_rproc_request_timer(dev, np, &timers[i]);
  345. if (ret) {
  346. dev_err(dev, "request for timer %p failed: %d\n", np,
  347. ret);
  348. goto put_node;
  349. }
  350. of_node_put(np);
  351. if (i >= oproc->num_timers) {
  352. timers[i].irq = omap_rproc_get_timer_irq(&timers[i]);
  353. if (timers[i].irq < 0) {
  354. dev_err(dev, "get_irq for timer %p failed: %d\n",
  355. np, timers[i].irq);
  356. ret = -EBUSY;
  357. goto free_timers;
  358. }
  359. ret = request_irq(timers[i].irq,
  360. omap_rproc_watchdog_isr, IRQF_SHARED,
  361. "rproc-wdt", rproc);
  362. if (ret) {
  363. dev_err(dev, "error requesting irq for timer %p\n",
  364. np);
  365. omap_rproc_release_timer(&timers[i]);
  366. timers[i].odt = NULL;
  367. timers[i].timer_ops = NULL;
  368. timers[i].irq = -1;
  369. goto free_timers;
  370. }
  371. }
  372. }
  373. start_timers:
  374. for (i = 0; i < num_timers; i++) {
  375. ret = omap_rproc_start_timer(&timers[i]);
  376. if (ret) {
  377. dev_err(dev, "start timer %p failed failed: %d\n", np,
  378. ret);
  379. break;
  380. }
  381. }
  382. if (ret) {
  383. while (i >= 0) {
  384. omap_rproc_stop_timer(&timers[i]);
  385. i--;
  386. }
  387. goto put_node;
  388. }
  389. return 0;
  390. put_node:
  391. if (configure)
  392. of_node_put(np);
  393. free_timers:
  394. while (i--) {
  395. if (i >= oproc->num_timers)
  396. free_irq(timers[i].irq, rproc);
  397. omap_rproc_release_timer(&timers[i]);
  398. timers[i].odt = NULL;
  399. timers[i].timer_ops = NULL;
  400. timers[i].irq = -1;
  401. }
  402. return ret;
  403. }
  404. /**
  405. * omap_rproc_disable_timers() - disable the timers for a remoteproc
  406. * @rproc: handle of a remote processor
  407. * @configure: boolean flag used to release the timer handle
  408. *
  409. * This function is used primarily to disable the timers associated with
  410. * a remoteproc. The configure flag is provided to allow the driver
  411. * to either stop and release a timer (during device shutdown) or to just
  412. * stop a timer (during a suspend operation).
  413. *
  414. * Return: 0 on success or no timers
  415. */
  416. static int omap_rproc_disable_timers(struct rproc *rproc, bool configure)
  417. {
  418. int i;
  419. struct omap_rproc *oproc = rproc->priv;
  420. struct omap_rproc_timer *timers = oproc->timers;
  421. int num_timers = oproc->num_timers + oproc->num_wd_timers;
  422. if (!num_timers)
  423. return 0;
  424. for (i = 0; i < num_timers; i++) {
  425. omap_rproc_stop_timer(&timers[i]);
  426. if (configure) {
  427. if (i >= oproc->num_timers)
  428. free_irq(timers[i].irq, rproc);
  429. omap_rproc_release_timer(&timers[i]);
  430. timers[i].odt = NULL;
  431. timers[i].timer_ops = NULL;
  432. timers[i].irq = -1;
  433. }
  434. }
  435. return 0;
  436. }
  437. /**
  438. * omap_rproc_mbox_callback() - inbound mailbox message handler
  439. * @client: mailbox client pointer used for requesting the mailbox channel
  440. * @data: mailbox payload
  441. *
  442. * This handler is invoked by omap's mailbox driver whenever a mailbox
  443. * message is received. Usually, the mailbox payload simply contains
  444. * the index of the virtqueue that is kicked by the remote processor,
  445. * and we let remoteproc core handle it.
  446. *
  447. * In addition to virtqueue indices, we also have some out-of-band values
  448. * that indicates different events. Those values are deliberately very
  449. * big so they don't coincide with virtqueue indices.
  450. */
  451. static void omap_rproc_mbox_callback(struct mbox_client *client, void *data)
  452. {
  453. struct omap_rproc *oproc = container_of(client, struct omap_rproc,
  454. client);
  455. struct device *dev = oproc->rproc->dev.parent;
  456. const char *name = oproc->rproc->name;
  457. u32 msg = (u32)data;
  458. dev_dbg(dev, "mbox msg: 0x%x\n", msg);
  459. switch (msg) {
  460. case RP_MBOX_CRASH:
  461. /*
  462. * remoteproc detected an exception, notify the rproc core.
  463. * The remoteproc core will handle the recovery.
  464. */
  465. dev_err(dev, "omap rproc %s crashed\n", name);
  466. rproc_report_crash(oproc->rproc, RPROC_FATAL_ERROR);
  467. break;
  468. case RP_MBOX_ECHO_REPLY:
  469. dev_info(dev, "received echo reply from %s\n", name);
  470. break;
  471. case RP_MBOX_SUSPEND_ACK:
  472. case RP_MBOX_SUSPEND_CANCEL:
  473. oproc->suspend_acked = msg == RP_MBOX_SUSPEND_ACK;
  474. complete(&oproc->pm_comp);
  475. break;
  476. default:
  477. if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG)
  478. return;
  479. if (msg > oproc->rproc->max_notifyid) {
  480. dev_dbg(dev, "dropping unknown message 0x%x", msg);
  481. return;
  482. }
  483. /* msg contains the index of the triggered vring */
  484. if (rproc_vq_interrupt(oproc->rproc, msg) == IRQ_NONE)
  485. dev_dbg(dev, "no message was found in vqid %d\n", msg);
  486. }
  487. }
  488. /* kick a virtqueue */
  489. static void omap_rproc_kick(struct rproc *rproc, int vqid)
  490. {
  491. struct omap_rproc *oproc = rproc->priv;
  492. struct device *dev = rproc->dev.parent;
  493. int ret;
  494. /* wake up the rproc before kicking it */
  495. ret = pm_runtime_get_sync(dev);
  496. if (WARN_ON(ret < 0)) {
  497. dev_err(dev, "pm_runtime_get_sync() failed during kick, ret = %d\n",
  498. ret);
  499. pm_runtime_put_noidle(dev);
  500. return;
  501. }
  502. /* send the index of the triggered virtqueue in the mailbox payload */
  503. ret = mbox_send_message(oproc->mbox, (void *)vqid);
  504. if (ret < 0)
  505. dev_err(dev, "failed to send mailbox message, status = %d\n",
  506. ret);
  507. pm_runtime_put_autosuspend(dev);
  508. }
  509. /**
  510. * omap_rproc_write_dsp_boot_addr() - set boot address for DSP remote processor
  511. * @rproc: handle of a remote processor
  512. *
  513. * Set boot address for a supported DSP remote processor.
  514. *
  515. * Return: 0 on success, or -EINVAL if boot address is not aligned properly
  516. */
  517. static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc)
  518. {
  519. struct device *dev = rproc->dev.parent;
  520. struct omap_rproc *oproc = rproc->priv;
  521. struct omap_rproc_boot_data *bdata = oproc->boot_data;
  522. u32 offset = bdata->boot_reg;
  523. u32 value;
  524. u32 mask;
  525. if (rproc->bootaddr & (SZ_1K - 1)) {
  526. dev_err(dev, "invalid boot address 0x%llx, must be aligned on a 1KB boundary\n",
  527. rproc->bootaddr);
  528. return -EINVAL;
  529. }
  530. value = rproc->bootaddr >> bdata->boot_reg_shift;
  531. mask = ~(SZ_1K - 1) >> bdata->boot_reg_shift;
  532. return regmap_update_bits(bdata->syscon, offset, mask, value);
  533. }
  534. /*
  535. * Power up the remote processor.
  536. *
  537. * This function will be invoked only after the firmware for this rproc
  538. * was loaded, parsed successfully, and all of its resource requirements
  539. * were met.
  540. */
  541. static int omap_rproc_start(struct rproc *rproc)
  542. {
  543. struct omap_rproc *oproc = rproc->priv;
  544. struct device *dev = rproc->dev.parent;
  545. int ret;
  546. struct mbox_client *client = &oproc->client;
  547. if (oproc->boot_data) {
  548. ret = omap_rproc_write_dsp_boot_addr(rproc);
  549. if (ret)
  550. return ret;
  551. }
  552. client->dev = dev;
  553. client->tx_done = NULL;
  554. client->rx_callback = omap_rproc_mbox_callback;
  555. client->tx_block = false;
  556. client->knows_txdone = false;
  557. oproc->mbox = mbox_request_channel(client, 0);
  558. if (IS_ERR(oproc->mbox)) {
  559. ret = -EBUSY;
  560. dev_err(dev, "mbox_request_channel failed: %ld\n",
  561. PTR_ERR(oproc->mbox));
  562. return ret;
  563. }
  564. /*
  565. * Ping the remote processor. this is only for sanity-sake;
  566. * there is no functional effect whatsoever.
  567. *
  568. * Note that the reply will _not_ arrive immediately: this message
  569. * will wait in the mailbox fifo until the remote processor is booted.
  570. */
  571. ret = mbox_send_message(oproc->mbox, (void *)RP_MBOX_ECHO_REQUEST);
  572. if (ret < 0) {
  573. dev_err(dev, "mbox_send_message failed: %d\n", ret);
  574. goto put_mbox;
  575. }
  576. ret = omap_rproc_enable_timers(rproc, true);
  577. if (ret) {
  578. dev_err(dev, "omap_rproc_enable_timers failed: %d\n", ret);
  579. goto put_mbox;
  580. }
  581. ret = reset_control_deassert(oproc->reset);
  582. if (ret) {
  583. dev_err(dev, "reset control deassert failed: %d\n", ret);
  584. goto disable_timers;
  585. }
  586. /*
  587. * remote processor is up, so update the runtime pm status and
  588. * enable the auto-suspend. The device usage count is incremented
  589. * manually for balancing it for auto-suspend
  590. */
  591. pm_runtime_set_active(dev);
  592. pm_runtime_use_autosuspend(dev);
  593. pm_runtime_get_noresume(dev);
  594. pm_runtime_enable(dev);
  595. pm_runtime_put_autosuspend(dev);
  596. return 0;
  597. disable_timers:
  598. omap_rproc_disable_timers(rproc, true);
  599. put_mbox:
  600. mbox_free_channel(oproc->mbox);
  601. return ret;
  602. }
  603. /* power off the remote processor */
  604. static int omap_rproc_stop(struct rproc *rproc)
  605. {
  606. struct device *dev = rproc->dev.parent;
  607. struct omap_rproc *oproc = rproc->priv;
  608. int ret;
  609. /*
  610. * cancel any possible scheduled runtime suspend by incrementing
  611. * the device usage count, and resuming the device. The remoteproc
  612. * also needs to be woken up if suspended, to avoid the remoteproc
  613. * OS to continue to remember any context that it has saved, and
  614. * avoid potential issues in misindentifying a subsequent device
  615. * reboot as a power restore boot
  616. */
  617. ret = pm_runtime_get_sync(dev);
  618. if (ret < 0) {
  619. pm_runtime_put_noidle(dev);
  620. return ret;
  621. }
  622. ret = reset_control_assert(oproc->reset);
  623. if (ret)
  624. goto out;
  625. ret = omap_rproc_disable_timers(rproc, true);
  626. if (ret)
  627. goto enable_device;
  628. mbox_free_channel(oproc->mbox);
  629. /*
  630. * update the runtime pm states and status now that the remoteproc
  631. * has stopped
  632. */
  633. pm_runtime_disable(dev);
  634. pm_runtime_dont_use_autosuspend(dev);
  635. pm_runtime_put_noidle(dev);
  636. pm_runtime_set_suspended(dev);
  637. return 0;
  638. enable_device:
  639. reset_control_deassert(oproc->reset);
  640. out:
  641. /* schedule the next auto-suspend */
  642. pm_runtime_put_autosuspend(dev);
  643. return ret;
  644. }
  645. /**
  646. * omap_rproc_da_to_va() - internal memory translation helper
  647. * @rproc: remote processor to apply the address translation for
  648. * @da: device address to translate
  649. * @len: length of the memory buffer
  650. * @is_iomem: pointer filled in to indicate if @da is iomapped memory
  651. *
  652. * Custom function implementing the rproc .da_to_va ops to provide address
  653. * translation (device address to kernel virtual address) for internal RAMs
  654. * present in a DSP or IPU device). The translated addresses can be used
  655. * either by the remoteproc core for loading, or by any rpmsg bus drivers.
  656. *
  657. * Return: translated virtual address in kernel memory space on success,
  658. * or NULL on failure.
  659. */
  660. static void *omap_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
  661. {
  662. struct omap_rproc *oproc = rproc->priv;
  663. int i;
  664. u32 offset;
  665. if (len <= 0)
  666. return NULL;
  667. if (!oproc->num_mems)
  668. return NULL;
  669. for (i = 0; i < oproc->num_mems; i++) {
  670. if (da >= oproc->mem[i].dev_addr && da + len <=
  671. oproc->mem[i].dev_addr + oproc->mem[i].size) {
  672. offset = da - oproc->mem[i].dev_addr;
  673. /* __force to make sparse happy with type conversion */
  674. return (__force void *)(oproc->mem[i].cpu_addr +
  675. offset);
  676. }
  677. }
  678. return NULL;
  679. }
  680. static const struct rproc_ops omap_rproc_ops = {
  681. .start = omap_rproc_start,
  682. .stop = omap_rproc_stop,
  683. .kick = omap_rproc_kick,
  684. .da_to_va = omap_rproc_da_to_va,
  685. };
  686. #ifdef CONFIG_PM
  687. static bool _is_rproc_in_standby(struct omap_rproc *oproc)
  688. {
  689. return ti_clk_is_in_standby(oproc->fck);
  690. }
  691. /* 1 sec is long enough time to let the remoteproc side suspend the device */
  692. #define DEF_SUSPEND_TIMEOUT 1000
  693. static int _omap_rproc_suspend(struct rproc *rproc, bool auto_suspend)
  694. {
  695. struct device *dev = rproc->dev.parent;
  696. struct omap_rproc *oproc = rproc->priv;
  697. unsigned long to = msecs_to_jiffies(DEF_SUSPEND_TIMEOUT);
  698. unsigned long ta = jiffies + to;
  699. u32 suspend_msg = auto_suspend ?
  700. RP_MBOX_SUSPEND_AUTO : RP_MBOX_SUSPEND_SYSTEM;
  701. int ret;
  702. reinit_completion(&oproc->pm_comp);
  703. oproc->suspend_acked = false;
  704. ret = mbox_send_message(oproc->mbox, (void *)suspend_msg);
  705. if (ret < 0) {
  706. dev_err(dev, "PM mbox_send_message failed: %d\n", ret);
  707. return ret;
  708. }
  709. ret = wait_for_completion_timeout(&oproc->pm_comp, to);
  710. if (!oproc->suspend_acked)
  711. return -EBUSY;
  712. /*
  713. * The remoteproc side is returning the ACK message before saving the
  714. * context, because the context saving is performed within a SYS/BIOS
  715. * function, and it cannot have any inter-dependencies against the IPC
  716. * layer. Also, as the SYS/BIOS needs to preserve properly the processor
  717. * register set, sending this ACK or signalling the completion of the
  718. * context save through a shared memory variable can never be the
  719. * absolute last thing to be executed on the remoteproc side, and the
  720. * MPU cannot use the ACK message as a sync point to put the remoteproc
  721. * into reset. The only way to ensure that the remote processor has
  722. * completed saving the context is to check that the module has reached
  723. * STANDBY state (after saving the context, the SYS/BIOS executes the
  724. * appropriate target-specific WFI instruction causing the module to
  725. * enter STANDBY).
  726. */
  727. while (!_is_rproc_in_standby(oproc)) {
  728. if (time_after(jiffies, ta))
  729. return -ETIME;
  730. schedule();
  731. }
  732. ret = reset_control_assert(oproc->reset);
  733. if (ret) {
  734. dev_err(dev, "reset assert during suspend failed %d\n", ret);
  735. return ret;
  736. }
  737. ret = omap_rproc_disable_timers(rproc, false);
  738. if (ret) {
  739. dev_err(dev, "disabling timers during suspend failed %d\n",
  740. ret);
  741. goto enable_device;
  742. }
  743. /*
  744. * IOMMUs would have to be disabled specifically for runtime suspend.
  745. * They are handled automatically through System PM callbacks for
  746. * regular system suspend
  747. */
  748. if (auto_suspend) {
  749. ret = omap_iommu_domain_deactivate(rproc->domain);
  750. if (ret) {
  751. dev_err(dev, "iommu domain deactivate failed %d\n",
  752. ret);
  753. goto enable_timers;
  754. }
  755. }
  756. return 0;
  757. enable_timers:
  758. /* ignore errors on re-enabling code */
  759. omap_rproc_enable_timers(rproc, false);
  760. enable_device:
  761. reset_control_deassert(oproc->reset);
  762. return ret;
  763. }
  764. static int _omap_rproc_resume(struct rproc *rproc, bool auto_suspend)
  765. {
  766. struct device *dev = rproc->dev.parent;
  767. struct omap_rproc *oproc = rproc->priv;
  768. int ret;
  769. /*
  770. * IOMMUs would have to be enabled specifically for runtime resume.
  771. * They would have been already enabled automatically through System
  772. * PM callbacks for regular system resume
  773. */
  774. if (auto_suspend) {
  775. ret = omap_iommu_domain_activate(rproc->domain);
  776. if (ret) {
  777. dev_err(dev, "omap_iommu activate failed %d\n", ret);
  778. goto out;
  779. }
  780. }
  781. /* boot address could be lost after suspend, so restore it */
  782. if (oproc->boot_data) {
  783. ret = omap_rproc_write_dsp_boot_addr(rproc);
  784. if (ret) {
  785. dev_err(dev, "boot address restore failed %d\n", ret);
  786. goto suspend_iommu;
  787. }
  788. }
  789. ret = omap_rproc_enable_timers(rproc, false);
  790. if (ret) {
  791. dev_err(dev, "enabling timers during resume failed %d\n", ret);
  792. goto suspend_iommu;
  793. }
  794. ret = reset_control_deassert(oproc->reset);
  795. if (ret) {
  796. dev_err(dev, "reset deassert during resume failed %d\n", ret);
  797. goto disable_timers;
  798. }
  799. return 0;
  800. disable_timers:
  801. omap_rproc_disable_timers(rproc, false);
  802. suspend_iommu:
  803. if (auto_suspend)
  804. omap_iommu_domain_deactivate(rproc->domain);
  805. out:
  806. return ret;
  807. }
  808. static int __maybe_unused omap_rproc_suspend(struct device *dev)
  809. {
  810. struct rproc *rproc = dev_get_drvdata(dev);
  811. struct omap_rproc *oproc = rproc->priv;
  812. int ret = 0;
  813. mutex_lock(&rproc->lock);
  814. if (rproc->state == RPROC_OFFLINE)
  815. goto out;
  816. if (rproc->state == RPROC_SUSPENDED)
  817. goto out;
  818. if (rproc->state != RPROC_RUNNING) {
  819. ret = -EBUSY;
  820. goto out;
  821. }
  822. ret = _omap_rproc_suspend(rproc, false);
  823. if (ret) {
  824. dev_err(dev, "suspend failed %d\n", ret);
  825. goto out;
  826. }
  827. /*
  828. * remoteproc is running at the time of system suspend, so remember
  829. * it so as to wake it up during system resume
  830. */
  831. oproc->need_resume = true;
  832. rproc->state = RPROC_SUSPENDED;
  833. out:
  834. mutex_unlock(&rproc->lock);
  835. return ret;
  836. }
  837. static int __maybe_unused omap_rproc_resume(struct device *dev)
  838. {
  839. struct rproc *rproc = dev_get_drvdata(dev);
  840. struct omap_rproc *oproc = rproc->priv;
  841. int ret = 0;
  842. mutex_lock(&rproc->lock);
  843. if (rproc->state == RPROC_OFFLINE)
  844. goto out;
  845. if (rproc->state != RPROC_SUSPENDED) {
  846. ret = -EBUSY;
  847. goto out;
  848. }
  849. /*
  850. * remoteproc was auto-suspended at the time of system suspend,
  851. * so no need to wake-up the processor (leave it in suspended
  852. * state, will be woken up during a subsequent runtime_resume)
  853. */
  854. if (!oproc->need_resume)
  855. goto out;
  856. ret = _omap_rproc_resume(rproc, false);
  857. if (ret) {
  858. dev_err(dev, "resume failed %d\n", ret);
  859. goto out;
  860. }
  861. oproc->need_resume = false;
  862. rproc->state = RPROC_RUNNING;
  863. pm_runtime_mark_last_busy(dev);
  864. out:
  865. mutex_unlock(&rproc->lock);
  866. return ret;
  867. }
  868. static int omap_rproc_runtime_suspend(struct device *dev)
  869. {
  870. struct rproc *rproc = dev_get_drvdata(dev);
  871. struct omap_rproc *oproc = rproc->priv;
  872. int ret;
  873. mutex_lock(&rproc->lock);
  874. if (rproc->state == RPROC_CRASHED) {
  875. dev_dbg(dev, "rproc cannot be runtime suspended when crashed!\n");
  876. ret = -EBUSY;
  877. goto out;
  878. }
  879. if (WARN_ON(rproc->state != RPROC_RUNNING)) {
  880. dev_err(dev, "rproc cannot be runtime suspended when not running!\n");
  881. ret = -EBUSY;
  882. goto out;
  883. }
  884. /*
  885. * do not even attempt suspend if the remote processor is not
  886. * idled for runtime auto-suspend
  887. */
  888. if (!_is_rproc_in_standby(oproc)) {
  889. ret = -EBUSY;
  890. goto abort;
  891. }
  892. ret = _omap_rproc_suspend(rproc, true);
  893. if (ret)
  894. goto abort;
  895. rproc->state = RPROC_SUSPENDED;
  896. mutex_unlock(&rproc->lock);
  897. return 0;
  898. abort:
  899. pm_runtime_mark_last_busy(dev);
  900. out:
  901. mutex_unlock(&rproc->lock);
  902. return ret;
  903. }
  904. static int omap_rproc_runtime_resume(struct device *dev)
  905. {
  906. struct rproc *rproc = dev_get_drvdata(dev);
  907. int ret;
  908. mutex_lock(&rproc->lock);
  909. if (WARN_ON(rproc->state != RPROC_SUSPENDED)) {
  910. dev_err(dev, "rproc cannot be runtime resumed if not suspended! state=%d\n",
  911. rproc->state);
  912. ret = -EBUSY;
  913. goto out;
  914. }
  915. ret = _omap_rproc_resume(rproc, true);
  916. if (ret) {
  917. dev_err(dev, "runtime resume failed %d\n", ret);
  918. goto out;
  919. }
  920. rproc->state = RPROC_RUNNING;
  921. out:
  922. mutex_unlock(&rproc->lock);
  923. return ret;
  924. }
  925. #endif /* CONFIG_PM */
  926. static const struct omap_rproc_mem_data ipu_mems[] = {
  927. { .name = "l2ram", .dev_addr = 0x20000000 },
  928. { },
  929. };
  930. static const struct omap_rproc_mem_data dra7_dsp_mems[] = {
  931. { .name = "l2ram", .dev_addr = 0x800000 },
  932. { .name = "l1pram", .dev_addr = 0xe00000 },
  933. { .name = "l1dram", .dev_addr = 0xf00000 },
  934. { },
  935. };
  936. static const struct omap_rproc_dev_data omap4_dsp_dev_data = {
  937. .device_name = "dsp",
  938. };
  939. static const struct omap_rproc_dev_data omap4_ipu_dev_data = {
  940. .device_name = "ipu",
  941. .mems = ipu_mems,
  942. };
  943. static const struct omap_rproc_dev_data omap5_dsp_dev_data = {
  944. .device_name = "dsp",
  945. };
  946. static const struct omap_rproc_dev_data omap5_ipu_dev_data = {
  947. .device_name = "ipu",
  948. .mems = ipu_mems,
  949. };
  950. static const struct omap_rproc_dev_data dra7_dsp_dev_data = {
  951. .device_name = "dsp",
  952. .mems = dra7_dsp_mems,
  953. };
  954. static const struct omap_rproc_dev_data dra7_ipu_dev_data = {
  955. .device_name = "ipu",
  956. .mems = ipu_mems,
  957. };
  958. static const struct of_device_id omap_rproc_of_match[] = {
  959. {
  960. .compatible = "ti,omap4-dsp",
  961. .data = &omap4_dsp_dev_data,
  962. },
  963. {
  964. .compatible = "ti,omap4-ipu",
  965. .data = &omap4_ipu_dev_data,
  966. },
  967. {
  968. .compatible = "ti,omap5-dsp",
  969. .data = &omap5_dsp_dev_data,
  970. },
  971. {
  972. .compatible = "ti,omap5-ipu",
  973. .data = &omap5_ipu_dev_data,
  974. },
  975. {
  976. .compatible = "ti,dra7-dsp",
  977. .data = &dra7_dsp_dev_data,
  978. },
  979. {
  980. .compatible = "ti,dra7-ipu",
  981. .data = &dra7_ipu_dev_data,
  982. },
  983. {
  984. /* end */
  985. },
  986. };
  987. MODULE_DEVICE_TABLE(of, omap_rproc_of_match);
  988. static const char *omap_rproc_get_firmware(struct platform_device *pdev)
  989. {
  990. const char *fw_name;
  991. int ret;
  992. ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
  993. &fw_name);
  994. if (ret)
  995. return ERR_PTR(ret);
  996. return fw_name;
  997. }
  998. static int omap_rproc_get_boot_data(struct platform_device *pdev,
  999. struct rproc *rproc)
  1000. {
  1001. struct device_node *np = pdev->dev.of_node;
  1002. struct omap_rproc *oproc = rproc->priv;
  1003. const struct omap_rproc_dev_data *data;
  1004. data = of_device_get_match_data(&pdev->dev);
  1005. if (!data)
  1006. return -ENODEV;
  1007. if (!of_property_read_bool(np, "ti,bootreg"))
  1008. return 0;
  1009. oproc->boot_data = devm_kzalloc(&pdev->dev, sizeof(*oproc->boot_data),
  1010. GFP_KERNEL);
  1011. if (!oproc->boot_data)
  1012. return -ENOMEM;
  1013. oproc->boot_data->syscon =
  1014. syscon_regmap_lookup_by_phandle(np, "ti,bootreg");
  1015. if (IS_ERR(oproc->boot_data->syscon))
  1016. return PTR_ERR(oproc->boot_data->syscon);
  1017. if (of_property_read_u32_index(np, "ti,bootreg", 1,
  1018. &oproc->boot_data->boot_reg)) {
  1019. dev_err(&pdev->dev, "couldn't get the boot register\n");
  1020. return -EINVAL;
  1021. }
  1022. of_property_read_u32_index(np, "ti,bootreg", 2,
  1023. &oproc->boot_data->boot_reg_shift);
  1024. return 0;
  1025. }
  1026. static int omap_rproc_of_get_internal_memories(struct platform_device *pdev,
  1027. struct rproc *rproc)
  1028. {
  1029. struct omap_rproc *oproc = rproc->priv;
  1030. struct device *dev = &pdev->dev;
  1031. const struct omap_rproc_dev_data *data;
  1032. struct resource *res;
  1033. int num_mems;
  1034. int i;
  1035. data = of_device_get_match_data(dev);
  1036. if (!data)
  1037. return -ENODEV;
  1038. if (!data->mems)
  1039. return 0;
  1040. num_mems = of_property_count_elems_of_size(dev->of_node, "reg",
  1041. sizeof(u32)) / 2;
  1042. oproc->mem = devm_kcalloc(dev, num_mems, sizeof(*oproc->mem),
  1043. GFP_KERNEL);
  1044. if (!oproc->mem)
  1045. return -ENOMEM;
  1046. for (i = 0; data->mems[i].name; i++) {
  1047. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  1048. data->mems[i].name);
  1049. if (!res) {
  1050. dev_err(dev, "no memory defined for %s\n",
  1051. data->mems[i].name);
  1052. return -ENOMEM;
  1053. }
  1054. oproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
  1055. if (IS_ERR(oproc->mem[i].cpu_addr)) {
  1056. dev_err(dev, "failed to parse and map %s memory\n",
  1057. data->mems[i].name);
  1058. return PTR_ERR(oproc->mem[i].cpu_addr);
  1059. }
  1060. oproc->mem[i].bus_addr = res->start;
  1061. oproc->mem[i].dev_addr = data->mems[i].dev_addr;
  1062. oproc->mem[i].size = resource_size(res);
  1063. dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n",
  1064. data->mems[i].name, &oproc->mem[i].bus_addr,
  1065. oproc->mem[i].size, oproc->mem[i].cpu_addr,
  1066. oproc->mem[i].dev_addr);
  1067. }
  1068. oproc->num_mems = num_mems;
  1069. return 0;
  1070. }
  1071. #ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG
  1072. static int omap_rproc_count_wdog_timers(struct device *dev)
  1073. {
  1074. struct device_node *np = dev->of_node;
  1075. int ret;
  1076. ret = of_count_phandle_with_args(np, "ti,watchdog-timers", NULL);
  1077. if (ret <= 0) {
  1078. dev_dbg(dev, "device does not have watchdog timers, status = %d\n",
  1079. ret);
  1080. ret = 0;
  1081. }
  1082. return ret;
  1083. }
  1084. #else
  1085. static int omap_rproc_count_wdog_timers(struct device *dev)
  1086. {
  1087. return 0;
  1088. }
  1089. #endif
  1090. static int omap_rproc_of_get_timers(struct platform_device *pdev,
  1091. struct rproc *rproc)
  1092. {
  1093. struct device_node *np = pdev->dev.of_node;
  1094. struct omap_rproc *oproc = rproc->priv;
  1095. struct device *dev = &pdev->dev;
  1096. int num_timers;
  1097. /*
  1098. * Timer nodes are directly used in client nodes as phandles, so
  1099. * retrieve the count using appropriate size
  1100. */
  1101. oproc->num_timers = of_count_phandle_with_args(np, "ti,timers", NULL);
  1102. if (oproc->num_timers <= 0) {
  1103. dev_dbg(dev, "device does not have timers, status = %d\n",
  1104. oproc->num_timers);
  1105. oproc->num_timers = 0;
  1106. }
  1107. oproc->num_wd_timers = omap_rproc_count_wdog_timers(dev);
  1108. num_timers = oproc->num_timers + oproc->num_wd_timers;
  1109. if (num_timers) {
  1110. oproc->timers = devm_kcalloc(dev, num_timers,
  1111. sizeof(*oproc->timers),
  1112. GFP_KERNEL);
  1113. if (!oproc->timers)
  1114. return -ENOMEM;
  1115. dev_dbg(dev, "device has %d tick timers and %d watchdog timers\n",
  1116. oproc->num_timers, oproc->num_wd_timers);
  1117. }
  1118. return 0;
  1119. }
  1120. static void omap_rproc_mem_release(void *data)
  1121. {
  1122. struct device *dev = data;
  1123. of_reserved_mem_device_release(dev);
  1124. }
  1125. static int omap_rproc_probe(struct platform_device *pdev)
  1126. {
  1127. struct device_node *np = pdev->dev.of_node;
  1128. struct omap_rproc *oproc;
  1129. struct rproc *rproc;
  1130. const char *firmware;
  1131. int ret;
  1132. struct reset_control *reset;
  1133. if (!np) {
  1134. dev_err(&pdev->dev, "only DT-based devices are supported\n");
  1135. return -ENODEV;
  1136. }
  1137. reset = devm_reset_control_array_get_exclusive(&pdev->dev);
  1138. if (IS_ERR(reset))
  1139. return PTR_ERR(reset);
  1140. firmware = omap_rproc_get_firmware(pdev);
  1141. if (IS_ERR(firmware))
  1142. return PTR_ERR(firmware);
  1143. ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  1144. if (ret) {
  1145. dev_err(&pdev->dev, "dma_set_coherent_mask: %d\n", ret);
  1146. return ret;
  1147. }
  1148. rproc = devm_rproc_alloc(&pdev->dev, dev_name(&pdev->dev), &omap_rproc_ops,
  1149. firmware, sizeof(*oproc));
  1150. if (!rproc)
  1151. return -ENOMEM;
  1152. oproc = rproc->priv;
  1153. oproc->rproc = rproc;
  1154. oproc->reset = reset;
  1155. /* All existing OMAP IPU and DSP processors have an MMU */
  1156. rproc->has_iommu = true;
  1157. #ifdef CONFIG_ARM_DMA_USE_IOMMU
  1158. /*
  1159. * Throw away the ARM DMA mapping that we'll never use, so it doesn't
  1160. * interfere with the core rproc->domain and we get the right DMA ops.
  1161. */
  1162. if (pdev->dev.archdata.mapping) {
  1163. struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(&pdev->dev);
  1164. arm_iommu_detach_device(&pdev->dev);
  1165. arm_iommu_release_mapping(mapping);
  1166. }
  1167. #endif
  1168. ret = omap_rproc_of_get_internal_memories(pdev, rproc);
  1169. if (ret)
  1170. return ret;
  1171. ret = omap_rproc_get_boot_data(pdev, rproc);
  1172. if (ret)
  1173. return ret;
  1174. ret = omap_rproc_of_get_timers(pdev, rproc);
  1175. if (ret)
  1176. return ret;
  1177. init_completion(&oproc->pm_comp);
  1178. oproc->autosuspend_delay = DEFAULT_AUTOSUSPEND_DELAY;
  1179. of_property_read_u32(pdev->dev.of_node, "ti,autosuspend-delay-ms",
  1180. &oproc->autosuspend_delay);
  1181. pm_runtime_set_autosuspend_delay(&pdev->dev, oproc->autosuspend_delay);
  1182. oproc->fck = devm_clk_get(&pdev->dev, 0);
  1183. if (IS_ERR(oproc->fck))
  1184. return PTR_ERR(oproc->fck);
  1185. ret = of_reserved_mem_device_init(&pdev->dev);
  1186. if (ret) {
  1187. dev_warn(&pdev->dev, "device does not have specific CMA pool.\n");
  1188. dev_warn(&pdev->dev, "Typically this should be provided,\n");
  1189. dev_warn(&pdev->dev, "only omit if you know what you are doing.\n");
  1190. }
  1191. ret = devm_add_action_or_reset(&pdev->dev, omap_rproc_mem_release, &pdev->dev);
  1192. if (ret)
  1193. return ret;
  1194. platform_set_drvdata(pdev, rproc);
  1195. ret = devm_rproc_add(&pdev->dev, rproc);
  1196. if (ret)
  1197. return ret;
  1198. return 0;
  1199. }
  1200. static const struct dev_pm_ops omap_rproc_pm_ops = {
  1201. SET_SYSTEM_SLEEP_PM_OPS(omap_rproc_suspend, omap_rproc_resume)
  1202. SET_RUNTIME_PM_OPS(omap_rproc_runtime_suspend,
  1203. omap_rproc_runtime_resume, NULL)
  1204. };
  1205. static struct platform_driver omap_rproc_driver = {
  1206. .probe = omap_rproc_probe,
  1207. .driver = {
  1208. .name = "omap-rproc",
  1209. .pm = &omap_rproc_pm_ops,
  1210. .of_match_table = omap_rproc_of_match,
  1211. },
  1212. };
  1213. module_platform_driver(omap_rproc_driver);
  1214. MODULE_LICENSE("GPL v2");
  1215. MODULE_DESCRIPTION("OMAP Remote Processor control driver");