s2mps11.c 79 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // Copyright (c) 2012-2014 Samsung Electronics Co., Ltd
  4. // http://www.samsung.com
  5. #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h>
  6. #include <linux/bug.h>
  7. #include <linux/cleanup.h>
  8. #include <linux/err.h>
  9. #include <linux/gpio/consumer.h>
  10. #include <linux/slab.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/regmap.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/regulator/driver.h>
  16. #include <linux/regulator/machine.h>
  17. #include <linux/regulator/of_regulator.h>
  18. #include <linux/mfd/samsung/core.h>
  19. #include <linux/mfd/samsung/s2mpg10.h>
  20. #include <linux/mfd/samsung/s2mpg11.h>
  21. #include <linux/mfd/samsung/s2mps11.h>
  22. #include <linux/mfd/samsung/s2mps13.h>
  23. #include <linux/mfd/samsung/s2mps14.h>
  24. #include <linux/mfd/samsung/s2mps15.h>
  25. #include <linux/mfd/samsung/s2mpu02.h>
  26. #include <linux/mfd/samsung/s2mpu05.h>
  27. enum {
  28. S2MPG10_REGULATOR_OPS_STD,
  29. S2MPG10_REGULATOR_OPS_EXTCONTROL,
  30. };
  31. /* The highest number of possible regulators for supported devices. */
  32. #define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX
  33. struct s2mps11_info {
  34. int ramp_delay2;
  35. int ramp_delay34;
  36. int ramp_delay5;
  37. int ramp_delay16;
  38. int ramp_delay7810;
  39. int ramp_delay9;
  40. enum sec_device_type dev_type;
  41. /*
  42. * One bit for each S2MPS11/S2MPS13/S2MPS14/S2MPU02 regulator whether
  43. * the suspend mode was enabled.
  44. */
  45. DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX);
  46. };
  47. #define to_s2mpg10_regulator_desc(x) container_of((x), struct s2mpg10_regulator_desc, desc)
  48. struct s2mpg10_regulator_desc {
  49. struct regulator_desc desc;
  50. /* Ramp rate during enable, valid for bucks only. */
  51. unsigned int enable_ramp_rate;
  52. /* Registers for external control of rail. */
  53. unsigned int pctrlsel_reg;
  54. unsigned int pctrlsel_mask;
  55. /* Populated from DT. */
  56. unsigned int pctrlsel_val;
  57. };
  58. static int get_ramp_delay(int ramp_delay)
  59. {
  60. unsigned char cnt = 0;
  61. ramp_delay /= 6250;
  62. while (true) {
  63. ramp_delay = ramp_delay >> 1;
  64. if (ramp_delay == 0)
  65. break;
  66. cnt++;
  67. }
  68. if (cnt > 3)
  69. cnt = 3;
  70. return cnt;
  71. }
  72. static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
  73. unsigned int old_selector,
  74. unsigned int new_selector)
  75. {
  76. struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
  77. int rdev_id = rdev_get_id(rdev);
  78. unsigned int ramp_delay = 0;
  79. int old_volt, new_volt;
  80. switch (rdev_id) {
  81. case S2MPS11_BUCK2:
  82. ramp_delay = s2mps11->ramp_delay2;
  83. break;
  84. case S2MPS11_BUCK3:
  85. case S2MPS11_BUCK4:
  86. ramp_delay = s2mps11->ramp_delay34;
  87. break;
  88. case S2MPS11_BUCK5:
  89. ramp_delay = s2mps11->ramp_delay5;
  90. break;
  91. case S2MPS11_BUCK6:
  92. case S2MPS11_BUCK1:
  93. ramp_delay = s2mps11->ramp_delay16;
  94. break;
  95. case S2MPS11_BUCK7:
  96. case S2MPS11_BUCK8:
  97. case S2MPS11_BUCK10:
  98. ramp_delay = s2mps11->ramp_delay7810;
  99. break;
  100. case S2MPS11_BUCK9:
  101. ramp_delay = s2mps11->ramp_delay9;
  102. }
  103. if (ramp_delay == 0)
  104. ramp_delay = rdev->desc->ramp_delay;
  105. old_volt = rdev->desc->min_uV + (rdev->desc->uV_step * old_selector);
  106. new_volt = rdev->desc->min_uV + (rdev->desc->uV_step * new_selector);
  107. return DIV_ROUND_UP(abs(new_volt - old_volt), ramp_delay);
  108. }
  109. static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
  110. {
  111. struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
  112. unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK;
  113. unsigned int ramp_enable = 1, enable_shift = 0;
  114. int rdev_id = rdev_get_id(rdev);
  115. int ret;
  116. switch (rdev_id) {
  117. case S2MPS11_BUCK1:
  118. if (ramp_delay > s2mps11->ramp_delay16)
  119. s2mps11->ramp_delay16 = ramp_delay;
  120. else
  121. ramp_delay = s2mps11->ramp_delay16;
  122. ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;
  123. break;
  124. case S2MPS11_BUCK2:
  125. enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT;
  126. if (!ramp_delay) {
  127. ramp_enable = 0;
  128. break;
  129. }
  130. s2mps11->ramp_delay2 = ramp_delay;
  131. ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT;
  132. ramp_reg = S2MPS11_REG_RAMP;
  133. break;
  134. case S2MPS11_BUCK3:
  135. enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT;
  136. if (!ramp_delay) {
  137. ramp_enable = 0;
  138. break;
  139. }
  140. if (ramp_delay > s2mps11->ramp_delay34)
  141. s2mps11->ramp_delay34 = ramp_delay;
  142. else
  143. ramp_delay = s2mps11->ramp_delay34;
  144. ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;
  145. ramp_reg = S2MPS11_REG_RAMP;
  146. break;
  147. case S2MPS11_BUCK4:
  148. enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT;
  149. if (!ramp_delay) {
  150. ramp_enable = 0;
  151. break;
  152. }
  153. if (ramp_delay > s2mps11->ramp_delay34)
  154. s2mps11->ramp_delay34 = ramp_delay;
  155. else
  156. ramp_delay = s2mps11->ramp_delay34;
  157. ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;
  158. ramp_reg = S2MPS11_REG_RAMP;
  159. break;
  160. case S2MPS11_BUCK5:
  161. s2mps11->ramp_delay5 = ramp_delay;
  162. ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT;
  163. break;
  164. case S2MPS11_BUCK6:
  165. enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT;
  166. if (!ramp_delay) {
  167. ramp_enable = 0;
  168. break;
  169. }
  170. if (ramp_delay > s2mps11->ramp_delay16)
  171. s2mps11->ramp_delay16 = ramp_delay;
  172. else
  173. ramp_delay = s2mps11->ramp_delay16;
  174. ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;
  175. break;
  176. case S2MPS11_BUCK7:
  177. case S2MPS11_BUCK8:
  178. case S2MPS11_BUCK10:
  179. if (ramp_delay > s2mps11->ramp_delay7810)
  180. s2mps11->ramp_delay7810 = ramp_delay;
  181. else
  182. ramp_delay = s2mps11->ramp_delay7810;
  183. ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT;
  184. break;
  185. case S2MPS11_BUCK9:
  186. s2mps11->ramp_delay9 = ramp_delay;
  187. ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT;
  188. break;
  189. default:
  190. return 0;
  191. }
  192. if (!ramp_enable)
  193. goto ramp_disable;
  194. /* Ramp delay can be enabled/disabled only for buck[2346] */
  195. if ((rdev_id >= S2MPS11_BUCK2 && rdev_id <= S2MPS11_BUCK4) ||
  196. rdev_id == S2MPS11_BUCK6) {
  197. ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,
  198. 1 << enable_shift, 1 << enable_shift);
  199. if (ret) {
  200. dev_err(&rdev->dev, "failed to enable ramp rate\n");
  201. return ret;
  202. }
  203. }
  204. ramp_val = get_ramp_delay(ramp_delay);
  205. return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift,
  206. ramp_val << ramp_shift);
  207. ramp_disable:
  208. return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,
  209. 1 << enable_shift, 0);
  210. }
  211. static int s2mps11_regulator_enable(struct regulator_dev *rdev)
  212. {
  213. struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
  214. int rdev_id = rdev_get_id(rdev);
  215. unsigned int val;
  216. switch (s2mps11->dev_type) {
  217. case S2MPS11X:
  218. if (test_bit(rdev_id, s2mps11->suspend_state))
  219. val = S2MPS14_ENABLE_SUSPEND;
  220. else
  221. val = rdev->desc->enable_mask;
  222. break;
  223. case S2MPS13X:
  224. case S2MPS14X:
  225. if (test_bit(rdev_id, s2mps11->suspend_state))
  226. val = S2MPS14_ENABLE_SUSPEND;
  227. else if (rdev->ena_pin)
  228. val = S2MPS14_ENABLE_EXT_CONTROL;
  229. else
  230. val = rdev->desc->enable_mask;
  231. break;
  232. case S2MPU02:
  233. if (test_bit(rdev_id, s2mps11->suspend_state))
  234. val = S2MPU02_ENABLE_SUSPEND;
  235. else
  236. val = rdev->desc->enable_mask;
  237. break;
  238. case S2MPU05:
  239. val = rdev->desc->enable_mask;
  240. break;
  241. default:
  242. return -EINVAL;
  243. }
  244. return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
  245. rdev->desc->enable_mask, val);
  246. }
  247. static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev)
  248. {
  249. int ret;
  250. unsigned int val, state;
  251. struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
  252. int rdev_id = rdev_get_id(rdev);
  253. /* Below LDO should be always on or does not support suspend mode. */
  254. switch (s2mps11->dev_type) {
  255. case S2MPS11X:
  256. switch (rdev_id) {
  257. case S2MPS11_LDO2:
  258. case S2MPS11_LDO36:
  259. case S2MPS11_LDO37:
  260. case S2MPS11_LDO38:
  261. return 0;
  262. default:
  263. state = S2MPS14_ENABLE_SUSPEND;
  264. break;
  265. }
  266. break;
  267. case S2MPS13X:
  268. case S2MPS14X:
  269. switch (rdev_id) {
  270. case S2MPS14_LDO3:
  271. return 0;
  272. default:
  273. state = S2MPS14_ENABLE_SUSPEND;
  274. break;
  275. }
  276. break;
  277. case S2MPU02:
  278. switch (rdev_id) {
  279. case S2MPU02_LDO13:
  280. case S2MPU02_LDO14:
  281. case S2MPU02_LDO15:
  282. case S2MPU02_LDO17:
  283. case S2MPU02_BUCK7:
  284. state = S2MPU02_DISABLE_SUSPEND;
  285. break;
  286. default:
  287. state = S2MPU02_ENABLE_SUSPEND;
  288. break;
  289. }
  290. break;
  291. default:
  292. return -EINVAL;
  293. }
  294. ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val);
  295. if (ret < 0)
  296. return ret;
  297. set_bit(rdev_id, s2mps11->suspend_state);
  298. /*
  299. * Don't enable suspend mode if regulator is already disabled because
  300. * this would effectively for a short time turn on the regulator after
  301. * resuming.
  302. * However we still want to toggle the suspend_state bit for regulator
  303. * in case if it got enabled before suspending the system.
  304. */
  305. if (!(val & rdev->desc->enable_mask))
  306. return 0;
  307. return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
  308. rdev->desc->enable_mask, state);
  309. }
  310. static int s2mps11_of_parse_gpiod(struct device_node *np,
  311. const char *con_id, bool optional,
  312. const struct regulator_desc *desc,
  313. struct regulator_config *config)
  314. {
  315. struct gpio_desc *ena_gpiod;
  316. int ret;
  317. ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), con_id, 0,
  318. GPIOD_OUT_HIGH |
  319. GPIOD_FLAGS_BIT_NONEXCLUSIVE,
  320. desc->name
  321. ? : dev_name(config->dev));
  322. if (IS_ERR(ena_gpiod)) {
  323. ret = PTR_ERR(ena_gpiod);
  324. /* Ignore all errors except probe defer. */
  325. if (ret == -EPROBE_DEFER)
  326. return ret;
  327. if (ret == -ENOENT) {
  328. if (optional)
  329. return 0;
  330. dev_info(config->dev,
  331. "No entry for control GPIO for %d/%s in node %pOF\n",
  332. desc->id, desc->name, np);
  333. } else {
  334. dev_warn_probe(config->dev, ret,
  335. "Failed to get control GPIO for %d/%s in node %pOF\n",
  336. desc->id, desc->name, np);
  337. }
  338. return 0;
  339. }
  340. dev_info(config->dev, "Using GPIO for ext-control over %d/%s\n",
  341. desc->id, desc->name);
  342. config->ena_gpiod = ena_gpiod;
  343. return 0;
  344. }
  345. static int s2mps11_of_parse_cb(struct device_node *np,
  346. const struct regulator_desc *desc,
  347. struct regulator_config *config)
  348. {
  349. const struct s2mps11_info *s2mps11 = config->driver_data;
  350. if (s2mps11->dev_type == S2MPS14X)
  351. switch (desc->id) {
  352. case S2MPS14_LDO10:
  353. case S2MPS14_LDO11:
  354. case S2MPS14_LDO12:
  355. break;
  356. default:
  357. return 0;
  358. }
  359. else
  360. return 0;
  361. return s2mps11_of_parse_gpiod(np, "samsung,ext-control", false, desc,
  362. config);
  363. }
  364. static int s2mpg10_of_parse_cb(struct device_node *np,
  365. const struct regulator_desc *desc,
  366. struct regulator_config *config)
  367. {
  368. const struct s2mps11_info *s2mps11 = config->driver_data;
  369. struct s2mpg10_regulator_desc *s2mpg10_desc = to_s2mpg10_regulator_desc(desc);
  370. static const u32 ext_control_s2mpg10[] = {
  371. [S2MPG10_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN,
  372. [S2MPG10_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF,
  373. [S2MPG10_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N,
  374. [S2MPG10_EXTCTRL_CPUCL1_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN,
  375. [S2MPG10_EXTCTRL_CPUCL1_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2,
  376. [S2MPG10_EXTCTRL_CPUCL2_EN] = S2MPG10_PCTRLSEL_CPUCL2_EN,
  377. [S2MPG10_EXTCTRL_CPUCL2_EN2] = S2MPG10_PCTRLSEL_CPUCL2_EN2,
  378. [S2MPG10_EXTCTRL_TPU_EN] = S2MPG10_PCTRLSEL_TPU_EN,
  379. [S2MPG10_EXTCTRL_TPU_EN2] = S2MPG10_PCTRLSEL_TPU_EN2,
  380. [S2MPG10_EXTCTRL_TCXO_ON] = S2MPG10_PCTRLSEL_TCXO_ON,
  381. [S2MPG10_EXTCTRL_TCXO_ON2] = S2MPG10_PCTRLSEL_TCXO_ON2,
  382. [S2MPG10_EXTCTRL_LDO20M_EN2] = S2MPG10_PCTRLSEL_LDO20M_EN2,
  383. [S2MPG10_EXTCTRL_LDO20M_EN] = S2MPG10_PCTRLSEL_LDO20M_EN,
  384. };
  385. static const u32 ext_control_s2mpg11[] = {
  386. [S2MPG11_EXTCTRL_PWREN] = S2MPG11_PCTRLSEL_PWREN,
  387. [S2MPG11_EXTCTRL_PWREN_MIF] = S2MPG11_PCTRLSEL_PWREN_MIF,
  388. [S2MPG11_EXTCTRL_AP_ACTIVE_N] = S2MPG11_PCTRLSEL_AP_ACTIVE_N,
  389. [S2MPG11_EXTCTRL_G3D_EN] = S2MPG11_PCTRLSEL_G3D_EN,
  390. [S2MPG11_EXTCTRL_G3D_EN2] = S2MPG11_PCTRLSEL_G3D_EN2,
  391. [S2MPG11_EXTCTRL_AOC_VDD] = S2MPG11_PCTRLSEL_AOC_VDD,
  392. [S2MPG11_EXTCTRL_AOC_RET] = S2MPG11_PCTRLSEL_AOC_RET,
  393. [S2MPG11_EXTCTRL_UFS_EN] = S2MPG11_PCTRLSEL_UFS_EN,
  394. [S2MPG11_EXTCTRL_LDO13S_EN] = S2MPG11_PCTRLSEL_LDO13S_EN,
  395. };
  396. u32 ext_control;
  397. if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11)
  398. return 0;
  399. if (of_property_read_u32(np, "samsung,ext-control", &ext_control))
  400. return 0;
  401. switch (s2mps11->dev_type) {
  402. case S2MPG10:
  403. switch (desc->id) {
  404. case S2MPG10_BUCK1 ... S2MPG10_BUCK7:
  405. case S2MPG10_BUCK10:
  406. case S2MPG10_LDO3 ... S2MPG10_LDO19:
  407. if (ext_control > S2MPG10_EXTCTRL_TCXO_ON2)
  408. return -EINVAL;
  409. break;
  410. case S2MPG10_LDO20:
  411. if (ext_control < S2MPG10_EXTCTRL_LDO20M_EN2 ||
  412. ext_control > S2MPG10_EXTCTRL_LDO20M_EN)
  413. return -EINVAL;
  414. break;
  415. default:
  416. return -EINVAL;
  417. }
  418. ext_control = ext_control_s2mpg10[ext_control];
  419. break;
  420. case S2MPG11:
  421. switch (desc->id) {
  422. case S2MPG11_BUCK1 ... S2MPG11_BUCK3:
  423. case S2MPG11_BUCK5:
  424. case S2MPG11_BUCK8:
  425. case S2MPG11_BUCK9:
  426. case S2MPG11_BUCKD:
  427. case S2MPG11_BUCKA:
  428. case S2MPG11_LDO1:
  429. case S2MPG11_LDO2:
  430. case S2MPG11_LDO8:
  431. case S2MPG11_LDO13:
  432. if (ext_control > S2MPG11_EXTCTRL_LDO13S_EN)
  433. return -EINVAL;
  434. break;
  435. default:
  436. return -EINVAL;
  437. }
  438. ext_control = ext_control_s2mpg11[ext_control];
  439. break;
  440. default:
  441. return -EINVAL;
  442. }
  443. /*
  444. * If the regulator should be configured for external control, then:
  445. * 1) the PCTRLSELx register needs to be set accordingly
  446. * 2) regulator_desc::enable_val needs to be:
  447. * a) updated and
  448. * b) written to the hardware
  449. * 3) we switch to the ::ops that provide an empty ::enable() and no
  450. * ::disable() implementations
  451. *
  452. * Points 1) and 2b) will be handled in _probe(), after
  453. * devm_regulator_register() returns, so that we can properly act on
  454. * failures, since the regulator core ignores most return values from
  455. * this parse callback.
  456. */
  457. s2mpg10_desc->pctrlsel_val = ext_control;
  458. s2mpg10_desc->pctrlsel_val <<= (ffs(s2mpg10_desc->pctrlsel_mask) - 1);
  459. s2mpg10_desc->desc.enable_val = S2MPG10_PMIC_CTRL_ENABLE_EXT;
  460. s2mpg10_desc->desc.enable_val <<= (ffs(desc->enable_mask) - 1);
  461. ++s2mpg10_desc->desc.ops;
  462. return s2mps11_of_parse_gpiod(np, "enable", true, desc, config);
  463. }
  464. static int s2mpg10_enable_ext_control(struct s2mps11_info *s2mps11,
  465. struct regulator_dev *rdev)
  466. {
  467. const struct s2mpg10_regulator_desc *s2mpg10_desc;
  468. int ret;
  469. switch (s2mps11->dev_type) {
  470. case S2MPG10:
  471. case S2MPG11:
  472. s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc);
  473. break;
  474. default:
  475. return 0;
  476. }
  477. ret = regmap_update_bits(rdev_get_regmap(rdev),
  478. s2mpg10_desc->pctrlsel_reg,
  479. s2mpg10_desc->pctrlsel_mask,
  480. s2mpg10_desc->pctrlsel_val);
  481. if (ret)
  482. return dev_err_probe(rdev_get_dev(rdev), ret,
  483. "failed to configure pctrlsel for %s\n",
  484. rdev->desc->name);
  485. /*
  486. * When using external control, the enable bit of the regulator still
  487. * needs to be set. The actual state will still be determined by the
  488. * external signal.
  489. */
  490. ret = regulator_enable_regmap(rdev);
  491. if (ret)
  492. return dev_err_probe(rdev_get_dev(rdev), ret,
  493. "failed to enable regulator %s\n",
  494. rdev->desc->name);
  495. return 0;
  496. }
  497. static int s2mpg10_regulator_enable_nop(struct regulator_dev *rdev)
  498. {
  499. /*
  500. * We need to provide this, otherwise the regulator core's enable on
  501. * this regulator will return a failure and subsequently disable our
  502. * parent regulator.
  503. */
  504. return 0;
  505. }
  506. static int s2mpg10_regulator_buck_enable_time(struct regulator_dev *rdev)
  507. {
  508. const struct s2mpg10_regulator_desc * const s2mpg10_desc =
  509. to_s2mpg10_regulator_desc(rdev->desc);
  510. const struct regulator_ops * const ops = rdev->desc->ops;
  511. int vsel, curr_uV;
  512. vsel = ops->get_voltage_sel(rdev);
  513. if (vsel < 0)
  514. return vsel;
  515. curr_uV = ops->list_voltage(rdev, vsel);
  516. if (curr_uV < 0)
  517. return curr_uV;
  518. return (rdev->desc->enable_time
  519. + DIV_ROUND_UP(curr_uV, s2mpg10_desc->enable_ramp_rate));
  520. }
  521. static int s2mpg1x_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
  522. int old_uV, int new_uV,
  523. unsigned int ramp_reg,
  524. unsigned int ramp_mask)
  525. {
  526. unsigned int ramp_sel, ramp_rate;
  527. int ret;
  528. if (old_uV == new_uV)
  529. return 0;
  530. ret = regmap_read(rdev->regmap, ramp_reg, &ramp_sel);
  531. if (ret)
  532. return ret;
  533. ramp_sel &= ramp_mask;
  534. ramp_sel >>= ffs(ramp_mask) - 1;
  535. if (ramp_sel >= rdev->desc->n_ramp_values ||
  536. !rdev->desc->ramp_delay_table)
  537. return -EINVAL;
  538. ramp_rate = rdev->desc->ramp_delay_table[ramp_sel];
  539. return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_rate);
  540. }
  541. static int s2mpg10_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
  542. int old_uV, int new_uV)
  543. {
  544. unsigned int ramp_reg;
  545. ramp_reg = rdev->desc->ramp_reg;
  546. if (old_uV > new_uV)
  547. /* The downwards ramp is at a different offset. */
  548. ramp_reg += S2MPG10_PMIC_DVS_RAMP4 - S2MPG10_PMIC_DVS_RAMP1;
  549. return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV,
  550. ramp_reg,
  551. rdev->desc->ramp_mask);
  552. }
  553. static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
  554. int old_uV, int new_uV)
  555. {
  556. unsigned int ramp_mask;
  557. ramp_mask = rdev->desc->ramp_mask;
  558. if (old_uV > new_uV)
  559. /* The downwards mask is at a different position. */
  560. ramp_mask >>= 2;
  561. return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV,
  562. rdev->desc->ramp_reg,
  563. ramp_mask);
  564. }
  565. /*
  566. * We assign both, ::set_voltage_time() and ::set_voltage_time_sel(), because
  567. * only if the latter is != NULL, the regulator core will call neither during
  568. * DVS if the regulator is disabled. If the latter is NULL, the core always
  569. * calls the ::set_voltage_time() callback, which would give incorrect results
  570. * if the regulator is off.
  571. * At the same time, we do need ::set_voltage_time() due to differing upwards
  572. * and downwards ramps and we can not make that code dependent on the regulator
  573. * enable state, as that would break regulator_set_voltage_time() which
  574. * expects a correct result no matter the enable state.
  575. */
  576. static const struct regulator_ops s2mpg10_reg_buck_ops[] = {
  577. [S2MPG10_REGULATOR_OPS_STD] = {
  578. .list_voltage = regulator_list_voltage_linear_range,
  579. .map_voltage = regulator_map_voltage_linear_range,
  580. .is_enabled = regulator_is_enabled_regmap,
  581. .enable = regulator_enable_regmap,
  582. .disable = regulator_disable_regmap,
  583. .enable_time = s2mpg10_regulator_buck_enable_time,
  584. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  585. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  586. .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time,
  587. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  588. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  589. },
  590. [S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
  591. .list_voltage = regulator_list_voltage_linear_range,
  592. .map_voltage = regulator_map_voltage_linear_range,
  593. .enable = s2mpg10_regulator_enable_nop,
  594. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  595. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  596. .set_voltage_time = s2mpg10_regulator_buck_set_voltage_time,
  597. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  598. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  599. }
  600. };
  601. #define s2mpg10_buck_to_ramp_mask(n) (GENMASK(1, 0) << (((n) % 4) * 2))
  602. /*
  603. * The ramp_delay during enable is fixed (12.5mV/μs), while the ramp during
  604. * DVS can be adjusted. Linux can adjust the ramp delay via DT, in which case
  605. * the regulator core will modify the regulator's constraints and call our
  606. * .set_ramp_delay() which updates the DVS ramp in ramp_reg.
  607. * For enable, our .enable_time() unconditionally uses enable_ramp_rate
  608. * (12.5mV/μs) while our ::set_voltage_time() takes the value in ramp_reg
  609. * into account.
  610. */
  611. #define regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, _ops, \
  612. _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \
  613. _r_reg, _r_mask, _r_table, _r_table_sz, \
  614. _en_time) { \
  615. .name = "buck" _name, \
  616. .supply_name = _supply, \
  617. .of_match = of_match_ptr("buck" _name), \
  618. .regulators_node = of_match_ptr("regulators"), \
  619. .of_parse_cb = s2mpg10_of_parse_cb, \
  620. .id = _id, \
  621. .ops = &(_ops)[0], \
  622. .type = REGULATOR_VOLTAGE, \
  623. .owner = THIS_MODULE, \
  624. .linear_ranges = _vrange, \
  625. .n_linear_ranges = ARRAY_SIZE(_vrange), \
  626. .n_voltages = _vrange##_count, \
  627. .vsel_reg = _vsel_reg, \
  628. .vsel_mask = _vsel_mask, \
  629. .enable_reg = _en_reg, \
  630. .enable_mask = _en_mask, \
  631. .ramp_reg = _r_reg, \
  632. .ramp_mask = _r_mask, \
  633. .ramp_delay_table = _r_table, \
  634. .n_ramp_values = _r_table_sz, \
  635. .enable_time = _en_time, /* + V/enable_ramp_rate */ \
  636. }
  637. #define regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg) \
  638. regulator_desc_s2mpg1x_buck_cmn(#_num "m", S2MPG10_BUCK##_num, \
  639. "vinb"#_num "m", s2mpg10_reg_buck_ops, _vrange, \
  640. S2MPG10_PMIC_B##_num##M_OUT1, GENMASK(7, 0), \
  641. S2MPG10_PMIC_B##_num##M_CTRL, GENMASK(7, 6), \
  642. S2MPG10_PMIC_##_r_reg, \
  643. s2mpg10_buck_to_ramp_mask(S2MPG10_BUCK##_num \
  644. - S2MPG10_BUCK1), \
  645. s2mpg10_buck_ramp_table, \
  646. ARRAY_SIZE(s2mpg10_buck_ramp_table), 30)
  647. #define s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg) \
  648. .desc = regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg), \
  649. .enable_ramp_rate = 12500
  650. #define s2mpg10_regulator_desc_buck_gpio(_num, _vrange, _r_reg, \
  651. _pc_reg, _pc_mask) \
  652. [S2MPG10_BUCK##_num] = { \
  653. s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \
  654. .pctrlsel_reg = S2MPG10_PMIC_##_pc_reg, \
  655. .pctrlsel_mask = _pc_mask, \
  656. }
  657. #define s2mpg10_regulator_desc_buck(_num, _vrange, _r_reg) \
  658. [S2MPG10_BUCK##_num] = { \
  659. s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \
  660. }
  661. /* ops for S2MPG1x LDO regulators without ramp control */
  662. static const struct regulator_ops s2mpg10_reg_ldo_ops[] = {
  663. [S2MPG10_REGULATOR_OPS_STD] = {
  664. .list_voltage = regulator_list_voltage_linear_range,
  665. .map_voltage = regulator_map_voltage_linear_range,
  666. .is_enabled = regulator_is_enabled_regmap,
  667. .enable = regulator_enable_regmap,
  668. .disable = regulator_disable_regmap,
  669. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  670. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  671. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  672. },
  673. [S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
  674. .list_voltage = regulator_list_voltage_linear_range,
  675. .map_voltage = regulator_map_voltage_linear_range,
  676. .enable = s2mpg10_regulator_enable_nop,
  677. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  678. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  679. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  680. }
  681. };
  682. /* ops for S2MPG1x LDO regulators that have ramp control */
  683. static const struct regulator_ops s2mpg10_reg_ldo_ramp_ops[] = {
  684. [S2MPG10_REGULATOR_OPS_STD] = {
  685. .list_voltage = regulator_list_voltage_linear_range,
  686. .map_voltage = regulator_map_voltage_linear_range,
  687. .is_enabled = regulator_is_enabled_regmap,
  688. .enable = regulator_enable_regmap,
  689. .disable = regulator_disable_regmap,
  690. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  691. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  692. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  693. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  694. },
  695. [S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
  696. .list_voltage = regulator_list_voltage_linear_range,
  697. .map_voltage = regulator_map_voltage_linear_range,
  698. .enable = s2mpg10_regulator_enable_nop,
  699. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  700. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  701. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  702. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  703. }
  704. };
  705. #define regulator_desc_s2mpg1x_ldo_cmn(_name, _id, _supply, _ops, \
  706. _vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \
  707. _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz) { \
  708. .name = "ldo" _name, \
  709. .supply_name = _supply, \
  710. .of_match = of_match_ptr("ldo" _name), \
  711. .regulators_node = of_match_ptr("regulators"), \
  712. .of_parse_cb = s2mpg10_of_parse_cb, \
  713. .id = _id, \
  714. .ops = &(_ops)[0], \
  715. .type = REGULATOR_VOLTAGE, \
  716. .owner = THIS_MODULE, \
  717. .linear_ranges = _vrange, \
  718. .n_linear_ranges = ARRAY_SIZE(_vrange), \
  719. .n_voltages = _vrange##_count, \
  720. .vsel_reg = _vsel_reg, \
  721. .vsel_mask = _vsel_mask, \
  722. .enable_reg = _en_reg, \
  723. .enable_mask = _en_mask, \
  724. .ramp_delay = _ramp_delay, \
  725. .ramp_reg = _r_reg, \
  726. .ramp_mask = _r_mask, \
  727. .ramp_delay_table = _r_table, \
  728. .n_ramp_values = _r_table_sz, \
  729. .enable_time = 130, /* startup 20+-10 + ramp 30..100μs */ \
  730. }
  731. #define s2mpg10_regulator_desc_ldo_cmn(_num, _supply, _ops, _vrange, \
  732. _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \
  733. _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \
  734. _pc_reg, _pc_mask) \
  735. [S2MPG10_LDO##_num] = { \
  736. .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "m", \
  737. S2MPG10_LDO##_num, _supply, _ops, \
  738. _vrange, \
  739. S2MPG10_PMIC_L##_num##M_##_vsel_reg_sfx, \
  740. _vsel_mask, \
  741. S2MPG10_PMIC_##_en_reg, _en_mask, \
  742. _ramp_delay, _r_reg, _r_mask, _r_table, \
  743. _r_table_sz), \
  744. .pctrlsel_reg = _pc_reg, \
  745. .pctrlsel_mask = _pc_mask, \
  746. }
  747. /* standard LDO via LxM_CTRL */
  748. #define s2mpg10_regulator_desc_ldo(_num, _supply, _vrange) \
  749. s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \
  750. s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
  751. L##_num##M_CTRL, BIT(7), \
  752. 0, 0, 0, NULL, 0, \
  753. 0, 0)
  754. /* standard LDO but possibly GPIO controlled */
  755. #define s2mpg10_regulator_desc_ldo_gpio(_num, _supply, _vrange, \
  756. _pc_reg, _pc_mask) \
  757. s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \
  758. s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
  759. L##_num##M_CTRL, GENMASK(7, 6), \
  760. 0, 0, 0, NULL, 0, \
  761. S2MPG10_PMIC_##_pc_reg, _pc_mask)
  762. /* LDO with ramp support and possibly GPIO controlled */
  763. #define s2mpg10_regulator_desc_ldo_ramp(_num, _supply, _vrange, \
  764. _en_mask, _r_reg, _pc_reg, _pc_mask) \
  765. s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \
  766. s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \
  767. LDO_CTRL2, _en_mask, \
  768. 6250, S2MPG10_PMIC_##_r_reg, GENMASK(1, 0), \
  769. s2mpg10_ldo_ramp_table, \
  770. ARRAY_SIZE(s2mpg10_ldo_ramp_table), \
  771. S2MPG10_PMIC_##_pc_reg, _pc_mask)
  772. #define S2MPG10_VOLTAGE_RANGE(_prefix, _idx, _offs_uV, _min_uV, \
  773. _max_uV, _step_uV) \
  774. static const struct linear_range _prefix##_vranges##_idx[] = { \
  775. REGULATOR_LINEAR_VRANGE(_offs_uV, _min_uV, _max_uV, _step_uV) \
  776. }; \
  777. static const unsigned int _prefix##_vranges##_idx##_count = \
  778. ((((_max_uV) - (_offs_uV)) / (_step_uV)) + 1)
  779. /* voltage range for s2mpg10 BUCK 1, 2, 3, 4, 5, 7, 8, 9, 10 */
  780. S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV);
  781. /* voltage range for s2mpg10 BUCK 6 */
  782. S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 6, 200000, 450000, 1350000, STEP_6_25_MV);
  783. static const unsigned int s2mpg10_buck_ramp_table[] = {
  784. 6250, 12500, 25000
  785. };
  786. /* voltage range for s2mpg10 LDO 1, 11, 12 */
  787. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 1, 300000, 700000, 1300000, STEP_12_5_MV);
  788. /* voltage range for s2mpg10 LDO 2, 4, 9, 14, 18, 19, 20, 23, 25, 29, 30, 31 */
  789. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 2, 700000, 1600000, 1950000, STEP_25_MV);
  790. /* voltage range for s2mpg10 LDO 3, 5, 6, 8, 16, 17, 24, 28 */
  791. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 3, 725000, 725000, 1300000, STEP_12_5_MV);
  792. /* voltage range for s2mpg10 LDO 7 */
  793. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 7, 300000, 450000, 1300000, STEP_12_5_MV);
  794. /* voltage range for s2mpg10 LDO 13, 15 */
  795. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 13, 300000, 450000, 950000, STEP_12_5_MV);
  796. /* voltage range for s2mpg10 LDO 10 */
  797. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 10, 1800000, 1800000, 3350000, STEP_25_MV);
  798. /* voltage range for s2mpg10 LDO 21, 22, 26, 27 */
  799. S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 21, 1800000, 2500000, 3300000, STEP_25_MV);
  800. /* possible ramp values for s2mpg10 LDO 1, 7, 11, 12, 13, 15 */
  801. static const unsigned int s2mpg10_ldo_ramp_table[] = {
  802. 6250, 12500
  803. };
  804. static const struct s2mpg10_regulator_desc s2mpg10_regulators[] = {
  805. s2mpg10_regulator_desc_buck_gpio(1, s2mpg10_buck_vranges1, DVS_RAMP1,
  806. PCTRLSEL1, GENMASK(3, 0)),
  807. s2mpg10_regulator_desc_buck_gpio(2, s2mpg10_buck_vranges1, DVS_RAMP1,
  808. PCTRLSEL1, GENMASK(7, 4)),
  809. s2mpg10_regulator_desc_buck_gpio(3, s2mpg10_buck_vranges1, DVS_RAMP1,
  810. PCTRLSEL2, GENMASK(3, 0)),
  811. s2mpg10_regulator_desc_buck_gpio(4, s2mpg10_buck_vranges1, DVS_RAMP1,
  812. PCTRLSEL2, GENMASK(7, 4)),
  813. s2mpg10_regulator_desc_buck_gpio(5, s2mpg10_buck_vranges1, DVS_RAMP2,
  814. PCTRLSEL3, GENMASK(3, 0)),
  815. s2mpg10_regulator_desc_buck_gpio(6, s2mpg10_buck_vranges6, DVS_RAMP2,
  816. PCTRLSEL3, GENMASK(7, 4)),
  817. s2mpg10_regulator_desc_buck_gpio(7, s2mpg10_buck_vranges1, DVS_RAMP2,
  818. PCTRLSEL4, GENMASK(3, 0)),
  819. s2mpg10_regulator_desc_buck(8, s2mpg10_buck_vranges1, DVS_RAMP2),
  820. s2mpg10_regulator_desc_buck(9, s2mpg10_buck_vranges1, DVS_RAMP3),
  821. s2mpg10_regulator_desc_buck_gpio(10, s2mpg10_buck_vranges1, DVS_RAMP3,
  822. PCTRLSEL4, GENMASK(7, 4)),
  823. /*
  824. * Standard LDO via LxM_CTRL but non-standard (greater) V-range and with
  825. * ramp support.
  826. */
  827. s2mpg10_regulator_desc_ldo_cmn(1, "vinl3m", s2mpg10_reg_ldo_ramp_ops,
  828. s2mpg10_ldo_vranges1,
  829. CTRL, GENMASK(6, 0),
  830. L1M_CTRL, BIT(7),
  831. 6250, S2MPG10_PMIC_DVS_RAMP6,
  832. GENMASK(5, 4), s2mpg10_ldo_ramp_table,
  833. ARRAY_SIZE(s2mpg10_ldo_ramp_table),
  834. 0, 0),
  835. s2mpg10_regulator_desc_ldo(2, "vinl9m", s2mpg10_ldo_vranges2),
  836. s2mpg10_regulator_desc_ldo_gpio(3, "vinl4m", s2mpg10_ldo_vranges3,
  837. PCTRLSEL5, GENMASK(3, 0)),
  838. s2mpg10_regulator_desc_ldo_gpio(4, "vinl9m", s2mpg10_ldo_vranges2,
  839. PCTRLSEL5, GENMASK(7, 4)),
  840. s2mpg10_regulator_desc_ldo_gpio(5, "vinl3m", s2mpg10_ldo_vranges3,
  841. PCTRLSEL6, GENMASK(3, 0)),
  842. s2mpg10_regulator_desc_ldo_gpio(6, "vinl7m", s2mpg10_ldo_vranges3,
  843. PCTRLSEL6, GENMASK(7, 4)),
  844. /*
  845. * Ramp support, possibly GPIO controlled, non-standard (greater) V-
  846. * range and enable reg & mask.
  847. */
  848. s2mpg10_regulator_desc_ldo_cmn(7, "vinl3m", s2mpg10_reg_ldo_ramp_ops,
  849. s2mpg10_ldo_vranges7,
  850. CTRL, GENMASK(6, 0),
  851. LDO_CTRL1, GENMASK(4, 3),
  852. 6250, S2MPG10_PMIC_DVS_RAMP6,
  853. GENMASK(7, 6), s2mpg10_ldo_ramp_table,
  854. ARRAY_SIZE(s2mpg10_ldo_ramp_table),
  855. S2MPG10_PMIC_PCTRLSEL7, GENMASK(3, 0)),
  856. s2mpg10_regulator_desc_ldo_gpio(8, "vinl4m", s2mpg10_ldo_vranges3,
  857. PCTRLSEL7, GENMASK(7, 4)),
  858. s2mpg10_regulator_desc_ldo_gpio(9, "vinl10m", s2mpg10_ldo_vranges2,
  859. PCTRLSEL8, GENMASK(3, 0)),
  860. s2mpg10_regulator_desc_ldo_gpio(10, "vinl15m", s2mpg10_ldo_vranges10,
  861. PCTRLSEL8, GENMASK(7, 4)),
  862. s2mpg10_regulator_desc_ldo_ramp(11, "vinl7m", s2mpg10_ldo_vranges1,
  863. GENMASK(1, 0), DVS_SYNC_CTRL3,
  864. PCTRLSEL9, GENMASK(3, 0)),
  865. s2mpg10_regulator_desc_ldo_ramp(12, "vinl8m", s2mpg10_ldo_vranges1,
  866. GENMASK(3, 2), DVS_SYNC_CTRL4,
  867. PCTRLSEL9, GENMASK(7, 4)),
  868. s2mpg10_regulator_desc_ldo_ramp(13, "vinl1m", s2mpg10_ldo_vranges13,
  869. GENMASK(5, 4), DVS_SYNC_CTRL5,
  870. PCTRLSEL10, GENMASK(3, 0)),
  871. s2mpg10_regulator_desc_ldo_gpio(14, "vinl10m", s2mpg10_ldo_vranges2,
  872. PCTRLSEL10, GENMASK(7, 4)),
  873. s2mpg10_regulator_desc_ldo_ramp(15, "vinl2m", s2mpg10_ldo_vranges13,
  874. GENMASK(7, 6), DVS_SYNC_CTRL6,
  875. PCTRLSEL11, GENMASK(3, 0)),
  876. s2mpg10_regulator_desc_ldo_gpio(16, "vinl5m", s2mpg10_ldo_vranges3,
  877. PCTRLSEL11, GENMASK(7, 4)),
  878. s2mpg10_regulator_desc_ldo_gpio(17, "vinl6m", s2mpg10_ldo_vranges3,
  879. PCTRLSEL12, GENMASK(3, 0)),
  880. s2mpg10_regulator_desc_ldo_gpio(18, "vinl10m", s2mpg10_ldo_vranges2,
  881. PCTRLSEL12, GENMASK(7, 4)),
  882. s2mpg10_regulator_desc_ldo_gpio(19, "vinl10m", s2mpg10_ldo_vranges2,
  883. PCTRLSEL13, GENMASK(3, 0)),
  884. s2mpg10_regulator_desc_ldo_gpio(20, "vinl10m", s2mpg10_ldo_vranges2,
  885. PCTRLSEL13, GENMASK(7, 4)),
  886. s2mpg10_regulator_desc_ldo(21, "vinl14m", s2mpg10_ldo_vranges21),
  887. s2mpg10_regulator_desc_ldo(22, "vinl15m", s2mpg10_ldo_vranges21),
  888. s2mpg10_regulator_desc_ldo(23, "vinl11m", s2mpg10_ldo_vranges2),
  889. s2mpg10_regulator_desc_ldo(24, "vinl7m", s2mpg10_ldo_vranges3),
  890. s2mpg10_regulator_desc_ldo(25, "vinl10m", s2mpg10_ldo_vranges2),
  891. s2mpg10_regulator_desc_ldo(26, "vinl15m", s2mpg10_ldo_vranges21),
  892. s2mpg10_regulator_desc_ldo(27, "vinl15m", s2mpg10_ldo_vranges21),
  893. s2mpg10_regulator_desc_ldo(28, "vinl7m", s2mpg10_ldo_vranges3),
  894. s2mpg10_regulator_desc_ldo(29, "vinl12m", s2mpg10_ldo_vranges2),
  895. s2mpg10_regulator_desc_ldo(30, "vinl13m", s2mpg10_ldo_vranges2),
  896. s2mpg10_regulator_desc_ldo(31, "vinl11m", s2mpg10_ldo_vranges2)
  897. };
  898. static const struct regulator_ops s2mpg11_reg_buck_ops[] = {
  899. [S2MPG10_REGULATOR_OPS_STD] = {
  900. .list_voltage = regulator_list_voltage_linear_range,
  901. .map_voltage = regulator_map_voltage_linear_range,
  902. .is_enabled = regulator_is_enabled_regmap,
  903. .enable = regulator_enable_regmap,
  904. .disable = regulator_disable_regmap,
  905. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  906. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  907. .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time,
  908. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  909. .enable_time = s2mpg10_regulator_buck_enable_time,
  910. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  911. },
  912. [S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
  913. .list_voltage = regulator_list_voltage_linear_range,
  914. .map_voltage = regulator_map_voltage_linear_range,
  915. .enable = s2mpg10_regulator_enable_nop,
  916. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  917. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  918. .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time,
  919. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  920. .enable_time = s2mpg10_regulator_buck_enable_time,
  921. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  922. }
  923. };
  924. #define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4))
  925. #define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \
  926. _vsel_reg, _en_reg, _en_mask, _r_reg) \
  927. regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \
  928. s2mpg11_reg_buck_ops, _vrange, \
  929. S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \
  930. S2MPG11_PMIC_##_en_reg, _en_mask, \
  931. S2MPG11_PMIC_##_r_reg, \
  932. s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \
  933. s2mpg10_buck_ramp_table, \
  934. ARRAY_SIZE(s2mpg10_buck_ramp_table), 30)
  935. #define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \
  936. _en_mask, _r_reg, _en_rrate) \
  937. .desc = regulator_desc_s2mpg11_buckx(#_num"s", \
  938. S2MPG11_BUCK##_num, "vinb"#_num"s", \
  939. _vrange, \
  940. B##_num##S_##_vsel_reg_sfx, \
  941. B##_num##S_CTRL, _en_mask, \
  942. _r_reg), \
  943. .enable_ramp_rate = _en_rrate
  944. #define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \
  945. _en_mask, _r_reg) \
  946. [S2MPG11_BUCK##_num] = { \
  947. s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
  948. _vsel_reg_sfx, _en_mask, _r_reg, 12500), \
  949. }
  950. #define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \
  951. _vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \
  952. [S2MPG11_BUCK##_num] = { \
  953. s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
  954. _vsel_reg_sfx, _en_mask, _r_reg, 12500), \
  955. .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \
  956. .pctrlsel_mask = _pc_mask, \
  957. }
  958. #define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \
  959. _en_mask, _r_reg) \
  960. [S2MPG11_BUCK##_num] = { \
  961. s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
  962. _vsel_reg_sfx, _en_mask, _r_reg, 25000), \
  963. }
  964. #define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \
  965. _pc_reg, _pc_mask) \
  966. [S2MPG11_BUCK##_num] = { \
  967. .desc = regulator_desc_s2mpg11_buckx(#_num_lower, \
  968. S2MPG11_BUCK##_num, "vinb"#_num_lower, \
  969. s2mpg11_buck_vranges##_num_lower, \
  970. BUCK##_num##_OUT, \
  971. BUCK##_num##_CTRL, GENMASK(7, 6), \
  972. _r_reg), \
  973. .enable_ramp_rate = 25000, \
  974. .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \
  975. .pctrlsel_mask = _pc_mask, \
  976. }
  977. #define s2mpg11_regulator_desc_buckboost() \
  978. [S2MPG11_BUCKBOOST] = { \
  979. .desc = regulator_desc_s2mpg1x_buck_cmn("boost", \
  980. S2MPG11_BUCKBOOST, "vinbb", \
  981. s2mpg10_reg_ldo_ops, \
  982. s2mpg11_buck_vrangesboost, \
  983. S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \
  984. S2MPG11_PMIC_BB_CTRL, BIT(7), \
  985. 0, 0, NULL, 0, 35), \
  986. .enable_ramp_rate = 17500, \
  987. }
  988. #define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _ops, \
  989. _vrange, _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \
  990. _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \
  991. _pc_reg, _pc_mask) \
  992. [S2MPG11_LDO##_num] = { \
  993. .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "s", \
  994. S2MPG11_LDO##_num, _supply, _ops, \
  995. _vrange, \
  996. S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \
  997. _vsel_mask, \
  998. S2MPG11_PMIC_##_en_reg, _en_mask, \
  999. _ramp_delay, _r_reg, _r_mask, _r_table, \
  1000. _r_table_sz), \
  1001. .pctrlsel_reg = _pc_reg, \
  1002. .pctrlsel_mask = _pc_mask, \
  1003. }
  1004. /* standard LDO via LxM_CTRL */
  1005. #define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \
  1006. s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
  1007. s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
  1008. L##_num##S_CTRL, BIT(7), \
  1009. 0, 0, 0, NULL, 0, \
  1010. 0, 0)
  1011. /* standard LDO but possibly GPIO controlled */
  1012. #define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \
  1013. _pc_reg, _pc_mask) \
  1014. s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
  1015. s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
  1016. L##_num##S_CTRL, GENMASK(7, 6), \
  1017. 0, 0, 0, NULL, 0, \
  1018. S2MPG11_PMIC_##_pc_reg, _pc_mask)
  1019. /* LDO with ramp support and possibly GPIO controlled */
  1020. #define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \
  1021. _en_mask, _r_reg, _pc_reg, _pc_mask) \
  1022. s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
  1023. s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \
  1024. LDO_CTRL1, _en_mask, \
  1025. 6250, S2MPG11_PMIC_##_r_reg, GENMASK(1, 0), \
  1026. s2mpg10_ldo_ramp_table, \
  1027. ARRAY_SIZE(s2mpg10_ldo_ramp_table), \
  1028. S2MPG11_PMIC_##_pc_reg, _pc_mask)
  1029. /* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */
  1030. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV);
  1031. /* voltage range for s2mpg11 BUCK 5 */
  1032. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV);
  1033. /* voltage range for s2mpg11 BUCK 6 */
  1034. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV);
  1035. /* voltage range for s2mpg11 BUCK 7 */
  1036. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV);
  1037. /* voltage range for s2mpg11 BUCK D */
  1038. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV);
  1039. /* voltage range for s2mpg11 BUCK A */
  1040. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV);
  1041. /* voltage range for s2mpg11 BUCK BOOST */
  1042. S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost,
  1043. 2600000, 3000000, 3600000, STEP_12_5_MV);
  1044. /* voltage range for s2mpg11 LDO 1, 2 */
  1045. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV);
  1046. /* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */
  1047. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV);
  1048. /* voltage range for s2mpg11 LDO 4, 6 */
  1049. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV);
  1050. /* voltage range for s2mpg11 LDO 5 */
  1051. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV);
  1052. /* voltage range for s2mpg11 LDO 8 */
  1053. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800);
  1054. /* voltage range for s2mpg11 LDO 9 */
  1055. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV);
  1056. /* voltage range for s2mpg11 LDO 13 */
  1057. S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV);
  1058. static const struct s2mpg10_regulator_desc s2mpg11_regulators[] = {
  1059. s2mpg11_regulator_desc_buckboost(),
  1060. s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1,
  1061. OUT1, GENMASK(7, 6), DVS_RAMP1,
  1062. PCTRLSEL1, GENMASK(3, 0)),
  1063. s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1,
  1064. OUT1, GENMASK(7, 6), DVS_RAMP1,
  1065. PCTRLSEL1, GENMASK(7, 4)),
  1066. s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1,
  1067. OUT1, GENMASK(7, 6), DVS_RAMP2,
  1068. PCTRLSEL2, GENMASK(3, 0)),
  1069. s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1,
  1070. OUT, BIT(7), DVS_RAMP2),
  1071. s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5,
  1072. OUT, GENMASK(7, 6), DVS_RAMP3,
  1073. PCTRLSEL2, GENMASK(7, 4)),
  1074. s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6,
  1075. OUT1, BIT(7), DVS_RAMP3),
  1076. s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7,
  1077. OUT1, BIT(7), DVS_RAMP4),
  1078. s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1,
  1079. OUT1, GENMASK(7, 6), DVS_RAMP4,
  1080. PCTRLSEL3, GENMASK(3, 0)),
  1081. s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1,
  1082. OUT1, GENMASK(7, 6), DVS_RAMP5,
  1083. PCTRLSEL3, GENMASK(7, 4)),
  1084. s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1,
  1085. OUT, BIT(7), DVS_RAMP5),
  1086. s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)),
  1087. s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)),
  1088. s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1,
  1089. GENMASK(5, 4), DVS_SYNC_CTRL1,
  1090. PCTRLSEL5, GENMASK(3, 0)),
  1091. s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1,
  1092. GENMASK(7, 6), DVS_SYNC_CTRL2,
  1093. PCTRLSEL5, GENMASK(7, 4)),
  1094. s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3),
  1095. s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4),
  1096. s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5),
  1097. s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4),
  1098. s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3),
  1099. s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8,
  1100. PCTRLSEL6, GENMASK(3, 0)),
  1101. s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9),
  1102. s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3),
  1103. s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3),
  1104. s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3),
  1105. s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13,
  1106. PCTRLSEL6, GENMASK(7, 4)),
  1107. s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3),
  1108. s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3)
  1109. };
  1110. static const struct regulator_ops s2mps11_ldo_ops = {
  1111. .list_voltage = regulator_list_voltage_linear,
  1112. .map_voltage = regulator_map_voltage_linear,
  1113. .is_enabled = regulator_is_enabled_regmap,
  1114. .enable = s2mps11_regulator_enable,
  1115. .disable = regulator_disable_regmap,
  1116. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1117. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1118. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  1119. .set_suspend_disable = s2mps11_regulator_set_suspend_disable,
  1120. };
  1121. static const struct regulator_ops s2mps11_buck_ops = {
  1122. .list_voltage = regulator_list_voltage_linear,
  1123. .map_voltage = regulator_map_voltage_linear,
  1124. .is_enabled = regulator_is_enabled_regmap,
  1125. .enable = s2mps11_regulator_enable,
  1126. .disable = regulator_disable_regmap,
  1127. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1128. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1129. .set_voltage_time_sel = s2mps11_regulator_set_voltage_time_sel,
  1130. .set_ramp_delay = s2mps11_set_ramp_delay,
  1131. .set_suspend_disable = s2mps11_regulator_set_suspend_disable,
  1132. };
  1133. #define regulator_desc_s2mps11_ldo(num, step) { \
  1134. .name = "LDO"#num, \
  1135. .id = S2MPS11_LDO##num, \
  1136. .of_match = of_match_ptr("LDO"#num), \
  1137. .regulators_node = of_match_ptr("regulators"), \
  1138. .ops = &s2mps11_ldo_ops, \
  1139. .type = REGULATOR_VOLTAGE, \
  1140. .owner = THIS_MODULE, \
  1141. .ramp_delay = RAMP_DELAY_12_MVUS, \
  1142. .min_uV = MIN_800_MV, \
  1143. .uV_step = step, \
  1144. .n_voltages = S2MPS11_LDO_N_VOLTAGES, \
  1145. .vsel_reg = S2MPS11_REG_L1CTRL + num - 1, \
  1146. .vsel_mask = S2MPS11_LDO_VSEL_MASK, \
  1147. .enable_reg = S2MPS11_REG_L1CTRL + num - 1, \
  1148. .enable_mask = S2MPS11_ENABLE_MASK \
  1149. }
  1150. #define regulator_desc_s2mps11_buck1_4(num) { \
  1151. .name = "BUCK"#num, \
  1152. .id = S2MPS11_BUCK##num, \
  1153. .of_match = of_match_ptr("BUCK"#num), \
  1154. .regulators_node = of_match_ptr("regulators"), \
  1155. .ops = &s2mps11_buck_ops, \
  1156. .type = REGULATOR_VOLTAGE, \
  1157. .owner = THIS_MODULE, \
  1158. .min_uV = MIN_650_MV, \
  1159. .uV_step = STEP_6_25_MV, \
  1160. .linear_min_sel = 8, \
  1161. .n_voltages = S2MPS11_BUCK12346_N_VOLTAGES, \
  1162. .ramp_delay = S2MPS11_RAMP_DELAY, \
  1163. .vsel_reg = S2MPS11_REG_B1CTRL2 + (num - 1) * 2, \
  1164. .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
  1165. .enable_reg = S2MPS11_REG_B1CTRL1 + (num - 1) * 2, \
  1166. .enable_mask = S2MPS11_ENABLE_MASK \
  1167. }
  1168. #define regulator_desc_s2mps11_buck5 { \
  1169. .name = "BUCK5", \
  1170. .id = S2MPS11_BUCK5, \
  1171. .of_match = of_match_ptr("BUCK5"), \
  1172. .regulators_node = of_match_ptr("regulators"), \
  1173. .ops = &s2mps11_buck_ops, \
  1174. .type = REGULATOR_VOLTAGE, \
  1175. .owner = THIS_MODULE, \
  1176. .min_uV = MIN_650_MV, \
  1177. .uV_step = STEP_6_25_MV, \
  1178. .linear_min_sel = 8, \
  1179. .n_voltages = S2MPS11_BUCK5_N_VOLTAGES, \
  1180. .ramp_delay = S2MPS11_RAMP_DELAY, \
  1181. .vsel_reg = S2MPS11_REG_B5CTRL2, \
  1182. .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
  1183. .enable_reg = S2MPS11_REG_B5CTRL1, \
  1184. .enable_mask = S2MPS11_ENABLE_MASK \
  1185. }
  1186. #define regulator_desc_s2mps11_buck67810(num, min, step, min_sel, voltages) { \
  1187. .name = "BUCK"#num, \
  1188. .id = S2MPS11_BUCK##num, \
  1189. .of_match = of_match_ptr("BUCK"#num), \
  1190. .regulators_node = of_match_ptr("regulators"), \
  1191. .ops = &s2mps11_buck_ops, \
  1192. .type = REGULATOR_VOLTAGE, \
  1193. .owner = THIS_MODULE, \
  1194. .min_uV = min, \
  1195. .uV_step = step, \
  1196. .linear_min_sel = min_sel, \
  1197. .n_voltages = voltages, \
  1198. .ramp_delay = S2MPS11_RAMP_DELAY, \
  1199. .vsel_reg = S2MPS11_REG_B6CTRL2 + (num - 6) * 2, \
  1200. .vsel_mask = S2MPS11_BUCK_VSEL_MASK, \
  1201. .enable_reg = S2MPS11_REG_B6CTRL1 + (num - 6) * 2, \
  1202. .enable_mask = S2MPS11_ENABLE_MASK \
  1203. }
  1204. #define regulator_desc_s2mps11_buck9 { \
  1205. .name = "BUCK9", \
  1206. .id = S2MPS11_BUCK9, \
  1207. .of_match = of_match_ptr("BUCK9"), \
  1208. .regulators_node = of_match_ptr("regulators"), \
  1209. .ops = &s2mps11_buck_ops, \
  1210. .type = REGULATOR_VOLTAGE, \
  1211. .owner = THIS_MODULE, \
  1212. .min_uV = MIN_3000_MV, \
  1213. .uV_step = STEP_25_MV, \
  1214. .n_voltages = S2MPS11_BUCK9_N_VOLTAGES, \
  1215. .ramp_delay = S2MPS11_RAMP_DELAY, \
  1216. .vsel_reg = S2MPS11_REG_B9CTRL2, \
  1217. .vsel_mask = S2MPS11_BUCK9_VSEL_MASK, \
  1218. .enable_reg = S2MPS11_REG_B9CTRL1, \
  1219. .enable_mask = S2MPS11_ENABLE_MASK \
  1220. }
  1221. static const struct regulator_desc s2mps11_regulators[] = {
  1222. regulator_desc_s2mps11_ldo(1, STEP_25_MV),
  1223. regulator_desc_s2mps11_ldo(2, STEP_50_MV),
  1224. regulator_desc_s2mps11_ldo(3, STEP_50_MV),
  1225. regulator_desc_s2mps11_ldo(4, STEP_50_MV),
  1226. regulator_desc_s2mps11_ldo(5, STEP_50_MV),
  1227. regulator_desc_s2mps11_ldo(6, STEP_25_MV),
  1228. regulator_desc_s2mps11_ldo(7, STEP_50_MV),
  1229. regulator_desc_s2mps11_ldo(8, STEP_50_MV),
  1230. regulator_desc_s2mps11_ldo(9, STEP_50_MV),
  1231. regulator_desc_s2mps11_ldo(10, STEP_50_MV),
  1232. regulator_desc_s2mps11_ldo(11, STEP_25_MV),
  1233. regulator_desc_s2mps11_ldo(12, STEP_50_MV),
  1234. regulator_desc_s2mps11_ldo(13, STEP_50_MV),
  1235. regulator_desc_s2mps11_ldo(14, STEP_50_MV),
  1236. regulator_desc_s2mps11_ldo(15, STEP_50_MV),
  1237. regulator_desc_s2mps11_ldo(16, STEP_50_MV),
  1238. regulator_desc_s2mps11_ldo(17, STEP_50_MV),
  1239. regulator_desc_s2mps11_ldo(18, STEP_50_MV),
  1240. regulator_desc_s2mps11_ldo(19, STEP_50_MV),
  1241. regulator_desc_s2mps11_ldo(20, STEP_50_MV),
  1242. regulator_desc_s2mps11_ldo(21, STEP_50_MV),
  1243. regulator_desc_s2mps11_ldo(22, STEP_25_MV),
  1244. regulator_desc_s2mps11_ldo(23, STEP_25_MV),
  1245. regulator_desc_s2mps11_ldo(24, STEP_50_MV),
  1246. regulator_desc_s2mps11_ldo(25, STEP_50_MV),
  1247. regulator_desc_s2mps11_ldo(26, STEP_50_MV),
  1248. regulator_desc_s2mps11_ldo(27, STEP_25_MV),
  1249. regulator_desc_s2mps11_ldo(28, STEP_50_MV),
  1250. regulator_desc_s2mps11_ldo(29, STEP_50_MV),
  1251. regulator_desc_s2mps11_ldo(30, STEP_50_MV),
  1252. regulator_desc_s2mps11_ldo(31, STEP_50_MV),
  1253. regulator_desc_s2mps11_ldo(32, STEP_50_MV),
  1254. regulator_desc_s2mps11_ldo(33, STEP_50_MV),
  1255. regulator_desc_s2mps11_ldo(34, STEP_50_MV),
  1256. regulator_desc_s2mps11_ldo(35, STEP_25_MV),
  1257. regulator_desc_s2mps11_ldo(36, STEP_50_MV),
  1258. regulator_desc_s2mps11_ldo(37, STEP_50_MV),
  1259. regulator_desc_s2mps11_ldo(38, STEP_50_MV),
  1260. regulator_desc_s2mps11_buck1_4(1),
  1261. regulator_desc_s2mps11_buck1_4(2),
  1262. regulator_desc_s2mps11_buck1_4(3),
  1263. regulator_desc_s2mps11_buck1_4(4),
  1264. regulator_desc_s2mps11_buck5,
  1265. regulator_desc_s2mps11_buck67810(6, MIN_650_MV, STEP_6_25_MV, 8,
  1266. S2MPS11_BUCK12346_N_VOLTAGES),
  1267. regulator_desc_s2mps11_buck67810(7, MIN_750_MV, STEP_12_5_MV, 0,
  1268. S2MPS11_BUCK7810_N_VOLTAGES),
  1269. regulator_desc_s2mps11_buck67810(8, MIN_750_MV, STEP_12_5_MV, 0,
  1270. S2MPS11_BUCK7810_N_VOLTAGES),
  1271. regulator_desc_s2mps11_buck9,
  1272. regulator_desc_s2mps11_buck67810(10, MIN_750_MV, STEP_12_5_MV, 0,
  1273. S2MPS11_BUCK7810_N_VOLTAGES),
  1274. };
  1275. static const struct regulator_ops s2mps14_reg_ops;
  1276. #define regulator_desc_s2mps13_ldo(num, min, step, min_sel) { \
  1277. .name = "LDO"#num, \
  1278. .id = S2MPS13_LDO##num, \
  1279. .of_match = of_match_ptr("LDO"#num), \
  1280. .regulators_node = of_match_ptr("regulators"), \
  1281. .ops = &s2mps14_reg_ops, \
  1282. .type = REGULATOR_VOLTAGE, \
  1283. .owner = THIS_MODULE, \
  1284. .min_uV = min, \
  1285. .uV_step = step, \
  1286. .linear_min_sel = min_sel, \
  1287. .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
  1288. .vsel_reg = S2MPS13_REG_L1CTRL + num - 1, \
  1289. .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
  1290. .enable_reg = S2MPS13_REG_L1CTRL + num - 1, \
  1291. .enable_mask = S2MPS14_ENABLE_MASK \
  1292. }
  1293. #define regulator_desc_s2mps13_buck(num, min, step, min_sel) { \
  1294. .name = "BUCK"#num, \
  1295. .id = S2MPS13_BUCK##num, \
  1296. .of_match = of_match_ptr("BUCK"#num), \
  1297. .regulators_node = of_match_ptr("regulators"), \
  1298. .ops = &s2mps14_reg_ops, \
  1299. .type = REGULATOR_VOLTAGE, \
  1300. .owner = THIS_MODULE, \
  1301. .min_uV = min, \
  1302. .uV_step = step, \
  1303. .linear_min_sel = min_sel, \
  1304. .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
  1305. .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \
  1306. .vsel_reg = S2MPS13_REG_B1OUT + (num - 1) * 2, \
  1307. .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
  1308. .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \
  1309. .enable_mask = S2MPS14_ENABLE_MASK \
  1310. }
  1311. #define regulator_desc_s2mps13_buck7(num, min, step, min_sel) { \
  1312. .name = "BUCK"#num, \
  1313. .id = S2MPS13_BUCK##num, \
  1314. .of_match = of_match_ptr("BUCK"#num), \
  1315. .regulators_node = of_match_ptr("regulators"), \
  1316. .ops = &s2mps14_reg_ops, \
  1317. .type = REGULATOR_VOLTAGE, \
  1318. .owner = THIS_MODULE, \
  1319. .min_uV = min, \
  1320. .uV_step = step, \
  1321. .linear_min_sel = min_sel, \
  1322. .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
  1323. .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \
  1324. .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \
  1325. .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
  1326. .enable_reg = S2MPS13_REG_B1CTRL + (num - 1) * 2, \
  1327. .enable_mask = S2MPS14_ENABLE_MASK \
  1328. }
  1329. #define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) { \
  1330. .name = "BUCK"#num, \
  1331. .id = S2MPS13_BUCK##num, \
  1332. .of_match = of_match_ptr("BUCK"#num), \
  1333. .regulators_node = of_match_ptr("regulators"), \
  1334. .ops = &s2mps14_reg_ops, \
  1335. .type = REGULATOR_VOLTAGE, \
  1336. .owner = THIS_MODULE, \
  1337. .min_uV = min, \
  1338. .uV_step = step, \
  1339. .linear_min_sel = min_sel, \
  1340. .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
  1341. .ramp_delay = S2MPS13_BUCK_RAMP_DELAY, \
  1342. .vsel_reg = S2MPS13_REG_B1OUT + (num) * 2 - 1, \
  1343. .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
  1344. .enable_reg = S2MPS13_REG_B1CTRL + (num) * 2 - 1, \
  1345. .enable_mask = S2MPS14_ENABLE_MASK \
  1346. }
  1347. static const struct regulator_desc s2mps13_regulators[] = {
  1348. regulator_desc_s2mps13_ldo(1, MIN_800_MV, STEP_12_5_MV, 0x00),
  1349. regulator_desc_s2mps13_ldo(2, MIN_1400_MV, STEP_50_MV, 0x0C),
  1350. regulator_desc_s2mps13_ldo(3, MIN_1000_MV, STEP_25_MV, 0x08),
  1351. regulator_desc_s2mps13_ldo(4, MIN_800_MV, STEP_12_5_MV, 0x00),
  1352. regulator_desc_s2mps13_ldo(5, MIN_800_MV, STEP_12_5_MV, 0x00),
  1353. regulator_desc_s2mps13_ldo(6, MIN_800_MV, STEP_12_5_MV, 0x00),
  1354. regulator_desc_s2mps13_ldo(7, MIN_1000_MV, STEP_25_MV, 0x08),
  1355. regulator_desc_s2mps13_ldo(8, MIN_1000_MV, STEP_25_MV, 0x08),
  1356. regulator_desc_s2mps13_ldo(9, MIN_1000_MV, STEP_25_MV, 0x08),
  1357. regulator_desc_s2mps13_ldo(10, MIN_1400_MV, STEP_50_MV, 0x0C),
  1358. regulator_desc_s2mps13_ldo(11, MIN_800_MV, STEP_25_MV, 0x10),
  1359. regulator_desc_s2mps13_ldo(12, MIN_800_MV, STEP_25_MV, 0x10),
  1360. regulator_desc_s2mps13_ldo(13, MIN_800_MV, STEP_25_MV, 0x10),
  1361. regulator_desc_s2mps13_ldo(14, MIN_800_MV, STEP_12_5_MV, 0x00),
  1362. regulator_desc_s2mps13_ldo(15, MIN_800_MV, STEP_12_5_MV, 0x00),
  1363. regulator_desc_s2mps13_ldo(16, MIN_1400_MV, STEP_50_MV, 0x0C),
  1364. regulator_desc_s2mps13_ldo(17, MIN_1400_MV, STEP_50_MV, 0x0C),
  1365. regulator_desc_s2mps13_ldo(18, MIN_1000_MV, STEP_25_MV, 0x08),
  1366. regulator_desc_s2mps13_ldo(19, MIN_1000_MV, STEP_25_MV, 0x08),
  1367. regulator_desc_s2mps13_ldo(20, MIN_1400_MV, STEP_50_MV, 0x0C),
  1368. regulator_desc_s2mps13_ldo(21, MIN_1000_MV, STEP_25_MV, 0x08),
  1369. regulator_desc_s2mps13_ldo(22, MIN_1000_MV, STEP_25_MV, 0x08),
  1370. regulator_desc_s2mps13_ldo(23, MIN_800_MV, STEP_12_5_MV, 0x00),
  1371. regulator_desc_s2mps13_ldo(24, MIN_800_MV, STEP_12_5_MV, 0x00),
  1372. regulator_desc_s2mps13_ldo(25, MIN_1400_MV, STEP_50_MV, 0x0C),
  1373. regulator_desc_s2mps13_ldo(26, MIN_1400_MV, STEP_50_MV, 0x0C),
  1374. regulator_desc_s2mps13_ldo(27, MIN_1400_MV, STEP_50_MV, 0x0C),
  1375. regulator_desc_s2mps13_ldo(28, MIN_1000_MV, STEP_25_MV, 0x08),
  1376. regulator_desc_s2mps13_ldo(29, MIN_1400_MV, STEP_50_MV, 0x0C),
  1377. regulator_desc_s2mps13_ldo(30, MIN_1400_MV, STEP_50_MV, 0x0C),
  1378. regulator_desc_s2mps13_ldo(31, MIN_1000_MV, STEP_25_MV, 0x08),
  1379. regulator_desc_s2mps13_ldo(32, MIN_1000_MV, STEP_25_MV, 0x08),
  1380. regulator_desc_s2mps13_ldo(33, MIN_1400_MV, STEP_50_MV, 0x0C),
  1381. regulator_desc_s2mps13_ldo(34, MIN_1000_MV, STEP_25_MV, 0x08),
  1382. regulator_desc_s2mps13_ldo(35, MIN_1400_MV, STEP_50_MV, 0x0C),
  1383. regulator_desc_s2mps13_ldo(36, MIN_800_MV, STEP_12_5_MV, 0x00),
  1384. regulator_desc_s2mps13_ldo(37, MIN_1000_MV, STEP_25_MV, 0x08),
  1385. regulator_desc_s2mps13_ldo(38, MIN_1400_MV, STEP_50_MV, 0x0C),
  1386. regulator_desc_s2mps13_ldo(39, MIN_1000_MV, STEP_25_MV, 0x08),
  1387. regulator_desc_s2mps13_ldo(40, MIN_1400_MV, STEP_50_MV, 0x0C),
  1388. regulator_desc_s2mps13_buck(1, MIN_500_MV, STEP_6_25_MV, 0x10),
  1389. regulator_desc_s2mps13_buck(2, MIN_500_MV, STEP_6_25_MV, 0x10),
  1390. regulator_desc_s2mps13_buck(3, MIN_500_MV, STEP_6_25_MV, 0x10),
  1391. regulator_desc_s2mps13_buck(4, MIN_500_MV, STEP_6_25_MV, 0x10),
  1392. regulator_desc_s2mps13_buck(5, MIN_500_MV, STEP_6_25_MV, 0x10),
  1393. regulator_desc_s2mps13_buck(6, MIN_500_MV, STEP_6_25_MV, 0x10),
  1394. regulator_desc_s2mps13_buck7(7, MIN_500_MV, STEP_6_25_MV, 0x10),
  1395. regulator_desc_s2mps13_buck8_10(8, MIN_1000_MV, STEP_12_5_MV, 0x20),
  1396. regulator_desc_s2mps13_buck8_10(9, MIN_1000_MV, STEP_12_5_MV, 0x20),
  1397. regulator_desc_s2mps13_buck8_10(10, MIN_500_MV, STEP_6_25_MV, 0x10),
  1398. };
  1399. static const struct regulator_ops s2mps14_reg_ops = {
  1400. .list_voltage = regulator_list_voltage_linear,
  1401. .map_voltage = regulator_map_voltage_linear,
  1402. .is_enabled = regulator_is_enabled_regmap,
  1403. .enable = s2mps11_regulator_enable,
  1404. .disable = regulator_disable_regmap,
  1405. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1406. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1407. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  1408. .set_suspend_disable = s2mps11_regulator_set_suspend_disable,
  1409. };
  1410. #define regulator_desc_s2mps14_ldo(num, min, step) { \
  1411. .name = "LDO"#num, \
  1412. .id = S2MPS14_LDO##num, \
  1413. .of_match = of_match_ptr("LDO"#num), \
  1414. .regulators_node = of_match_ptr("regulators"), \
  1415. .of_parse_cb = s2mps11_of_parse_cb, \
  1416. .ops = &s2mps14_reg_ops, \
  1417. .type = REGULATOR_VOLTAGE, \
  1418. .owner = THIS_MODULE, \
  1419. .min_uV = min, \
  1420. .uV_step = step, \
  1421. .n_voltages = S2MPS14_LDO_N_VOLTAGES, \
  1422. .vsel_reg = S2MPS14_REG_L1CTRL + num - 1, \
  1423. .vsel_mask = S2MPS14_LDO_VSEL_MASK, \
  1424. .enable_reg = S2MPS14_REG_L1CTRL + num - 1, \
  1425. .enable_mask = S2MPS14_ENABLE_MASK \
  1426. }
  1427. #define regulator_desc_s2mps14_buck(num, min, step, min_sel) { \
  1428. .name = "BUCK"#num, \
  1429. .id = S2MPS14_BUCK##num, \
  1430. .of_match = of_match_ptr("BUCK"#num), \
  1431. .regulators_node = of_match_ptr("regulators"), \
  1432. .of_parse_cb = s2mps11_of_parse_cb, \
  1433. .ops = &s2mps14_reg_ops, \
  1434. .type = REGULATOR_VOLTAGE, \
  1435. .owner = THIS_MODULE, \
  1436. .min_uV = min, \
  1437. .uV_step = step, \
  1438. .n_voltages = S2MPS14_BUCK_N_VOLTAGES, \
  1439. .linear_min_sel = min_sel, \
  1440. .ramp_delay = S2MPS14_BUCK_RAMP_DELAY, \
  1441. .vsel_reg = S2MPS14_REG_B1CTRL2 + (num - 1) * 2, \
  1442. .vsel_mask = S2MPS14_BUCK_VSEL_MASK, \
  1443. .enable_reg = S2MPS14_REG_B1CTRL1 + (num - 1) * 2, \
  1444. .enable_mask = S2MPS14_ENABLE_MASK \
  1445. }
  1446. static const struct regulator_desc s2mps14_regulators[] = {
  1447. regulator_desc_s2mps14_ldo(1, MIN_800_MV, STEP_12_5_MV),
  1448. regulator_desc_s2mps14_ldo(2, MIN_800_MV, STEP_12_5_MV),
  1449. regulator_desc_s2mps14_ldo(3, MIN_800_MV, STEP_25_MV),
  1450. regulator_desc_s2mps14_ldo(4, MIN_800_MV, STEP_25_MV),
  1451. regulator_desc_s2mps14_ldo(5, MIN_800_MV, STEP_12_5_MV),
  1452. regulator_desc_s2mps14_ldo(6, MIN_800_MV, STEP_12_5_MV),
  1453. regulator_desc_s2mps14_ldo(7, MIN_800_MV, STEP_25_MV),
  1454. regulator_desc_s2mps14_ldo(8, MIN_1800_MV, STEP_25_MV),
  1455. regulator_desc_s2mps14_ldo(9, MIN_800_MV, STEP_12_5_MV),
  1456. regulator_desc_s2mps14_ldo(10, MIN_800_MV, STEP_12_5_MV),
  1457. regulator_desc_s2mps14_ldo(11, MIN_800_MV, STEP_25_MV),
  1458. regulator_desc_s2mps14_ldo(12, MIN_1800_MV, STEP_25_MV),
  1459. regulator_desc_s2mps14_ldo(13, MIN_1800_MV, STEP_25_MV),
  1460. regulator_desc_s2mps14_ldo(14, MIN_1800_MV, STEP_25_MV),
  1461. regulator_desc_s2mps14_ldo(15, MIN_1800_MV, STEP_25_MV),
  1462. regulator_desc_s2mps14_ldo(16, MIN_1800_MV, STEP_25_MV),
  1463. regulator_desc_s2mps14_ldo(17, MIN_1800_MV, STEP_25_MV),
  1464. regulator_desc_s2mps14_ldo(18, MIN_1800_MV, STEP_25_MV),
  1465. regulator_desc_s2mps14_ldo(19, MIN_800_MV, STEP_25_MV),
  1466. regulator_desc_s2mps14_ldo(20, MIN_800_MV, STEP_25_MV),
  1467. regulator_desc_s2mps14_ldo(21, MIN_800_MV, STEP_25_MV),
  1468. regulator_desc_s2mps14_ldo(22, MIN_800_MV, STEP_12_5_MV),
  1469. regulator_desc_s2mps14_ldo(23, MIN_800_MV, STEP_25_MV),
  1470. regulator_desc_s2mps14_ldo(24, MIN_1800_MV, STEP_25_MV),
  1471. regulator_desc_s2mps14_ldo(25, MIN_1800_MV, STEP_25_MV),
  1472. regulator_desc_s2mps14_buck(1, MIN_600_MV, STEP_6_25_MV,
  1473. S2MPS14_BUCK1235_START_SEL),
  1474. regulator_desc_s2mps14_buck(2, MIN_600_MV, STEP_6_25_MV,
  1475. S2MPS14_BUCK1235_START_SEL),
  1476. regulator_desc_s2mps14_buck(3, MIN_600_MV, STEP_6_25_MV,
  1477. S2MPS14_BUCK1235_START_SEL),
  1478. regulator_desc_s2mps14_buck(4, MIN_1400_MV, STEP_12_5_MV,
  1479. S2MPS14_BUCK4_START_SEL),
  1480. regulator_desc_s2mps14_buck(5, MIN_600_MV, STEP_6_25_MV,
  1481. S2MPS14_BUCK1235_START_SEL),
  1482. };
  1483. static const struct regulator_ops s2mps15_reg_ldo_ops = {
  1484. .list_voltage = regulator_list_voltage_linear_range,
  1485. .map_voltage = regulator_map_voltage_linear_range,
  1486. .is_enabled = regulator_is_enabled_regmap,
  1487. .enable = regulator_enable_regmap,
  1488. .disable = regulator_disable_regmap,
  1489. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1490. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1491. };
  1492. static const struct regulator_ops s2mps15_reg_buck_ops = {
  1493. .list_voltage = regulator_list_voltage_linear_range,
  1494. .map_voltage = regulator_map_voltage_linear_range,
  1495. .is_enabled = regulator_is_enabled_regmap,
  1496. .enable = regulator_enable_regmap,
  1497. .disable = regulator_disable_regmap,
  1498. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1499. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1500. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  1501. };
  1502. #define regulator_desc_s2mps15_ldo(num, range) { \
  1503. .name = "LDO"#num, \
  1504. .id = S2MPS15_LDO##num, \
  1505. .of_match = of_match_ptr("LDO"#num), \
  1506. .regulators_node = of_match_ptr("regulators"), \
  1507. .ops = &s2mps15_reg_ldo_ops, \
  1508. .type = REGULATOR_VOLTAGE, \
  1509. .owner = THIS_MODULE, \
  1510. .linear_ranges = range, \
  1511. .n_linear_ranges = ARRAY_SIZE(range), \
  1512. .n_voltages = S2MPS15_LDO_N_VOLTAGES, \
  1513. .vsel_reg = S2MPS15_REG_L1CTRL + num - 1, \
  1514. .vsel_mask = S2MPS15_LDO_VSEL_MASK, \
  1515. .enable_reg = S2MPS15_REG_L1CTRL + num - 1, \
  1516. .enable_mask = S2MPS15_ENABLE_MASK \
  1517. }
  1518. #define regulator_desc_s2mps15_buck(num, range) { \
  1519. .name = "BUCK"#num, \
  1520. .id = S2MPS15_BUCK##num, \
  1521. .of_match = of_match_ptr("BUCK"#num), \
  1522. .regulators_node = of_match_ptr("regulators"), \
  1523. .ops = &s2mps15_reg_buck_ops, \
  1524. .type = REGULATOR_VOLTAGE, \
  1525. .owner = THIS_MODULE, \
  1526. .linear_ranges = range, \
  1527. .n_linear_ranges = ARRAY_SIZE(range), \
  1528. .ramp_delay = 12500, \
  1529. .n_voltages = S2MPS15_BUCK_N_VOLTAGES, \
  1530. .vsel_reg = S2MPS15_REG_B1CTRL2 + ((num - 1) * 2), \
  1531. .vsel_mask = S2MPS15_BUCK_VSEL_MASK, \
  1532. .enable_reg = S2MPS15_REG_B1CTRL1 + ((num - 1) * 2), \
  1533. .enable_mask = S2MPS15_ENABLE_MASK \
  1534. }
  1535. /* voltage range for s2mps15 LDO 3, 5, 15, 16, 18, 20, 23 and 27 */
  1536. static const struct linear_range s2mps15_ldo_voltage_ranges1[] = {
  1537. REGULATOR_LINEAR_RANGE(1000000, 0xc, 0x38, 25000),
  1538. };
  1539. /* voltage range for s2mps15 LDO 2, 6, 14, 17, 19, 21, 24 and 25 */
  1540. static const struct linear_range s2mps15_ldo_voltage_ranges2[] = {
  1541. REGULATOR_LINEAR_RANGE(1800000, 0x0, 0x3f, 25000),
  1542. };
  1543. /* voltage range for s2mps15 LDO 4, 11, 12, 13, 22 and 26 */
  1544. static const struct linear_range s2mps15_ldo_voltage_ranges3[] = {
  1545. REGULATOR_LINEAR_RANGE(700000, 0x0, 0x34, 12500),
  1546. };
  1547. /* voltage range for s2mps15 LDO 7, 8, 9 and 10 */
  1548. static const struct linear_range s2mps15_ldo_voltage_ranges4[] = {
  1549. REGULATOR_LINEAR_RANGE(700000, 0x10, 0x20, 25000),
  1550. };
  1551. /* voltage range for s2mps15 LDO 1 */
  1552. static const struct linear_range s2mps15_ldo_voltage_ranges5[] = {
  1553. REGULATOR_LINEAR_RANGE(500000, 0x0, 0x20, 12500),
  1554. };
  1555. /* voltage range for s2mps15 BUCK 1, 2, 3, 4, 5, 6 and 7 */
  1556. static const struct linear_range s2mps15_buck_voltage_ranges1[] = {
  1557. REGULATOR_LINEAR_RANGE(500000, 0x20, 0xc0, 6250),
  1558. };
  1559. /* voltage range for s2mps15 BUCK 8, 9 and 10 */
  1560. static const struct linear_range s2mps15_buck_voltage_ranges2[] = {
  1561. REGULATOR_LINEAR_RANGE(1000000, 0x20, 0x78, 12500),
  1562. };
  1563. static const struct regulator_desc s2mps15_regulators[] = {
  1564. regulator_desc_s2mps15_ldo(1, s2mps15_ldo_voltage_ranges5),
  1565. regulator_desc_s2mps15_ldo(2, s2mps15_ldo_voltage_ranges2),
  1566. regulator_desc_s2mps15_ldo(3, s2mps15_ldo_voltage_ranges1),
  1567. regulator_desc_s2mps15_ldo(4, s2mps15_ldo_voltage_ranges3),
  1568. regulator_desc_s2mps15_ldo(5, s2mps15_ldo_voltage_ranges1),
  1569. regulator_desc_s2mps15_ldo(6, s2mps15_ldo_voltage_ranges2),
  1570. regulator_desc_s2mps15_ldo(7, s2mps15_ldo_voltage_ranges4),
  1571. regulator_desc_s2mps15_ldo(8, s2mps15_ldo_voltage_ranges4),
  1572. regulator_desc_s2mps15_ldo(9, s2mps15_ldo_voltage_ranges4),
  1573. regulator_desc_s2mps15_ldo(10, s2mps15_ldo_voltage_ranges4),
  1574. regulator_desc_s2mps15_ldo(11, s2mps15_ldo_voltage_ranges3),
  1575. regulator_desc_s2mps15_ldo(12, s2mps15_ldo_voltage_ranges3),
  1576. regulator_desc_s2mps15_ldo(13, s2mps15_ldo_voltage_ranges3),
  1577. regulator_desc_s2mps15_ldo(14, s2mps15_ldo_voltage_ranges2),
  1578. regulator_desc_s2mps15_ldo(15, s2mps15_ldo_voltage_ranges1),
  1579. regulator_desc_s2mps15_ldo(16, s2mps15_ldo_voltage_ranges1),
  1580. regulator_desc_s2mps15_ldo(17, s2mps15_ldo_voltage_ranges2),
  1581. regulator_desc_s2mps15_ldo(18, s2mps15_ldo_voltage_ranges1),
  1582. regulator_desc_s2mps15_ldo(19, s2mps15_ldo_voltage_ranges2),
  1583. regulator_desc_s2mps15_ldo(20, s2mps15_ldo_voltage_ranges1),
  1584. regulator_desc_s2mps15_ldo(21, s2mps15_ldo_voltage_ranges2),
  1585. regulator_desc_s2mps15_ldo(22, s2mps15_ldo_voltage_ranges3),
  1586. regulator_desc_s2mps15_ldo(23, s2mps15_ldo_voltage_ranges1),
  1587. regulator_desc_s2mps15_ldo(24, s2mps15_ldo_voltage_ranges2),
  1588. regulator_desc_s2mps15_ldo(25, s2mps15_ldo_voltage_ranges2),
  1589. regulator_desc_s2mps15_ldo(26, s2mps15_ldo_voltage_ranges3),
  1590. regulator_desc_s2mps15_ldo(27, s2mps15_ldo_voltage_ranges1),
  1591. regulator_desc_s2mps15_buck(1, s2mps15_buck_voltage_ranges1),
  1592. regulator_desc_s2mps15_buck(2, s2mps15_buck_voltage_ranges1),
  1593. regulator_desc_s2mps15_buck(3, s2mps15_buck_voltage_ranges1),
  1594. regulator_desc_s2mps15_buck(4, s2mps15_buck_voltage_ranges1),
  1595. regulator_desc_s2mps15_buck(5, s2mps15_buck_voltage_ranges1),
  1596. regulator_desc_s2mps15_buck(6, s2mps15_buck_voltage_ranges1),
  1597. regulator_desc_s2mps15_buck(7, s2mps15_buck_voltage_ranges1),
  1598. regulator_desc_s2mps15_buck(8, s2mps15_buck_voltage_ranges2),
  1599. regulator_desc_s2mps15_buck(9, s2mps15_buck_voltage_ranges2),
  1600. regulator_desc_s2mps15_buck(10, s2mps15_buck_voltage_ranges2),
  1601. };
  1602. static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11,
  1603. struct regulator_dev *rdev)
  1604. {
  1605. int ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
  1606. rdev->desc->enable_mask,
  1607. S2MPS14_ENABLE_EXT_CONTROL);
  1608. if (ret < 0)
  1609. return dev_err_probe(rdev_get_dev(rdev), ret,
  1610. "failed to enable GPIO control over %d/%s\n",
  1611. rdev->desc->id, rdev->desc->name);
  1612. return 0;
  1613. }
  1614. static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
  1615. {
  1616. unsigned int ramp_val, ramp_shift, ramp_reg;
  1617. int rdev_id = rdev_get_id(rdev);
  1618. switch (rdev_id) {
  1619. case S2MPU02_BUCK1:
  1620. ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT;
  1621. break;
  1622. case S2MPU02_BUCK2:
  1623. ramp_shift = S2MPU02_BUCK2_RAMP_SHIFT;
  1624. break;
  1625. case S2MPU02_BUCK3:
  1626. ramp_shift = S2MPU02_BUCK3_RAMP_SHIFT;
  1627. break;
  1628. case S2MPU02_BUCK4:
  1629. ramp_shift = S2MPU02_BUCK4_RAMP_SHIFT;
  1630. break;
  1631. default:
  1632. return 0;
  1633. }
  1634. ramp_reg = S2MPU02_REG_RAMP1;
  1635. ramp_val = get_ramp_delay(ramp_delay);
  1636. return regmap_update_bits(rdev->regmap, ramp_reg,
  1637. S2MPU02_BUCK1234_RAMP_MASK << ramp_shift,
  1638. ramp_val << ramp_shift);
  1639. }
  1640. static const struct regulator_ops s2mpu02_ldo_ops = {
  1641. .list_voltage = regulator_list_voltage_linear,
  1642. .map_voltage = regulator_map_voltage_linear,
  1643. .is_enabled = regulator_is_enabled_regmap,
  1644. .enable = s2mps11_regulator_enable,
  1645. .disable = regulator_disable_regmap,
  1646. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1647. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1648. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  1649. .set_suspend_disable = s2mps11_regulator_set_suspend_disable,
  1650. };
  1651. static const struct regulator_ops s2mpu02_buck_ops = {
  1652. .list_voltage = regulator_list_voltage_linear,
  1653. .map_voltage = regulator_map_voltage_linear,
  1654. .is_enabled = regulator_is_enabled_regmap,
  1655. .enable = s2mps11_regulator_enable,
  1656. .disable = regulator_disable_regmap,
  1657. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  1658. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  1659. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  1660. .set_suspend_disable = s2mps11_regulator_set_suspend_disable,
  1661. .set_ramp_delay = s2mpu02_set_ramp_delay,
  1662. };
  1663. #define regulator_desc_s2mpu02_ldo1(num) { \
  1664. .name = "LDO"#num, \
  1665. .id = S2MPU02_LDO##num, \
  1666. .of_match = of_match_ptr("LDO"#num), \
  1667. .regulators_node = of_match_ptr("regulators"), \
  1668. .ops = &s2mpu02_ldo_ops, \
  1669. .type = REGULATOR_VOLTAGE, \
  1670. .owner = THIS_MODULE, \
  1671. .min_uV = S2MPU02_LDO_MIN_900MV, \
  1672. .uV_step = S2MPU02_LDO_STEP_12_5MV, \
  1673. .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \
  1674. .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
  1675. .vsel_reg = S2MPU02_REG_L1CTRL, \
  1676. .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
  1677. .enable_reg = S2MPU02_REG_L1CTRL, \
  1678. .enable_mask = S2MPU02_ENABLE_MASK \
  1679. }
  1680. #define regulator_desc_s2mpu02_ldo2(num) { \
  1681. .name = "LDO"#num, \
  1682. .id = S2MPU02_LDO##num, \
  1683. .of_match = of_match_ptr("LDO"#num), \
  1684. .regulators_node = of_match_ptr("regulators"), \
  1685. .ops = &s2mpu02_ldo_ops, \
  1686. .type = REGULATOR_VOLTAGE, \
  1687. .owner = THIS_MODULE, \
  1688. .min_uV = S2MPU02_LDO_MIN_1050MV, \
  1689. .uV_step = S2MPU02_LDO_STEP_25MV, \
  1690. .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \
  1691. .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
  1692. .vsel_reg = S2MPU02_REG_L2CTRL1, \
  1693. .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
  1694. .enable_reg = S2MPU02_REG_L2CTRL1, \
  1695. .enable_mask = S2MPU02_ENABLE_MASK \
  1696. }
  1697. #define regulator_desc_s2mpu02_ldo3(num) { \
  1698. .name = "LDO"#num, \
  1699. .id = S2MPU02_LDO##num, \
  1700. .of_match = of_match_ptr("LDO"#num), \
  1701. .regulators_node = of_match_ptr("regulators"), \
  1702. .ops = &s2mpu02_ldo_ops, \
  1703. .type = REGULATOR_VOLTAGE, \
  1704. .owner = THIS_MODULE, \
  1705. .min_uV = S2MPU02_LDO_MIN_900MV, \
  1706. .uV_step = S2MPU02_LDO_STEP_12_5MV, \
  1707. .linear_min_sel = S2MPU02_LDO_GROUP1_START_SEL, \
  1708. .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
  1709. .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \
  1710. .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
  1711. .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \
  1712. .enable_mask = S2MPU02_ENABLE_MASK \
  1713. }
  1714. #define regulator_desc_s2mpu02_ldo4(num) { \
  1715. .name = "LDO"#num, \
  1716. .id = S2MPU02_LDO##num, \
  1717. .of_match = of_match_ptr("LDO"#num), \
  1718. .regulators_node = of_match_ptr("regulators"), \
  1719. .ops = &s2mpu02_ldo_ops, \
  1720. .type = REGULATOR_VOLTAGE, \
  1721. .owner = THIS_MODULE, \
  1722. .min_uV = S2MPU02_LDO_MIN_1050MV, \
  1723. .uV_step = S2MPU02_LDO_STEP_25MV, \
  1724. .linear_min_sel = S2MPU02_LDO_GROUP2_START_SEL, \
  1725. .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
  1726. .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \
  1727. .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
  1728. .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \
  1729. .enable_mask = S2MPU02_ENABLE_MASK \
  1730. }
  1731. #define regulator_desc_s2mpu02_ldo5(num) { \
  1732. .name = "LDO"#num, \
  1733. .id = S2MPU02_LDO##num, \
  1734. .of_match = of_match_ptr("LDO"#num), \
  1735. .regulators_node = of_match_ptr("regulators"), \
  1736. .ops = &s2mpu02_ldo_ops, \
  1737. .type = REGULATOR_VOLTAGE, \
  1738. .owner = THIS_MODULE, \
  1739. .min_uV = S2MPU02_LDO_MIN_1600MV, \
  1740. .uV_step = S2MPU02_LDO_STEP_50MV, \
  1741. .linear_min_sel = S2MPU02_LDO_GROUP3_START_SEL, \
  1742. .n_voltages = S2MPU02_LDO_N_VOLTAGES, \
  1743. .vsel_reg = S2MPU02_REG_L3CTRL + num - 3, \
  1744. .vsel_mask = S2MPU02_LDO_VSEL_MASK, \
  1745. .enable_reg = S2MPU02_REG_L3CTRL + num - 3, \
  1746. .enable_mask = S2MPU02_ENABLE_MASK \
  1747. }
  1748. #define regulator_desc_s2mpu02_buck1234(num) { \
  1749. .name = "BUCK"#num, \
  1750. .id = S2MPU02_BUCK##num, \
  1751. .of_match = of_match_ptr("BUCK"#num), \
  1752. .regulators_node = of_match_ptr("regulators"), \
  1753. .ops = &s2mpu02_buck_ops, \
  1754. .type = REGULATOR_VOLTAGE, \
  1755. .owner = THIS_MODULE, \
  1756. .min_uV = S2MPU02_BUCK1234_MIN_600MV, \
  1757. .uV_step = S2MPU02_BUCK1234_STEP_6_25MV, \
  1758. .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
  1759. .linear_min_sel = S2MPU02_BUCK1234_START_SEL, \
  1760. .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
  1761. .vsel_reg = S2MPU02_REG_B1CTRL2 + (num - 1) * 2, \
  1762. .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
  1763. .enable_reg = S2MPU02_REG_B1CTRL1 + (num - 1) * 2, \
  1764. .enable_mask = S2MPU02_ENABLE_MASK \
  1765. }
  1766. #define regulator_desc_s2mpu02_buck5(num) { \
  1767. .name = "BUCK"#num, \
  1768. .id = S2MPU02_BUCK##num, \
  1769. .of_match = of_match_ptr("BUCK"#num), \
  1770. .regulators_node = of_match_ptr("regulators"), \
  1771. .ops = &s2mpu02_ldo_ops, \
  1772. .type = REGULATOR_VOLTAGE, \
  1773. .owner = THIS_MODULE, \
  1774. .min_uV = S2MPU02_BUCK5_MIN_1081_25MV, \
  1775. .uV_step = S2MPU02_BUCK5_STEP_6_25MV, \
  1776. .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
  1777. .linear_min_sel = S2MPU02_BUCK5_START_SEL, \
  1778. .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
  1779. .vsel_reg = S2MPU02_REG_B5CTRL2, \
  1780. .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
  1781. .enable_reg = S2MPU02_REG_B5CTRL1, \
  1782. .enable_mask = S2MPU02_ENABLE_MASK \
  1783. }
  1784. #define regulator_desc_s2mpu02_buck6(num) { \
  1785. .name = "BUCK"#num, \
  1786. .id = S2MPU02_BUCK##num, \
  1787. .of_match = of_match_ptr("BUCK"#num), \
  1788. .regulators_node = of_match_ptr("regulators"), \
  1789. .ops = &s2mpu02_ldo_ops, \
  1790. .type = REGULATOR_VOLTAGE, \
  1791. .owner = THIS_MODULE, \
  1792. .min_uV = S2MPU02_BUCK6_MIN_1700MV, \
  1793. .uV_step = S2MPU02_BUCK6_STEP_2_50MV, \
  1794. .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
  1795. .linear_min_sel = S2MPU02_BUCK6_START_SEL, \
  1796. .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
  1797. .vsel_reg = S2MPU02_REG_B6CTRL2, \
  1798. .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
  1799. .enable_reg = S2MPU02_REG_B6CTRL1, \
  1800. .enable_mask = S2MPU02_ENABLE_MASK \
  1801. }
  1802. #define regulator_desc_s2mpu02_buck7(num) { \
  1803. .name = "BUCK"#num, \
  1804. .id = S2MPU02_BUCK##num, \
  1805. .of_match = of_match_ptr("BUCK"#num), \
  1806. .regulators_node = of_match_ptr("regulators"), \
  1807. .ops = &s2mpu02_ldo_ops, \
  1808. .type = REGULATOR_VOLTAGE, \
  1809. .owner = THIS_MODULE, \
  1810. .min_uV = S2MPU02_BUCK7_MIN_900MV, \
  1811. .uV_step = S2MPU02_BUCK7_STEP_6_25MV, \
  1812. .n_voltages = S2MPU02_BUCK_N_VOLTAGES, \
  1813. .linear_min_sel = S2MPU02_BUCK7_START_SEL, \
  1814. .ramp_delay = S2MPU02_BUCK_RAMP_DELAY, \
  1815. .vsel_reg = S2MPU02_REG_B7CTRL2, \
  1816. .vsel_mask = S2MPU02_BUCK_VSEL_MASK, \
  1817. .enable_reg = S2MPU02_REG_B7CTRL1, \
  1818. .enable_mask = S2MPU02_ENABLE_MASK \
  1819. }
  1820. static const struct regulator_desc s2mpu02_regulators[] = {
  1821. regulator_desc_s2mpu02_ldo1(1),
  1822. regulator_desc_s2mpu02_ldo2(2),
  1823. regulator_desc_s2mpu02_ldo4(3),
  1824. regulator_desc_s2mpu02_ldo5(4),
  1825. regulator_desc_s2mpu02_ldo4(5),
  1826. regulator_desc_s2mpu02_ldo3(6),
  1827. regulator_desc_s2mpu02_ldo3(7),
  1828. regulator_desc_s2mpu02_ldo4(8),
  1829. regulator_desc_s2mpu02_ldo5(9),
  1830. regulator_desc_s2mpu02_ldo3(10),
  1831. regulator_desc_s2mpu02_ldo4(11),
  1832. regulator_desc_s2mpu02_ldo5(12),
  1833. regulator_desc_s2mpu02_ldo5(13),
  1834. regulator_desc_s2mpu02_ldo5(14),
  1835. regulator_desc_s2mpu02_ldo5(15),
  1836. regulator_desc_s2mpu02_ldo5(16),
  1837. regulator_desc_s2mpu02_ldo4(17),
  1838. regulator_desc_s2mpu02_ldo5(18),
  1839. regulator_desc_s2mpu02_ldo3(19),
  1840. regulator_desc_s2mpu02_ldo4(20),
  1841. regulator_desc_s2mpu02_ldo5(21),
  1842. regulator_desc_s2mpu02_ldo5(22),
  1843. regulator_desc_s2mpu02_ldo5(23),
  1844. regulator_desc_s2mpu02_ldo4(24),
  1845. regulator_desc_s2mpu02_ldo5(25),
  1846. regulator_desc_s2mpu02_ldo4(26),
  1847. regulator_desc_s2mpu02_ldo5(27),
  1848. regulator_desc_s2mpu02_ldo5(28),
  1849. regulator_desc_s2mpu02_buck1234(1),
  1850. regulator_desc_s2mpu02_buck1234(2),
  1851. regulator_desc_s2mpu02_buck1234(3),
  1852. regulator_desc_s2mpu02_buck1234(4),
  1853. regulator_desc_s2mpu02_buck5(5),
  1854. regulator_desc_s2mpu02_buck6(6),
  1855. regulator_desc_s2mpu02_buck7(7),
  1856. };
  1857. #define regulator_desc_s2mpu05_ldo_reg(num, min, step, reg) { \
  1858. .name = "ldo"#num, \
  1859. .id = S2MPU05_LDO##num, \
  1860. .of_match = of_match_ptr("ldo"#num), \
  1861. .regulators_node = of_match_ptr("regulators"), \
  1862. .ops = &s2mpu02_ldo_ops, \
  1863. .type = REGULATOR_VOLTAGE, \
  1864. .owner = THIS_MODULE, \
  1865. .min_uV = min, \
  1866. .uV_step = step, \
  1867. .n_voltages = S2MPU05_LDO_N_VOLTAGES, \
  1868. .vsel_reg = reg, \
  1869. .vsel_mask = S2MPU05_LDO_VSEL_MASK, \
  1870. .enable_reg = reg, \
  1871. .enable_mask = S2MPU05_ENABLE_MASK, \
  1872. .enable_time = S2MPU05_ENABLE_TIME_LDO \
  1873. }
  1874. #define regulator_desc_s2mpu05_ldo(num, reg, min, step) \
  1875. regulator_desc_s2mpu05_ldo_reg(num, min, step, S2MPU05_REG_L##num##reg)
  1876. #define regulator_desc_s2mpu05_ldo1(num, reg) \
  1877. regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP1)
  1878. #define regulator_desc_s2mpu05_ldo2(num, reg) \
  1879. regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN1, S2MPU05_LDO_STEP2)
  1880. #define regulator_desc_s2mpu05_ldo3(num, reg) \
  1881. regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN2, S2MPU05_LDO_STEP2)
  1882. #define regulator_desc_s2mpu05_ldo4(num, reg) \
  1883. regulator_desc_s2mpu05_ldo(num, reg, S2MPU05_LDO_MIN3, S2MPU05_LDO_STEP2)
  1884. #define regulator_desc_s2mpu05_buck(num, which) { \
  1885. .name = "buck"#num, \
  1886. .id = S2MPU05_BUCK##num, \
  1887. .of_match = of_match_ptr("buck"#num), \
  1888. .regulators_node = of_match_ptr("regulators"), \
  1889. .ops = &s2mpu02_buck_ops, \
  1890. .type = REGULATOR_VOLTAGE, \
  1891. .owner = THIS_MODULE, \
  1892. .min_uV = S2MPU05_BUCK_MIN##which, \
  1893. .uV_step = S2MPU05_BUCK_STEP##which, \
  1894. .n_voltages = S2MPU05_BUCK_N_VOLTAGES, \
  1895. .vsel_reg = S2MPU05_REG_B##num##CTRL2, \
  1896. .vsel_mask = S2MPU05_BUCK_VSEL_MASK, \
  1897. .enable_reg = S2MPU05_REG_B##num##CTRL1, \
  1898. .enable_mask = S2MPU05_ENABLE_MASK, \
  1899. .enable_time = S2MPU05_ENABLE_TIME_BUCK##num \
  1900. }
  1901. #define regulator_desc_s2mpu05_buck123(num) regulator_desc_s2mpu05_buck(num, 1)
  1902. #define regulator_desc_s2mpu05_buck45(num) regulator_desc_s2mpu05_buck(num, 2)
  1903. static const struct regulator_desc s2mpu05_regulators[] = {
  1904. regulator_desc_s2mpu05_ldo4(1, CTRL),
  1905. regulator_desc_s2mpu05_ldo3(2, CTRL),
  1906. regulator_desc_s2mpu05_ldo2(3, CTRL),
  1907. regulator_desc_s2mpu05_ldo1(4, CTRL),
  1908. regulator_desc_s2mpu05_ldo1(5, CTRL),
  1909. regulator_desc_s2mpu05_ldo1(6, CTRL),
  1910. regulator_desc_s2mpu05_ldo2(7, CTRL),
  1911. regulator_desc_s2mpu05_ldo3(8, CTRL),
  1912. regulator_desc_s2mpu05_ldo4(9, CTRL1),
  1913. regulator_desc_s2mpu05_ldo4(10, CTRL),
  1914. /* LDOs 11-24 are used for CP. They aren't documented. */
  1915. regulator_desc_s2mpu05_ldo2(25, CTRL),
  1916. regulator_desc_s2mpu05_ldo3(26, CTRL),
  1917. regulator_desc_s2mpu05_ldo2(27, CTRL),
  1918. regulator_desc_s2mpu05_ldo3(28, CTRL),
  1919. regulator_desc_s2mpu05_ldo3(29, CTRL),
  1920. regulator_desc_s2mpu05_ldo2(30, CTRL),
  1921. regulator_desc_s2mpu05_ldo3(31, CTRL),
  1922. regulator_desc_s2mpu05_ldo3(32, CTRL),
  1923. regulator_desc_s2mpu05_ldo3(33, CTRL),
  1924. regulator_desc_s2mpu05_ldo3(34, CTRL),
  1925. regulator_desc_s2mpu05_ldo3(35, CTRL),
  1926. regulator_desc_s2mpu05_buck123(1),
  1927. regulator_desc_s2mpu05_buck123(2),
  1928. regulator_desc_s2mpu05_buck123(3),
  1929. regulator_desc_s2mpu05_buck45(4),
  1930. regulator_desc_s2mpu05_buck45(5),
  1931. };
  1932. static int s2mps11_handle_ext_control(struct s2mps11_info *s2mps11,
  1933. struct regulator_dev *rdev)
  1934. {
  1935. int ret;
  1936. switch (s2mps11->dev_type) {
  1937. case S2MPS14X:
  1938. if (!rdev->ena_pin)
  1939. return 0;
  1940. ret = s2mps14_pmic_enable_ext_control(s2mps11, rdev);
  1941. break;
  1942. case S2MPG10:
  1943. case S2MPG11:
  1944. /*
  1945. * If desc.enable_val is != 0, then external control was
  1946. * requested. We can not test s2mpg10_desc::ext_control,
  1947. * because 0 is a valid value.
  1948. */
  1949. if (!rdev->desc->enable_val)
  1950. return 0;
  1951. ret = s2mpg10_enable_ext_control(s2mps11, rdev);
  1952. break;
  1953. default:
  1954. return 0;
  1955. }
  1956. return ret;
  1957. }
  1958. static int s2mps11_pmic_probe(struct platform_device *pdev)
  1959. {
  1960. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  1961. struct regulator_config config = { };
  1962. struct s2mps11_info *s2mps11;
  1963. unsigned int rdev_num;
  1964. int i, ret;
  1965. const struct regulator_desc *regulators;
  1966. const struct s2mpg10_regulator_desc *s2mpg1x_regulators = NULL;
  1967. s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info),
  1968. GFP_KERNEL);
  1969. if (!s2mps11)
  1970. return -ENOMEM;
  1971. s2mps11->dev_type = platform_get_device_id(pdev)->driver_data;
  1972. switch (s2mps11->dev_type) {
  1973. case S2MPG10:
  1974. rdev_num = ARRAY_SIZE(s2mpg10_regulators);
  1975. s2mpg1x_regulators = s2mpg10_regulators;
  1976. BUILD_BUG_ON(ARRAY_SIZE(s2mpg10_regulators) > S2MPS_REGULATOR_MAX);
  1977. break;
  1978. case S2MPG11:
  1979. rdev_num = ARRAY_SIZE(s2mpg11_regulators);
  1980. s2mpg1x_regulators = s2mpg11_regulators;
  1981. BUILD_BUG_ON(ARRAY_SIZE(s2mpg11_regulators) > S2MPS_REGULATOR_MAX);
  1982. break;
  1983. case S2MPS11X:
  1984. rdev_num = ARRAY_SIZE(s2mps11_regulators);
  1985. regulators = s2mps11_regulators;
  1986. BUILD_BUG_ON(ARRAY_SIZE(s2mps11_regulators) > S2MPS_REGULATOR_MAX);
  1987. break;
  1988. case S2MPS13X:
  1989. rdev_num = ARRAY_SIZE(s2mps13_regulators);
  1990. regulators = s2mps13_regulators;
  1991. BUILD_BUG_ON(ARRAY_SIZE(s2mps13_regulators) > S2MPS_REGULATOR_MAX);
  1992. break;
  1993. case S2MPS14X:
  1994. rdev_num = ARRAY_SIZE(s2mps14_regulators);
  1995. regulators = s2mps14_regulators;
  1996. BUILD_BUG_ON(ARRAY_SIZE(s2mps14_regulators) > S2MPS_REGULATOR_MAX);
  1997. break;
  1998. case S2MPS15X:
  1999. rdev_num = ARRAY_SIZE(s2mps15_regulators);
  2000. regulators = s2mps15_regulators;
  2001. BUILD_BUG_ON(ARRAY_SIZE(s2mps15_regulators) > S2MPS_REGULATOR_MAX);
  2002. break;
  2003. case S2MPU02:
  2004. rdev_num = ARRAY_SIZE(s2mpu02_regulators);
  2005. regulators = s2mpu02_regulators;
  2006. BUILD_BUG_ON(ARRAY_SIZE(s2mpu02_regulators) > S2MPS_REGULATOR_MAX);
  2007. break;
  2008. case S2MPU05:
  2009. rdev_num = ARRAY_SIZE(s2mpu05_regulators);
  2010. regulators = s2mpu05_regulators;
  2011. BUILD_BUG_ON(ARRAY_SIZE(s2mpu05_regulators) > S2MPS_REGULATOR_MAX);
  2012. break;
  2013. default:
  2014. return dev_err_probe(&pdev->dev, -ENODEV,
  2015. "Unsupported device type %d\n",
  2016. s2mps11->dev_type);
  2017. }
  2018. if (s2mpg1x_regulators) {
  2019. size_t regulators_sz = rdev_num * sizeof(*s2mpg1x_regulators);
  2020. s2mpg1x_regulators = devm_kmemdup(&pdev->dev,
  2021. s2mpg1x_regulators,
  2022. regulators_sz,
  2023. GFP_KERNEL);
  2024. if (!s2mpg1x_regulators)
  2025. return -ENOMEM;
  2026. }
  2027. device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent);
  2028. platform_set_drvdata(pdev, s2mps11);
  2029. config.dev = &pdev->dev;
  2030. config.regmap = iodev->regmap_pmic;
  2031. config.driver_data = s2mps11;
  2032. for (i = 0; i < rdev_num; i++) {
  2033. const struct regulator_desc *rdesc;
  2034. struct regulator_dev *regulator;
  2035. if (s2mpg1x_regulators)
  2036. rdesc = &s2mpg1x_regulators[i].desc;
  2037. else
  2038. rdesc = &regulators[i];
  2039. regulator = devm_regulator_register(&pdev->dev,
  2040. rdesc, &config);
  2041. if (IS_ERR(regulator))
  2042. return dev_err_probe(&pdev->dev, PTR_ERR(regulator),
  2043. "regulator init failed for %d/%s\n",
  2044. rdesc->id, rdesc->name);
  2045. ret = s2mps11_handle_ext_control(s2mps11, regulator);
  2046. if (ret < 0)
  2047. return ret;
  2048. }
  2049. return 0;
  2050. }
  2051. static const struct platform_device_id s2mps11_pmic_id[] = {
  2052. { "s2mpg10-regulator", S2MPG10},
  2053. { "s2mpg11-regulator", S2MPG11},
  2054. { "s2mps11-regulator", S2MPS11X},
  2055. { "s2mps13-regulator", S2MPS13X},
  2056. { "s2mps14-regulator", S2MPS14X},
  2057. { "s2mps15-regulator", S2MPS15X},
  2058. { "s2mpu02-regulator", S2MPU02},
  2059. { "s2mpu05-regulator", S2MPU05},
  2060. { },
  2061. };
  2062. MODULE_DEVICE_TABLE(platform, s2mps11_pmic_id);
  2063. static struct platform_driver s2mps11_pmic_driver = {
  2064. .driver = {
  2065. .name = "s2mps11-pmic",
  2066. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2067. },
  2068. .probe = s2mps11_pmic_probe,
  2069. .id_table = s2mps11_pmic_id,
  2070. };
  2071. module_platform_driver(s2mps11_pmic_driver);
  2072. /* Module information */
  2073. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  2074. MODULE_DESCRIPTION("Samsung S2MPS11/14/15/S2MPU02/05 Regulator Driver");
  2075. MODULE_LICENSE("GPL");