bd96801-regulator.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) 2024 ROHM Semiconductors
  3. // bd96801-regulator.c ROHM BD96801 regulator driver
  4. /*
  5. * This version of the "BD86801 scalable PMIC"'s driver supports only very
  6. * basic set of the PMIC features. Most notably, there is no support for
  7. * the configurations which should be done when the PMIC is in STBY mode.
  8. *
  9. * Being able to reliably do the configurations like changing the
  10. * regulator safety limits (like limits for the over/under -voltages, over
  11. * current, thermal protection) would require the configuring driver to be
  12. * synchronized with entity causing the PMIC state transitions. Eg, one
  13. * should be able to ensure the PMIC is in STBY state when the
  14. * configurations are applied to the hardware. How and when the PMIC state
  15. * transitions are to be done is likely to be very system specific, as will
  16. * be the need to configure these safety limits. Hence it's not simple to
  17. * come up with a generic solution.
  18. *
  19. * Users who require the STBY state configurations can have a look at the
  20. * original RFC:
  21. * https://lore.kernel.org/all/cover.1712920132.git.mazziesaccount@gmail.com/
  22. * which implements some of the safety limit configurations - but leaves the
  23. * state change handling and synchronization to be implemented.
  24. *
  25. * It would be great to hear (and receive a patch!) if you implement the
  26. * STBY configuration support in your downstream driver ;)
  27. */
  28. #include <linux/cleanup.h>
  29. #include <linux/delay.h>
  30. #include <linux/err.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/kernel.h>
  33. #include <linux/linear_range.h>
  34. #include <linux/mfd/rohm-generic.h>
  35. #include <linux/mfd/rohm-bd96801.h>
  36. #include <linux/module.h>
  37. #include <linux/of.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/regmap.h>
  40. #include <linux/regulator/coupler.h>
  41. #include <linux/regulator/driver.h>
  42. #include <linux/regulator/machine.h>
  43. #include <linux/regulator/of_regulator.h>
  44. #include <linux/slab.h>
  45. #include <linux/timer.h>
  46. enum {
  47. BD96801_BUCK1,
  48. BD96801_BUCK2,
  49. BD96801_BUCK3,
  50. BD96801_BUCK4,
  51. BD96801_LDO5,
  52. BD96801_LDO6,
  53. BD96801_LDO7,
  54. BD96801_REGULATOR_AMOUNT,
  55. };
  56. enum {
  57. BD96801_PROT_OVP,
  58. BD96801_PROT_UVP,
  59. BD96801_PROT_OCP,
  60. BD96801_PROT_TEMP,
  61. BD96801_NUM_PROT,
  62. };
  63. #define BD96801_ALWAYS_ON_REG 0x3c
  64. #define BD96801_REG_ENABLE 0x0b
  65. #define BD96801_BUCK1_EN_MASK BIT(0)
  66. #define BD96801_BUCK2_EN_MASK BIT(1)
  67. #define BD96801_BUCK3_EN_MASK BIT(2)
  68. #define BD96801_BUCK4_EN_MASK BIT(3)
  69. #define BD96801_LDO5_EN_MASK BIT(4)
  70. #define BD96801_LDO6_EN_MASK BIT(5)
  71. #define BD96801_LDO7_EN_MASK BIT(6)
  72. #define BD96801_BUCK1_VSEL_REG 0x28
  73. #define BD96801_BUCK2_VSEL_REG 0x29
  74. #define BD96801_BUCK3_VSEL_REG 0x2a
  75. #define BD96801_BUCK4_VSEL_REG 0x2b
  76. #define BD96801_LDO5_VSEL_REG 0x25
  77. #define BD96801_LDO6_VSEL_REG 0x26
  78. #define BD96801_LDO7_VSEL_REG 0x27
  79. #define BD96801_BUCK_VSEL_MASK 0x1F
  80. #define BD96805_BUCK_VSEL_MASK 0x3f
  81. #define BD96801_LDO_VSEL_MASK 0xff
  82. #define BD96801_MASK_RAMP_DELAY 0xc0
  83. #define BD96801_INT_VOUT_BASE_REG 0x21
  84. #define BD96801_BUCK_INT_VOUT_MASK 0xff
  85. #define BD96801_BUCK_VOLTS 256
  86. #define BD96805_BUCK_VOLTS 64
  87. #define BD96801_LDO_VOLTS 256
  88. #define BD96801_OVP_MASK 0x03
  89. #define BD96801_MASK_BUCK1_OVP_SHIFT 0x00
  90. #define BD96801_MASK_BUCK2_OVP_SHIFT 0x02
  91. #define BD96801_MASK_BUCK3_OVP_SHIFT 0x04
  92. #define BD96801_MASK_BUCK4_OVP_SHIFT 0x06
  93. #define BD96801_MASK_LDO5_OVP_SHIFT 0x00
  94. #define BD96801_MASK_LDO6_OVP_SHIFT 0x02
  95. #define BD96801_MASK_LDO7_OVP_SHIFT 0x04
  96. #define BD96801_PROT_LIMIT_OCP_MIN 0x00
  97. #define BD96801_PROT_LIMIT_LOW 0x01
  98. #define BD96801_PROT_LIMIT_MID 0x02
  99. #define BD96801_PROT_LIMIT_HI 0x03
  100. #define BD96801_REG_BUCK1_OCP 0x32
  101. #define BD96801_REG_BUCK2_OCP 0x32
  102. #define BD96801_REG_BUCK3_OCP 0x33
  103. #define BD96801_REG_BUCK4_OCP 0x33
  104. #define BD96801_MASK_BUCK1_OCP_SHIFT 0x00
  105. #define BD96801_MASK_BUCK2_OCP_SHIFT 0x04
  106. #define BD96801_MASK_BUCK3_OCP_SHIFT 0x00
  107. #define BD96801_MASK_BUCK4_OCP_SHIFT 0x04
  108. #define BD96801_REG_LDO5_OCP 0x34
  109. #define BD96801_REG_LDO6_OCP 0x34
  110. #define BD96801_REG_LDO7_OCP 0x34
  111. #define BD96801_MASK_LDO5_OCP_SHIFT 0x00
  112. #define BD96801_MASK_LDO6_OCP_SHIFT 0x02
  113. #define BD96801_MASK_LDO7_OCP_SHIFT 0x04
  114. #define BD96801_MASK_SHD_INTB BIT(7)
  115. #define BD96801_INTB_FATAL BIT(7)
  116. #define BD96801_NUM_REGULATORS 7
  117. #define BD96801_NUM_LDOS 4
  118. /*
  119. * Ramp rates for bucks are controlled by bits [7:6] as follows:
  120. * 00 => 1 mV/uS
  121. * 01 => 5 mV/uS
  122. * 10 => 10 mV/uS
  123. * 11 => 20 mV/uS
  124. */
  125. static const unsigned int buck_ramp_table[] = { 1000, 5000, 10000, 20000 };
  126. /*
  127. * This is a voltage range that get's appended to selected
  128. * bd96801_buck_init_volts value. The range from 0x0 to 0xF is actually
  129. * bd96801_buck_init_volts + 0 ... bd96801_buck_init_volts + 150mV
  130. * and the range from 0x10 to 0x1f is bd96801_buck_init_volts - 150mV ...
  131. * bd96801_buck_init_volts - 0. But as the members of linear_range
  132. * are all unsigned I will apply offset of -150 mV to value in
  133. * linear_range - which should increase these ranges with
  134. * 150 mV getting all the values to >= 0.
  135. */
  136. static const struct linear_range bd96801_tune_volts[] = {
  137. REGULATOR_LINEAR_RANGE(150000, 0x00, 0xF, 10000),
  138. REGULATOR_LINEAR_RANGE(0, 0x10, 0x1F, 10000),
  139. };
  140. static const struct linear_range bd96801_buck_init_volts[] = {
  141. REGULATOR_LINEAR_RANGE(500000 - 150000, 0x00, 0xc8, 5000),
  142. REGULATOR_LINEAR_RANGE(1550000 - 150000, 0xc9, 0xec, 50000),
  143. REGULATOR_LINEAR_RANGE(3300000 - 150000, 0xed, 0xff, 0),
  144. };
  145. /* BD96802 uses same voltage ranges for bucks as BD96801 */
  146. #define bd96802_tune_volts bd96801_tune_volts
  147. #define bd96802_buck_init_volts bd96801_buck_init_volts
  148. /*
  149. * On BD96805 we have similar "negative tuning range" as on BD96801, except
  150. * that the max tuning is -310 ... +310 mV (instead of the 150mV). We use same
  151. * approach as with the BD96801 ranges.
  152. */
  153. static const struct linear_range bd96805_tune_volts[] = {
  154. REGULATOR_LINEAR_RANGE(310000, 0x00, 0x1F, 10000),
  155. REGULATOR_LINEAR_RANGE(0, 0x20, 0x3F, 10000),
  156. };
  157. static const struct linear_range bd96805_buck_init_volts[] = {
  158. REGULATOR_LINEAR_RANGE(500000 - 310000, 0x00, 0xc8, 5000),
  159. REGULATOR_LINEAR_RANGE(1550000 - 310000, 0xc9, 0xec, 50000),
  160. REGULATOR_LINEAR_RANGE(3300000 - 310000, 0xed, 0xff, 0),
  161. };
  162. /* BD96806 uses same voltage ranges for bucks as BD96805 */
  163. #define bd96806_tune_volts bd96805_tune_volts
  164. #define bd96806_buck_init_volts bd96805_buck_init_volts
  165. static const struct linear_range bd96801_ldo_int_volts[] = {
  166. REGULATOR_LINEAR_RANGE(300000, 0x00, 0x78, 25000),
  167. REGULATOR_LINEAR_RANGE(3300000, 0x79, 0xff, 0),
  168. };
  169. #define BD96801_LDO_SD_VOLT_MASK 0x1
  170. #define BD96801_LDO_MODE_MASK 0x6
  171. #define BD96801_LDO_MODE_INT 0x0
  172. #define BD96801_LDO_MODE_SD 0x2
  173. #define BD96801_LDO_MODE_DDR 0x4
  174. static int ldo_ddr_volt_table[] = {500000, 300000};
  175. static int ldo_sd_volt_table[] = {3300000, 1800000};
  176. /* Constant IRQ initialization data (templates) */
  177. struct bd96801_irqinfo {
  178. int type;
  179. struct regulator_irq_desc irq_desc;
  180. int err_cfg;
  181. int wrn_cfg;
  182. const char *irq_name;
  183. };
  184. #define BD96801_IRQINFO(_type, _name, _irqoff_ms, _irqname) \
  185. { \
  186. .type = (_type), \
  187. .err_cfg = -1, \
  188. .wrn_cfg = -1, \
  189. .irq_name = (_irqname), \
  190. .irq_desc = { \
  191. .name = (_name), \
  192. .irq_off_ms = (_irqoff_ms), \
  193. .map_event = regulator_irq_map_event_simple, \
  194. }, \
  195. }
  196. static const struct bd96801_irqinfo buck1_irqinfo[] = {
  197. BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-h", 500,
  198. "buck1-overcurr-h"),
  199. BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-l", 500,
  200. "buck1-overcurr-l"),
  201. BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-n", 500,
  202. "buck1-overcurr-n"),
  203. BD96801_IRQINFO(BD96801_PROT_OVP, "buck1-over-voltage", 500,
  204. "buck1-overvolt"),
  205. BD96801_IRQINFO(BD96801_PROT_UVP, "buck1-under-voltage", 500,
  206. "buck1-undervolt"),
  207. BD96801_IRQINFO(BD96801_PROT_TEMP, "buck1-over-temp", 500,
  208. "buck1-thermal")
  209. };
  210. static const struct bd96801_irqinfo buck2_irqinfo[] = {
  211. BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-h", 500,
  212. "buck2-overcurr-h"),
  213. BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-l", 500,
  214. "buck2-overcurr-l"),
  215. BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-n", 500,
  216. "buck2-overcurr-n"),
  217. BD96801_IRQINFO(BD96801_PROT_OVP, "buck2-over-voltage", 500,
  218. "buck2-overvolt"),
  219. BD96801_IRQINFO(BD96801_PROT_UVP, "buck2-under-voltage", 500,
  220. "buck2-undervolt"),
  221. BD96801_IRQINFO(BD96801_PROT_TEMP, "buck2-over-temp", 500,
  222. "buck2-thermal")
  223. };
  224. static const struct bd96801_irqinfo buck3_irqinfo[] = {
  225. BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-h", 500,
  226. "buck3-overcurr-h"),
  227. BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-l", 500,
  228. "buck3-overcurr-l"),
  229. BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-n", 500,
  230. "buck3-overcurr-n"),
  231. BD96801_IRQINFO(BD96801_PROT_OVP, "buck3-over-voltage", 500,
  232. "buck3-overvolt"),
  233. BD96801_IRQINFO(BD96801_PROT_UVP, "buck3-under-voltage", 500,
  234. "buck3-undervolt"),
  235. BD96801_IRQINFO(BD96801_PROT_TEMP, "buck3-over-temp", 500,
  236. "buck3-thermal")
  237. };
  238. static const struct bd96801_irqinfo buck4_irqinfo[] = {
  239. BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-h", 500,
  240. "buck4-overcurr-h"),
  241. BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-l", 500,
  242. "buck4-overcurr-l"),
  243. BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-n", 500,
  244. "buck4-overcurr-n"),
  245. BD96801_IRQINFO(BD96801_PROT_OVP, "buck4-over-voltage", 500,
  246. "buck4-overvolt"),
  247. BD96801_IRQINFO(BD96801_PROT_UVP, "buck4-under-voltage", 500,
  248. "buck4-undervolt"),
  249. BD96801_IRQINFO(BD96801_PROT_TEMP, "buck4-over-temp", 500,
  250. "buck4-thermal")
  251. };
  252. static const struct bd96801_irqinfo ldo5_irqinfo[] = {
  253. BD96801_IRQINFO(BD96801_PROT_OCP, "ldo5-overcurr", 500,
  254. "ldo5-overcurr"),
  255. BD96801_IRQINFO(BD96801_PROT_OVP, "ldo5-over-voltage", 500,
  256. "ldo5-overvolt"),
  257. BD96801_IRQINFO(BD96801_PROT_UVP, "ldo5-under-voltage", 500,
  258. "ldo5-undervolt"),
  259. };
  260. static const struct bd96801_irqinfo ldo6_irqinfo[] = {
  261. BD96801_IRQINFO(BD96801_PROT_OCP, "ldo6-overcurr", 500,
  262. "ldo6-overcurr"),
  263. BD96801_IRQINFO(BD96801_PROT_OVP, "ldo6-over-voltage", 500,
  264. "ldo6-overvolt"),
  265. BD96801_IRQINFO(BD96801_PROT_UVP, "ldo6-under-voltage", 500,
  266. "ldo6-undervolt"),
  267. };
  268. static const struct bd96801_irqinfo ldo7_irqinfo[] = {
  269. BD96801_IRQINFO(BD96801_PROT_OCP, "ldo7-overcurr", 500,
  270. "ldo7-overcurr"),
  271. BD96801_IRQINFO(BD96801_PROT_OVP, "ldo7-over-voltage", 500,
  272. "ldo7-overvolt"),
  273. BD96801_IRQINFO(BD96801_PROT_UVP, "ldo7-under-voltage", 500,
  274. "ldo7-undervolt"),
  275. };
  276. struct bd96801_irq_desc {
  277. struct bd96801_irqinfo *irqinfo;
  278. int num_irqs;
  279. };
  280. struct bd96801_regulator_data {
  281. struct regulator_desc desc;
  282. const struct linear_range *init_ranges;
  283. int num_ranges;
  284. struct bd96801_irq_desc irq_desc;
  285. int initial_voltage;
  286. int ldo_vol_lvl;
  287. int ldo_errs;
  288. };
  289. struct bd96801_pmic_data {
  290. struct bd96801_regulator_data regulator_data[BD96801_NUM_REGULATORS];
  291. struct regmap *regmap;
  292. int fatal_ind;
  293. int num_regulators;
  294. };
  295. static int ldo_map_notif(int irq, struct regulator_irq_data *rid,
  296. unsigned long *dev_mask)
  297. {
  298. int i;
  299. for (i = 0; i < rid->num_states; i++) {
  300. const struct bd96801_regulator_data *rdata;
  301. struct regulator_dev *rdev;
  302. rdev = rid->states[i].rdev;
  303. rdata = container_of_const(rdev->desc, struct bd96801_regulator_data,
  304. desc);
  305. rid->states[i].notifs = regulator_err2notif(rdata->ldo_errs);
  306. rid->states[i].errors = rdata->ldo_errs;
  307. *dev_mask |= BIT(i);
  308. }
  309. return 0;
  310. }
  311. static int bd96801_list_voltage_lr(struct regulator_dev *rdev,
  312. unsigned int selector)
  313. {
  314. int voltage;
  315. const struct bd96801_regulator_data *data;
  316. data = container_of_const(rdev->desc, struct bd96801_regulator_data, desc);
  317. /*
  318. * The BD096801 has voltage setting in two registers. One giving the
  319. * "initial voltage" (can be changed only when regulator is disabled.
  320. * This driver caches the value and sets it only at startup. The other
  321. * register is voltage tuning value which applies -150 mV ... +150 mV
  322. * offset to the voltage.
  323. *
  324. * Note that the cached initial voltage stored in regulator data is
  325. * 'scaled down' by the 150 mV so that all of our tuning values are
  326. * >= 0. This is done because the linear_ranges uses unsigned values.
  327. *
  328. * As a result, we increase the tuning voltage which we get based on
  329. * the selector by the stored initial_voltage.
  330. */
  331. voltage = regulator_list_voltage_linear_range(rdev, selector);
  332. if (voltage < 0)
  333. return voltage;
  334. return voltage + data->initial_voltage;
  335. }
  336. static const struct regulator_ops bd96801_ldo_table_ops = {
  337. .is_enabled = regulator_is_enabled_regmap,
  338. .list_voltage = regulator_list_voltage_table,
  339. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  340. };
  341. static const struct regulator_ops bd96801_buck_ops = {
  342. .is_enabled = regulator_is_enabled_regmap,
  343. .list_voltage = bd96801_list_voltage_lr,
  344. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  345. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  346. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  347. .set_ramp_delay = regulator_set_ramp_delay_regmap,
  348. };
  349. static const struct regulator_ops bd96801_ldo_ops = {
  350. .is_enabled = regulator_is_enabled_regmap,
  351. .list_voltage = regulator_list_voltage_linear_range,
  352. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  353. };
  354. static int buck_get_initial_voltage(struct regmap *regmap, struct device *dev,
  355. struct bd96801_regulator_data *data)
  356. {
  357. int ret = 0, sel, initial_uv;
  358. int reg = BD96801_INT_VOUT_BASE_REG + data->desc.id;
  359. if (data->num_ranges) {
  360. ret = regmap_read(regmap, reg, &sel);
  361. sel &= BD96801_BUCK_INT_VOUT_MASK;
  362. ret = linear_range_get_value_array(data->init_ranges,
  363. data->num_ranges, sel,
  364. &initial_uv);
  365. if (ret)
  366. return ret;
  367. data->initial_voltage = initial_uv;
  368. dev_dbg(dev, "Tune-scaled initial voltage %u\n",
  369. data->initial_voltage);
  370. }
  371. return 0;
  372. }
  373. static int get_ldo_initial_voltage(struct regmap *regmap,
  374. struct device *dev,
  375. struct bd96801_regulator_data *data)
  376. {
  377. int ret;
  378. int cfgreg;
  379. ret = regmap_read(regmap, data->ldo_vol_lvl, &cfgreg);
  380. if (ret)
  381. return ret;
  382. switch (cfgreg & BD96801_LDO_MODE_MASK) {
  383. case BD96801_LDO_MODE_DDR:
  384. data->desc.volt_table = ldo_ddr_volt_table;
  385. data->desc.n_voltages = ARRAY_SIZE(ldo_ddr_volt_table);
  386. break;
  387. case BD96801_LDO_MODE_SD:
  388. data->desc.volt_table = ldo_sd_volt_table;
  389. data->desc.n_voltages = ARRAY_SIZE(ldo_sd_volt_table);
  390. break;
  391. default:
  392. dev_info(dev, "Leaving LDO to normal mode");
  393. return 0;
  394. }
  395. /* SD or DDR mode => override default ops */
  396. data->desc.ops = &bd96801_ldo_table_ops,
  397. data->desc.vsel_mask = 1;
  398. data->desc.vsel_reg = data->ldo_vol_lvl;
  399. return 0;
  400. }
  401. static int get_initial_voltage(struct device *dev, struct regmap *regmap,
  402. struct bd96801_regulator_data *data)
  403. {
  404. /* BUCK */
  405. if (data->desc.id <= BD96801_BUCK4)
  406. return buck_get_initial_voltage(regmap, dev, data);
  407. /* LDO */
  408. return get_ldo_initial_voltage(regmap, dev, data);
  409. }
  410. static int bd96801_walk_regulator_dt(struct device *dev, struct regmap *regmap,
  411. struct bd96801_regulator_data *data,
  412. int num)
  413. {
  414. int i, ret;
  415. struct device_node *nproot __free(device_node) =
  416. of_get_child_by_name(dev->parent->of_node, "regulators");
  417. if (!nproot) {
  418. dev_err(dev, "failed to find regulators node\n");
  419. return -ENODEV;
  420. }
  421. for_each_child_of_node_scoped(nproot, np) {
  422. for (i = 0; i < num; i++) {
  423. if (!of_node_name_eq(np, data[i].desc.of_match))
  424. continue;
  425. /*
  426. * If STBY configs are supported, we must pass node
  427. * here to extract the initial voltages from the DT.
  428. * Thus we do the initial voltage getting in this
  429. * loop.
  430. */
  431. ret = get_initial_voltage(dev, regmap, &data[i]);
  432. if (ret) {
  433. dev_err(dev,
  434. "Initializing voltages for %s failed\n",
  435. data[i].desc.name);
  436. return ret;
  437. }
  438. if (of_property_read_bool(np, "rohm,keep-on-stby")) {
  439. ret = regmap_set_bits(regmap,
  440. BD96801_ALWAYS_ON_REG,
  441. 1 << data[i].desc.id);
  442. if (ret) {
  443. dev_err(dev,
  444. "failed to set %s on-at-stby\n",
  445. data[i].desc.name);
  446. return ret;
  447. }
  448. }
  449. }
  450. }
  451. return 0;
  452. }
  453. /*
  454. * Template for regulator data. Probe will allocate dynamic / driver instance
  455. * struct so we should be on a safe side even if there were multiple PMICs to
  456. * control. Note that there is a plan to allow multiple PMICs to be used so
  457. * systems can scale better. I am however still slightly unsure how the
  458. * multi-PMIC case will be handled. I don't know if the processor will have I2C
  459. * acces to all of the PMICs or only the first one. I'd guess there will be
  460. * access provided to all PMICs for voltage scaling - but the errors will only
  461. * be informed via the master PMIC. Eg, we should prepare to support multiple
  462. * driver instances - either with or without the IRQs... Well, let's first
  463. * just support the simple and clear single-PMIC setup and ponder the multi PMIC
  464. * case later. What we can easly do for preparing is to not use static global
  465. * data for regulators though.
  466. */
  467. static const struct bd96801_pmic_data bd96802_data = {
  468. .regulator_data = {
  469. {
  470. .desc = {
  471. .name = "buck1",
  472. .of_match = of_match_ptr("buck1"),
  473. .regulators_node = of_match_ptr("regulators"),
  474. .id = BD96801_BUCK1,
  475. .ops = &bd96801_buck_ops,
  476. .type = REGULATOR_VOLTAGE,
  477. .linear_ranges = bd96802_tune_volts,
  478. .n_linear_ranges = ARRAY_SIZE(bd96802_tune_volts),
  479. .n_voltages = BD96801_BUCK_VOLTS,
  480. .enable_reg = BD96801_REG_ENABLE,
  481. .enable_mask = BD96801_BUCK1_EN_MASK,
  482. .enable_is_inverted = true,
  483. .vsel_reg = BD96801_BUCK1_VSEL_REG,
  484. .vsel_mask = BD96801_BUCK_VSEL_MASK,
  485. .ramp_reg = BD96801_BUCK1_VSEL_REG,
  486. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  487. .ramp_delay_table = &buck_ramp_table[0],
  488. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  489. .owner = THIS_MODULE,
  490. },
  491. .init_ranges = bd96802_buck_init_volts,
  492. .num_ranges = ARRAY_SIZE(bd96802_buck_init_volts),
  493. .irq_desc = {
  494. .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0],
  495. .num_irqs = ARRAY_SIZE(buck1_irqinfo),
  496. },
  497. },
  498. {
  499. .desc = {
  500. .name = "buck2",
  501. .of_match = of_match_ptr("buck2"),
  502. .regulators_node = of_match_ptr("regulators"),
  503. .id = BD96801_BUCK2,
  504. .ops = &bd96801_buck_ops,
  505. .type = REGULATOR_VOLTAGE,
  506. .linear_ranges = bd96802_tune_volts,
  507. .n_linear_ranges = ARRAY_SIZE(bd96802_tune_volts),
  508. .n_voltages = BD96801_BUCK_VOLTS,
  509. .enable_reg = BD96801_REG_ENABLE,
  510. .enable_mask = BD96801_BUCK2_EN_MASK,
  511. .enable_is_inverted = true,
  512. .vsel_reg = BD96801_BUCK2_VSEL_REG,
  513. .vsel_mask = BD96801_BUCK_VSEL_MASK,
  514. .ramp_reg = BD96801_BUCK2_VSEL_REG,
  515. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  516. .ramp_delay_table = &buck_ramp_table[0],
  517. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  518. .owner = THIS_MODULE,
  519. },
  520. .irq_desc = {
  521. .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0],
  522. .num_irqs = ARRAY_SIZE(buck2_irqinfo),
  523. },
  524. .init_ranges = bd96802_buck_init_volts,
  525. .num_ranges = ARRAY_SIZE(bd96802_buck_init_volts),
  526. },
  527. },
  528. .num_regulators = 2,
  529. };
  530. static const struct bd96801_pmic_data bd96801_data = {
  531. .regulator_data = {
  532. {
  533. .desc = {
  534. .name = "buck1",
  535. .of_match = of_match_ptr("buck1"),
  536. .regulators_node = of_match_ptr("regulators"),
  537. .id = BD96801_BUCK1,
  538. .ops = &bd96801_buck_ops,
  539. .type = REGULATOR_VOLTAGE,
  540. .linear_ranges = bd96801_tune_volts,
  541. .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts),
  542. .n_voltages = BD96801_BUCK_VOLTS,
  543. .enable_reg = BD96801_REG_ENABLE,
  544. .enable_mask = BD96801_BUCK1_EN_MASK,
  545. .enable_is_inverted = true,
  546. .vsel_reg = BD96801_BUCK1_VSEL_REG,
  547. .vsel_mask = BD96801_BUCK_VSEL_MASK,
  548. .ramp_reg = BD96801_BUCK1_VSEL_REG,
  549. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  550. .ramp_delay_table = &buck_ramp_table[0],
  551. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  552. .owner = THIS_MODULE,
  553. },
  554. .init_ranges = bd96801_buck_init_volts,
  555. .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts),
  556. .irq_desc = {
  557. .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0],
  558. .num_irqs = ARRAY_SIZE(buck1_irqinfo),
  559. },
  560. }, {
  561. .desc = {
  562. .name = "buck2",
  563. .of_match = of_match_ptr("buck2"),
  564. .regulators_node = of_match_ptr("regulators"),
  565. .id = BD96801_BUCK2,
  566. .ops = &bd96801_buck_ops,
  567. .type = REGULATOR_VOLTAGE,
  568. .linear_ranges = bd96801_tune_volts,
  569. .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts),
  570. .n_voltages = BD96801_BUCK_VOLTS,
  571. .enable_reg = BD96801_REG_ENABLE,
  572. .enable_mask = BD96801_BUCK2_EN_MASK,
  573. .enable_is_inverted = true,
  574. .vsel_reg = BD96801_BUCK2_VSEL_REG,
  575. .vsel_mask = BD96801_BUCK_VSEL_MASK,
  576. .ramp_reg = BD96801_BUCK2_VSEL_REG,
  577. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  578. .ramp_delay_table = &buck_ramp_table[0],
  579. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  580. .owner = THIS_MODULE,
  581. },
  582. .irq_desc = {
  583. .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0],
  584. .num_irqs = ARRAY_SIZE(buck2_irqinfo),
  585. },
  586. .init_ranges = bd96801_buck_init_volts,
  587. .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts),
  588. }, {
  589. .desc = {
  590. .name = "buck3",
  591. .of_match = of_match_ptr("buck3"),
  592. .regulators_node = of_match_ptr("regulators"),
  593. .id = BD96801_BUCK3,
  594. .ops = &bd96801_buck_ops,
  595. .type = REGULATOR_VOLTAGE,
  596. .linear_ranges = bd96801_tune_volts,
  597. .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts),
  598. .n_voltages = BD96801_BUCK_VOLTS,
  599. .enable_reg = BD96801_REG_ENABLE,
  600. .enable_mask = BD96801_BUCK3_EN_MASK,
  601. .enable_is_inverted = true,
  602. .vsel_reg = BD96801_BUCK3_VSEL_REG,
  603. .vsel_mask = BD96801_BUCK_VSEL_MASK,
  604. .ramp_reg = BD96801_BUCK3_VSEL_REG,
  605. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  606. .ramp_delay_table = &buck_ramp_table[0],
  607. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  608. .owner = THIS_MODULE,
  609. },
  610. .irq_desc = {
  611. .irqinfo = (struct bd96801_irqinfo *)&buck3_irqinfo[0],
  612. .num_irqs = ARRAY_SIZE(buck3_irqinfo),
  613. },
  614. .init_ranges = bd96801_buck_init_volts,
  615. .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts),
  616. }, {
  617. .desc = {
  618. .name = "buck4",
  619. .of_match = of_match_ptr("buck4"),
  620. .regulators_node = of_match_ptr("regulators"),
  621. .id = BD96801_BUCK4,
  622. .ops = &bd96801_buck_ops,
  623. .type = REGULATOR_VOLTAGE,
  624. .linear_ranges = bd96801_tune_volts,
  625. .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts),
  626. .n_voltages = BD96801_BUCK_VOLTS,
  627. .enable_reg = BD96801_REG_ENABLE,
  628. .enable_mask = BD96801_BUCK4_EN_MASK,
  629. .enable_is_inverted = true,
  630. .vsel_reg = BD96801_BUCK4_VSEL_REG,
  631. .vsel_mask = BD96801_BUCK_VSEL_MASK,
  632. .ramp_reg = BD96801_BUCK4_VSEL_REG,
  633. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  634. .ramp_delay_table = &buck_ramp_table[0],
  635. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  636. .owner = THIS_MODULE,
  637. },
  638. .irq_desc = {
  639. .irqinfo = (struct bd96801_irqinfo *)&buck4_irqinfo[0],
  640. .num_irqs = ARRAY_SIZE(buck4_irqinfo),
  641. },
  642. .init_ranges = bd96801_buck_init_volts,
  643. .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts),
  644. }, {
  645. .desc = {
  646. .name = "ldo5",
  647. .of_match = of_match_ptr("ldo5"),
  648. .regulators_node = of_match_ptr("regulators"),
  649. .id = BD96801_LDO5,
  650. .ops = &bd96801_ldo_ops,
  651. .type = REGULATOR_VOLTAGE,
  652. .linear_ranges = bd96801_ldo_int_volts,
  653. .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts),
  654. .n_voltages = BD96801_LDO_VOLTS,
  655. .enable_reg = BD96801_REG_ENABLE,
  656. .enable_mask = BD96801_LDO5_EN_MASK,
  657. .enable_is_inverted = true,
  658. .vsel_reg = BD96801_LDO5_VSEL_REG,
  659. .vsel_mask = BD96801_LDO_VSEL_MASK,
  660. .owner = THIS_MODULE,
  661. },
  662. .irq_desc = {
  663. .irqinfo = (struct bd96801_irqinfo *)&ldo5_irqinfo[0],
  664. .num_irqs = ARRAY_SIZE(ldo5_irqinfo),
  665. },
  666. .ldo_vol_lvl = BD96801_LDO5_VOL_LVL_REG,
  667. }, {
  668. .desc = {
  669. .name = "ldo6",
  670. .of_match = of_match_ptr("ldo6"),
  671. .regulators_node = of_match_ptr("regulators"),
  672. .id = BD96801_LDO6,
  673. .ops = &bd96801_ldo_ops,
  674. .type = REGULATOR_VOLTAGE,
  675. .linear_ranges = bd96801_ldo_int_volts,
  676. .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts),
  677. .n_voltages = BD96801_LDO_VOLTS,
  678. .enable_reg = BD96801_REG_ENABLE,
  679. .enable_mask = BD96801_LDO6_EN_MASK,
  680. .enable_is_inverted = true,
  681. .vsel_reg = BD96801_LDO6_VSEL_REG,
  682. .vsel_mask = BD96801_LDO_VSEL_MASK,
  683. .owner = THIS_MODULE,
  684. },
  685. .irq_desc = {
  686. .irqinfo = (struct bd96801_irqinfo *)&ldo6_irqinfo[0],
  687. .num_irqs = ARRAY_SIZE(ldo6_irqinfo),
  688. },
  689. .ldo_vol_lvl = BD96801_LDO6_VOL_LVL_REG,
  690. }, {
  691. .desc = {
  692. .name = "ldo7",
  693. .of_match = of_match_ptr("ldo7"),
  694. .regulators_node = of_match_ptr("regulators"),
  695. .id = BD96801_LDO7,
  696. .ops = &bd96801_ldo_ops,
  697. .type = REGULATOR_VOLTAGE,
  698. .linear_ranges = bd96801_ldo_int_volts,
  699. .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts),
  700. .n_voltages = BD96801_LDO_VOLTS,
  701. .enable_reg = BD96801_REG_ENABLE,
  702. .enable_mask = BD96801_LDO7_EN_MASK,
  703. .enable_is_inverted = true,
  704. .vsel_reg = BD96801_LDO7_VSEL_REG,
  705. .vsel_mask = BD96801_LDO_VSEL_MASK,
  706. .owner = THIS_MODULE,
  707. },
  708. .irq_desc = {
  709. .irqinfo = (struct bd96801_irqinfo *)&ldo7_irqinfo[0],
  710. .num_irqs = ARRAY_SIZE(ldo7_irqinfo),
  711. },
  712. .ldo_vol_lvl = BD96801_LDO7_VOL_LVL_REG,
  713. },
  714. },
  715. .num_regulators = 7,
  716. };
  717. static const struct bd96801_pmic_data bd96805_data = {
  718. .regulator_data = {
  719. {
  720. .desc = {
  721. .name = "buck1",
  722. .of_match = of_match_ptr("buck1"),
  723. .regulators_node = of_match_ptr("regulators"),
  724. .id = BD96801_BUCK1,
  725. .ops = &bd96801_buck_ops,
  726. .type = REGULATOR_VOLTAGE,
  727. .linear_ranges = bd96805_tune_volts,
  728. .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts),
  729. .n_voltages = BD96805_BUCK_VOLTS,
  730. .enable_reg = BD96801_REG_ENABLE,
  731. .enable_mask = BD96801_BUCK1_EN_MASK,
  732. .enable_is_inverted = true,
  733. .vsel_reg = BD96801_BUCK1_VSEL_REG,
  734. .vsel_mask = BD96805_BUCK_VSEL_MASK,
  735. .ramp_reg = BD96801_BUCK1_VSEL_REG,
  736. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  737. .ramp_delay_table = &buck_ramp_table[0],
  738. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  739. .owner = THIS_MODULE,
  740. },
  741. .init_ranges = bd96805_buck_init_volts,
  742. .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts),
  743. .irq_desc = {
  744. .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0],
  745. .num_irqs = ARRAY_SIZE(buck1_irqinfo),
  746. },
  747. }, {
  748. .desc = {
  749. .name = "buck2",
  750. .of_match = of_match_ptr("buck2"),
  751. .regulators_node = of_match_ptr("regulators"),
  752. .id = BD96801_BUCK2,
  753. .ops = &bd96801_buck_ops,
  754. .type = REGULATOR_VOLTAGE,
  755. .linear_ranges = bd96805_tune_volts,
  756. .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts),
  757. .n_voltages = BD96805_BUCK_VOLTS,
  758. .enable_reg = BD96801_REG_ENABLE,
  759. .enable_mask = BD96801_BUCK2_EN_MASK,
  760. .enable_is_inverted = true,
  761. .vsel_reg = BD96801_BUCK2_VSEL_REG,
  762. .vsel_mask = BD96805_BUCK_VSEL_MASK,
  763. .ramp_reg = BD96801_BUCK2_VSEL_REG,
  764. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  765. .ramp_delay_table = &buck_ramp_table[0],
  766. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  767. .owner = THIS_MODULE,
  768. },
  769. .irq_desc = {
  770. .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0],
  771. .num_irqs = ARRAY_SIZE(buck2_irqinfo),
  772. },
  773. .init_ranges = bd96805_buck_init_volts,
  774. .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts),
  775. }, {
  776. .desc = {
  777. .name = "buck3",
  778. .of_match = of_match_ptr("buck3"),
  779. .regulators_node = of_match_ptr("regulators"),
  780. .id = BD96801_BUCK3,
  781. .ops = &bd96801_buck_ops,
  782. .type = REGULATOR_VOLTAGE,
  783. .linear_ranges = bd96805_tune_volts,
  784. .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts),
  785. .n_voltages = BD96805_BUCK_VOLTS,
  786. .enable_reg = BD96801_REG_ENABLE,
  787. .enable_mask = BD96801_BUCK3_EN_MASK,
  788. .enable_is_inverted = true,
  789. .vsel_reg = BD96801_BUCK3_VSEL_REG,
  790. .vsel_mask = BD96805_BUCK_VSEL_MASK,
  791. .ramp_reg = BD96801_BUCK3_VSEL_REG,
  792. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  793. .ramp_delay_table = &buck_ramp_table[0],
  794. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  795. .owner = THIS_MODULE,
  796. },
  797. .irq_desc = {
  798. .irqinfo = (struct bd96801_irqinfo *)&buck3_irqinfo[0],
  799. .num_irqs = ARRAY_SIZE(buck3_irqinfo),
  800. },
  801. .init_ranges = bd96805_buck_init_volts,
  802. .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts),
  803. }, {
  804. .desc = {
  805. .name = "buck4",
  806. .of_match = of_match_ptr("buck4"),
  807. .regulators_node = of_match_ptr("regulators"),
  808. .id = BD96801_BUCK4,
  809. .ops = &bd96801_buck_ops,
  810. .type = REGULATOR_VOLTAGE,
  811. .linear_ranges = bd96805_tune_volts,
  812. .n_linear_ranges = ARRAY_SIZE(bd96805_tune_volts),
  813. .n_voltages = BD96805_BUCK_VOLTS,
  814. .enable_reg = BD96801_REG_ENABLE,
  815. .enable_mask = BD96801_BUCK4_EN_MASK,
  816. .enable_is_inverted = true,
  817. .vsel_reg = BD96801_BUCK4_VSEL_REG,
  818. .vsel_mask = BD96805_BUCK_VSEL_MASK,
  819. .ramp_reg = BD96801_BUCK4_VSEL_REG,
  820. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  821. .ramp_delay_table = &buck_ramp_table[0],
  822. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  823. .owner = THIS_MODULE,
  824. },
  825. .irq_desc = {
  826. .irqinfo = (struct bd96801_irqinfo *)&buck4_irqinfo[0],
  827. .num_irqs = ARRAY_SIZE(buck4_irqinfo),
  828. },
  829. .init_ranges = bd96805_buck_init_volts,
  830. .num_ranges = ARRAY_SIZE(bd96805_buck_init_volts),
  831. }, {
  832. .desc = {
  833. .name = "ldo5",
  834. .of_match = of_match_ptr("ldo5"),
  835. .regulators_node = of_match_ptr("regulators"),
  836. .id = BD96801_LDO5,
  837. .ops = &bd96801_ldo_ops,
  838. .type = REGULATOR_VOLTAGE,
  839. .linear_ranges = bd96801_ldo_int_volts,
  840. .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts),
  841. .n_voltages = BD96801_LDO_VOLTS,
  842. .enable_reg = BD96801_REG_ENABLE,
  843. .enable_mask = BD96801_LDO5_EN_MASK,
  844. .enable_is_inverted = true,
  845. .vsel_reg = BD96801_LDO5_VSEL_REG,
  846. .vsel_mask = BD96801_LDO_VSEL_MASK,
  847. .owner = THIS_MODULE,
  848. },
  849. .irq_desc = {
  850. .irqinfo = (struct bd96801_irqinfo *)&ldo5_irqinfo[0],
  851. .num_irqs = ARRAY_SIZE(ldo5_irqinfo),
  852. },
  853. .ldo_vol_lvl = BD96801_LDO5_VOL_LVL_REG,
  854. }, {
  855. .desc = {
  856. .name = "ldo6",
  857. .of_match = of_match_ptr("ldo6"),
  858. .regulators_node = of_match_ptr("regulators"),
  859. .id = BD96801_LDO6,
  860. .ops = &bd96801_ldo_ops,
  861. .type = REGULATOR_VOLTAGE,
  862. .linear_ranges = bd96801_ldo_int_volts,
  863. .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts),
  864. .n_voltages = BD96801_LDO_VOLTS,
  865. .enable_reg = BD96801_REG_ENABLE,
  866. .enable_mask = BD96801_LDO6_EN_MASK,
  867. .enable_is_inverted = true,
  868. .vsel_reg = BD96801_LDO6_VSEL_REG,
  869. .vsel_mask = BD96801_LDO_VSEL_MASK,
  870. .owner = THIS_MODULE,
  871. },
  872. .irq_desc = {
  873. .irqinfo = (struct bd96801_irqinfo *)&ldo6_irqinfo[0],
  874. .num_irqs = ARRAY_SIZE(ldo6_irqinfo),
  875. },
  876. .ldo_vol_lvl = BD96801_LDO6_VOL_LVL_REG,
  877. }, {
  878. .desc = {
  879. .name = "ldo7",
  880. .of_match = of_match_ptr("ldo7"),
  881. .regulators_node = of_match_ptr("regulators"),
  882. .id = BD96801_LDO7,
  883. .ops = &bd96801_ldo_ops,
  884. .type = REGULATOR_VOLTAGE,
  885. .linear_ranges = bd96801_ldo_int_volts,
  886. .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts),
  887. .n_voltages = BD96801_LDO_VOLTS,
  888. .enable_reg = BD96801_REG_ENABLE,
  889. .enable_mask = BD96801_LDO7_EN_MASK,
  890. .enable_is_inverted = true,
  891. .vsel_reg = BD96801_LDO7_VSEL_REG,
  892. .vsel_mask = BD96801_LDO_VSEL_MASK,
  893. .owner = THIS_MODULE,
  894. },
  895. .irq_desc = {
  896. .irqinfo = (struct bd96801_irqinfo *)&ldo7_irqinfo[0],
  897. .num_irqs = ARRAY_SIZE(ldo7_irqinfo),
  898. },
  899. .ldo_vol_lvl = BD96801_LDO7_VOL_LVL_REG,
  900. },
  901. },
  902. .num_regulators = 7,
  903. };
  904. static const struct bd96801_pmic_data bd96806_data = {
  905. .regulator_data = {
  906. {
  907. .desc = {
  908. .name = "buck1",
  909. .of_match = of_match_ptr("buck1"),
  910. .regulators_node = of_match_ptr("regulators"),
  911. .id = BD96801_BUCK1,
  912. .ops = &bd96801_buck_ops,
  913. .type = REGULATOR_VOLTAGE,
  914. .linear_ranges = bd96806_tune_volts,
  915. .n_linear_ranges = ARRAY_SIZE(bd96806_tune_volts),
  916. .n_voltages = BD96805_BUCK_VOLTS,
  917. .enable_reg = BD96801_REG_ENABLE,
  918. .enable_mask = BD96801_BUCK1_EN_MASK,
  919. .enable_is_inverted = true,
  920. .vsel_reg = BD96801_BUCK1_VSEL_REG,
  921. .vsel_mask = BD96805_BUCK_VSEL_MASK,
  922. .ramp_reg = BD96801_BUCK1_VSEL_REG,
  923. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  924. .ramp_delay_table = &buck_ramp_table[0],
  925. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  926. .owner = THIS_MODULE,
  927. },
  928. .init_ranges = bd96806_buck_init_volts,
  929. .num_ranges = ARRAY_SIZE(bd96806_buck_init_volts),
  930. .irq_desc = {
  931. .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0],
  932. .num_irqs = ARRAY_SIZE(buck1_irqinfo),
  933. },
  934. },
  935. {
  936. .desc = {
  937. .name = "buck2",
  938. .of_match = of_match_ptr("buck2"),
  939. .regulators_node = of_match_ptr("regulators"),
  940. .id = BD96801_BUCK2,
  941. .ops = &bd96801_buck_ops,
  942. .type = REGULATOR_VOLTAGE,
  943. .linear_ranges = bd96806_tune_volts,
  944. .n_linear_ranges = ARRAY_SIZE(bd96806_tune_volts),
  945. .n_voltages = BD96805_BUCK_VOLTS,
  946. .enable_reg = BD96801_REG_ENABLE,
  947. .enable_mask = BD96801_BUCK2_EN_MASK,
  948. .enable_is_inverted = true,
  949. .vsel_reg = BD96801_BUCK2_VSEL_REG,
  950. .vsel_mask = BD96805_BUCK_VSEL_MASK,
  951. .ramp_reg = BD96801_BUCK2_VSEL_REG,
  952. .ramp_mask = BD96801_MASK_RAMP_DELAY,
  953. .ramp_delay_table = &buck_ramp_table[0],
  954. .n_ramp_values = ARRAY_SIZE(buck_ramp_table),
  955. .owner = THIS_MODULE,
  956. },
  957. .irq_desc = {
  958. .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0],
  959. .num_irqs = ARRAY_SIZE(buck2_irqinfo),
  960. },
  961. .init_ranges = bd96806_buck_init_volts,
  962. .num_ranges = ARRAY_SIZE(bd96806_buck_init_volts),
  963. },
  964. },
  965. .num_regulators = 2,
  966. };
  967. static int initialize_pmic_data(struct platform_device *pdev,
  968. struct bd96801_pmic_data *pdata)
  969. {
  970. struct device *dev = &pdev->dev;
  971. int r, i;
  972. /*
  973. * Allocate and initialize IRQ data for all of the regulators. We
  974. * wish to modify IRQ information independently for each driver
  975. * instance.
  976. */
  977. for (r = 0; r < pdata->num_regulators; r++) {
  978. const struct bd96801_irqinfo *template;
  979. struct bd96801_irqinfo *new;
  980. int num_infos;
  981. template = pdata->regulator_data[r].irq_desc.irqinfo;
  982. num_infos = pdata->regulator_data[r].irq_desc.num_irqs;
  983. new = devm_kcalloc(dev, num_infos, sizeof(*new), GFP_KERNEL);
  984. if (!new)
  985. return -ENOMEM;
  986. pdata->regulator_data[r].irq_desc.irqinfo = new;
  987. for (i = 0; i < num_infos; i++)
  988. new[i] = template[i];
  989. }
  990. return 0;
  991. }
  992. static int bd96801_map_event_all(int irq, struct regulator_irq_data *rid,
  993. unsigned long *dev_mask)
  994. {
  995. int i;
  996. for (i = 0; i < rid->num_states; i++) {
  997. rid->states[i].notifs = REGULATOR_EVENT_FAIL;
  998. rid->states[i].errors = REGULATOR_ERROR_FAIL;
  999. *dev_mask |= BIT(i);
  1000. }
  1001. return 0;
  1002. }
  1003. static int bd96801_rdev_errb_irqs(struct platform_device *pdev,
  1004. struct regulator_dev *rdev)
  1005. {
  1006. int i;
  1007. void *retp;
  1008. static const char * const single_out_errb_irqs[] = {
  1009. "%s-pvin-err", "%s-ovp-err", "%s-uvp-err", "%s-shdn-err",
  1010. };
  1011. for (i = 0; i < ARRAY_SIZE(single_out_errb_irqs); i++) {
  1012. struct regulator_irq_desc id = {
  1013. .map_event = bd96801_map_event_all,
  1014. .irq_off_ms = 1000,
  1015. };
  1016. struct regulator_dev *rdev_arr[1];
  1017. char tmp[255];
  1018. int irq;
  1019. snprintf(tmp, 255, single_out_errb_irqs[i], rdev->desc->name);
  1020. tmp[254] = 0;
  1021. id.name = tmp;
  1022. irq = platform_get_irq_byname(pdev, tmp);
  1023. if (irq < 0)
  1024. continue;
  1025. rdev_arr[0] = rdev;
  1026. retp = devm_regulator_irq_helper(&pdev->dev, &id, irq, 0,
  1027. REGULATOR_ERROR_FAIL, NULL,
  1028. rdev_arr, 1);
  1029. if (IS_ERR(retp))
  1030. return PTR_ERR(retp);
  1031. }
  1032. return 0;
  1033. }
  1034. static int bd96801_global_errb_irqs(struct platform_device *pdev,
  1035. struct regulator_dev **rdev, int num_rdev)
  1036. {
  1037. int i, num_irqs;
  1038. void *retp;
  1039. static const char * const global_errb_irqs[] = {
  1040. "otp-err", "dbist-err", "eep-err", "abist-err", "prstb-err",
  1041. "drmoserr1", "drmoserr2", "slave-err", "vref-err", "tsd",
  1042. "uvlo-err", "ovlo-err", "osc-err", "pon-err", "poff-err",
  1043. "cmd-shdn-err", "int-shdn-err"
  1044. };
  1045. num_irqs = ARRAY_SIZE(global_errb_irqs);
  1046. for (i = 0; i < num_irqs; i++) {
  1047. int irq;
  1048. struct regulator_irq_desc id = {
  1049. .name = global_errb_irqs[i],
  1050. .map_event = bd96801_map_event_all,
  1051. .irq_off_ms = 1000,
  1052. };
  1053. irq = platform_get_irq_byname(pdev, global_errb_irqs[i]);
  1054. if (irq < 0)
  1055. continue;
  1056. retp = devm_regulator_irq_helper(&pdev->dev, &id, irq, 0,
  1057. REGULATOR_ERROR_FAIL, NULL,
  1058. rdev, num_rdev);
  1059. if (IS_ERR(retp))
  1060. return PTR_ERR(retp);
  1061. }
  1062. return 0;
  1063. }
  1064. static int bd96801_rdev_intb_irqs(struct platform_device *pdev,
  1065. struct bd96801_pmic_data *pdata,
  1066. struct bd96801_irqinfo *iinfo,
  1067. struct regulator_dev *rdev)
  1068. {
  1069. struct regulator_dev *rdev_arr[1];
  1070. void *retp;
  1071. int err = 0;
  1072. int irq;
  1073. int err_flags[] = {
  1074. [BD96801_PROT_OVP] = REGULATOR_ERROR_REGULATION_OUT,
  1075. [BD96801_PROT_UVP] = REGULATOR_ERROR_UNDER_VOLTAGE,
  1076. [BD96801_PROT_OCP] = REGULATOR_ERROR_OVER_CURRENT,
  1077. [BD96801_PROT_TEMP] = REGULATOR_ERROR_OVER_TEMP,
  1078. };
  1079. int wrn_flags[] = {
  1080. [BD96801_PROT_OVP] = REGULATOR_ERROR_OVER_VOLTAGE_WARN,
  1081. [BD96801_PROT_UVP] = REGULATOR_ERROR_UNDER_VOLTAGE_WARN,
  1082. [BD96801_PROT_OCP] = REGULATOR_ERROR_OVER_CURRENT_WARN,
  1083. [BD96801_PROT_TEMP] = REGULATOR_ERROR_OVER_TEMP_WARN,
  1084. };
  1085. /*
  1086. * Don't install IRQ handler if both error and warning
  1087. * notifications are explicitly disabled
  1088. */
  1089. if (!iinfo->err_cfg && !iinfo->wrn_cfg)
  1090. return 0;
  1091. if (WARN_ON(iinfo->type >= BD96801_NUM_PROT))
  1092. return -EINVAL;
  1093. if (iinfo->err_cfg)
  1094. err = err_flags[iinfo->type];
  1095. else if (iinfo->wrn_cfg)
  1096. err = wrn_flags[iinfo->type];
  1097. iinfo->irq_desc.data = pdata;
  1098. irq = platform_get_irq_byname(pdev, iinfo->irq_name);
  1099. if (irq < 0)
  1100. return irq;
  1101. /* Find notifications for this IRQ (WARN/ERR) */
  1102. rdev_arr[0] = rdev;
  1103. retp = devm_regulator_irq_helper(&pdev->dev,
  1104. &iinfo->irq_desc, irq,
  1105. 0, err, NULL, rdev_arr,
  1106. 1);
  1107. if (IS_ERR(retp))
  1108. return PTR_ERR(retp);
  1109. return 0;
  1110. }
  1111. static int bd96801_probe(struct platform_device *pdev)
  1112. {
  1113. struct regulator_dev *ldo_errs_rdev_arr[BD96801_NUM_LDOS];
  1114. struct regulator_dev *all_rdevs[BD96801_NUM_REGULATORS];
  1115. struct bd96801_pmic_data *pdata_template;
  1116. struct bd96801_regulator_data *rdesc;
  1117. struct regulator_config config = {};
  1118. int ldo_errs_arr[BD96801_NUM_LDOS];
  1119. struct bd96801_pmic_data *pdata;
  1120. int temp_notif_ldos = 0;
  1121. struct device *parent;
  1122. int i, ret;
  1123. bool use_errb;
  1124. void *retp;
  1125. parent = pdev->dev.parent;
  1126. pdata_template = (struct bd96801_pmic_data *)platform_get_device_id(pdev)->driver_data;
  1127. if (!pdata_template)
  1128. return -ENODEV;
  1129. pdata = devm_kmemdup(&pdev->dev, pdata_template, sizeof(bd96801_data),
  1130. GFP_KERNEL);
  1131. if (!pdata)
  1132. return -ENOMEM;
  1133. if (initialize_pmic_data(pdev, pdata))
  1134. return -ENOMEM;
  1135. pdata->regmap = dev_get_regmap(parent, NULL);
  1136. if (!pdata->regmap) {
  1137. dev_err(&pdev->dev, "No register map found\n");
  1138. return -ENODEV;
  1139. }
  1140. rdesc = &pdata->regulator_data[0];
  1141. config.driver_data = pdata;
  1142. config.regmap = pdata->regmap;
  1143. config.dev = parent;
  1144. ret = of_property_match_string(pdev->dev.parent->of_node,
  1145. "interrupt-names", "errb");
  1146. if (ret < 0)
  1147. use_errb = false;
  1148. else
  1149. use_errb = true;
  1150. ret = bd96801_walk_regulator_dt(&pdev->dev, pdata->regmap, rdesc,
  1151. pdata->num_regulators);
  1152. if (ret)
  1153. return ret;
  1154. for (i = 0; i < pdata->num_regulators; i++) {
  1155. struct regulator_dev *rdev;
  1156. struct bd96801_irq_desc *idesc = &rdesc[i].irq_desc;
  1157. int j;
  1158. rdev = devm_regulator_register(&pdev->dev,
  1159. &rdesc[i].desc, &config);
  1160. if (IS_ERR(rdev)) {
  1161. dev_err(&pdev->dev,
  1162. "failed to register %s regulator\n",
  1163. rdesc[i].desc.name);
  1164. return PTR_ERR(rdev);
  1165. }
  1166. all_rdevs[i] = rdev;
  1167. /*
  1168. * LDOs don't have own temperature monitoring. If temperature
  1169. * notification was requested for this LDO from DT then we will
  1170. * add the regulator to be notified if central IC temperature
  1171. * exceeds threshold.
  1172. */
  1173. if (rdesc[i].ldo_errs) {
  1174. ldo_errs_rdev_arr[temp_notif_ldos] = rdev;
  1175. ldo_errs_arr[temp_notif_ldos] = rdesc[i].ldo_errs;
  1176. temp_notif_ldos++;
  1177. }
  1178. /* Register INTB handlers for configured protections */
  1179. for (j = 0; j < idesc->num_irqs; j++) {
  1180. ret = bd96801_rdev_intb_irqs(pdev, pdata,
  1181. &idesc->irqinfo[j], rdev);
  1182. if (ret)
  1183. return ret;
  1184. }
  1185. /* Register per regulator ERRB notifiers */
  1186. if (use_errb) {
  1187. ret = bd96801_rdev_errb_irqs(pdev, rdev);
  1188. if (ret)
  1189. return ret;
  1190. }
  1191. }
  1192. if (temp_notif_ldos) {
  1193. int irq;
  1194. struct regulator_irq_desc tw_desc = {
  1195. .name = "core-thermal",
  1196. .irq_off_ms = 500,
  1197. .map_event = ldo_map_notif,
  1198. };
  1199. irq = platform_get_irq_byname(pdev, "core-thermal");
  1200. if (irq < 0)
  1201. return irq;
  1202. retp = devm_regulator_irq_helper(&pdev->dev, &tw_desc, irq, 0,
  1203. 0, &ldo_errs_arr[0],
  1204. &ldo_errs_rdev_arr[0],
  1205. temp_notif_ldos);
  1206. if (IS_ERR(retp))
  1207. return PTR_ERR(retp);
  1208. }
  1209. if (use_errb)
  1210. return bd96801_global_errb_irqs(pdev, all_rdevs,
  1211. pdata->num_regulators);
  1212. return 0;
  1213. }
  1214. static const struct platform_device_id bd96801_pmic_id[] = {
  1215. { "bd96801-regulator", (kernel_ulong_t)&bd96801_data },
  1216. { "bd96802-regulator", (kernel_ulong_t)&bd96802_data },
  1217. { "bd96805-regulator", (kernel_ulong_t)&bd96805_data },
  1218. { "bd96806-regulator", (kernel_ulong_t)&bd96806_data },
  1219. { },
  1220. };
  1221. MODULE_DEVICE_TABLE(platform, bd96801_pmic_id);
  1222. static struct platform_driver bd96801_regulator = {
  1223. .driver = {
  1224. .name = "bd96801-pmic"
  1225. },
  1226. .probe = bd96801_probe,
  1227. .id_table = bd96801_pmic_id,
  1228. };
  1229. module_platform_driver(bd96801_regulator);
  1230. MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
  1231. MODULE_DESCRIPTION("BD96801 voltage regulator driver");
  1232. MODULE_LICENSE("GPL");