pwm-stmpe.c 8.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2016 Linaro Ltd.
  4. *
  5. * Author: Linus Walleij <linus.walleij@linaro.org>
  6. */
  7. #include <linux/bitops.h>
  8. #include <linux/delay.h>
  9. #include <linux/err.h>
  10. #include <linux/mfd/stmpe.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pwm.h>
  15. #include <linux/slab.h>
  16. #define STMPE24XX_PWMCS 0x30
  17. #define PWMCS_EN_PWM0 BIT(0)
  18. #define PWMCS_EN_PWM1 BIT(1)
  19. #define PWMCS_EN_PWM2 BIT(2)
  20. #define STMPE24XX_PWMIC0 0x38
  21. #define STMPE24XX_PWMIC1 0x39
  22. #define STMPE24XX_PWMIC2 0x3a
  23. #define STMPE_PWM_24XX_PINBASE 21
  24. struct stmpe_pwm {
  25. struct stmpe *stmpe;
  26. u8 last_duty;
  27. };
  28. static inline struct stmpe_pwm *to_stmpe_pwm(struct pwm_chip *chip)
  29. {
  30. return pwmchip_get_drvdata(chip);
  31. }
  32. static int stmpe_24xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  33. {
  34. struct stmpe_pwm *stmpe_pwm = to_stmpe_pwm(chip);
  35. u8 value;
  36. int ret;
  37. ret = stmpe_reg_read(stmpe_pwm->stmpe, STMPE24XX_PWMCS);
  38. if (ret < 0) {
  39. dev_dbg(pwmchip_parent(chip), "error reading PWM#%u control\n",
  40. pwm->hwpwm);
  41. return ret;
  42. }
  43. value = ret | BIT(pwm->hwpwm);
  44. ret = stmpe_reg_write(stmpe_pwm->stmpe, STMPE24XX_PWMCS, value);
  45. if (ret) {
  46. dev_dbg(pwmchip_parent(chip), "error writing PWM#%u control\n",
  47. pwm->hwpwm);
  48. return ret;
  49. }
  50. return 0;
  51. }
  52. static int stmpe_24xx_pwm_disable(struct pwm_chip *chip,
  53. struct pwm_device *pwm)
  54. {
  55. struct stmpe_pwm *stmpe_pwm = to_stmpe_pwm(chip);
  56. u8 value;
  57. int ret;
  58. ret = stmpe_reg_read(stmpe_pwm->stmpe, STMPE24XX_PWMCS);
  59. if (ret < 0) {
  60. dev_dbg(pwmchip_parent(chip), "error reading PWM#%u control\n",
  61. pwm->hwpwm);
  62. return ret;
  63. }
  64. value = ret & ~BIT(pwm->hwpwm);
  65. ret = stmpe_reg_write(stmpe_pwm->stmpe, STMPE24XX_PWMCS, value);
  66. if (ret)
  67. dev_dbg(pwmchip_parent(chip), "error writing PWM#%u control\n",
  68. pwm->hwpwm);
  69. return ret;
  70. }
  71. /* STMPE 24xx PWM instructions */
  72. #define SMAX 0x007f
  73. #define SMIN 0x00ff
  74. #define GTS 0x0000
  75. #define LOAD BIT(14) /* Only available on 2403 */
  76. #define RAMPUP 0x0000
  77. #define RAMPDOWN BIT(7)
  78. #define PRESCALE_512 BIT(14)
  79. #define STEPTIME_1 BIT(8)
  80. #define BRANCH (BIT(15) | BIT(13))
  81. static int stmpe_24xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  82. int duty_ns, int period_ns)
  83. {
  84. struct stmpe_pwm *stmpe_pwm = to_stmpe_pwm(chip);
  85. unsigned int i, pin;
  86. u16 program[3] = {
  87. SMAX,
  88. GTS,
  89. GTS,
  90. };
  91. u8 offset;
  92. int ret;
  93. /* Make sure we are disabled */
  94. if (pwm_is_enabled(pwm)) {
  95. ret = stmpe_24xx_pwm_disable(chip, pwm);
  96. if (ret)
  97. return ret;
  98. } else {
  99. /* Connect the PWM to the pin */
  100. pin = pwm->hwpwm;
  101. /* On STMPE2401 and 2403 pins 21,22,23 are used */
  102. if (stmpe_pwm->stmpe->partnum == STMPE2401 ||
  103. stmpe_pwm->stmpe->partnum == STMPE2403)
  104. pin += STMPE_PWM_24XX_PINBASE;
  105. ret = stmpe_set_altfunc(stmpe_pwm->stmpe, BIT(pin),
  106. STMPE_BLOCK_PWM);
  107. if (ret) {
  108. dev_err(pwmchip_parent(chip), "unable to connect PWM#%u to pin\n",
  109. pwm->hwpwm);
  110. return ret;
  111. }
  112. }
  113. /* STMPE24XX */
  114. switch (pwm->hwpwm) {
  115. case 0:
  116. offset = STMPE24XX_PWMIC0;
  117. break;
  118. case 1:
  119. offset = STMPE24XX_PWMIC1;
  120. break;
  121. case 2:
  122. offset = STMPE24XX_PWMIC2;
  123. break;
  124. default:
  125. /* Should not happen as npwm is 3 */
  126. return -ENODEV;
  127. }
  128. dev_dbg(pwmchip_parent(chip), "PWM#%u: config duty %d ns, period %d ns\n",
  129. pwm->hwpwm, duty_ns, period_ns);
  130. if (duty_ns == 0) {
  131. if (stmpe_pwm->stmpe->partnum == STMPE2401)
  132. program[0] = SMAX; /* off all the time */
  133. if (stmpe_pwm->stmpe->partnum == STMPE2403)
  134. program[0] = LOAD | 0xff; /* LOAD 0xff */
  135. stmpe_pwm->last_duty = 0x00;
  136. } else if (duty_ns == period_ns) {
  137. if (stmpe_pwm->stmpe->partnum == STMPE2401)
  138. program[0] = SMIN; /* on all the time */
  139. if (stmpe_pwm->stmpe->partnum == STMPE2403)
  140. program[0] = LOAD | 0x00; /* LOAD 0x00 */
  141. stmpe_pwm->last_duty = 0xff;
  142. } else {
  143. u8 value, last = stmpe_pwm->last_duty;
  144. unsigned long duty;
  145. /*
  146. * Counter goes from 0x00 to 0xff repeatedly at 32768 Hz,
  147. * (means a period of 30517 ns) then this is compared to the
  148. * counter from the ramp, if this is >= PWM counter the output
  149. * is high. With LOAD we can define how much of the cycle it
  150. * is on.
  151. *
  152. * Prescale = 0 -> 2 kHz -> T = 1/f = 488281.25 ns
  153. */
  154. /* Scale to 0..0xff */
  155. duty = duty_ns * 256;
  156. duty = DIV_ROUND_CLOSEST(duty, period_ns);
  157. value = duty;
  158. if (value == last) {
  159. /* Run the old program */
  160. if (pwm_is_enabled(pwm))
  161. stmpe_24xx_pwm_enable(chip, pwm);
  162. return 0;
  163. } else if (stmpe_pwm->stmpe->partnum == STMPE2403) {
  164. /* STMPE2403 can simply set the right PWM value */
  165. program[0] = LOAD | value;
  166. program[1] = 0x0000;
  167. } else if (stmpe_pwm->stmpe->partnum == STMPE2401) {
  168. /* STMPE2401 need a complex program */
  169. u16 incdec = 0x0000;
  170. if (last < value)
  171. /* Count up */
  172. incdec = RAMPUP | (value - last);
  173. else
  174. /* Count down */
  175. incdec = RAMPDOWN | (last - value);
  176. /* Step to desired value, smoothly */
  177. program[0] = PRESCALE_512 | STEPTIME_1 | incdec;
  178. /* Loop eternally to 0x00 */
  179. program[1] = BRANCH;
  180. }
  181. dev_dbg(pwmchip_parent(chip),
  182. "PWM#%u: value = %02x, last_duty = %02x, program=%04x,%04x,%04x\n",
  183. pwm->hwpwm, value, last, program[0], program[1],
  184. program[2]);
  185. stmpe_pwm->last_duty = value;
  186. }
  187. /*
  188. * We can write programs of up to 64 16-bit words into this channel.
  189. */
  190. for (i = 0; i < ARRAY_SIZE(program); i++) {
  191. u8 value;
  192. value = (program[i] >> 8) & 0xff;
  193. ret = stmpe_reg_write(stmpe_pwm->stmpe, offset, value);
  194. if (ret) {
  195. dev_dbg(pwmchip_parent(chip), "error writing register %02x: %d\n",
  196. offset, ret);
  197. return ret;
  198. }
  199. value = program[i] & 0xff;
  200. ret = stmpe_reg_write(stmpe_pwm->stmpe, offset, value);
  201. if (ret) {
  202. dev_dbg(pwmchip_parent(chip), "error writing register %02x: %d\n",
  203. offset, ret);
  204. return ret;
  205. }
  206. }
  207. /* If we were enabled, re-enable this PWM */
  208. if (pwm_is_enabled(pwm))
  209. stmpe_24xx_pwm_enable(chip, pwm);
  210. /* Sleep for 200ms so we're sure it will take effect */
  211. msleep(200);
  212. dev_dbg(pwmchip_parent(chip), "programmed PWM#%u, %u bytes\n", pwm->hwpwm, i);
  213. return 0;
  214. }
  215. static int stmpe_24xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
  216. const struct pwm_state *state)
  217. {
  218. int err;
  219. if (state->polarity != PWM_POLARITY_NORMAL)
  220. return -EINVAL;
  221. if (!state->enabled) {
  222. if (pwm->state.enabled)
  223. return stmpe_24xx_pwm_disable(chip, pwm);
  224. return 0;
  225. }
  226. err = stmpe_24xx_pwm_config(chip, pwm, state->duty_cycle, state->period);
  227. if (err)
  228. return err;
  229. if (!pwm->state.enabled)
  230. err = stmpe_24xx_pwm_enable(chip, pwm);
  231. return err;
  232. }
  233. static const struct pwm_ops stmpe_24xx_pwm_ops = {
  234. .apply = stmpe_24xx_pwm_apply,
  235. };
  236. static int __init stmpe_pwm_probe(struct platform_device *pdev)
  237. {
  238. struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent);
  239. struct pwm_chip *chip;
  240. struct stmpe_pwm *stmpe_pwm;
  241. int ret;
  242. switch (stmpe->partnum) {
  243. case STMPE2401:
  244. case STMPE2403:
  245. break;
  246. case STMPE1601:
  247. return dev_err_probe(&pdev->dev, -ENODEV,
  248. "STMPE1601 not yet supported\n");
  249. default:
  250. return dev_err_probe(&pdev->dev, -ENODEV,
  251. "Unknown STMPE PWM\n");
  252. }
  253. chip = devm_pwmchip_alloc(&pdev->dev, 3, sizeof(*stmpe_pwm));
  254. if (IS_ERR(chip))
  255. return PTR_ERR(chip);
  256. stmpe_pwm = to_stmpe_pwm(chip);
  257. stmpe_pwm->stmpe = stmpe;
  258. chip->ops = &stmpe_24xx_pwm_ops;
  259. ret = stmpe_enable(stmpe, STMPE_BLOCK_PWM);
  260. if (ret)
  261. return ret;
  262. ret = pwmchip_add(chip);
  263. if (ret) {
  264. stmpe_disable(stmpe, STMPE_BLOCK_PWM);
  265. return ret;
  266. }
  267. platform_set_drvdata(pdev, chip);
  268. return 0;
  269. }
  270. static void __exit stmpe_pwm_remove(struct platform_device *pdev)
  271. {
  272. struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent);
  273. struct pwm_chip *chip = platform_get_drvdata(pdev);
  274. pwmchip_remove(chip);
  275. stmpe_disable(stmpe, STMPE_BLOCK_PWM);
  276. }
  277. /*
  278. * stmpe_pwm_remove() lives in .exit.text. For drivers registered via
  279. * module_platform_driver_probe() this is ok because they cannot get unbound at
  280. * runtime. So mark the driver struct with __refdata to prevent modpost
  281. * triggering a section mismatch warning.
  282. */
  283. static struct platform_driver stmpe_pwm_driver __refdata = {
  284. .driver = {
  285. .name = "stmpe-pwm",
  286. },
  287. .remove = __exit_p(stmpe_pwm_remove),
  288. };
  289. module_platform_driver_probe(stmpe_pwm_driver, stmpe_pwm_probe);
  290. MODULE_DESCRIPTION("STMPE expander PWM");
  291. MODULE_LICENSE("GPL");