punit_ipc.c 7.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for the Intel P-Unit Mailbox IPC mechanism
  4. *
  5. * (C) Copyright 2015 Intel Corporation
  6. *
  7. * The heart of the P-Unit is the Foxton microcontroller and its firmware,
  8. * which provide mailbox interface for power management usage.
  9. */
  10. #include <linux/bitops.h>
  11. #include <linux/delay.h>
  12. #include <linux/device.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/io.h>
  15. #include <linux/mod_devicetable.h>
  16. #include <linux/module.h>
  17. #include <linux/platform_device.h>
  18. #include <asm/intel_punit_ipc.h>
  19. /* IPC Mailbox registers */
  20. #define OFFSET_DATA_LOW 0x0
  21. #define OFFSET_DATA_HIGH 0x4
  22. /* bit field of interface register */
  23. #define CMD_RUN BIT(31)
  24. #define CMD_ERRCODE_MASK GENMASK(7, 0)
  25. #define CMD_PARA1_SHIFT 8
  26. #define CMD_PARA2_SHIFT 16
  27. #define CMD_TIMEOUT_SECONDS 1
  28. enum {
  29. BASE_DATA = 0,
  30. BASE_IFACE,
  31. BASE_MAX,
  32. };
  33. typedef struct {
  34. struct device *dev;
  35. struct mutex lock;
  36. int irq;
  37. struct completion cmd_complete;
  38. /* base of interface and data registers */
  39. void __iomem *base[RESERVED_IPC][BASE_MAX];
  40. IPC_TYPE type;
  41. } IPC_DEV;
  42. static IPC_DEV *punit_ipcdev;
  43. static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)
  44. {
  45. return readl(ipcdev->base[type][BASE_IFACE]);
  46. }
  47. static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)
  48. {
  49. writel(cmd, ipcdev->base[type][BASE_IFACE]);
  50. }
  51. static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)
  52. {
  53. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  54. }
  55. static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)
  56. {
  57. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  58. }
  59. static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  60. {
  61. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  62. }
  63. static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  64. {
  65. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  66. }
  67. static const char *ipc_err_string(int error)
  68. {
  69. if (error == IPC_PUNIT_ERR_SUCCESS)
  70. return "no error";
  71. else if (error == IPC_PUNIT_ERR_INVALID_CMD)
  72. return "invalid command";
  73. else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)
  74. return "invalid parameter";
  75. else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)
  76. return "command timeout";
  77. else if (error == IPC_PUNIT_ERR_CMD_LOCKED)
  78. return "command locked";
  79. else if (error == IPC_PUNIT_ERR_INVALID_VR_ID)
  80. return "invalid vr id";
  81. else if (error == IPC_PUNIT_ERR_VR_ERR)
  82. return "vr error";
  83. else
  84. return "unknown error";
  85. }
  86. static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)
  87. {
  88. int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;
  89. int errcode;
  90. int status;
  91. if (ipcdev->irq) {
  92. if (!wait_for_completion_timeout(&ipcdev->cmd_complete,
  93. CMD_TIMEOUT_SECONDS * HZ)) {
  94. dev_err(ipcdev->dev, "IPC timed out\n");
  95. return -ETIMEDOUT;
  96. }
  97. } else {
  98. while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)
  99. udelay(1);
  100. if (!loops) {
  101. dev_err(ipcdev->dev, "IPC timed out\n");
  102. return -ETIMEDOUT;
  103. }
  104. }
  105. status = ipc_read_status(ipcdev, type);
  106. errcode = status & CMD_ERRCODE_MASK;
  107. if (errcode) {
  108. dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n",
  109. ipc_err_string(errcode), status);
  110. return -EIO;
  111. }
  112. return 0;
  113. }
  114. /**
  115. * intel_punit_ipc_command() - IPC command with data and pointers
  116. * @cmd: IPC command code.
  117. * @para1: First 8bit parameter, set 0 if not used.
  118. * @para2: Second 8bit parameter, set 0 if not used.
  119. * @in: Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD.
  120. * @out: Output data.
  121. *
  122. * Send a IPC command to P-Unit with data transaction
  123. *
  124. * Return: IPC error code or 0 on success.
  125. */
  126. int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)
  127. {
  128. IPC_DEV *ipcdev = punit_ipcdev;
  129. IPC_TYPE type;
  130. u32 val;
  131. int ret;
  132. mutex_lock(&ipcdev->lock);
  133. reinit_completion(&ipcdev->cmd_complete);
  134. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  135. if (in) {
  136. ipc_write_data_low(ipcdev, type, *in);
  137. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  138. ipc_write_data_high(ipcdev, type, *++in);
  139. }
  140. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  141. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  142. ipc_write_cmd(ipcdev, type, val);
  143. ret = intel_punit_ipc_check_status(ipcdev, type);
  144. if (ret)
  145. goto out;
  146. if (out) {
  147. *out = ipc_read_data_low(ipcdev, type);
  148. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  149. *++out = ipc_read_data_high(ipcdev, type);
  150. }
  151. out:
  152. mutex_unlock(&ipcdev->lock);
  153. return ret;
  154. }
  155. EXPORT_SYMBOL_GPL(intel_punit_ipc_command);
  156. static irqreturn_t intel_punit_ioc(int irq, void *dev_id)
  157. {
  158. IPC_DEV *ipcdev = dev_id;
  159. complete(&ipcdev->cmd_complete);
  160. return IRQ_HANDLED;
  161. }
  162. static int intel_punit_get_bars(struct platform_device *pdev)
  163. {
  164. void __iomem *addr;
  165. /*
  166. * The following resources are required
  167. * - BIOS_IPC BASE_DATA
  168. * - BIOS_IPC BASE_IFACE
  169. */
  170. addr = devm_platform_ioremap_resource(pdev, 0);
  171. if (IS_ERR(addr))
  172. return PTR_ERR(addr);
  173. punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr;
  174. addr = devm_platform_ioremap_resource(pdev, 1);
  175. if (IS_ERR(addr))
  176. return PTR_ERR(addr);
  177. punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr;
  178. /*
  179. * The following resources are optional
  180. * - ISPDRIVER_IPC BASE_DATA
  181. * - ISPDRIVER_IPC BASE_IFACE
  182. * - GTDRIVER_IPC BASE_DATA
  183. * - GTDRIVER_IPC BASE_IFACE
  184. */
  185. addr = devm_platform_ioremap_resource(pdev, 2);
  186. if (!IS_ERR(addr))
  187. punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr;
  188. addr = devm_platform_ioremap_resource(pdev, 3);
  189. if (!IS_ERR(addr))
  190. punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr;
  191. addr = devm_platform_ioremap_resource(pdev, 4);
  192. if (!IS_ERR(addr))
  193. punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr;
  194. addr = devm_platform_ioremap_resource(pdev, 5);
  195. if (!IS_ERR(addr))
  196. punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr;
  197. return 0;
  198. }
  199. static int intel_punit_ipc_probe(struct platform_device *pdev)
  200. {
  201. int irq, ret;
  202. punit_ipcdev = devm_kzalloc(&pdev->dev,
  203. sizeof(*punit_ipcdev), GFP_KERNEL);
  204. if (!punit_ipcdev)
  205. return -ENOMEM;
  206. platform_set_drvdata(pdev, punit_ipcdev);
  207. irq = platform_get_irq_optional(pdev, 0);
  208. if (irq < 0) {
  209. dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
  210. } else {
  211. ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,
  212. IRQF_NO_SUSPEND, "intel_punit_ipc",
  213. punit_ipcdev);
  214. if (ret) {
  215. dev_err(&pdev->dev, "Failed to request irq: %d\n", irq);
  216. return ret;
  217. }
  218. punit_ipcdev->irq = irq;
  219. }
  220. ret = intel_punit_get_bars(pdev);
  221. if (ret)
  222. return ret;
  223. punit_ipcdev->dev = &pdev->dev;
  224. mutex_init(&punit_ipcdev->lock);
  225. init_completion(&punit_ipcdev->cmd_complete);
  226. return 0;
  227. }
  228. static const struct acpi_device_id punit_ipc_acpi_ids[] = {
  229. { "INT34D4", 0 },
  230. { }
  231. };
  232. MODULE_DEVICE_TABLE(acpi, punit_ipc_acpi_ids);
  233. static struct platform_driver intel_punit_ipc_driver = {
  234. .probe = intel_punit_ipc_probe,
  235. .driver = {
  236. .name = "intel_punit_ipc",
  237. .acpi_match_table = punit_ipc_acpi_ids,
  238. },
  239. };
  240. static int __init intel_punit_ipc_init(void)
  241. {
  242. return platform_driver_register(&intel_punit_ipc_driver);
  243. }
  244. static void __exit intel_punit_ipc_exit(void)
  245. {
  246. platform_driver_unregister(&intel_punit_ipc_driver);
  247. }
  248. MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
  249. MODULE_DESCRIPTION("Intel P-Unit IPC driver");
  250. MODULE_LICENSE("GPL v2");
  251. /* Some modules are dependent on this, so init earlier */
  252. fs_initcall(intel_punit_ipc_init);
  253. module_exit(intel_punit_ipc_exit);