asus-armoury.h 56 KB

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  1. /* SPDX-License-Identifier: GPL-2.0
  2. *
  3. * Definitions for kernel modules using asus-armoury driver
  4. *
  5. * Copyright (c) 2024 Luke Jones <luke@ljones.dev>
  6. */
  7. #ifndef _ASUS_ARMOURY_H_
  8. #define _ASUS_ARMOURY_H_
  9. #include <linux/dmi.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/sysfs.h>
  12. #include <linux/types.h>
  13. #define DRIVER_NAME "asus-armoury"
  14. /**
  15. * armoury_attr_uint_store() - Send an uint to WMI method if within min/max.
  16. * @kobj: Pointer to the driver object.
  17. * @attr: Pointer to the attribute calling this function.
  18. * @buf: The buffer to read from, this is parsed to `uint` type.
  19. * @count: Required by sysfs attribute macros, pass in from the callee attr.
  20. * @min: Minimum accepted value. Below this returns -EINVAL.
  21. * @max: Maximum accepted value. Above this returns -EINVAL.
  22. * @store_value: Pointer to where the parsed value should be stored.
  23. * @wmi_dev: The WMI function ID to use.
  24. *
  25. * This function is intended to be generic so it can be called from any "_store"
  26. * attribute which works only with integers.
  27. *
  28. * Integers to be sent to the WMI method is inclusive range checked and
  29. * an error returned if out of range.
  30. *
  31. * If the value is valid and WMI is success then the sysfs attribute is notified
  32. * and if asus_bios_requires_reboot() is true then reboot attribute
  33. * is also notified.
  34. *
  35. * Returns: Either count, or an error.
  36. */
  37. ssize_t armoury_attr_uint_store(struct kobject *kobj, struct kobj_attribute *attr,
  38. const char *buf, size_t count, u32 min, u32 max,
  39. u32 *store_value, u32 wmi_dev);
  40. /**
  41. * armoury_attr_uint_show() - Receive an uint from a WMI method.
  42. * @kobj: Pointer to the driver object.
  43. * @attr: Pointer to the attribute calling this function.
  44. * @buf: The buffer to write to, as an `uint` type.
  45. * @wmi_dev: The WMI function ID to use.
  46. *
  47. * This function is intended to be generic so it can be called from any "_show"
  48. * attribute which works only with integers.
  49. *
  50. * Returns: Either count, or an error.
  51. */
  52. ssize_t armoury_attr_uint_show(struct kobject *kobj, struct kobj_attribute *attr,
  53. char *buf, u32 wmi_dev);
  54. #define __ASUS_ATTR_RO(_func, _name) \
  55. { \
  56. .attr = { .name = __stringify(_name), .mode = 0444 }, \
  57. .show = _func##_##_name##_show, \
  58. }
  59. #define __ASUS_ATTR_RO_AS(_name, _show) \
  60. { \
  61. .attr = { .name = __stringify(_name), .mode = 0444 }, \
  62. .show = _show, \
  63. }
  64. #define __ASUS_ATTR_RW(_func, _name) \
  65. __ATTR(_name, 0644, _func##_##_name##_show, _func##_##_name##_store)
  66. #define __WMI_STORE_INT(_attr, _min, _max, _wmi) \
  67. static ssize_t _attr##_store(struct kobject *kobj, \
  68. struct kobj_attribute *attr, \
  69. const char *buf, size_t count) \
  70. { \
  71. return armoury_attr_uint_store(kobj, attr, buf, count, _min, \
  72. _max, NULL, _wmi); \
  73. }
  74. #define ASUS_WMI_SHOW_INT(_attr, _wmi) \
  75. static ssize_t _attr##_show(struct kobject *kobj, \
  76. struct kobj_attribute *attr, char *buf) \
  77. { \
  78. return armoury_attr_uint_show(kobj, attr, buf, _wmi); \
  79. }
  80. /* Create functions and attributes for use in other macros or on their own */
  81. /* Shows a formatted static variable */
  82. #define __ATTR_SHOW_FMT(_prop, _attrname, _fmt, _val) \
  83. static ssize_t _attrname##_##_prop##_show( \
  84. struct kobject *kobj, struct kobj_attribute *attr, char *buf) \
  85. { \
  86. return sysfs_emit(buf, _fmt, _val); \
  87. } \
  88. static struct kobj_attribute attr_##_attrname##_##_prop = \
  89. __ASUS_ATTR_RO(_attrname, _prop)
  90. #define __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, _possible, _dispname)\
  91. ASUS_WMI_SHOW_INT(_attrname##_current_value, _wmi); \
  92. static struct kobj_attribute attr_##_attrname##_current_value = \
  93. __ASUS_ATTR_RO(_attrname, current_value); \
  94. __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \
  95. __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \
  96. static struct kobj_attribute attr_##_attrname##_type = \
  97. __ASUS_ATTR_RO_AS(type, enum_type_show); \
  98. static struct attribute *_attrname##_attrs[] = { \
  99. &attr_##_attrname##_current_value.attr, \
  100. &attr_##_attrname##_display_name.attr, \
  101. &attr_##_attrname##_possible_values.attr, \
  102. &attr_##_attrname##_type.attr, \
  103. NULL \
  104. }; \
  105. static const struct attribute_group _attrname##_attr_group = { \
  106. .name = _fsname, .attrs = _attrname##_attrs \
  107. }
  108. #define __ATTR_RW_INT_GROUP_ENUM(_attrname, _minv, _maxv, _wmi, _fsname,\
  109. _possible, _dispname) \
  110. __WMI_STORE_INT(_attrname##_current_value, _minv, _maxv, _wmi); \
  111. ASUS_WMI_SHOW_INT(_attrname##_current_value, _wmi); \
  112. static struct kobj_attribute attr_##_attrname##_current_value = \
  113. __ASUS_ATTR_RW(_attrname, current_value); \
  114. __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \
  115. __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \
  116. static struct kobj_attribute attr_##_attrname##_type = \
  117. __ASUS_ATTR_RO_AS(type, enum_type_show); \
  118. static struct attribute *_attrname##_attrs[] = { \
  119. &attr_##_attrname##_current_value.attr, \
  120. &attr_##_attrname##_display_name.attr, \
  121. &attr_##_attrname##_possible_values.attr, \
  122. &attr_##_attrname##_type.attr, \
  123. NULL \
  124. }; \
  125. static const struct attribute_group _attrname##_attr_group = { \
  126. .name = _fsname, .attrs = _attrname##_attrs \
  127. }
  128. /* Boolean style enumeration, base macro. Requires adding show/store */
  129. #define __ATTR_GROUP_ENUM(_attrname, _fsname, _possible, _dispname) \
  130. __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \
  131. __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \
  132. static struct kobj_attribute attr_##_attrname##_type = \
  133. __ASUS_ATTR_RO_AS(type, enum_type_show); \
  134. static struct attribute *_attrname##_attrs[] = { \
  135. &attr_##_attrname##_current_value.attr, \
  136. &attr_##_attrname##_display_name.attr, \
  137. &attr_##_attrname##_possible_values.attr, \
  138. &attr_##_attrname##_type.attr, \
  139. NULL \
  140. }; \
  141. static const struct attribute_group _attrname##_attr_group = { \
  142. .name = _fsname, .attrs = _attrname##_attrs \
  143. }
  144. #define ASUS_ATTR_GROUP_BOOL_RO(_attrname, _fsname, _wmi, _dispname) \
  145. __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, "0;1", _dispname)
  146. #define ASUS_ATTR_GROUP_BOOL_RW(_attrname, _fsname, _wmi, _dispname) \
  147. __ATTR_RW_INT_GROUP_ENUM(_attrname, 0, 1, _wmi, _fsname, "0;1", _dispname)
  148. #define ASUS_ATTR_GROUP_ENUM_INT_RO(_attrname, _fsname, _wmi, _possible, _dispname) \
  149. __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, _possible, _dispname)
  150. /*
  151. * Requires <name>_current_value_show(), <name>_current_value_show()
  152. */
  153. #define ASUS_ATTR_GROUP_BOOL(_attrname, _fsname, _dispname) \
  154. static struct kobj_attribute attr_##_attrname##_current_value = \
  155. __ASUS_ATTR_RW(_attrname, current_value); \
  156. __ATTR_GROUP_ENUM(_attrname, _fsname, "0;1", _dispname)
  157. /*
  158. * Requires <name>_current_value_show(), <name>_current_value_show()
  159. * and <name>_possible_values_show()
  160. */
  161. #define ASUS_ATTR_GROUP_ENUM(_attrname, _fsname, _dispname) \
  162. __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \
  163. static struct kobj_attribute attr_##_attrname##_current_value = \
  164. __ASUS_ATTR_RW(_attrname, current_value); \
  165. static struct kobj_attribute attr_##_attrname##_possible_values = \
  166. __ASUS_ATTR_RO(_attrname, possible_values); \
  167. static struct kobj_attribute attr_##_attrname##_type = \
  168. __ASUS_ATTR_RO_AS(type, enum_type_show); \
  169. static struct attribute *_attrname##_attrs[] = { \
  170. &attr_##_attrname##_current_value.attr, \
  171. &attr_##_attrname##_display_name.attr, \
  172. &attr_##_attrname##_possible_values.attr, \
  173. &attr_##_attrname##_type.attr, \
  174. NULL \
  175. }; \
  176. static const struct attribute_group _attrname##_attr_group = { \
  177. .name = _fsname, .attrs = _attrname##_attrs \
  178. }
  179. #define ASUS_ATTR_GROUP_INT_VALUE_ONLY_RO(_attrname, _fsname, _wmi, _dispname) \
  180. ASUS_WMI_SHOW_INT(_attrname##_current_value, _wmi); \
  181. static struct kobj_attribute attr_##_attrname##_current_value = \
  182. __ASUS_ATTR_RO(_attrname, current_value); \
  183. __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \
  184. static struct kobj_attribute attr_##_attrname##_type = \
  185. __ASUS_ATTR_RO_AS(type, int_type_show); \
  186. static struct attribute *_attrname##_attrs[] = { \
  187. &attr_##_attrname##_current_value.attr, \
  188. &attr_##_attrname##_display_name.attr, \
  189. &attr_##_attrname##_type.attr, NULL \
  190. }; \
  191. static const struct attribute_group _attrname##_attr_group = { \
  192. .name = _fsname, .attrs = _attrname##_attrs \
  193. }
  194. /*
  195. * ROG PPT attributes need a little different in setup as they
  196. * require rog_tunables members.
  197. */
  198. #define __ROG_TUNABLE_SHOW(_prop, _attrname, _val) \
  199. static ssize_t _attrname##_##_prop##_show( \
  200. struct kobject *kobj, struct kobj_attribute *attr, char *buf) \
  201. { \
  202. struct rog_tunables *tunables = get_current_tunables(); \
  203. \
  204. if (!tunables || !tunables->power_limits) \
  205. return -ENODEV; \
  206. \
  207. return sysfs_emit(buf, "%d\n", tunables->power_limits->_val); \
  208. } \
  209. static struct kobj_attribute attr_##_attrname##_##_prop = \
  210. __ASUS_ATTR_RO(_attrname, _prop)
  211. #define __ROG_TUNABLE_SHOW_DEFAULT(_attrname) \
  212. static ssize_t _attrname##_default_value_show( \
  213. struct kobject *kobj, struct kobj_attribute *attr, char *buf) \
  214. { \
  215. struct rog_tunables *tunables = get_current_tunables(); \
  216. \
  217. if (!tunables || !tunables->power_limits) \
  218. return -ENODEV; \
  219. \
  220. return sysfs_emit( \
  221. buf, "%d\n", \
  222. tunables->power_limits->_attrname##_def ? \
  223. tunables->power_limits->_attrname##_def : \
  224. tunables->power_limits->_attrname##_max); \
  225. } \
  226. static struct kobj_attribute attr_##_attrname##_default_value = \
  227. __ASUS_ATTR_RO(_attrname, default_value)
  228. #define __ROG_TUNABLE_RW(_attr, _wmi) \
  229. static ssize_t _attr##_current_value_store( \
  230. struct kobject *kobj, struct kobj_attribute *attr, \
  231. const char *buf, size_t count) \
  232. { \
  233. struct rog_tunables *tunables = get_current_tunables(); \
  234. \
  235. if (!tunables || !tunables->power_limits) \
  236. return -ENODEV; \
  237. \
  238. if (tunables->power_limits->_attr##_min == \
  239. tunables->power_limits->_attr##_max) \
  240. return -EINVAL; \
  241. \
  242. return armoury_attr_uint_store(kobj, attr, buf, count, \
  243. tunables->power_limits->_attr##_min, \
  244. tunables->power_limits->_attr##_max, \
  245. &tunables->_attr, _wmi); \
  246. } \
  247. static ssize_t _attr##_current_value_show( \
  248. struct kobject *kobj, struct kobj_attribute *attr, char *buf) \
  249. { \
  250. struct rog_tunables *tunables = get_current_tunables(); \
  251. \
  252. if (!tunables) \
  253. return -ENODEV; \
  254. \
  255. return sysfs_emit(buf, "%u\n", tunables->_attr); \
  256. } \
  257. static struct kobj_attribute attr_##_attr##_current_value = \
  258. __ASUS_ATTR_RW(_attr, current_value)
  259. #define ASUS_ATTR_GROUP_ROG_TUNABLE(_attrname, _fsname, _wmi, _dispname) \
  260. __ROG_TUNABLE_RW(_attrname, _wmi); \
  261. __ROG_TUNABLE_SHOW_DEFAULT(_attrname); \
  262. __ROG_TUNABLE_SHOW(min_value, _attrname, _attrname##_min); \
  263. __ROG_TUNABLE_SHOW(max_value, _attrname, _attrname##_max); \
  264. __ATTR_SHOW_FMT(scalar_increment, _attrname, "%d\n", 1); \
  265. __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \
  266. static struct kobj_attribute attr_##_attrname##_type = \
  267. __ASUS_ATTR_RO_AS(type, int_type_show); \
  268. static struct attribute *_attrname##_attrs[] = { \
  269. &attr_##_attrname##_current_value.attr, \
  270. &attr_##_attrname##_default_value.attr, \
  271. &attr_##_attrname##_min_value.attr, \
  272. &attr_##_attrname##_max_value.attr, \
  273. &attr_##_attrname##_scalar_increment.attr, \
  274. &attr_##_attrname##_display_name.attr, \
  275. &attr_##_attrname##_type.attr, \
  276. NULL \
  277. }; \
  278. static const struct attribute_group _attrname##_attr_group = { \
  279. .name = _fsname, .attrs = _attrname##_attrs \
  280. }
  281. /* Default is always the maximum value unless *_def is specified */
  282. struct power_limits {
  283. u8 ppt_pl1_spl_min;
  284. u8 ppt_pl1_spl_def;
  285. u8 ppt_pl1_spl_max;
  286. u8 ppt_pl2_sppt_min;
  287. u8 ppt_pl2_sppt_def;
  288. u8 ppt_pl2_sppt_max;
  289. u8 ppt_pl3_fppt_min;
  290. u8 ppt_pl3_fppt_def;
  291. u8 ppt_pl3_fppt_max;
  292. u8 ppt_apu_sppt_min;
  293. u8 ppt_apu_sppt_def;
  294. u8 ppt_apu_sppt_max;
  295. u8 ppt_platform_sppt_min;
  296. u8 ppt_platform_sppt_def;
  297. u8 ppt_platform_sppt_max;
  298. /* Nvidia GPU specific, default is always max */
  299. u8 nv_dynamic_boost_def; // unused. exists for macro
  300. u8 nv_dynamic_boost_min;
  301. u8 nv_dynamic_boost_max;
  302. u8 nv_temp_target_def; // unused. exists for macro
  303. u8 nv_temp_target_min;
  304. u8 nv_temp_target_max;
  305. u8 nv_tgp_def; // unused. exists for macro
  306. u8 nv_tgp_min;
  307. u8 nv_tgp_max;
  308. };
  309. struct power_data {
  310. const struct power_limits *ac_data;
  311. const struct power_limits *dc_data;
  312. bool requires_fan_curve;
  313. };
  314. /*
  315. * For each available attribute there must be a min and a max.
  316. * _def is not required and will be assumed to be default == max if missing.
  317. */
  318. static const struct dmi_system_id power_limits[] = {
  319. {
  320. .matches = {
  321. DMI_MATCH(DMI_BOARD_NAME, "FA401UM"),
  322. },
  323. .driver_data = &(struct power_data) {
  324. .ac_data = &(struct power_limits) {
  325. .ppt_pl1_spl_min = 15,
  326. .ppt_pl1_spl_max = 80,
  327. .ppt_pl2_sppt_min = 35,
  328. .ppt_pl2_sppt_max = 80,
  329. .ppt_pl3_fppt_min = 35,
  330. .ppt_pl3_fppt_max = 80,
  331. .nv_dynamic_boost_min = 5,
  332. .nv_dynamic_boost_max = 15,
  333. .nv_temp_target_min = 75,
  334. .nv_temp_target_max = 87,
  335. },
  336. .dc_data = &(struct power_limits) {
  337. .ppt_pl1_spl_min = 25,
  338. .ppt_pl1_spl_max = 35,
  339. .ppt_pl2_sppt_min = 31,
  340. .ppt_pl2_sppt_max = 44,
  341. .ppt_pl3_fppt_min = 45,
  342. .ppt_pl3_fppt_max = 65,
  343. .nv_temp_target_min = 75,
  344. .nv_temp_target_max = 87,
  345. },
  346. },
  347. },
  348. {
  349. .matches = {
  350. DMI_MATCH(DMI_BOARD_NAME, "FA401UV"),
  351. },
  352. .driver_data = &(struct power_data) {
  353. .ac_data = &(struct power_limits) {
  354. .ppt_pl1_spl_min = 15,
  355. .ppt_pl1_spl_max = 80,
  356. .ppt_pl2_sppt_min = 35,
  357. .ppt_pl2_sppt_max = 80,
  358. .ppt_pl3_fppt_min = 35,
  359. .ppt_pl3_fppt_max = 80,
  360. .nv_dynamic_boost_min = 5,
  361. .nv_dynamic_boost_max = 25,
  362. .nv_temp_target_min = 75,
  363. .nv_temp_target_max = 87,
  364. .nv_tgp_min = 55,
  365. .nv_tgp_max = 75,
  366. },
  367. .dc_data = &(struct power_limits) {
  368. .ppt_pl1_spl_min = 25,
  369. .ppt_pl1_spl_max = 35,
  370. .ppt_pl2_sppt_min = 31,
  371. .ppt_pl2_sppt_max = 44,
  372. .ppt_pl3_fppt_min = 45,
  373. .ppt_pl3_fppt_max = 65,
  374. .nv_temp_target_min = 75,
  375. .nv_temp_target_max = 87,
  376. },
  377. },
  378. },
  379. {
  380. .matches = {
  381. DMI_MATCH(DMI_BOARD_NAME, "FA401W"),
  382. },
  383. .driver_data = &(struct power_data) {
  384. .ac_data = &(struct power_limits) {
  385. .ppt_pl1_spl_min = 15,
  386. .ppt_pl1_spl_max = 80,
  387. .ppt_pl2_sppt_min = 35,
  388. .ppt_pl2_sppt_max = 80,
  389. .ppt_pl3_fppt_min = 35,
  390. .ppt_pl3_fppt_max = 80,
  391. .nv_dynamic_boost_min = 5,
  392. .nv_dynamic_boost_max = 25,
  393. .nv_temp_target_min = 75,
  394. .nv_temp_target_max = 87,
  395. .nv_tgp_min = 55,
  396. .nv_tgp_max = 75,
  397. },
  398. .dc_data = &(struct power_limits) {
  399. .ppt_pl1_spl_min = 25,
  400. .ppt_pl1_spl_max = 30,
  401. .ppt_pl2_sppt_min = 31,
  402. .ppt_pl2_sppt_max = 44,
  403. .ppt_pl3_fppt_min = 45,
  404. .ppt_pl3_fppt_max = 65,
  405. .nv_temp_target_min = 75,
  406. .nv_temp_target_max = 87,
  407. },
  408. },
  409. },
  410. {
  411. .matches = {
  412. DMI_MATCH(DMI_BOARD_NAME, "FA507N"),
  413. },
  414. .driver_data = &(struct power_data) {
  415. .ac_data = &(struct power_limits) {
  416. .ppt_pl1_spl_min = 15,
  417. .ppt_pl1_spl_max = 80,
  418. .ppt_pl2_sppt_min = 35,
  419. .ppt_pl2_sppt_max = 80,
  420. .ppt_pl3_fppt_min = 35,
  421. .ppt_pl3_fppt_max = 80,
  422. .nv_dynamic_boost_min = 5,
  423. .nv_dynamic_boost_max = 25,
  424. .nv_temp_target_min = 75,
  425. .nv_temp_target_max = 87,
  426. },
  427. .dc_data = &(struct power_limits) {
  428. .ppt_pl1_spl_min = 15,
  429. .ppt_pl1_spl_def = 45,
  430. .ppt_pl1_spl_max = 65,
  431. .ppt_pl2_sppt_min = 35,
  432. .ppt_pl2_sppt_def = 54,
  433. .ppt_pl2_sppt_max = 65,
  434. .ppt_pl3_fppt_min = 35,
  435. .ppt_pl3_fppt_max = 65,
  436. .nv_temp_target_min = 75,
  437. .nv_temp_target_max = 87,
  438. },
  439. },
  440. },
  441. {
  442. .matches = {
  443. DMI_MATCH(DMI_BOARD_NAME, "FA507UV"),
  444. },
  445. .driver_data = &(struct power_data) {
  446. .ac_data = &(struct power_limits) {
  447. .ppt_pl1_spl_min = 15,
  448. .ppt_pl1_spl_max = 80,
  449. .ppt_pl2_sppt_min = 35,
  450. .ppt_pl2_sppt_max = 80,
  451. .ppt_pl3_fppt_min = 35,
  452. .ppt_pl3_fppt_max = 80,
  453. .nv_dynamic_boost_min = 5,
  454. .nv_dynamic_boost_max = 25,
  455. .nv_temp_target_min = 75,
  456. .nv_temp_target_max = 87,
  457. .nv_tgp_min = 55,
  458. .nv_tgp_max = 115,
  459. },
  460. .dc_data = &(struct power_limits) {
  461. .ppt_pl1_spl_min = 15,
  462. .ppt_pl1_spl_def = 45,
  463. .ppt_pl1_spl_max = 65,
  464. .ppt_pl2_sppt_min = 35,
  465. .ppt_pl2_sppt_def = 54,
  466. .ppt_pl2_sppt_max = 65,
  467. .ppt_pl3_fppt_min = 35,
  468. .ppt_pl3_fppt_max = 65,
  469. .nv_temp_target_min = 75,
  470. .nv_temp_target_max = 87,
  471. },
  472. },
  473. },
  474. {
  475. .matches = {
  476. DMI_MATCH(DMI_BOARD_NAME, "FA507R"),
  477. },
  478. .driver_data = &(struct power_data) {
  479. .ac_data = &(struct power_limits) {
  480. .ppt_pl1_spl_min = 15,
  481. .ppt_pl1_spl_max = 80,
  482. .ppt_pl2_sppt_min = 35,
  483. .ppt_pl2_sppt_max = 80,
  484. .ppt_pl3_fppt_min = 35,
  485. .ppt_pl3_fppt_max = 80,
  486. .nv_dynamic_boost_min = 5,
  487. .nv_dynamic_boost_max = 25,
  488. .nv_temp_target_min = 75,
  489. .nv_temp_target_max = 87,
  490. },
  491. .dc_data = &(struct power_limits) {
  492. .ppt_pl1_spl_min = 15,
  493. .ppt_pl1_spl_def = 45,
  494. .ppt_pl1_spl_max = 65,
  495. .ppt_pl2_sppt_min = 35,
  496. .ppt_pl2_sppt_def = 54,
  497. .ppt_pl2_sppt_max = 65,
  498. .ppt_pl3_fppt_min = 35,
  499. .ppt_pl3_fppt_max = 65,
  500. .nv_temp_target_min = 75,
  501. .nv_temp_target_max = 87,
  502. },
  503. },
  504. },
  505. {
  506. .matches = {
  507. DMI_MATCH(DMI_BOARD_NAME, "FA507X"),
  508. },
  509. .driver_data = &(struct power_data) {
  510. .ac_data = &(struct power_limits) {
  511. .ppt_pl1_spl_min = 15,
  512. .ppt_pl1_spl_max = 80,
  513. .ppt_pl2_sppt_min = 35,
  514. .ppt_pl2_sppt_max = 80,
  515. .ppt_pl3_fppt_min = 35,
  516. .ppt_pl3_fppt_max = 80,
  517. .nv_dynamic_boost_min = 5,
  518. .nv_dynamic_boost_max = 20,
  519. .nv_temp_target_min = 75,
  520. .nv_temp_target_max = 87,
  521. .nv_tgp_min = 55,
  522. .nv_tgp_max = 85,
  523. },
  524. .dc_data = &(struct power_limits) {
  525. .ppt_pl1_spl_min = 15,
  526. .ppt_pl1_spl_def = 45,
  527. .ppt_pl1_spl_max = 65,
  528. .ppt_pl2_sppt_min = 35,
  529. .ppt_pl2_sppt_def = 54,
  530. .ppt_pl2_sppt_max = 65,
  531. .ppt_pl3_fppt_min = 35,
  532. .ppt_pl3_fppt_max = 65,
  533. .nv_temp_target_min = 75,
  534. .nv_temp_target_max = 87,
  535. },
  536. },
  537. },
  538. {
  539. .matches = {
  540. DMI_MATCH(DMI_BOARD_NAME, "FA507Z"),
  541. },
  542. .driver_data = &(struct power_data) {
  543. .ac_data = &(struct power_limits) {
  544. .ppt_pl1_spl_min = 28,
  545. .ppt_pl1_spl_max = 65,
  546. .ppt_pl2_sppt_min = 28,
  547. .ppt_pl2_sppt_max = 105,
  548. .nv_dynamic_boost_min = 5,
  549. .nv_dynamic_boost_max = 15,
  550. .nv_temp_target_min = 75,
  551. .nv_temp_target_max = 87,
  552. .nv_tgp_min = 55,
  553. .nv_tgp_max = 85,
  554. },
  555. .dc_data = &(struct power_limits) {
  556. .ppt_pl1_spl_min = 25,
  557. .ppt_pl1_spl_max = 45,
  558. .ppt_pl2_sppt_min = 35,
  559. .ppt_pl2_sppt_max = 60,
  560. .nv_temp_target_min = 75,
  561. .nv_temp_target_max = 87,
  562. },
  563. },
  564. },
  565. {
  566. .matches = {
  567. DMI_MATCH(DMI_BOARD_NAME, "FA607NU"),
  568. },
  569. .driver_data = &(struct power_data) {
  570. .ac_data = &(struct power_limits) {
  571. .ppt_pl1_spl_min = 15,
  572. .ppt_pl1_spl_max = 80,
  573. .ppt_pl2_sppt_min = 35,
  574. .ppt_pl2_sppt_max = 80,
  575. .ppt_pl3_fppt_min = 35,
  576. .ppt_pl3_fppt_max = 80,
  577. .nv_dynamic_boost_min = 5,
  578. .nv_dynamic_boost_max = 25,
  579. .nv_temp_target_min = 75,
  580. .nv_temp_target_max = 87,
  581. },
  582. .dc_data = &(struct power_limits) {
  583. .ppt_pl1_spl_min = 25,
  584. .ppt_pl1_spl_def = 45,
  585. .ppt_pl1_spl_max = 65,
  586. .ppt_pl2_sppt_min = 25,
  587. .ppt_pl2_sppt_def = 54,
  588. .ppt_pl2_sppt_max = 65,
  589. .ppt_pl3_fppt_min = 25,
  590. .ppt_pl3_fppt_max = 65,
  591. .nv_temp_target_min = 75,
  592. .nv_temp_target_max = 87,
  593. },
  594. },
  595. },
  596. {
  597. .matches = {
  598. DMI_MATCH(DMI_BOARD_NAME, "FA607P"),
  599. },
  600. .driver_data = &(struct power_data) {
  601. .ac_data = &(struct power_limits) {
  602. .ppt_pl1_spl_min = 30,
  603. .ppt_pl1_spl_def = 100,
  604. .ppt_pl1_spl_max = 135,
  605. .ppt_pl2_sppt_min = 30,
  606. .ppt_pl2_sppt_def = 115,
  607. .ppt_pl2_sppt_max = 135,
  608. .ppt_pl3_fppt_min = 30,
  609. .ppt_pl3_fppt_max = 135,
  610. .nv_dynamic_boost_min = 5,
  611. .nv_dynamic_boost_max = 25,
  612. .nv_temp_target_min = 75,
  613. .nv_temp_target_max = 87,
  614. .nv_tgp_min = 55,
  615. .nv_tgp_max = 115,
  616. },
  617. .dc_data = &(struct power_limits) {
  618. .ppt_pl1_spl_min = 25,
  619. .ppt_pl1_spl_def = 45,
  620. .ppt_pl1_spl_max = 80,
  621. .ppt_pl2_sppt_min = 25,
  622. .ppt_pl2_sppt_def = 60,
  623. .ppt_pl2_sppt_max = 80,
  624. .ppt_pl3_fppt_min = 25,
  625. .ppt_pl3_fppt_max = 80,
  626. .nv_temp_target_min = 75,
  627. .nv_temp_target_max = 87,
  628. },
  629. },
  630. },
  631. {
  632. .matches = {
  633. DMI_MATCH(DMI_BOARD_NAME, "FA608UM"),
  634. },
  635. .driver_data = &(struct power_data) {
  636. .ac_data = &(struct power_limits) {
  637. .ppt_pl1_spl_min = 15,
  638. .ppt_pl1_spl_def = 45,
  639. .ppt_pl1_spl_max = 90,
  640. .ppt_pl2_sppt_min = 35,
  641. .ppt_pl2_sppt_def = 54,
  642. .ppt_pl2_sppt_max = 90,
  643. .ppt_pl3_fppt_min = 35,
  644. .ppt_pl3_fppt_def = 65,
  645. .ppt_pl3_fppt_max = 90,
  646. .nv_dynamic_boost_min = 10,
  647. .nv_dynamic_boost_max = 15,
  648. .nv_temp_target_min = 75,
  649. .nv_temp_target_max = 87,
  650. .nv_tgp_min = 55,
  651. .nv_tgp_max = 100,
  652. },
  653. .dc_data = &(struct power_limits) {
  654. .ppt_pl1_spl_min = 15,
  655. .ppt_pl1_spl_def = 45,
  656. .ppt_pl1_spl_max = 65,
  657. .ppt_pl2_sppt_min = 35,
  658. .ppt_pl2_sppt_def = 54,
  659. .ppt_pl2_sppt_max = 65,
  660. .ppt_pl3_fppt_min = 35,
  661. .ppt_pl3_fppt_max = 65,
  662. .nv_temp_target_min = 75,
  663. .nv_temp_target_max = 87,
  664. },
  665. },
  666. },
  667. {
  668. .matches = {
  669. DMI_MATCH(DMI_BOARD_NAME, "FA608WI"),
  670. },
  671. .driver_data = &(struct power_data) {
  672. .ac_data = &(struct power_limits) {
  673. .ppt_pl1_spl_min = 15,
  674. .ppt_pl1_spl_def = 90,
  675. .ppt_pl1_spl_max = 90,
  676. .ppt_pl2_sppt_min = 35,
  677. .ppt_pl2_sppt_def = 90,
  678. .ppt_pl2_sppt_max = 90,
  679. .ppt_pl3_fppt_min = 35,
  680. .ppt_pl3_fppt_def = 90,
  681. .ppt_pl3_fppt_max = 90,
  682. .nv_dynamic_boost_min = 5,
  683. .nv_dynamic_boost_max = 25,
  684. .nv_temp_target_min = 75,
  685. .nv_temp_target_max = 87,
  686. .nv_tgp_min = 55,
  687. .nv_tgp_max = 115,
  688. },
  689. .dc_data = &(struct power_limits) {
  690. .ppt_pl1_spl_min = 15,
  691. .ppt_pl1_spl_def = 45,
  692. .ppt_pl1_spl_max = 65,
  693. .ppt_pl2_sppt_min = 35,
  694. .ppt_pl2_sppt_def = 54,
  695. .ppt_pl2_sppt_max = 65,
  696. .ppt_pl3_fppt_min = 35,
  697. .ppt_pl3_fppt_def = 65,
  698. .ppt_pl3_fppt_max = 65,
  699. .nv_temp_target_min = 75,
  700. .nv_temp_target_max = 87,
  701. },
  702. },
  703. },
  704. {
  705. .matches = {
  706. DMI_MATCH(DMI_BOARD_NAME, "FA617NS"),
  707. },
  708. .driver_data = &(struct power_data) {
  709. .ac_data = &(struct power_limits) {
  710. .ppt_apu_sppt_min = 15,
  711. .ppt_apu_sppt_max = 80,
  712. .ppt_platform_sppt_min = 30,
  713. .ppt_platform_sppt_max = 120,
  714. },
  715. .dc_data = &(struct power_limits) {
  716. .ppt_apu_sppt_min = 25,
  717. .ppt_apu_sppt_max = 35,
  718. .ppt_platform_sppt_min = 45,
  719. .ppt_platform_sppt_max = 100,
  720. },
  721. },
  722. },
  723. {
  724. .matches = {
  725. DMI_MATCH(DMI_BOARD_NAME, "FA617NT"),
  726. },
  727. .driver_data = &(struct power_data) {
  728. .ac_data = &(struct power_limits) {
  729. .ppt_apu_sppt_min = 15,
  730. .ppt_apu_sppt_max = 80,
  731. .ppt_platform_sppt_min = 30,
  732. .ppt_platform_sppt_max = 115,
  733. },
  734. .dc_data = &(struct power_limits) {
  735. .ppt_apu_sppt_min = 15,
  736. .ppt_apu_sppt_max = 45,
  737. .ppt_platform_sppt_min = 30,
  738. .ppt_platform_sppt_max = 50,
  739. },
  740. },
  741. },
  742. {
  743. .matches = {
  744. DMI_MATCH(DMI_BOARD_NAME, "FA617XS"),
  745. },
  746. .driver_data = &(struct power_data) {
  747. .ac_data = &(struct power_limits) {
  748. .ppt_apu_sppt_min = 15,
  749. .ppt_apu_sppt_max = 80,
  750. .ppt_platform_sppt_min = 30,
  751. .ppt_platform_sppt_max = 120,
  752. .nv_temp_target_min = 75,
  753. .nv_temp_target_max = 87,
  754. },
  755. .dc_data = &(struct power_limits) {
  756. .ppt_apu_sppt_min = 25,
  757. .ppt_apu_sppt_max = 35,
  758. .ppt_platform_sppt_min = 45,
  759. .ppt_platform_sppt_max = 100,
  760. .nv_temp_target_min = 75,
  761. .nv_temp_target_max = 87,
  762. },
  763. },
  764. },
  765. {
  766. .matches = {
  767. DMI_MATCH(DMI_BOARD_NAME, "FA617XT"),
  768. },
  769. .driver_data = &(struct power_data) {
  770. .ac_data = &(struct power_limits) {
  771. .ppt_apu_sppt_min = 15,
  772. .ppt_apu_sppt_max = 80,
  773. .ppt_platform_sppt_min = 30,
  774. .ppt_platform_sppt_max = 145,
  775. },
  776. .dc_data = &(struct power_limits) {
  777. .ppt_apu_sppt_min = 25,
  778. .ppt_apu_sppt_max = 35,
  779. .ppt_platform_sppt_min = 45,
  780. .ppt_platform_sppt_max = 100,
  781. },
  782. },
  783. },
  784. {
  785. .matches = {
  786. DMI_MATCH(DMI_BOARD_NAME, "FX507VI"),
  787. },
  788. .driver_data = &(struct power_data) {
  789. .ac_data = &(struct power_limits) {
  790. .ppt_pl1_spl_min = 28,
  791. .ppt_pl1_spl_max = 135,
  792. .ppt_pl2_sppt_min = 28,
  793. .ppt_pl2_sppt_max = 135,
  794. .nv_dynamic_boost_min = 5,
  795. .nv_dynamic_boost_max = 25,
  796. .nv_temp_target_min = 75,
  797. .nv_temp_target_max = 87,
  798. },
  799. .dc_data = &(struct power_limits) {
  800. .ppt_pl1_spl_min = 25,
  801. .ppt_pl1_spl_max = 45,
  802. .ppt_pl2_sppt_min = 35,
  803. .ppt_pl2_sppt_max = 60,
  804. .nv_temp_target_min = 75,
  805. .nv_temp_target_max = 87,
  806. },
  807. .requires_fan_curve = true,
  808. },
  809. },
  810. {
  811. .matches = {
  812. DMI_MATCH(DMI_BOARD_NAME, "FX507VV"),
  813. },
  814. .driver_data = &(struct power_data) {
  815. .ac_data = &(struct power_limits) {
  816. .ppt_pl1_spl_min = 28,
  817. .ppt_pl1_spl_def = 115,
  818. .ppt_pl1_spl_max = 135,
  819. .ppt_pl2_sppt_min = 28,
  820. .ppt_pl2_sppt_max = 135,
  821. .nv_dynamic_boost_min = 5,
  822. .nv_dynamic_boost_max = 25,
  823. .nv_temp_target_min = 75,
  824. .nv_temp_target_max = 87,
  825. },
  826. .dc_data = &(struct power_limits) {
  827. .ppt_pl1_spl_min = 25,
  828. .ppt_pl1_spl_max = 45,
  829. .ppt_pl2_sppt_min = 35,
  830. .ppt_pl2_sppt_max = 60,
  831. .nv_temp_target_min = 75,
  832. .nv_temp_target_max = 87,
  833. },
  834. .requires_fan_curve = true,
  835. },
  836. },
  837. {
  838. .matches = {
  839. DMI_MATCH(DMI_BOARD_NAME, "FX507Z"),
  840. },
  841. .driver_data = &(struct power_data) {
  842. .ac_data = &(struct power_limits) {
  843. .ppt_pl1_spl_min = 28,
  844. .ppt_pl1_spl_max = 90,
  845. .ppt_pl2_sppt_min = 28,
  846. .ppt_pl2_sppt_max = 135,
  847. .nv_dynamic_boost_min = 5,
  848. .nv_dynamic_boost_max = 15,
  849. },
  850. .dc_data = &(struct power_limits) {
  851. .ppt_pl1_spl_min = 25,
  852. .ppt_pl1_spl_max = 45,
  853. .ppt_pl2_sppt_min = 35,
  854. .ppt_pl2_sppt_max = 60,
  855. },
  856. .requires_fan_curve = true,
  857. },
  858. },
  859. {
  860. .matches = {
  861. DMI_MATCH(DMI_BOARD_NAME, "GA401Q"),
  862. },
  863. .driver_data = &(struct power_data) {
  864. .ac_data = &(struct power_limits) {
  865. .ppt_pl1_spl_min = 15,
  866. .ppt_pl1_spl_max = 80,
  867. .ppt_pl2_sppt_min = 15,
  868. .ppt_pl2_sppt_max = 80,
  869. },
  870. .dc_data = NULL,
  871. },
  872. },
  873. {
  874. .matches = {
  875. // This model is full AMD. No Nvidia dGPU.
  876. DMI_MATCH(DMI_BOARD_NAME, "GA402R"),
  877. },
  878. .driver_data = &(struct power_data) {
  879. .ac_data = &(struct power_limits) {
  880. .ppt_apu_sppt_min = 15,
  881. .ppt_apu_sppt_max = 80,
  882. .ppt_platform_sppt_min = 30,
  883. .ppt_platform_sppt_max = 115,
  884. },
  885. .dc_data = &(struct power_limits) {
  886. .ppt_apu_sppt_min = 25,
  887. .ppt_apu_sppt_def = 30,
  888. .ppt_apu_sppt_max = 45,
  889. .ppt_platform_sppt_min = 40,
  890. .ppt_platform_sppt_max = 60,
  891. },
  892. },
  893. },
  894. {
  895. .matches = {
  896. DMI_MATCH(DMI_BOARD_NAME, "GA402X"),
  897. },
  898. .driver_data = &(struct power_data) {
  899. .ac_data = &(struct power_limits) {
  900. .ppt_pl1_spl_min = 15,
  901. .ppt_pl1_spl_def = 35,
  902. .ppt_pl1_spl_max = 80,
  903. .ppt_pl2_sppt_min = 25,
  904. .ppt_pl2_sppt_def = 65,
  905. .ppt_pl2_sppt_max = 80,
  906. .ppt_pl3_fppt_min = 35,
  907. .ppt_pl3_fppt_max = 80,
  908. .nv_temp_target_min = 75,
  909. .nv_temp_target_max = 87,
  910. },
  911. .dc_data = &(struct power_limits) {
  912. .ppt_pl1_spl_min = 15,
  913. .ppt_pl1_spl_max = 35,
  914. .ppt_pl2_sppt_min = 25,
  915. .ppt_pl2_sppt_max = 35,
  916. .ppt_pl3_fppt_min = 35,
  917. .ppt_pl3_fppt_max = 65,
  918. .nv_temp_target_min = 75,
  919. .nv_temp_target_max = 87,
  920. },
  921. .requires_fan_curve = true,
  922. },
  923. },
  924. {
  925. .matches = {
  926. DMI_MATCH(DMI_BOARD_NAME, "GA403UI"),
  927. },
  928. .driver_data = &(struct power_data) {
  929. .ac_data = &(struct power_limits) {
  930. .ppt_pl1_spl_min = 15,
  931. .ppt_pl1_spl_max = 80,
  932. .ppt_pl2_sppt_min = 25,
  933. .ppt_pl2_sppt_max = 80,
  934. .ppt_pl3_fppt_min = 35,
  935. .ppt_pl3_fppt_max = 80,
  936. .nv_dynamic_boost_min = 5,
  937. .nv_dynamic_boost_max = 25,
  938. .nv_temp_target_min = 75,
  939. .nv_temp_target_max = 87,
  940. .nv_tgp_min = 55,
  941. .nv_tgp_max = 65,
  942. },
  943. .dc_data = &(struct power_limits) {
  944. .ppt_pl1_spl_min = 15,
  945. .ppt_pl1_spl_max = 35,
  946. .ppt_pl2_sppt_min = 25,
  947. .ppt_pl2_sppt_max = 35,
  948. .ppt_pl3_fppt_min = 35,
  949. .ppt_pl3_fppt_max = 65,
  950. .nv_temp_target_min = 75,
  951. .nv_temp_target_max = 87,
  952. },
  953. .requires_fan_curve = true,
  954. },
  955. },
  956. {
  957. .matches = {
  958. DMI_MATCH(DMI_BOARD_NAME, "GA403UV"),
  959. },
  960. .driver_data = &(struct power_data) {
  961. .ac_data = &(struct power_limits) {
  962. .ppt_pl1_spl_min = 15,
  963. .ppt_pl1_spl_max = 80,
  964. .ppt_pl2_sppt_min = 25,
  965. .ppt_pl2_sppt_max = 80,
  966. .ppt_pl3_fppt_min = 35,
  967. .ppt_pl3_fppt_max = 80,
  968. .nv_dynamic_boost_min = 5,
  969. .nv_dynamic_boost_max = 25,
  970. .nv_temp_target_min = 75,
  971. .nv_temp_target_max = 87,
  972. .nv_tgp_min = 55,
  973. .nv_tgp_max = 65,
  974. },
  975. .dc_data = &(struct power_limits) {
  976. .ppt_pl1_spl_min = 15,
  977. .ppt_pl1_spl_max = 35,
  978. .ppt_pl2_sppt_min = 25,
  979. .ppt_pl2_sppt_max = 35,
  980. .ppt_pl3_fppt_min = 35,
  981. .ppt_pl3_fppt_max = 65,
  982. .nv_temp_target_min = 75,
  983. .nv_temp_target_max = 87,
  984. },
  985. .requires_fan_curve = true,
  986. },
  987. },
  988. {
  989. .matches = {
  990. DMI_MATCH(DMI_BOARD_NAME, "GA403WM"),
  991. },
  992. .driver_data = &(struct power_data) {
  993. .ac_data = &(struct power_limits) {
  994. .ppt_pl1_spl_min = 15,
  995. .ppt_pl1_spl_max = 80,
  996. .ppt_pl2_sppt_min = 25,
  997. .ppt_pl2_sppt_max = 80,
  998. .ppt_pl3_fppt_min = 35,
  999. .ppt_pl3_fppt_max = 80,
  1000. .nv_dynamic_boost_min = 0,
  1001. .nv_dynamic_boost_max = 15,
  1002. .nv_temp_target_min = 75,
  1003. .nv_temp_target_max = 87,
  1004. .nv_tgp_min = 55,
  1005. .nv_tgp_max = 85,
  1006. },
  1007. .dc_data = &(struct power_limits) {
  1008. .ppt_pl1_spl_min = 15,
  1009. .ppt_pl1_spl_max = 35,
  1010. .ppt_pl2_sppt_min = 25,
  1011. .ppt_pl2_sppt_max = 35,
  1012. .ppt_pl3_fppt_min = 35,
  1013. .ppt_pl3_fppt_max = 65,
  1014. .nv_temp_target_min = 75,
  1015. .nv_temp_target_max = 87,
  1016. },
  1017. .requires_fan_curve = true,
  1018. },
  1019. },
  1020. {
  1021. .matches = {
  1022. DMI_MATCH(DMI_BOARD_NAME, "GA403WR"),
  1023. },
  1024. .driver_data = &(struct power_data) {
  1025. .ac_data = &(struct power_limits) {
  1026. .ppt_pl1_spl_min = 15,
  1027. .ppt_pl1_spl_max = 80,
  1028. .ppt_pl2_sppt_min = 25,
  1029. .ppt_pl2_sppt_max = 80,
  1030. .ppt_pl3_fppt_min = 35,
  1031. .ppt_pl3_fppt_max = 80,
  1032. .nv_dynamic_boost_min = 0,
  1033. .nv_dynamic_boost_max = 25,
  1034. .nv_temp_target_min = 75,
  1035. .nv_temp_target_max = 87,
  1036. .nv_tgp_min = 80,
  1037. .nv_tgp_max = 95,
  1038. },
  1039. .dc_data = &(struct power_limits) {
  1040. .ppt_pl1_spl_min = 15,
  1041. .ppt_pl1_spl_max = 35,
  1042. .ppt_pl2_sppt_min = 25,
  1043. .ppt_pl2_sppt_max = 35,
  1044. .ppt_pl3_fppt_min = 35,
  1045. .ppt_pl3_fppt_max = 65,
  1046. .nv_temp_target_min = 75,
  1047. .nv_temp_target_max = 87,
  1048. },
  1049. .requires_fan_curve = true,
  1050. },
  1051. },
  1052. {
  1053. .matches = {
  1054. DMI_MATCH(DMI_BOARD_NAME, "GA403WW"),
  1055. },
  1056. .driver_data = &(struct power_data) {
  1057. .ac_data = &(struct power_limits) {
  1058. .ppt_pl1_spl_min = 15,
  1059. .ppt_pl1_spl_max = 80,
  1060. .ppt_pl2_sppt_min = 25,
  1061. .ppt_pl2_sppt_max = 80,
  1062. .ppt_pl3_fppt_min = 35,
  1063. .ppt_pl3_fppt_max = 80,
  1064. .nv_dynamic_boost_min = 0,
  1065. .nv_dynamic_boost_max = 25,
  1066. .nv_temp_target_min = 75,
  1067. .nv_temp_target_max = 87,
  1068. .nv_tgp_min = 80,
  1069. .nv_tgp_max = 95,
  1070. },
  1071. .dc_data = &(struct power_limits) {
  1072. .ppt_pl1_spl_min = 15,
  1073. .ppt_pl1_spl_max = 35,
  1074. .ppt_pl2_sppt_min = 25,
  1075. .ppt_pl2_sppt_max = 35,
  1076. .ppt_pl3_fppt_min = 35,
  1077. .ppt_pl3_fppt_max = 65,
  1078. .nv_temp_target_min = 75,
  1079. .nv_temp_target_max = 87,
  1080. },
  1081. .requires_fan_curve = true,
  1082. },
  1083. },
  1084. {
  1085. .matches = {
  1086. DMI_MATCH(DMI_BOARD_NAME, "GA503QM"),
  1087. },
  1088. .driver_data = &(struct power_data) {
  1089. .ac_data = &(struct power_limits) {
  1090. .ppt_pl1_spl_min = 15,
  1091. .ppt_pl1_spl_def = 35,
  1092. .ppt_pl1_spl_max = 80,
  1093. .ppt_pl2_sppt_min = 65,
  1094. .ppt_pl2_sppt_max = 80,
  1095. },
  1096. },
  1097. },
  1098. {
  1099. .matches = {
  1100. DMI_MATCH(DMI_BOARD_NAME, "GA503QR"),
  1101. },
  1102. .driver_data = &(struct power_data) {
  1103. .ac_data = &(struct power_limits) {
  1104. .ppt_pl1_spl_min = 15,
  1105. .ppt_pl1_spl_def = 35,
  1106. .ppt_pl1_spl_max = 80,
  1107. .ppt_pl2_sppt_min = 65,
  1108. .ppt_pl2_sppt_max = 80,
  1109. },
  1110. },
  1111. },
  1112. {
  1113. .matches = {
  1114. DMI_MATCH(DMI_BOARD_NAME, "GA503R"),
  1115. },
  1116. .driver_data = &(struct power_data) {
  1117. .ac_data = &(struct power_limits) {
  1118. .ppt_pl1_spl_min = 15,
  1119. .ppt_pl1_spl_def = 35,
  1120. .ppt_pl1_spl_max = 80,
  1121. .ppt_pl2_sppt_min = 35,
  1122. .ppt_pl2_sppt_def = 65,
  1123. .ppt_pl2_sppt_max = 80,
  1124. .ppt_pl3_fppt_min = 35,
  1125. .ppt_pl3_fppt_max = 80,
  1126. .nv_dynamic_boost_min = 5,
  1127. .nv_dynamic_boost_max = 20,
  1128. .nv_temp_target_min = 75,
  1129. .nv_temp_target_max = 87,
  1130. },
  1131. .dc_data = &(struct power_limits) {
  1132. .ppt_pl1_spl_min = 15,
  1133. .ppt_pl1_spl_def = 25,
  1134. .ppt_pl1_spl_max = 65,
  1135. .ppt_pl2_sppt_min = 35,
  1136. .ppt_pl2_sppt_def = 54,
  1137. .ppt_pl2_sppt_max = 60,
  1138. .ppt_pl3_fppt_min = 35,
  1139. .ppt_pl3_fppt_max = 65,
  1140. },
  1141. },
  1142. },
  1143. {
  1144. .matches = {
  1145. DMI_MATCH(DMI_BOARD_NAME, "GA605W"),
  1146. },
  1147. .driver_data = &(struct power_data) {
  1148. .ac_data = &(struct power_limits) {
  1149. .ppt_pl1_spl_min = 15,
  1150. .ppt_pl1_spl_max = 80,
  1151. .ppt_pl2_sppt_min = 35,
  1152. .ppt_pl2_sppt_max = 80,
  1153. .ppt_pl3_fppt_min = 35,
  1154. .ppt_pl3_fppt_max = 80,
  1155. .nv_dynamic_boost_min = 5,
  1156. .nv_dynamic_boost_max = 20,
  1157. .nv_temp_target_min = 75,
  1158. .nv_temp_target_max = 87,
  1159. .nv_tgp_min = 55,
  1160. .nv_tgp_max = 85,
  1161. },
  1162. .dc_data = &(struct power_limits) {
  1163. .ppt_pl1_spl_min = 25,
  1164. .ppt_pl1_spl_max = 35,
  1165. .ppt_pl2_sppt_min = 31,
  1166. .ppt_pl2_sppt_max = 44,
  1167. .ppt_pl3_fppt_min = 45,
  1168. .ppt_pl3_fppt_max = 65,
  1169. .nv_temp_target_min = 75,
  1170. .nv_temp_target_max = 87,
  1171. },
  1172. .requires_fan_curve = true,
  1173. },
  1174. },
  1175. {
  1176. .matches = {
  1177. DMI_MATCH(DMI_BOARD_NAME, "GU603Z"),
  1178. },
  1179. .driver_data = &(struct power_data) {
  1180. .ac_data = &(struct power_limits) {
  1181. .ppt_pl1_spl_min = 25,
  1182. .ppt_pl1_spl_max = 60,
  1183. .ppt_pl2_sppt_min = 25,
  1184. .ppt_pl2_sppt_max = 135,
  1185. .nv_dynamic_boost_min = 5,
  1186. .nv_dynamic_boost_max = 20,
  1187. .nv_temp_target_min = 75,
  1188. .nv_temp_target_max = 87,
  1189. },
  1190. .dc_data = &(struct power_limits) {
  1191. .ppt_pl1_spl_min = 25,
  1192. .ppt_pl1_spl_max = 40,
  1193. .ppt_pl2_sppt_min = 25,
  1194. .ppt_pl2_sppt_max = 40,
  1195. .nv_temp_target_min = 75,
  1196. .nv_temp_target_max = 87,
  1197. }
  1198. },
  1199. },
  1200. {
  1201. .matches = {
  1202. DMI_MATCH(DMI_BOARD_NAME, "GU604V"),
  1203. },
  1204. .driver_data = &(struct power_data) {
  1205. .ac_data = &(struct power_limits) {
  1206. .ppt_pl1_spl_min = 65,
  1207. .ppt_pl1_spl_max = 120,
  1208. .ppt_pl2_sppt_min = 65,
  1209. .ppt_pl2_sppt_max = 150,
  1210. .nv_dynamic_boost_min = 5,
  1211. .nv_dynamic_boost_max = 25,
  1212. .nv_temp_target_min = 75,
  1213. .nv_temp_target_max = 87,
  1214. },
  1215. .dc_data = &(struct power_limits) {
  1216. .ppt_pl1_spl_min = 25,
  1217. .ppt_pl1_spl_max = 40,
  1218. .ppt_pl2_sppt_min = 35,
  1219. .ppt_pl2_sppt_def = 40,
  1220. .ppt_pl2_sppt_max = 60,
  1221. .nv_temp_target_min = 75,
  1222. .nv_temp_target_max = 87,
  1223. },
  1224. },
  1225. },
  1226. {
  1227. .matches = {
  1228. DMI_MATCH(DMI_BOARD_NAME, "GU605CR"),
  1229. },
  1230. .driver_data = &(struct power_data) {
  1231. .ac_data = &(struct power_limits) {
  1232. .ppt_pl1_spl_min = 30,
  1233. .ppt_pl1_spl_max = 85,
  1234. .ppt_pl2_sppt_min = 38,
  1235. .ppt_pl2_sppt_max = 110,
  1236. .nv_dynamic_boost_min = 5,
  1237. .nv_dynamic_boost_max = 20,
  1238. .nv_temp_target_min = 75,
  1239. .nv_temp_target_max = 87,
  1240. .nv_tgp_min = 80,
  1241. .nv_tgp_def = 90,
  1242. .nv_tgp_max = 105,
  1243. },
  1244. .dc_data = &(struct power_limits) {
  1245. .ppt_pl1_spl_min = 30,
  1246. .ppt_pl1_spl_max = 85,
  1247. .ppt_pl2_sppt_min = 38,
  1248. .ppt_pl2_sppt_max = 110,
  1249. .nv_temp_target_min = 75,
  1250. .nv_temp_target_max = 87,
  1251. },
  1252. .requires_fan_curve = true,
  1253. },
  1254. },
  1255. {
  1256. .matches = {
  1257. DMI_MATCH(DMI_BOARD_NAME, "GU605CW"),
  1258. },
  1259. .driver_data = &(struct power_data) {
  1260. .ac_data = &(struct power_limits) {
  1261. .ppt_pl1_spl_min = 45,
  1262. .ppt_pl1_spl_max = 85,
  1263. .ppt_pl2_sppt_min = 56,
  1264. .ppt_pl2_sppt_max = 110,
  1265. .nv_dynamic_boost_min = 5,
  1266. .nv_dynamic_boost_max = 20,
  1267. .nv_temp_target_min = 75,
  1268. .nv_temp_target_max = 87,
  1269. .nv_tgp_min = 80,
  1270. .nv_tgp_def = 90,
  1271. .nv_tgp_max = 110,
  1272. },
  1273. .dc_data = &(struct power_limits) {
  1274. .ppt_pl1_spl_min = 25,
  1275. .ppt_pl1_spl_max = 85,
  1276. .ppt_pl2_sppt_min = 32,
  1277. .ppt_pl2_sppt_max = 110,
  1278. .nv_temp_target_min = 75,
  1279. .nv_temp_target_max = 87,
  1280. },
  1281. .requires_fan_curve = true,
  1282. },
  1283. },
  1284. {
  1285. .matches = {
  1286. DMI_MATCH(DMI_BOARD_NAME, "GU605CX"),
  1287. },
  1288. .driver_data = &(struct power_data) {
  1289. .ac_data = &(struct power_limits) {
  1290. .ppt_pl1_spl_min = 45,
  1291. .ppt_pl1_spl_max = 85,
  1292. .ppt_pl2_sppt_min = 56,
  1293. .ppt_pl2_sppt_max = 110,
  1294. .nv_dynamic_boost_min = 5,
  1295. .nv_dynamic_boost_max = 20,
  1296. .nv_temp_target_min = 7,
  1297. .nv_temp_target_max = 87,
  1298. .nv_tgp_min = 95,
  1299. .nv_tgp_def = 100,
  1300. .nv_tgp_max = 110,
  1301. },
  1302. .dc_data = &(struct power_limits) {
  1303. .ppt_pl1_spl_min = 25,
  1304. .ppt_pl1_spl_max = 85,
  1305. .ppt_pl2_sppt_min = 32,
  1306. .ppt_pl2_sppt_max = 110,
  1307. .nv_temp_target_min = 75,
  1308. .nv_temp_target_max = 87,
  1309. },
  1310. .requires_fan_curve = true,
  1311. },
  1312. },
  1313. {
  1314. .matches = {
  1315. DMI_MATCH(DMI_BOARD_NAME, "GU605MU"),
  1316. },
  1317. .driver_data = &(struct power_data) {
  1318. .ac_data = &(struct power_limits) {
  1319. .ppt_pl1_spl_min = 28,
  1320. .ppt_pl1_spl_max = 90,
  1321. .ppt_pl2_sppt_min = 28,
  1322. .ppt_pl2_sppt_max = 135,
  1323. .nv_dynamic_boost_min = 5,
  1324. .nv_dynamic_boost_max = 20,
  1325. .nv_temp_target_min = 75,
  1326. .nv_temp_target_max = 87,
  1327. .nv_tgp_min = 55,
  1328. .nv_tgp_max = 85,
  1329. },
  1330. .dc_data = &(struct power_limits) {
  1331. .ppt_pl1_spl_min = 25,
  1332. .ppt_pl1_spl_max = 35,
  1333. .ppt_pl2_sppt_min = 38,
  1334. .ppt_pl2_sppt_max = 53,
  1335. .nv_temp_target_min = 75,
  1336. .nv_temp_target_max = 87,
  1337. },
  1338. .requires_fan_curve = true,
  1339. },
  1340. },
  1341. {
  1342. .matches = {
  1343. DMI_MATCH(DMI_BOARD_NAME, "GU605M"),
  1344. },
  1345. .driver_data = &(struct power_data) {
  1346. .ac_data = &(struct power_limits) {
  1347. .ppt_pl1_spl_min = 28,
  1348. .ppt_pl1_spl_max = 90,
  1349. .ppt_pl2_sppt_min = 28,
  1350. .ppt_pl2_sppt_max = 135,
  1351. .nv_dynamic_boost_min = 5,
  1352. .nv_dynamic_boost_max = 20,
  1353. .nv_temp_target_min = 75,
  1354. .nv_temp_target_max = 87,
  1355. },
  1356. .dc_data = &(struct power_limits) {
  1357. .ppt_pl1_spl_min = 25,
  1358. .ppt_pl1_spl_max = 35,
  1359. .ppt_pl2_sppt_min = 38,
  1360. .ppt_pl2_sppt_max = 53,
  1361. .nv_temp_target_min = 75,
  1362. .nv_temp_target_max = 87,
  1363. },
  1364. .requires_fan_curve = true,
  1365. },
  1366. },
  1367. {
  1368. .matches = {
  1369. DMI_MATCH(DMI_BOARD_NAME, "GV301Q"),
  1370. },
  1371. .driver_data = &(struct power_data) {
  1372. .ac_data = &(struct power_limits) {
  1373. .ppt_pl1_spl_min = 15,
  1374. .ppt_pl1_spl_max = 45,
  1375. .ppt_pl2_sppt_min = 65,
  1376. .ppt_pl2_sppt_max = 80,
  1377. },
  1378. .dc_data = NULL,
  1379. },
  1380. },
  1381. {
  1382. .matches = {
  1383. DMI_MATCH(DMI_BOARD_NAME, "GV301R"),
  1384. },
  1385. .driver_data = &(struct power_data) {
  1386. .ac_data = &(struct power_limits) {
  1387. .ppt_pl1_spl_min = 15,
  1388. .ppt_pl1_spl_max = 45,
  1389. .ppt_pl2_sppt_min = 25,
  1390. .ppt_pl2_sppt_max = 54,
  1391. .ppt_pl3_fppt_min = 35,
  1392. .ppt_pl3_fppt_max = 65,
  1393. .nv_temp_target_min = 75,
  1394. .nv_temp_target_max = 87,
  1395. },
  1396. .dc_data = &(struct power_limits) {
  1397. .ppt_pl1_spl_min = 15,
  1398. .ppt_pl1_spl_max = 35,
  1399. .ppt_pl2_sppt_min = 25,
  1400. .ppt_pl2_sppt_max = 35,
  1401. .ppt_pl3_fppt_min = 35,
  1402. .ppt_pl3_fppt_max = 65,
  1403. .nv_temp_target_min = 75,
  1404. .nv_temp_target_max = 87,
  1405. },
  1406. },
  1407. },
  1408. {
  1409. .matches = {
  1410. DMI_MATCH(DMI_BOARD_NAME, "GV302XU"),
  1411. },
  1412. .driver_data = &(struct power_data) {
  1413. .ac_data = &(struct power_limits) {
  1414. .ppt_pl1_spl_min = 15,
  1415. .ppt_pl1_spl_max = 55,
  1416. .ppt_pl2_sppt_min = 25,
  1417. .ppt_pl2_sppt_max = 60,
  1418. .ppt_pl3_fppt_min = 35,
  1419. .ppt_pl3_fppt_max = 65,
  1420. .nv_temp_target_min = 75,
  1421. .nv_temp_target_max = 87,
  1422. },
  1423. .dc_data = &(struct power_limits) {
  1424. .ppt_pl1_spl_min = 15,
  1425. .ppt_pl1_spl_max = 35,
  1426. .ppt_pl2_sppt_min = 25,
  1427. .ppt_pl2_sppt_max = 35,
  1428. .ppt_pl3_fppt_min = 35,
  1429. .ppt_pl3_fppt_max = 65,
  1430. .nv_temp_target_min = 75,
  1431. .nv_temp_target_max = 87,
  1432. },
  1433. },
  1434. },
  1435. {
  1436. .matches = {
  1437. DMI_MATCH(DMI_BOARD_NAME, "GV302XV"),
  1438. },
  1439. .driver_data = &(struct power_data) {
  1440. .ac_data = &(struct power_limits) {
  1441. .ppt_pl1_spl_min = 15,
  1442. .ppt_pl1_spl_max = 55,
  1443. .ppt_pl2_sppt_min = 25,
  1444. .ppt_pl2_sppt_max = 60,
  1445. .ppt_pl3_fppt_min = 35,
  1446. .ppt_pl3_fppt_max = 65,
  1447. .nv_temp_target_min = 75,
  1448. .nv_temp_target_max = 87,
  1449. },
  1450. .dc_data = &(struct power_limits) {
  1451. .ppt_pl1_spl_min = 15,
  1452. .ppt_pl1_spl_max = 35,
  1453. .ppt_pl2_sppt_min = 25,
  1454. .ppt_pl2_sppt_max = 35,
  1455. .ppt_pl3_fppt_min = 35,
  1456. .ppt_pl3_fppt_max = 65,
  1457. .nv_temp_target_min = 75,
  1458. .nv_temp_target_max = 87,
  1459. },
  1460. },
  1461. },
  1462. {
  1463. .matches = {
  1464. DMI_MATCH(DMI_BOARD_NAME, "GV601R"),
  1465. },
  1466. .driver_data = &(struct power_data) {
  1467. .ac_data = &(struct power_limits) {
  1468. .ppt_pl1_spl_min = 15,
  1469. .ppt_pl1_spl_def = 35,
  1470. .ppt_pl1_spl_max = 90,
  1471. .ppt_pl2_sppt_min = 35,
  1472. .ppt_pl2_sppt_def = 54,
  1473. .ppt_pl2_sppt_max = 100,
  1474. .ppt_pl3_fppt_min = 35,
  1475. .ppt_pl3_fppt_def = 80,
  1476. .ppt_pl3_fppt_max = 125,
  1477. .nv_dynamic_boost_min = 5,
  1478. .nv_dynamic_boost_max = 25,
  1479. .nv_temp_target_min = 75,
  1480. .nv_temp_target_max = 87,
  1481. },
  1482. .dc_data = &(struct power_limits) {
  1483. .ppt_pl1_spl_min = 15,
  1484. .ppt_pl1_spl_def = 28,
  1485. .ppt_pl1_spl_max = 65,
  1486. .ppt_pl2_sppt_min = 35,
  1487. .ppt_pl2_sppt_def = 54,
  1488. .ppt_pl2_sppt_max = 60,
  1489. .ppt_pl3_fppt_min = 35,
  1490. .ppt_pl3_fppt_def = 80,
  1491. .ppt_pl3_fppt_max = 65,
  1492. .nv_temp_target_min = 75,
  1493. .nv_temp_target_max = 87,
  1494. },
  1495. },
  1496. },
  1497. {
  1498. .matches = {
  1499. DMI_MATCH(DMI_BOARD_NAME, "GV601V"),
  1500. },
  1501. .driver_data = &(struct power_data) {
  1502. .ac_data = &(struct power_limits) {
  1503. .ppt_pl1_spl_min = 28,
  1504. .ppt_pl1_spl_def = 100,
  1505. .ppt_pl1_spl_max = 110,
  1506. .ppt_pl2_sppt_min = 28,
  1507. .ppt_pl2_sppt_max = 135,
  1508. .nv_dynamic_boost_min = 5,
  1509. .nv_dynamic_boost_max = 20,
  1510. .nv_temp_target_min = 75,
  1511. .nv_temp_target_max = 87,
  1512. },
  1513. .dc_data = &(struct power_limits) {
  1514. .ppt_pl1_spl_min = 25,
  1515. .ppt_pl1_spl_max = 40,
  1516. .ppt_pl2_sppt_min = 35,
  1517. .ppt_pl2_sppt_def = 40,
  1518. .ppt_pl2_sppt_max = 60,
  1519. .nv_temp_target_min = 75,
  1520. .nv_temp_target_max = 87,
  1521. },
  1522. },
  1523. },
  1524. {
  1525. .matches = {
  1526. DMI_MATCH(DMI_BOARD_NAME, "GX650P"),
  1527. },
  1528. .driver_data = &(struct power_data) {
  1529. .ac_data = &(struct power_limits) {
  1530. .ppt_pl1_spl_min = 15,
  1531. .ppt_pl1_spl_def = 110,
  1532. .ppt_pl1_spl_max = 130,
  1533. .ppt_pl2_sppt_min = 35,
  1534. .ppt_pl2_sppt_def = 125,
  1535. .ppt_pl2_sppt_max = 130,
  1536. .ppt_pl3_fppt_min = 35,
  1537. .ppt_pl3_fppt_def = 125,
  1538. .ppt_pl3_fppt_max = 135,
  1539. .nv_dynamic_boost_min = 5,
  1540. .nv_dynamic_boost_max = 25,
  1541. .nv_temp_target_min = 75,
  1542. .nv_temp_target_max = 87,
  1543. },
  1544. .dc_data = &(struct power_limits) {
  1545. .ppt_pl1_spl_min = 15,
  1546. .ppt_pl1_spl_def = 25,
  1547. .ppt_pl1_spl_max = 65,
  1548. .ppt_pl2_sppt_min = 35,
  1549. .ppt_pl2_sppt_def = 35,
  1550. .ppt_pl2_sppt_max = 65,
  1551. .ppt_pl3_fppt_min = 35,
  1552. .ppt_pl3_fppt_def = 42,
  1553. .ppt_pl3_fppt_max = 65,
  1554. .nv_temp_target_min = 75,
  1555. .nv_temp_target_max = 87,
  1556. },
  1557. },
  1558. },
  1559. {
  1560. .matches = {
  1561. DMI_MATCH(DMI_BOARD_NAME, "GX650RX"),
  1562. },
  1563. .driver_data = &(struct power_data) {
  1564. .ac_data = &(struct power_limits) {
  1565. .ppt_pl1_spl_min = 28,
  1566. .ppt_pl1_spl_def = 70,
  1567. .ppt_pl1_spl_max = 90,
  1568. .ppt_pl2_sppt_min = 28,
  1569. .ppt_pl2_sppt_def = 70,
  1570. .ppt_pl2_sppt_max = 100,
  1571. .ppt_pl3_fppt_min = 28,
  1572. .ppt_pl3_fppt_def = 110,
  1573. .ppt_pl3_fppt_max = 125,
  1574. .nv_dynamic_boost_min = 5,
  1575. .nv_dynamic_boost_max = 25,
  1576. .nv_temp_target_min = 76,
  1577. .nv_temp_target_max = 87,
  1578. },
  1579. .dc_data = &(struct power_limits) {
  1580. .ppt_pl1_spl_min = 28,
  1581. .ppt_pl1_spl_max = 50,
  1582. .ppt_pl2_sppt_min = 28,
  1583. .ppt_pl2_sppt_max = 50,
  1584. .ppt_pl3_fppt_min = 28,
  1585. .ppt_pl3_fppt_max = 65,
  1586. .nv_temp_target_min = 76,
  1587. .nv_temp_target_max = 87,
  1588. },
  1589. },
  1590. },
  1591. {
  1592. .matches = {
  1593. DMI_MATCH(DMI_BOARD_NAME, "GZ302EA"),
  1594. },
  1595. .driver_data = &(struct power_data) {
  1596. .ac_data = &(struct power_limits) {
  1597. .ppt_pl1_spl_min = 28,
  1598. .ppt_pl1_spl_def = 60,
  1599. .ppt_pl1_spl_max = 80,
  1600. .ppt_pl2_sppt_min = 32,
  1601. .ppt_pl2_sppt_def = 75,
  1602. .ppt_pl2_sppt_max = 92,
  1603. .ppt_pl3_fppt_min = 45,
  1604. .ppt_pl3_fppt_def = 86,
  1605. .ppt_pl3_fppt_max = 93,
  1606. },
  1607. .dc_data = &(struct power_limits) {
  1608. .ppt_pl1_spl_min = 28,
  1609. .ppt_pl1_spl_def = 45,
  1610. .ppt_pl1_spl_max = 80,
  1611. .ppt_pl2_sppt_min = 32,
  1612. .ppt_pl2_sppt_def = 52,
  1613. .ppt_pl2_sppt_max = 92,
  1614. .ppt_pl3_fppt_min = 45,
  1615. .ppt_pl3_fppt_def = 71,
  1616. .ppt_pl3_fppt_max = 93,
  1617. },
  1618. },
  1619. },
  1620. {
  1621. .matches = {
  1622. DMI_MATCH(DMI_BOARD_NAME, "G513I"),
  1623. },
  1624. .driver_data = &(struct power_data) {
  1625. .ac_data = &(struct power_limits) {
  1626. /* Yes this laptop is very limited */
  1627. .ppt_pl1_spl_min = 15,
  1628. .ppt_pl1_spl_max = 80,
  1629. .ppt_pl2_sppt_min = 15,
  1630. .ppt_pl2_sppt_max = 80,
  1631. },
  1632. .dc_data = NULL,
  1633. .requires_fan_curve = true,
  1634. },
  1635. },
  1636. {
  1637. .matches = {
  1638. DMI_MATCH(DMI_BOARD_NAME, "G513QM"),
  1639. },
  1640. .driver_data = &(struct power_data) {
  1641. .ac_data = &(struct power_limits) {
  1642. /* Yes this laptop is very limited */
  1643. .ppt_pl1_spl_min = 15,
  1644. .ppt_pl1_spl_max = 100,
  1645. .ppt_pl2_sppt_min = 15,
  1646. .ppt_pl2_sppt_max = 190,
  1647. },
  1648. .dc_data = NULL,
  1649. .requires_fan_curve = true,
  1650. },
  1651. },
  1652. {
  1653. .matches = {
  1654. DMI_MATCH(DMI_BOARD_NAME, "G513QY"),
  1655. },
  1656. .driver_data = &(struct power_data) {
  1657. .ac_data = &(struct power_limits) {
  1658. /* Advantage Edition Laptop, no PL1 or PL2 limits */
  1659. .ppt_apu_sppt_min = 15,
  1660. .ppt_apu_sppt_max = 100,
  1661. .ppt_platform_sppt_min = 70,
  1662. .ppt_platform_sppt_max = 190,
  1663. },
  1664. .dc_data = NULL,
  1665. .requires_fan_curve = true,
  1666. },
  1667. },
  1668. {
  1669. .matches = {
  1670. DMI_MATCH(DMI_BOARD_NAME, "G513R"),
  1671. },
  1672. .driver_data = &(struct power_data) {
  1673. .ac_data = &(struct power_limits) {
  1674. .ppt_pl1_spl_min = 35,
  1675. .ppt_pl1_spl_max = 90,
  1676. .ppt_pl2_sppt_min = 54,
  1677. .ppt_pl2_sppt_max = 100,
  1678. .ppt_pl3_fppt_min = 54,
  1679. .ppt_pl3_fppt_max = 125,
  1680. .nv_dynamic_boost_min = 5,
  1681. .nv_dynamic_boost_max = 25,
  1682. .nv_temp_target_min = 75,
  1683. .nv_temp_target_max = 87,
  1684. },
  1685. .dc_data = &(struct power_limits) {
  1686. .ppt_pl1_spl_min = 28,
  1687. .ppt_pl1_spl_max = 50,
  1688. .ppt_pl2_sppt_min = 28,
  1689. .ppt_pl2_sppt_max = 50,
  1690. .ppt_pl3_fppt_min = 28,
  1691. .ppt_pl3_fppt_max = 65,
  1692. .nv_temp_target_min = 75,
  1693. .nv_temp_target_max = 87,
  1694. },
  1695. .requires_fan_curve = true,
  1696. },
  1697. },
  1698. {
  1699. .matches = {
  1700. DMI_MATCH(DMI_BOARD_NAME, "G614FP"),
  1701. },
  1702. .driver_data = &(struct power_data) {
  1703. .ac_data = &(struct power_limits) {
  1704. .ppt_pl1_spl_min = 30,
  1705. .ppt_pl1_spl_max = 120,
  1706. .ppt_pl2_sppt_min = 65,
  1707. .ppt_pl2_sppt_def = 140,
  1708. .ppt_pl2_sppt_max = 165,
  1709. .ppt_pl3_fppt_min = 65,
  1710. .ppt_pl3_fppt_def = 140,
  1711. .ppt_pl3_fppt_max = 165,
  1712. .nv_temp_target_min = 75,
  1713. .nv_temp_target_max = 87,
  1714. .nv_dynamic_boost_min = 5,
  1715. .nv_dynamic_boost_max = 15,
  1716. .nv_tgp_min = 50,
  1717. .nv_tgp_max = 100,
  1718. },
  1719. .dc_data = &(struct power_limits) {
  1720. .ppt_pl1_spl_min = 25,
  1721. .ppt_pl1_spl_max = 65,
  1722. .ppt_pl2_sppt_min = 25,
  1723. .ppt_pl2_sppt_max = 65,
  1724. .ppt_pl3_fppt_min = 35,
  1725. .ppt_pl3_fppt_max = 75,
  1726. .nv_temp_target_min = 75,
  1727. .nv_temp_target_max = 87,
  1728. },
  1729. .requires_fan_curve = true,
  1730. },
  1731. },
  1732. {
  1733. .matches = {
  1734. DMI_MATCH(DMI_BOARD_NAME, "G614J"),
  1735. },
  1736. .driver_data = &(struct power_data) {
  1737. .ac_data = &(struct power_limits) {
  1738. .ppt_pl1_spl_min = 28,
  1739. .ppt_pl1_spl_max = 140,
  1740. .ppt_pl2_sppt_min = 28,
  1741. .ppt_pl2_sppt_max = 175,
  1742. .nv_temp_target_min = 75,
  1743. .nv_temp_target_max = 87,
  1744. .nv_dynamic_boost_min = 5,
  1745. .nv_dynamic_boost_max = 25,
  1746. },
  1747. .dc_data = &(struct power_limits) {
  1748. .ppt_pl1_spl_min = 25,
  1749. .ppt_pl1_spl_max = 55,
  1750. .ppt_pl2_sppt_min = 25,
  1751. .ppt_pl2_sppt_max = 70,
  1752. .nv_temp_target_min = 75,
  1753. .nv_temp_target_max = 87,
  1754. },
  1755. .requires_fan_curve = true,
  1756. },
  1757. },
  1758. {
  1759. .matches = {
  1760. DMI_MATCH(DMI_BOARD_NAME, "G615LR"),
  1761. },
  1762. .driver_data = &(struct power_data) {
  1763. .ac_data = &(struct power_limits) {
  1764. .ppt_pl1_spl_min = 28,
  1765. .ppt_pl1_spl_def = 140,
  1766. .ppt_pl1_spl_max = 175,
  1767. .ppt_pl2_sppt_min = 28,
  1768. .ppt_pl2_sppt_max = 175,
  1769. .nv_temp_target_min = 75,
  1770. .nv_temp_target_max = 87,
  1771. .nv_dynamic_boost_min = 5,
  1772. .nv_dynamic_boost_max = 25,
  1773. .nv_tgp_min = 65,
  1774. .nv_tgp_max = 115,
  1775. },
  1776. .dc_data = &(struct power_limits) {
  1777. .ppt_pl1_spl_min = 25,
  1778. .ppt_pl1_spl_max = 55,
  1779. .ppt_pl2_sppt_min = 25,
  1780. .ppt_pl2_sppt_max = 70,
  1781. .nv_temp_target_min = 75,
  1782. .nv_temp_target_max = 87,
  1783. },
  1784. .requires_fan_curve = true,
  1785. },
  1786. },
  1787. {
  1788. .matches = {
  1789. DMI_MATCH(DMI_BOARD_NAME, "G634J"),
  1790. },
  1791. .driver_data = &(struct power_data) {
  1792. .ac_data = &(struct power_limits) {
  1793. .ppt_pl1_spl_min = 28,
  1794. .ppt_pl1_spl_max = 140,
  1795. .ppt_pl2_sppt_min = 28,
  1796. .ppt_pl2_sppt_max = 175,
  1797. .nv_temp_target_min = 75,
  1798. .nv_temp_target_max = 87,
  1799. .nv_dynamic_boost_min = 5,
  1800. .nv_dynamic_boost_max = 25,
  1801. },
  1802. .dc_data = &(struct power_limits) {
  1803. .ppt_pl1_spl_min = 25,
  1804. .ppt_pl1_spl_max = 55,
  1805. .ppt_pl2_sppt_min = 25,
  1806. .ppt_pl2_sppt_max = 70,
  1807. .nv_temp_target_min = 75,
  1808. .nv_temp_target_max = 87,
  1809. },
  1810. .requires_fan_curve = true,
  1811. },
  1812. },
  1813. {
  1814. .matches = {
  1815. DMI_MATCH(DMI_BOARD_NAME, "G713PV"),
  1816. },
  1817. .driver_data = &(struct power_data) {
  1818. .ac_data = &(struct power_limits) {
  1819. .ppt_pl1_spl_min = 30,
  1820. .ppt_pl1_spl_def = 120,
  1821. .ppt_pl1_spl_max = 130,
  1822. .ppt_pl2_sppt_min = 65,
  1823. .ppt_pl2_sppt_def = 125,
  1824. .ppt_pl2_sppt_max = 130,
  1825. .ppt_pl3_fppt_min = 65,
  1826. .ppt_pl3_fppt_def = 125,
  1827. .ppt_pl3_fppt_max = 130,
  1828. .nv_temp_target_min = 75,
  1829. .nv_temp_target_max = 87,
  1830. .nv_dynamic_boost_min = 5,
  1831. .nv_dynamic_boost_max = 25,
  1832. },
  1833. .dc_data = &(struct power_limits) {
  1834. .ppt_pl1_spl_min = 25,
  1835. .ppt_pl1_spl_max = 65,
  1836. .ppt_pl2_sppt_min = 25,
  1837. .ppt_pl2_sppt_max = 65,
  1838. .ppt_pl3_fppt_min = 35,
  1839. .ppt_pl3_fppt_max = 75,
  1840. .nv_temp_target_min = 75,
  1841. .nv_temp_target_max = 87,
  1842. },
  1843. .requires_fan_curve = true,
  1844. },
  1845. },
  1846. {
  1847. .matches = {
  1848. DMI_MATCH(DMI_BOARD_NAME, "G733C"),
  1849. },
  1850. .driver_data = &(struct power_data) {
  1851. .ac_data = &(struct power_limits) {
  1852. .ppt_pl1_spl_min = 28,
  1853. .ppt_pl1_spl_max = 170,
  1854. .ppt_pl2_sppt_min = 28,
  1855. .ppt_pl2_sppt_max = 175,
  1856. .nv_temp_target_min = 75,
  1857. .nv_temp_target_max = 87,
  1858. .nv_dynamic_boost_min = 5,
  1859. .nv_dynamic_boost_max = 25,
  1860. },
  1861. .dc_data = &(struct power_limits) {
  1862. .ppt_pl1_spl_min = 28,
  1863. .ppt_pl1_spl_max = 35,
  1864. .ppt_pl2_sppt_min = 28,
  1865. .ppt_pl2_sppt_max = 35,
  1866. .nv_temp_target_min = 75,
  1867. .nv_temp_target_max = 87,
  1868. },
  1869. .requires_fan_curve = true,
  1870. },
  1871. },
  1872. {
  1873. .matches = {
  1874. DMI_MATCH(DMI_BOARD_NAME, "G733P"),
  1875. },
  1876. .driver_data = &(struct power_data) {
  1877. .ac_data = &(struct power_limits) {
  1878. .ppt_pl1_spl_min = 30,
  1879. .ppt_pl1_spl_def = 100,
  1880. .ppt_pl1_spl_max = 130,
  1881. .ppt_pl2_sppt_min = 65,
  1882. .ppt_pl2_sppt_def = 125,
  1883. .ppt_pl2_sppt_max = 130,
  1884. .ppt_pl3_fppt_min = 65,
  1885. .ppt_pl3_fppt_def = 125,
  1886. .ppt_pl3_fppt_max = 130,
  1887. .nv_temp_target_min = 75,
  1888. .nv_temp_target_max = 87,
  1889. .nv_dynamic_boost_min = 5,
  1890. .nv_dynamic_boost_max = 25,
  1891. },
  1892. .dc_data = &(struct power_limits) {
  1893. .ppt_pl1_spl_min = 25,
  1894. .ppt_pl1_spl_max = 65,
  1895. .ppt_pl2_sppt_min = 25,
  1896. .ppt_pl2_sppt_max = 65,
  1897. .ppt_pl3_fppt_min = 35,
  1898. .ppt_pl3_fppt_max = 75,
  1899. .nv_temp_target_min = 75,
  1900. .nv_temp_target_max = 87,
  1901. },
  1902. .requires_fan_curve = true,
  1903. },
  1904. },
  1905. {
  1906. .matches = {
  1907. DMI_MATCH(DMI_BOARD_NAME, "G733QS"),
  1908. },
  1909. .driver_data = &(struct power_data) {
  1910. .ac_data = &(struct power_limits) {
  1911. .ppt_pl1_spl_min = 15,
  1912. .ppt_pl1_spl_max = 80,
  1913. .ppt_pl2_sppt_min = 15,
  1914. .ppt_pl2_sppt_max = 80,
  1915. },
  1916. .requires_fan_curve = false,
  1917. },
  1918. },
  1919. {
  1920. .matches = {
  1921. DMI_MATCH(DMI_BOARD_NAME, "G814J"),
  1922. },
  1923. .driver_data = &(struct power_data) {
  1924. .ac_data = &(struct power_limits) {
  1925. .ppt_pl1_spl_min = 28,
  1926. .ppt_pl1_spl_max = 140,
  1927. .ppt_pl2_sppt_min = 28,
  1928. .ppt_pl2_sppt_max = 140,
  1929. .nv_dynamic_boost_min = 5,
  1930. .nv_dynamic_boost_max = 25,
  1931. },
  1932. .dc_data = &(struct power_limits) {
  1933. .ppt_pl1_spl_min = 25,
  1934. .ppt_pl1_spl_max = 55,
  1935. .ppt_pl2_sppt_min = 25,
  1936. .ppt_pl2_sppt_max = 70,
  1937. },
  1938. .requires_fan_curve = true,
  1939. },
  1940. },
  1941. {
  1942. .matches = {
  1943. DMI_MATCH(DMI_BOARD_NAME, "G834J"),
  1944. },
  1945. .driver_data = &(struct power_data) {
  1946. .ac_data = &(struct power_limits) {
  1947. .ppt_pl1_spl_min = 28,
  1948. .ppt_pl1_spl_max = 140,
  1949. .ppt_pl2_sppt_min = 28,
  1950. .ppt_pl2_sppt_max = 175,
  1951. .nv_dynamic_boost_min = 5,
  1952. .nv_dynamic_boost_max = 25,
  1953. .nv_temp_target_min = 75,
  1954. .nv_temp_target_max = 87,
  1955. },
  1956. .dc_data = &(struct power_limits) {
  1957. .ppt_pl1_spl_min = 25,
  1958. .ppt_pl1_spl_max = 55,
  1959. .ppt_pl2_sppt_min = 25,
  1960. .ppt_pl2_sppt_max = 70,
  1961. .nv_temp_target_min = 75,
  1962. .nv_temp_target_max = 87,
  1963. },
  1964. .requires_fan_curve = true,
  1965. },
  1966. },
  1967. {
  1968. .matches = {
  1969. DMI_MATCH(DMI_BOARD_NAME, "G835LR"),
  1970. },
  1971. .driver_data = &(struct power_data) {
  1972. .ac_data = &(struct power_limits) {
  1973. .ppt_pl1_spl_min = 28,
  1974. .ppt_pl1_spl_def = 140,
  1975. .ppt_pl1_spl_max = 175,
  1976. .ppt_pl2_sppt_min = 28,
  1977. .ppt_pl2_sppt_max = 175,
  1978. .nv_dynamic_boost_min = 5,
  1979. .nv_dynamic_boost_max = 25,
  1980. .nv_temp_target_min = 75,
  1981. .nv_temp_target_max = 87,
  1982. .nv_tgp_min = 65,
  1983. .nv_tgp_max = 115,
  1984. },
  1985. .dc_data = &(struct power_limits) {
  1986. .ppt_pl1_spl_min = 25,
  1987. .ppt_pl1_spl_max = 55,
  1988. .ppt_pl2_sppt_min = 25,
  1989. .ppt_pl2_sppt_max = 70,
  1990. .nv_temp_target_min = 75,
  1991. .nv_temp_target_max = 87,
  1992. },
  1993. .requires_fan_curve = true,
  1994. },
  1995. },
  1996. {
  1997. .matches = {
  1998. DMI_MATCH(DMI_BOARD_NAME, "G835LW"),
  1999. },
  2000. .driver_data = &(struct power_data) {
  2001. .ac_data = &(struct power_limits) {
  2002. .ppt_pl1_spl_min = 28,
  2003. .ppt_pl1_spl_def = 140,
  2004. .ppt_pl1_spl_max = 175,
  2005. .ppt_pl2_sppt_min = 28,
  2006. .ppt_pl2_sppt_max = 175,
  2007. .nv_dynamic_boost_min = 5,
  2008. .nv_dynamic_boost_max = 25,
  2009. .nv_temp_target_min = 75,
  2010. .nv_temp_target_max = 87,
  2011. .nv_tgp_min = 80,
  2012. .nv_tgp_max = 150,
  2013. },
  2014. .dc_data = &(struct power_limits) {
  2015. .ppt_pl1_spl_min = 25,
  2016. .ppt_pl1_spl_max = 55,
  2017. .ppt_pl2_sppt_min = 25,
  2018. .ppt_pl2_sppt_max = 70,
  2019. .nv_temp_target_min = 75,
  2020. .nv_temp_target_max = 87,
  2021. },
  2022. .requires_fan_curve = true,
  2023. },
  2024. },
  2025. {
  2026. .matches = {
  2027. DMI_MATCH(DMI_BOARD_NAME, "H7606W"),
  2028. },
  2029. .driver_data = &(struct power_data) {
  2030. .ac_data = &(struct power_limits) {
  2031. .ppt_pl1_spl_min = 15,
  2032. .ppt_pl1_spl_max = 80,
  2033. .ppt_pl2_sppt_min = 35,
  2034. .ppt_pl2_sppt_max = 80,
  2035. .ppt_pl3_fppt_min = 35,
  2036. .ppt_pl3_fppt_max = 80,
  2037. .nv_dynamic_boost_min = 5,
  2038. .nv_dynamic_boost_max = 20,
  2039. .nv_temp_target_min = 75,
  2040. .nv_temp_target_max = 87,
  2041. .nv_tgp_min = 55,
  2042. .nv_tgp_max = 85,
  2043. },
  2044. .dc_data = &(struct power_limits) {
  2045. .ppt_pl1_spl_min = 25,
  2046. .ppt_pl1_spl_max = 35,
  2047. .ppt_pl2_sppt_min = 31,
  2048. .ppt_pl2_sppt_max = 44,
  2049. .ppt_pl3_fppt_min = 45,
  2050. .ppt_pl3_fppt_max = 65,
  2051. .nv_temp_target_min = 75,
  2052. .nv_temp_target_max = 87,
  2053. },
  2054. },
  2055. },
  2056. {
  2057. .matches = {
  2058. DMI_MATCH(DMI_BOARD_NAME, "RC71"),
  2059. },
  2060. .driver_data = &(struct power_data) {
  2061. .ac_data = &(struct power_limits) {
  2062. .ppt_pl1_spl_min = 7,
  2063. .ppt_pl1_spl_max = 30,
  2064. .ppt_pl2_sppt_min = 15,
  2065. .ppt_pl2_sppt_max = 43,
  2066. .ppt_pl3_fppt_min = 15,
  2067. .ppt_pl3_fppt_max = 53,
  2068. },
  2069. .dc_data = &(struct power_limits) {
  2070. .ppt_pl1_spl_min = 7,
  2071. .ppt_pl1_spl_def = 15,
  2072. .ppt_pl1_spl_max = 25,
  2073. .ppt_pl2_sppt_min = 15,
  2074. .ppt_pl2_sppt_def = 20,
  2075. .ppt_pl2_sppt_max = 30,
  2076. .ppt_pl3_fppt_min = 15,
  2077. .ppt_pl3_fppt_def = 25,
  2078. .ppt_pl3_fppt_max = 35,
  2079. },
  2080. },
  2081. },
  2082. {
  2083. .matches = {
  2084. DMI_MATCH(DMI_BOARD_NAME, "RC72"),
  2085. },
  2086. .driver_data = &(struct power_data) {
  2087. .ac_data = &(struct power_limits) {
  2088. .ppt_pl1_spl_min = 7,
  2089. .ppt_pl1_spl_max = 30,
  2090. .ppt_pl2_sppt_min = 15,
  2091. .ppt_pl2_sppt_max = 43,
  2092. .ppt_pl3_fppt_min = 15,
  2093. .ppt_pl3_fppt_max = 53,
  2094. },
  2095. .dc_data = &(struct power_limits) {
  2096. .ppt_pl1_spl_min = 7,
  2097. .ppt_pl1_spl_def = 17,
  2098. .ppt_pl1_spl_max = 25,
  2099. .ppt_pl2_sppt_min = 15,
  2100. .ppt_pl2_sppt_def = 24,
  2101. .ppt_pl2_sppt_max = 30,
  2102. .ppt_pl3_fppt_min = 15,
  2103. .ppt_pl3_fppt_def = 30,
  2104. .ppt_pl3_fppt_max = 35,
  2105. },
  2106. },
  2107. },
  2108. {
  2109. .matches = {
  2110. DMI_MATCH(DMI_BOARD_NAME, "RC73XA"),
  2111. },
  2112. .driver_data = &(struct power_data) {
  2113. .ac_data = &(struct power_limits) {
  2114. .ppt_pl1_spl_min = 7,
  2115. .ppt_pl1_spl_max = 35,
  2116. .ppt_pl2_sppt_min = 14,
  2117. .ppt_pl2_sppt_max = 45,
  2118. .ppt_pl3_fppt_min = 19,
  2119. .ppt_pl3_fppt_max = 55,
  2120. },
  2121. .dc_data = &(struct power_limits) {
  2122. .ppt_pl1_spl_min = 7,
  2123. .ppt_pl1_spl_def = 17,
  2124. .ppt_pl1_spl_max = 35,
  2125. .ppt_pl2_sppt_min = 13,
  2126. .ppt_pl2_sppt_def = 21,
  2127. .ppt_pl2_sppt_max = 45,
  2128. .ppt_pl3_fppt_min = 19,
  2129. .ppt_pl3_fppt_def = 26,
  2130. .ppt_pl3_fppt_max = 55,
  2131. },
  2132. },
  2133. },
  2134. {}
  2135. };
  2136. #endif /* _ASUS_ARMOURY_H_ */