pinctrl-ep93xx.c 46 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Driver for the EP93xx pin controller
  4. * based on linux/drivers/pinctrl/pinmux-gemini.c
  5. *
  6. * Copyright (C) 2022 Nikita Shubin <nikita.shubin@maquefel.me>
  7. *
  8. * This is a group-only pin controller.
  9. */
  10. #include <linux/array_size.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/io.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/property.h>
  16. #include <linux/regmap.h>
  17. #include <linux/seq_file.h>
  18. #include <linux/slab.h>
  19. #include <linux/soc/cirrus/ep93xx.h>
  20. #include <linux/pinctrl/machine.h>
  21. #include <linux/pinctrl/pinconf-generic.h>
  22. #include <linux/pinctrl/pinconf.h>
  23. #include <linux/pinctrl/pinctrl.h>
  24. #include <linux/pinctrl/pinmux.h>
  25. #include "pinctrl-utils.h"
  26. #define DRIVER_NAME "pinctrl-ep93xx"
  27. enum ep93xx_pinctrl_model {
  28. EP93XX_9301_PINCTRL,
  29. EP93XX_9307_PINCTRL,
  30. EP93XX_9312_PINCTRL,
  31. };
  32. struct ep93xx_pmx {
  33. struct device *dev;
  34. struct pinctrl_dev *pctl;
  35. struct ep93xx_regmap_adev *aux_dev;
  36. struct regmap *map;
  37. enum ep93xx_pinctrl_model model;
  38. };
  39. static void ep93xx_pinctrl_update_bits(struct ep93xx_pmx *pmx, unsigned int reg,
  40. unsigned int mask, unsigned int val)
  41. {
  42. struct ep93xx_regmap_adev *aux = pmx->aux_dev;
  43. aux->update_bits(aux->map, aux->lock, reg, mask, val);
  44. }
  45. struct ep93xx_pin_group {
  46. struct pingroup grp;
  47. u32 mask;
  48. u32 value;
  49. };
  50. #define PMX_GROUP(_name, _pins, _mask, _value) \
  51. { \
  52. .grp = PINCTRL_PINGROUP(_name, _pins, ARRAY_SIZE(_pins)), \
  53. .mask = _mask, \
  54. .value = _value, \
  55. }
  56. #define EP93XX_SYSCON_DEVCFG 0x80
  57. /*
  58. * There are several system configuration options selectable by the DeviceCfg and SysCfg
  59. * registers. These registers provide the selection of several pin multiplexing options and also
  60. * provide software access to the system reset configuration options. Please refer to the
  61. * descriptions of the registers, “DeviceCfg” on page 5-25 and “SysCfg” on page 5-34, for a
  62. * detailed explanation.
  63. */
  64. #define EP93XX_SYSCON_DEVCFG_D1ONG BIT(30)
  65. #define EP93XX_SYSCON_DEVCFG_D0ONG BIT(29)
  66. #define EP93XX_SYSCON_DEVCFG_IONU2 BIT(28)
  67. #define EP93XX_SYSCON_DEVCFG_GONK BIT(27)
  68. #define EP93XX_SYSCON_DEVCFG_TONG BIT(26)
  69. #define EP93XX_SYSCON_DEVCFG_MONG BIT(25)
  70. #define EP93XX_SYSCON_DEVCFG_A2ONG BIT(22)
  71. #define EP93XX_SYSCON_DEVCFG_A1ONG BIT(21)
  72. #define EP93XX_SYSCON_DEVCFG_HONIDE BIT(11)
  73. #define EP93XX_SYSCON_DEVCFG_GONIDE BIT(10)
  74. #define EP93XX_SYSCON_DEVCFG_PONG BIT(9)
  75. #define EP93XX_SYSCON_DEVCFG_EONIDE BIT(8)
  76. #define EP93XX_SYSCON_DEVCFG_I2SONSSP BIT(7)
  77. #define EP93XX_SYSCON_DEVCFG_I2SONAC97 BIT(6)
  78. #define EP93XX_SYSCON_DEVCFG_RASONP3 BIT(4)
  79. #define PADS_MASK (GENMASK(30, 25) | BIT(22) | BIT(21) | GENMASK(11, 6) | BIT(4))
  80. #define PADS_MAXBIT 30
  81. /* Ordered by bit index */
  82. static const char * const ep93xx_padgroups[] = {
  83. NULL, NULL, NULL, NULL,
  84. "RasOnP3",
  85. NULL,
  86. "I2SonAC97",
  87. "I2SonSSP",
  88. "EonIDE",
  89. "PonG",
  90. "GonIDE",
  91. "HonIDE",
  92. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  93. "A1onG",
  94. "A2onG",
  95. NULL, NULL,
  96. "MonG",
  97. "TonG",
  98. "GonK",
  99. "IonU2",
  100. "D0onG",
  101. "D1onG",
  102. };
  103. /* ep9301, ep9302 */
  104. static const struct pinctrl_pin_desc ep9301_pins[] = {
  105. PINCTRL_PIN(1, "CSn[7]"),
  106. PINCTRL_PIN(2, "CSn[6]"),
  107. PINCTRL_PIN(3, "CSn[3]"),
  108. PINCTRL_PIN(4, "CSn[2]"),
  109. PINCTRL_PIN(5, "CSn[1]"),
  110. PINCTRL_PIN(6, "AD[25]"),
  111. PINCTRL_PIN(7, "vdd_ring"),
  112. PINCTRL_PIN(8, "gnd_ring"),
  113. PINCTRL_PIN(9, "AD[24]"),
  114. PINCTRL_PIN(10, "SDCLK"),
  115. PINCTRL_PIN(11, "AD[23]"),
  116. PINCTRL_PIN(12, "vdd_core"),
  117. PINCTRL_PIN(13, "gnd_core"),
  118. PINCTRL_PIN(14, "SDWEn"),
  119. PINCTRL_PIN(15, "SDCSn[3]"),
  120. PINCTRL_PIN(16, "SDCSn[2]"),
  121. PINCTRL_PIN(17, "SDCSn[1]"),
  122. PINCTRL_PIN(18, "SDCSn[0]"),
  123. PINCTRL_PIN(19, "vdd_ring"),
  124. PINCTRL_PIN(20, "gnd_ring"),
  125. PINCTRL_PIN(21, "RASn"),
  126. PINCTRL_PIN(22, "CASn"),
  127. PINCTRL_PIN(23, "DQMn[1]"),
  128. PINCTRL_PIN(24, "DQMn[0]"),
  129. PINCTRL_PIN(25, "AD[22]"),
  130. PINCTRL_PIN(26, "AD[21]"),
  131. PINCTRL_PIN(27, "vdd_ring"),
  132. PINCTRL_PIN(28, "gnd_ring"),
  133. PINCTRL_PIN(29, "DA[15]"),
  134. PINCTRL_PIN(30, "AD[7]"),
  135. PINCTRL_PIN(31, "DA[14]"),
  136. PINCTRL_PIN(32, "AD[6]"),
  137. PINCTRL_PIN(33, "DA[13]"),
  138. PINCTRL_PIN(34, "vdd_core"),
  139. PINCTRL_PIN(35, "gnd_core"),
  140. PINCTRL_PIN(36, "AD[5]"),
  141. PINCTRL_PIN(37, "DA[12]"),
  142. PINCTRL_PIN(38, "AD[4]"),
  143. PINCTRL_PIN(39, "DA[11]"),
  144. PINCTRL_PIN(40, "AD[3]"),
  145. PINCTRL_PIN(41, "vdd_ring"),
  146. PINCTRL_PIN(42, "gnd_ring"),
  147. PINCTRL_PIN(43, "DA[10]"),
  148. PINCTRL_PIN(44, "AD[2]"),
  149. PINCTRL_PIN(45, "DA[9]"),
  150. PINCTRL_PIN(46, "AD[1]"),
  151. PINCTRL_PIN(47, "DA[8]"),
  152. PINCTRL_PIN(48, "AD[0]"),
  153. PINCTRL_PIN(49, "vdd_ring"),
  154. PINCTRL_PIN(50, "gnd_ring"),
  155. PINCTRL_PIN(51, "NC"),
  156. PINCTRL_PIN(52, "NC"),
  157. PINCTRL_PIN(53, "vdd_ring"),
  158. PINCTRL_PIN(54, "gnd_ring"),
  159. PINCTRL_PIN(55, "AD[15]"),
  160. PINCTRL_PIN(56, "DA[7]"),
  161. PINCTRL_PIN(57, "vdd_core"),
  162. PINCTRL_PIN(58, "gnd_core"),
  163. PINCTRL_PIN(59, "AD[14]"),
  164. PINCTRL_PIN(60, "DA[6]"),
  165. PINCTRL_PIN(61, "AD[13]"),
  166. PINCTRL_PIN(62, "DA[5]"),
  167. PINCTRL_PIN(63, "AD[12]"),
  168. PINCTRL_PIN(64, "DA[4]"),
  169. PINCTRL_PIN(65, "AD[11]"),
  170. PINCTRL_PIN(66, "vdd_ring"),
  171. PINCTRL_PIN(67, "gnd_ring"),
  172. PINCTRL_PIN(68, "DA[3]"),
  173. PINCTRL_PIN(69, "AD[10]"),
  174. PINCTRL_PIN(70, "DA[2]"),
  175. PINCTRL_PIN(71, "AD[9]"),
  176. PINCTRL_PIN(72, "DA[1]"),
  177. PINCTRL_PIN(73, "AD[8]"),
  178. PINCTRL_PIN(74, "DA[0]"),
  179. PINCTRL_PIN(75, "DSRn"),
  180. PINCTRL_PIN(76, "DTRn"),
  181. PINCTRL_PIN(77, "TCK"),
  182. PINCTRL_PIN(78, "TDI"),
  183. PINCTRL_PIN(79, "TDO"),
  184. PINCTRL_PIN(80, "TMS"),
  185. PINCTRL_PIN(81, "vdd_ring"),
  186. PINCTRL_PIN(82, "gnd_ring"),
  187. PINCTRL_PIN(83, "BOOT[1]"),
  188. PINCTRL_PIN(84, "BOOT[0]"),
  189. PINCTRL_PIN(85, "gnd_ring"),
  190. PINCTRL_PIN(86, "NC"),
  191. PINCTRL_PIN(87, "EECLK"),
  192. PINCTRL_PIN(88, "EEDAT"),
  193. PINCTRL_PIN(89, "ASYNC"),
  194. PINCTRL_PIN(90, "vdd_core"),
  195. PINCTRL_PIN(91, "gnd_core"),
  196. PINCTRL_PIN(92, "ASDO"),
  197. PINCTRL_PIN(93, "SCLK1"),
  198. PINCTRL_PIN(94, "SFRM1"),
  199. PINCTRL_PIN(95, "SSPRX1"),
  200. PINCTRL_PIN(96, "SSPTX1"),
  201. PINCTRL_PIN(97, "GRLED"),
  202. PINCTRL_PIN(98, "RDLED"),
  203. PINCTRL_PIN(99, "vdd_ring"),
  204. PINCTRL_PIN(100, "gnd_ring"),
  205. PINCTRL_PIN(101, "INT[3]"),
  206. PINCTRL_PIN(102, "INT[1]"),
  207. PINCTRL_PIN(103, "INT[0]"),
  208. PINCTRL_PIN(104, "RTSn"),
  209. PINCTRL_PIN(105, "USBm[0]"),
  210. PINCTRL_PIN(106, "USBp[0]"),
  211. PINCTRL_PIN(107, "ABITCLK"),
  212. PINCTRL_PIN(108, "CTSn"),
  213. PINCTRL_PIN(109, "RXD[0]"),
  214. PINCTRL_PIN(110, "RXD[1]"),
  215. PINCTRL_PIN(111, "vdd_ring"),
  216. PINCTRL_PIN(112, "gnd_ring"),
  217. PINCTRL_PIN(113, "TXD[0]"),
  218. PINCTRL_PIN(114, "TXD[1]"),
  219. PINCTRL_PIN(115, "CGPIO[0]"),
  220. PINCTRL_PIN(116, "gnd_core"),
  221. PINCTRL_PIN(117, "PLL_GND"),
  222. PINCTRL_PIN(118, "XTALI"),
  223. PINCTRL_PIN(119, "XTALO"),
  224. PINCTRL_PIN(120, "PLL_VDD"),
  225. PINCTRL_PIN(121, "vdd_core"),
  226. PINCTRL_PIN(122, "gnd_ring"),
  227. PINCTRL_PIN(123, "vdd_ring"),
  228. PINCTRL_PIN(124, "RSTOn"),
  229. PINCTRL_PIN(125, "PRSTn"),
  230. PINCTRL_PIN(126, "CSn[0]"),
  231. PINCTRL_PIN(127, "gnd_core"),
  232. PINCTRL_PIN(128, "vdd_core"),
  233. PINCTRL_PIN(129, "gnd_ring"),
  234. PINCTRL_PIN(130, "vdd_ring"),
  235. PINCTRL_PIN(131, "ADC[4]"),
  236. PINCTRL_PIN(132, "ADC[3]"),
  237. PINCTRL_PIN(133, "ADC[2]"),
  238. PINCTRL_PIN(134, "ADC[1]"),
  239. PINCTRL_PIN(135, "ADC[0]"),
  240. PINCTRL_PIN(136, "ADC_VDD"),
  241. PINCTRL_PIN(137, "RTCXTALI"),
  242. PINCTRL_PIN(138, "RTCXTALO"),
  243. PINCTRL_PIN(139, "ADC_GND"),
  244. PINCTRL_PIN(140, "EGPIO[11]"),
  245. PINCTRL_PIN(141, "EGPIO[10]"),
  246. PINCTRL_PIN(142, "EGPIO[9]"),
  247. PINCTRL_PIN(143, "EGPIO[8]"),
  248. PINCTRL_PIN(144, "EGPIO[7]"),
  249. PINCTRL_PIN(145, "EGPIO[6]"),
  250. PINCTRL_PIN(146, "EGPIO[5]"),
  251. PINCTRL_PIN(147, "EGPIO[4]"),
  252. PINCTRL_PIN(148, "EGPIO[3]"),
  253. PINCTRL_PIN(149, "gnd_ring"),
  254. PINCTRL_PIN(150, "vdd_ring"),
  255. PINCTRL_PIN(151, "EGPIO[2]"),
  256. PINCTRL_PIN(152, "EGPIO[1]"),
  257. PINCTRL_PIN(153, "EGPIO[0]"),
  258. PINCTRL_PIN(154, "ARSTn"),
  259. PINCTRL_PIN(155, "TRSTn"),
  260. PINCTRL_PIN(156, "ASDI"),
  261. PINCTRL_PIN(157, "USBm[2]"),
  262. PINCTRL_PIN(158, "USBp[2]"),
  263. PINCTRL_PIN(159, "WAITn"),
  264. PINCTRL_PIN(160, "EGPIO[15]"),
  265. PINCTRL_PIN(161, "gnd_ring"),
  266. PINCTRL_PIN(162, "vdd_ring"),
  267. PINCTRL_PIN(163, "EGPIO[14]"),
  268. PINCTRL_PIN(164, "EGPIO[13]"),
  269. PINCTRL_PIN(165, "EGPIO[12]"),
  270. PINCTRL_PIN(166, "gnd_core"),
  271. PINCTRL_PIN(167, "vdd_core"),
  272. PINCTRL_PIN(168, "FGPIO[3]"),
  273. PINCTRL_PIN(169, "FGPIO[2]"),
  274. PINCTRL_PIN(170, "FGPIO[1]"),
  275. PINCTRL_PIN(171, "gnd_ring"),
  276. PINCTRL_PIN(172, "vdd_ring"),
  277. PINCTRL_PIN(173, "CLD"),
  278. PINCTRL_PIN(174, "CRS"),
  279. PINCTRL_PIN(175, "TXERR"),
  280. PINCTRL_PIN(176, "TXEN"),
  281. PINCTRL_PIN(177, "MIITXD[0]"),
  282. PINCTRL_PIN(178, "MIITXD[1]"),
  283. PINCTRL_PIN(179, "MIITXD[2]"),
  284. PINCTRL_PIN(180, "MIITXD[3]"),
  285. PINCTRL_PIN(181, "TXCLK"),
  286. PINCTRL_PIN(182, "RXERR"),
  287. PINCTRL_PIN(183, "RXDVAL"),
  288. PINCTRL_PIN(184, "MIIRXD[0]"),
  289. PINCTRL_PIN(185, "MIIRXD[1]"),
  290. PINCTRL_PIN(186, "MIIRXD[2]"),
  291. PINCTRL_PIN(187, "gnd_ring"),
  292. PINCTRL_PIN(188, "vdd_ring"),
  293. PINCTRL_PIN(189, "MIIRXD[3]"),
  294. PINCTRL_PIN(190, "RXCLK"),
  295. PINCTRL_PIN(191, "MDIO"),
  296. PINCTRL_PIN(192, "MDC"),
  297. PINCTRL_PIN(193, "RDn"),
  298. PINCTRL_PIN(194, "WRn"),
  299. PINCTRL_PIN(195, "AD[16]"),
  300. PINCTRL_PIN(196, "AD[17]"),
  301. PINCTRL_PIN(197, "gnd_core"),
  302. PINCTRL_PIN(198, "vdd_core"),
  303. PINCTRL_PIN(199, "HGPIO[2]"),
  304. PINCTRL_PIN(200, "HGPIO[3]"),
  305. PINCTRL_PIN(201, "HGPIO[4]"),
  306. PINCTRL_PIN(202, "HGPIO[5]"),
  307. PINCTRL_PIN(203, "gnd_ring"),
  308. PINCTRL_PIN(204, "vdd_ring"),
  309. PINCTRL_PIN(205, "AD[18]"),
  310. PINCTRL_PIN(206, "AD[19]"),
  311. PINCTRL_PIN(207, "AD[20]"),
  312. PINCTRL_PIN(208, "SDCLKEN"),
  313. };
  314. static const unsigned int ssp_ep9301_pins[] = {
  315. 93, 94, 95, 96,
  316. };
  317. static const unsigned int ac97_ep9301_pins[] = {
  318. 89, 92, 107, 154, 156,
  319. };
  320. /*
  321. * Note: The EP9307 processor has one PWM with one output, PWMOUT.
  322. * Note: The EP9301, EP9302, EP9312, and EP9315 processors each have two PWMs with
  323. * two outputs, PWMOUT and PWMO1. PWMO1 is an alternate function for EGPIO14.
  324. */
  325. /* The GPIO14E (14) pin overlap with pwm1 */
  326. static const unsigned int pwm_9301_pins[] = { 163 };
  327. static const unsigned int gpio1a_9301_pins[] = { 163 };
  328. /* ep9301/9302 have only 0 pin of GPIO C Port exposed */
  329. static const unsigned int gpio2a_9301_pins[] = { 115 };
  330. /* ep9301/9302 have only 4,5 pin of GPIO E Port exposed */
  331. static const unsigned int gpio4a_9301_pins[] = { 97, 98 };
  332. /* ep9301/9302 have only 4,5 pin of GPIO G Port exposed */
  333. static const unsigned int gpio6a_9301_pins[] = { 87, 88 };
  334. static const unsigned int gpio7a_9301_pins[] = { 199, 200, 201, 202 };
  335. /* Groups for the ep9301/ep9302 SoC/package */
  336. static const struct ep93xx_pin_group ep9301_pin_groups[] = {
  337. PMX_GROUP("ssp", ssp_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
  338. PMX_GROUP("i2s_on_ssp", ssp_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
  339. EP93XX_SYSCON_DEVCFG_I2SONSSP),
  340. PMX_GROUP("ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
  341. PMX_GROUP("i2s_on_ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
  342. EP93XX_SYSCON_DEVCFG_I2SONAC97),
  343. PMX_GROUP("pwm1", pwm_9301_pins, EP93XX_SYSCON_DEVCFG_PONG, EP93XX_SYSCON_DEVCFG_PONG),
  344. PMX_GROUP("gpio1agrp", gpio1a_9301_pins, EP93XX_SYSCON_DEVCFG_PONG, 0),
  345. PMX_GROUP("gpio2agrp", gpio2a_9301_pins, EP93XX_SYSCON_DEVCFG_GONK,
  346. EP93XX_SYSCON_DEVCFG_GONK),
  347. PMX_GROUP("gpio4agrp", gpio4a_9301_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
  348. EP93XX_SYSCON_DEVCFG_EONIDE),
  349. PMX_GROUP("gpio6agrp", gpio6a_9301_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
  350. EP93XX_SYSCON_DEVCFG_GONIDE),
  351. PMX_GROUP("gpio7agrp", gpio7a_9301_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
  352. EP93XX_SYSCON_DEVCFG_HONIDE),
  353. };
  354. static const struct pinctrl_pin_desc ep9307_pins[] = {
  355. /* Row A */
  356. PINCTRL_PIN(0, "CSn[1]"), /* A1 */
  357. PINCTRL_PIN(1, "CSn[7]"), /* A2 */
  358. PINCTRL_PIN(2, "SDCLKEN"), /* A3 */
  359. PINCTRL_PIN(3, "DA[31]"), /* A4 */
  360. PINCTRL_PIN(4, "DA[29]"), /* A5 */
  361. PINCTRL_PIN(5, "DA[27]"), /* A6 */
  362. PINCTRL_PIN(6, "HGPIO[2]"), /* A7 */
  363. PINCTRL_PIN(7, "RDn"), /* A8 */
  364. PINCTRL_PIN(8, "MIIRXD[3]"), /* A9 */
  365. PINCTRL_PIN(9, "RXDVAL"), /* A10 */
  366. PINCTRL_PIN(10, "MIITXD[1]"), /* A11 */
  367. PINCTRL_PIN(11, "CRS"), /* A12 */
  368. PINCTRL_PIN(12, "FGPIO[7]"), /* A13 */
  369. PINCTRL_PIN(13, "FGPIO[0]"), /* A14 */
  370. PINCTRL_PIN(14, "WAITn"), /* A15 */
  371. PINCTRL_PIN(15, "USBm[2]"), /* A16 */
  372. PINCTRL_PIN(16, "ASDI"), /* A17 */
  373. /* Row B */
  374. PINCTRL_PIN(17, "AD[25]"), /* B1 */
  375. PINCTRL_PIN(18, "CSn[2]"), /* B2 */
  376. PINCTRL_PIN(19, "CSn[6]"), /* B3 */
  377. PINCTRL_PIN(20, "AD[20]"), /* B4 */
  378. PINCTRL_PIN(21, "DA[30]"), /* B5 */
  379. PINCTRL_PIN(22, "AD[18]"), /* B6 */
  380. PINCTRL_PIN(23, "HGPIO[3]"), /* B7 */
  381. PINCTRL_PIN(24, "AD[17]"), /* B8 */
  382. PINCTRL_PIN(25, "RXCLK"), /* B9 */
  383. PINCTRL_PIN(26, "MIIRXD[1]"), /* B10 */
  384. PINCTRL_PIN(27, "MIITXD[2]"), /* B11 */
  385. PINCTRL_PIN(28, "TXEN"), /* B12 */
  386. PINCTRL_PIN(29, "FGPIO[5]"), /* B13 */
  387. PINCTRL_PIN(30, "EGPIO[15]"), /* B14 */
  388. PINCTRL_PIN(31, "USBp[2]"), /* B15 */
  389. PINCTRL_PIN(32, "ARSTn"), /* B16 */
  390. PINCTRL_PIN(33, "ADC_VDD"), /* B17 */
  391. /* Row C */
  392. PINCTRL_PIN(34, "AD[23]"), /* C1 */
  393. PINCTRL_PIN(35, "DA[26]"), /* C2 */
  394. PINCTRL_PIN(36, "CSn[3]"), /* C3 */
  395. PINCTRL_PIN(37, "DA[25]"), /* C4 */
  396. PINCTRL_PIN(38, "AD[24]"), /* C5 */
  397. PINCTRL_PIN(39, "AD[19]"), /* C6 */
  398. PINCTRL_PIN(40, "HGPIO[5]"), /* C7 */
  399. PINCTRL_PIN(41, "WRn"), /* C8 */
  400. PINCTRL_PIN(42, "MDIO"), /* C9 */
  401. PINCTRL_PIN(43, "MIIRXD[2]"), /* C10 */
  402. PINCTRL_PIN(44, "TXCLK"), /* C11 */
  403. PINCTRL_PIN(45, "MIITXD[0]"), /* C12 */
  404. PINCTRL_PIN(46, "CLD"), /* C13 */
  405. PINCTRL_PIN(47, "EGPIO[13]"), /* C14 */
  406. PINCTRL_PIN(48, "TRSTn"), /* C15 */
  407. PINCTRL_PIN(49, "Xp"), /* C16 */
  408. PINCTRL_PIN(50, "Xm"), /* C17 */
  409. /* Row D */
  410. PINCTRL_PIN(51, "SDCSn[3]"), /* D1 */
  411. PINCTRL_PIN(52, "DA[23]"), /* D2 */
  412. PINCTRL_PIN(53, "SDCLK"), /* D3 */
  413. PINCTRL_PIN(54, "DA[24]"), /* D4 */
  414. PINCTRL_PIN(55, "HGPIO[7]"), /* D5 */
  415. PINCTRL_PIN(56, "HGPIO[6]"), /* D6 */
  416. PINCTRL_PIN(57, "A[28]"), /* D7 */
  417. PINCTRL_PIN(58, "HGPIO[4]"), /* D8 */
  418. PINCTRL_PIN(59, "AD[16]"), /* D9 */
  419. PINCTRL_PIN(60, "MDC"), /* D10 */
  420. PINCTRL_PIN(61, "RXERR"), /* D11 */
  421. PINCTRL_PIN(62, "MIITXD[3]"), /* D12 */
  422. PINCTRL_PIN(63, "EGPIO[12]"), /* D13 */
  423. PINCTRL_PIN(64, "EGPIO[1]"), /* D14 */
  424. PINCTRL_PIN(65, "EGPIO[0]"), /* D15 */
  425. PINCTRL_PIN(66, "Ym"), /* D16 */
  426. PINCTRL_PIN(67, "Yp"), /* D17 */
  427. /* Row E */
  428. PINCTRL_PIN(68, "SDCSn[2]"), /* E1 */
  429. PINCTRL_PIN(69, "SDWEN"), /* E2 */
  430. PINCTRL_PIN(70, "DA[22]"), /* E3 */
  431. PINCTRL_PIN(71, "AD[3]"), /* E4 */
  432. PINCTRL_PIN(72, "DA[15]"), /* E5 */
  433. PINCTRL_PIN(73, "AD[21]"), /* E6 */
  434. PINCTRL_PIN(74, "DA[17]"), /* E7 */
  435. PINCTRL_PIN(75, "vddr"), /* E8 */
  436. PINCTRL_PIN(76, "vddr"), /* E9 */
  437. PINCTRL_PIN(77, "vddr"), /* E10 */
  438. PINCTRL_PIN(78, "MIIRXD[0]"), /* E11 */
  439. PINCTRL_PIN(79, "TXERR"), /* E12 */
  440. PINCTRL_PIN(80, "EGPIO[2]"), /* E13 */
  441. PINCTRL_PIN(81, "EGPIO[4]"), /* E14 */
  442. PINCTRL_PIN(82, "EGPIO[3]"), /* E15 */
  443. PINCTRL_PIN(83, "sXp"), /* E16 */
  444. PINCTRL_PIN(84, "sXm"), /* E17 */
  445. /* Row F */
  446. PINCTRL_PIN(85, "RASn"), /* F1 */
  447. PINCTRL_PIN(86, "SDCSn[1]"), /* F2 */
  448. PINCTRL_PIN(87, "SDCSn[0]"), /* F3 */
  449. PINCTRL_PIN(88, "DQMn[3]"), /* F4 */
  450. PINCTRL_PIN(89, "AD[5]"), /* F5 */
  451. PINCTRL_PIN(90, "gndr"), /* F6 */
  452. PINCTRL_PIN(91, "gndr"), /* F7 */
  453. PINCTRL_PIN(92, "gndr"), /* F8 */
  454. PINCTRL_PIN(93, "vddc"), /* F9 */
  455. PINCTRL_PIN(94, "vddc"), /* F10 */
  456. PINCTRL_PIN(95, "gndr"), /* F11 */
  457. PINCTRL_PIN(96, "EGPIO[7]"), /* F12 */
  458. PINCTRL_PIN(97, "EGPIO[5]"), /* F13 */
  459. PINCTRL_PIN(98, "ADC GND"), /* F14 */
  460. PINCTRL_PIN(99, "EGPIO[6]"), /* F15 */
  461. PINCTRL_PIN(100, "sYm"), /* F16 */
  462. PINCTRL_PIN(101, "syp"), /* F17 */
  463. /* Row G */
  464. PINCTRL_PIN(102, "DQMn[0]"), /* G1 */
  465. PINCTRL_PIN(103, "CASn"), /* G2 */
  466. PINCTRL_PIN(104, "DA[21]"), /* G3 */
  467. PINCTRL_PIN(105, "AD[22]"), /* G4 */
  468. PINCTRL_PIN(106, "vddr"), /* G5 */
  469. PINCTRL_PIN(107, "gndr"), /* G6 */
  470. PINCTRL_PIN(108, "gndr"), /* G12 */
  471. PINCTRL_PIN(109, "EGPIO[9]"), /* G13 */
  472. PINCTRL_PIN(110, "EGPIO[10]"), /* G14 */
  473. PINCTRL_PIN(111, "EGPIO[11]"), /* G15 */
  474. PINCTRL_PIN(112, "RTCXTALO"), /* G16 */
  475. PINCTRL_PIN(113, "RTCXTALI"), /* G17 */
  476. /* Row H */
  477. PINCTRL_PIN(114, "DA[18]"), /* H1 */
  478. PINCTRL_PIN(115, "DA[20]"), /* H2 */
  479. PINCTRL_PIN(116, "DA[19]"), /* H3 */
  480. PINCTRL_PIN(117, "DA[16]"), /* H4 */
  481. PINCTRL_PIN(118, "vddr"), /* H5 */
  482. PINCTRL_PIN(119, "vddc"), /* H6 */
  483. PINCTRL_PIN(120, "gndc"), /* H7 */
  484. PINCTRL_PIN(121, "gndc"), /* H9 */
  485. PINCTRL_PIN(122, "gndc"), /* H10 */
  486. PINCTRL_PIN(123, "gndr"), /* H12 */
  487. PINCTRL_PIN(124, "vddr"), /* H13 */
  488. PINCTRL_PIN(125, "EGPIO[8]"), /* H14 */
  489. PINCTRL_PIN(126, "PRSTN"), /* H15 */
  490. PINCTRL_PIN(127, "COL[7]"), /* H16 */
  491. PINCTRL_PIN(128, "RSTON"), /* H17 */
  492. /* Row J */
  493. PINCTRL_PIN(129, "AD[6]"), /* J1 */
  494. PINCTRL_PIN(130, "DA[14]"), /* J2 */
  495. PINCTRL_PIN(131, "AD[7]"), /* J3 */
  496. PINCTRL_PIN(132, "DA[13]"), /* J4 */
  497. PINCTRL_PIN(133, "vddr"), /* J5 */
  498. PINCTRL_PIN(134, "vddc"), /* J6 */
  499. PINCTRL_PIN(135, "gndc"), /* J8 */
  500. PINCTRL_PIN(136, "gndc"), /* J10 */
  501. PINCTRL_PIN(137, "vddc"), /* J12 */
  502. PINCTRL_PIN(138, "vddr"), /* J13 */
  503. PINCTRL_PIN(139, "COL[5]"), /* J14 */
  504. PINCTRL_PIN(140, "COL[6]"), /* J15 */
  505. PINCTRL_PIN(141, "CSn[0]"), /* J16 */
  506. PINCTRL_PIN(142, "COL[3]"), /* J17 */
  507. /* Row K */
  508. PINCTRL_PIN(143, "AD[4]"), /* K1 */
  509. PINCTRL_PIN(144, "DA[12]"), /* K2 */
  510. PINCTRL_PIN(145, "DA[10]"), /* K3 */
  511. PINCTRL_PIN(146, "DA[11]"), /* K4 */
  512. PINCTRL_PIN(147, "vddr"), /* K5 */
  513. PINCTRL_PIN(148, "gndr"), /* K6 */
  514. PINCTRL_PIN(149, "gndc"), /* K8 */
  515. PINCTRL_PIN(150, "gndc"), /* K9 */
  516. PINCTRL_PIN(151, "gndc"), /* K10 */
  517. PINCTRL_PIN(152, "vddc"), /* K12 */
  518. PINCTRL_PIN(153, "COL[4]"), /* K13 */
  519. PINCTRL_PIN(154, "PLL_VDD"), /* K14 */
  520. PINCTRL_PIN(155, "COL[2]"), /* K15 */
  521. PINCTRL_PIN(156, "COL[1]"), /* K16 */
  522. PINCTRL_PIN(157, "COL[0]"), /* K17 */
  523. /* Row L */
  524. PINCTRL_PIN(158, "DA[9]"), /* L1 */
  525. PINCTRL_PIN(159, "AD[2]"), /* L2 */
  526. PINCTRL_PIN(160, "AD[1]"), /* L3 */
  527. PINCTRL_PIN(161, "DA[8]"), /* L4 */
  528. PINCTRL_PIN(162, "BLANK"), /* L5 */
  529. PINCTRL_PIN(163, "gndr"), /* L6 */
  530. PINCTRL_PIN(164, "gndr"), /* L7 */
  531. PINCTRL_PIN(165, "ROW[7]"), /* L8 */
  532. PINCTRL_PIN(166, "ROW[5]"), /* L9 */
  533. PINCTRL_PIN(167, "PLL GND"), /* L10 */
  534. PINCTRL_PIN(168, "XTALI"), /* L11 */
  535. PINCTRL_PIN(169, "XTALO"), /* L12 */
  536. /* Row M */
  537. PINCTRL_PIN(170, "BRIGHT"), /* M1 */
  538. PINCTRL_PIN(171, "AD[0]"), /* M2 */
  539. PINCTRL_PIN(172, "DQMn[1]"), /* M3 */
  540. PINCTRL_PIN(173, "DQMn[2]"), /* M4 */
  541. PINCTRL_PIN(174, "P[17]"), /* M5 */
  542. PINCTRL_PIN(175, "gndr"), /* M6 */
  543. PINCTRL_PIN(176, "gndr"), /* M7 */
  544. PINCTRL_PIN(177, "vddc"), /* M8 */
  545. PINCTRL_PIN(178, "vddc"), /* M9 */
  546. PINCTRL_PIN(179, "gndr"), /* M10 */
  547. PINCTRL_PIN(180, "gndr"), /* M11 */
  548. PINCTRL_PIN(181, "ROW[6]"), /* M12 */
  549. PINCTRL_PIN(182, "ROW[4]"), /* M13 */
  550. PINCTRL_PIN(183, "ROW[1]"), /* M14 */
  551. PINCTRL_PIN(184, "ROW[0]"), /* M15 */
  552. PINCTRL_PIN(185, "ROW[3]"), /* M16 */
  553. PINCTRL_PIN(186, "ROW[2]"), /* M17 */
  554. /* Row N */
  555. PINCTRL_PIN(187, "P[14]"), /* N1 */
  556. PINCTRL_PIN(188, "P[16]"), /* N2 */
  557. PINCTRL_PIN(189, "P[15]"), /* N3 */
  558. PINCTRL_PIN(190, "P[13]"), /* N4 */
  559. PINCTRL_PIN(191, "P[12]"), /* N5 */
  560. PINCTRL_PIN(192, "DA[5]"), /* N6 */
  561. PINCTRL_PIN(193, "vddr"), /* N7 */
  562. PINCTRL_PIN(194, "vddr"), /* N8 */
  563. PINCTRL_PIN(195, "vddr"), /* N9 */
  564. PINCTRL_PIN(196, "vddr"), /* N10 */
  565. PINCTRL_PIN(197, "EECLK"), /* N11 */
  566. PINCTRL_PIN(198, "ASDO"), /* N12 */
  567. PINCTRL_PIN(199, "CTSn"), /* N13 */
  568. PINCTRL_PIN(200, "RXD[0]"), /* N14 */
  569. PINCTRL_PIN(201, "TXD[0]"), /* N15 */
  570. PINCTRL_PIN(202, "TXD[1]"), /* N16 */
  571. PINCTRL_PIN(203, "TXD[2]"), /* N17 */
  572. /* Row P */
  573. PINCTRL_PIN(204, "SPCLK"), /* P1 */
  574. PINCTRL_PIN(205, "P[10]"), /* P2 */
  575. PINCTRL_PIN(206, "P[11]"), /* P3 */
  576. PINCTRL_PIN(207, "P[3]"), /* P4 */
  577. PINCTRL_PIN(208, "AD[15]"), /* P5 */
  578. PINCTRL_PIN(209, "AD[13]"), /* P6 */
  579. PINCTRL_PIN(210, "AD[12]"), /* P7 */
  580. PINCTRL_PIN(211, "DA[2]"), /* P8 */
  581. PINCTRL_PIN(212, "AD[8]"), /* P9 */
  582. PINCTRL_PIN(213, "TCK"), /* P10 */
  583. PINCTRL_PIN(214, "BOOT[1]"), /* P11 */
  584. PINCTRL_PIN(215, "EEDAT"), /* P12 */
  585. PINCTRL_PIN(216, "GRLED"), /* P13 */
  586. PINCTRL_PIN(217, "RDLED"), /* P14 */
  587. PINCTRL_PIN(218, "GGPIO[2]"), /* P15 */
  588. PINCTRL_PIN(219, "RXD[1]"), /* P16 */
  589. PINCTRL_PIN(220, "RXD[2]"), /* P17 */
  590. /* Row R */
  591. PINCTRL_PIN(221, "P[9]"), /* R1 */
  592. PINCTRL_PIN(222, "HSYNC"), /* R2 */
  593. PINCTRL_PIN(223, "P[6]"), /* R3 */
  594. PINCTRL_PIN(224, "P[5]"), /* R4 */
  595. PINCTRL_PIN(225, "P[0]"), /* R5 */
  596. PINCTRL_PIN(226, "AD[14]"), /* R6 */
  597. PINCTRL_PIN(227, "DA[4]"), /* R7 */
  598. PINCTRL_PIN(228, "DA[1]"), /* R8 */
  599. PINCTRL_PIN(229, "DTRn"), /* R9 */
  600. PINCTRL_PIN(230, "TDI"), /* R10 */
  601. PINCTRL_PIN(231, "BOOT[0]"), /* R11 */
  602. PINCTRL_PIN(232, "ASYNC"), /* R12 */
  603. PINCTRL_PIN(233, "SSPTX[1]"), /* R13 */
  604. PINCTRL_PIN(234, "PWMOUT"), /* R14 */
  605. PINCTRL_PIN(235, "USBm[0]"), /* R15 */
  606. PINCTRL_PIN(236, "ABITCLK"), /* R16 */
  607. PINCTRL_PIN(237, "USBp[0]"), /* R17 */
  608. /* Row T */
  609. PINCTRL_PIN(238, "NC"), /* T1 */
  610. PINCTRL_PIN(239, "NC"), /* T2 */
  611. PINCTRL_PIN(240, "V_CSYNC"), /* T3 */
  612. PINCTRL_PIN(241, "P[7]"), /* T4 */
  613. PINCTRL_PIN(242, "P[2]"), /* T5 */
  614. PINCTRL_PIN(243, "DA[7]"), /* T6 */
  615. PINCTRL_PIN(244, "AD[11]"), /* T7 */
  616. PINCTRL_PIN(245, "AD[9]"), /* T8 */
  617. PINCTRL_PIN(246, "DSRn"), /* T9 */
  618. PINCTRL_PIN(247, "TMS"), /* T10 */
  619. PINCTRL_PIN(248, "gndr"), /* T11 */
  620. PINCTRL_PIN(249, "SFRM[1]"), /* T12 */
  621. PINCTRL_PIN(250, "INT[2]"), /* T13 */
  622. PINCTRL_PIN(251, "INT[0]"), /* T14 */
  623. PINCTRL_PIN(252, "USBp[1]"), /* T15 */
  624. PINCTRL_PIN(253, "NC"), /* T16 */
  625. PINCTRL_PIN(254, "NC"), /* T17 */
  626. /* Row U */
  627. PINCTRL_PIN(255, "NC"), /* U1 */
  628. PINCTRL_PIN(256, "NC"), /* U2 */
  629. PINCTRL_PIN(257, "P[8]"), /* U3 */
  630. PINCTRL_PIN(258, "P[4]"), /* U4 */
  631. PINCTRL_PIN(259, "P[1]"), /* U5 */
  632. PINCTRL_PIN(260, "DA[6]"), /* U6 */
  633. PINCTRL_PIN(261, "DA[3]"), /* U7 */
  634. PINCTRL_PIN(262, "AD[10]"), /* U8 */
  635. PINCTRL_PIN(263, "DA[0]"), /* U9 */
  636. PINCTRL_PIN(264, "TDO"), /* U10 */
  637. PINCTRL_PIN(265, "NC"), /* U11 */
  638. PINCTRL_PIN(266, "SCLK[1]"), /* U12 */
  639. PINCTRL_PIN(267, "SSPRX[1]"), /* U13 */
  640. PINCTRL_PIN(268, "INT[1]"), /* U14 */
  641. PINCTRL_PIN(269, "RTSn"), /* U15 */
  642. PINCTRL_PIN(270, "USBm[1]"), /* U16 */
  643. PINCTRL_PIN(271, "NC"), /* U17 */
  644. };
  645. static const unsigned int ssp_ep9307_pins[] = {
  646. 233, 249, 266, 267,
  647. };
  648. static const unsigned int ac97_ep9307_pins[] = {
  649. 16, 32, 198, 232, 236,
  650. };
  651. /* I can't find info on those - it's some internal state */
  652. static const unsigned int raster_on_sdram0_pins[] = {
  653. };
  654. static const unsigned int raster_on_sdram3_pins[] = {
  655. };
  656. /* ROW[N] */
  657. static const unsigned int gpio2a_9307_pins[] = {
  658. 165, 166, 181, 182, 183, 184, 185, 186,
  659. };
  660. /* COL[N] */
  661. static const unsigned int gpio3a_9307_pins[] = {
  662. 127, 139, 140, 142, 153, 155, 156, 157,
  663. };
  664. static const unsigned int keypad_9307_pins[] = {
  665. 127, 139, 140, 142, 153, 155, 156, 157,
  666. 165, 166, 181, 182, 183, 184, 185, 186,
  667. };
  668. /* ep9307 have only 4,5 pin of GPIO E Port exposed */
  669. static const unsigned int gpio4a_9307_pins[] = { 216, 217 };
  670. /* ep9307 have only 2 pin of GPIO G Port exposed */
  671. static const unsigned int gpio6a_9307_pins[] = { 219 };
  672. static const unsigned int gpio7a_9307_pins[] = { 7, 24, 41, 56, 57, 59 };
  673. static const struct ep93xx_pin_group ep9307_pin_groups[] = {
  674. PMX_GROUP("ssp", ssp_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
  675. PMX_GROUP("i2s_on_ssp", ssp_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
  676. EP93XX_SYSCON_DEVCFG_I2SONSSP),
  677. PMX_GROUP("ac97", ac97_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
  678. PMX_GROUP("i2s_on_ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
  679. EP93XX_SYSCON_DEVCFG_I2SONAC97),
  680. PMX_GROUP("rasteronsdram0grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3, 0),
  681. PMX_GROUP("rasteronsdram3grp", raster_on_sdram3_pins, EP93XX_SYSCON_DEVCFG_RASONP3,
  682. EP93XX_SYSCON_DEVCFG_RASONP3),
  683. PMX_GROUP("gpio2agrp", gpio2a_9307_pins, EP93XX_SYSCON_DEVCFG_GONK,
  684. EP93XX_SYSCON_DEVCFG_GONK),
  685. PMX_GROUP("gpio3agrp", gpio3a_9307_pins, EP93XX_SYSCON_DEVCFG_GONK,
  686. EP93XX_SYSCON_DEVCFG_GONK),
  687. PMX_GROUP("keypadgrp", keypad_9307_pins, EP93XX_SYSCON_DEVCFG_GONK, 0),
  688. PMX_GROUP("gpio4agrp", gpio4a_9307_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
  689. EP93XX_SYSCON_DEVCFG_EONIDE),
  690. PMX_GROUP("gpio6agrp", gpio6a_9307_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
  691. EP93XX_SYSCON_DEVCFG_GONIDE),
  692. PMX_GROUP("gpio7agrp", gpio7a_9307_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
  693. EP93XX_SYSCON_DEVCFG_HONIDE),
  694. };
  695. /* ep9312, ep9315 */
  696. static const struct pinctrl_pin_desc ep9312_pins[] = {
  697. /* Row A */
  698. PINCTRL_PIN(0, "CSN[7]"), /* A1 */
  699. PINCTRL_PIN(1, "DA[28]"), /* A2 */
  700. PINCTRL_PIN(2, "AD[18]"), /* A3 */
  701. PINCTRL_PIN(3, "DD[8]"), /* A4 */
  702. PINCTRL_PIN(4, "DD[4]"), /* A5 */
  703. PINCTRL_PIN(5, "AD[17]"), /* A6 */
  704. PINCTRL_PIN(6, "RDN"), /* A7 */
  705. PINCTRL_PIN(7, "RXCLK"), /* A8 */
  706. PINCTRL_PIN(8, "MIIRXD[0]"), /* A9 */
  707. PINCTRL_PIN(9, "RXDVAL"), /* A10 */
  708. PINCTRL_PIN(10, "MIITXD[2]"), /* A11 */
  709. PINCTRL_PIN(11, "TXERR"), /* A12 */
  710. PINCTRL_PIN(12, "CLD"), /* A13 */
  711. PINCTRL_PIN(13, "NC"), /* A14 */
  712. PINCTRL_PIN(14, "NC"), /* A15 */
  713. PINCTRL_PIN(15, "NC"), /* A16 */
  714. PINCTRL_PIN(16, "EGPIO[12]"), /* A17 */
  715. PINCTRL_PIN(17, "EGPIO[15]"), /* A18 */
  716. PINCTRL_PIN(18, "NC"), /* A19 */
  717. PINCTRL_PIN(19, "NC"), /* A20 */
  718. /* Row B */
  719. PINCTRL_PIN(20, "CSN[2]"), /* B1 */
  720. PINCTRL_PIN(21, "DA[31]"), /* B2 */
  721. PINCTRL_PIN(22, "DA[30]"), /* B3 */
  722. PINCTRL_PIN(23, "DA[27]"), /* B4 */
  723. PINCTRL_PIN(24, "DD[7]"), /* B5 */
  724. PINCTRL_PIN(25, "DD[3]"), /* B6 */
  725. PINCTRL_PIN(26, "WRN"), /* B7 */
  726. PINCTRL_PIN(27, "MDIO"), /* B8 */
  727. PINCTRL_PIN(28, "MIIRXD[1]"), /* B9 */
  728. PINCTRL_PIN(29, "RXERR"), /* B10 */
  729. PINCTRL_PIN(30, "MIITXD[1]"), /* B11 */
  730. PINCTRL_PIN(31, "CRS"), /* B12 */
  731. PINCTRL_PIN(32, "NC"), /* B13 */
  732. PINCTRL_PIN(33, "NC"), /* B14 */
  733. PINCTRL_PIN(34, "NC"), /* B15 */
  734. PINCTRL_PIN(35, "NC"), /* B16 */
  735. PINCTRL_PIN(36, "EGPIO[13]"), /* B17 */
  736. PINCTRL_PIN(37, "NC"), /* B18 */
  737. PINCTRL_PIN(38, "WAITN"), /* B19 */
  738. PINCTRL_PIN(39, "TRSTN"), /* B20 */
  739. /* Row C */
  740. PINCTRL_PIN(40, "CSN[1]"), /* C1 */
  741. PINCTRL_PIN(41, "CSN[3]"), /* C2 */
  742. PINCTRL_PIN(42, "AD[20]"), /* C3 */
  743. PINCTRL_PIN(43, "DA[29]"), /* C4 */
  744. PINCTRL_PIN(44, "DD[10]"), /* C5 */
  745. PINCTRL_PIN(45, "DD[6]"), /* C6 */
  746. PINCTRL_PIN(46, "DD[2]"), /* C7 */
  747. PINCTRL_PIN(47, "MDC"), /* C8 */
  748. PINCTRL_PIN(48, "MIIRXD[3]"), /* C9 */
  749. PINCTRL_PIN(49, "TXCLK"), /* C10 */
  750. PINCTRL_PIN(50, "MIITXD[0]"), /* C11 */
  751. PINCTRL_PIN(51, "NC"), /* C12 */
  752. PINCTRL_PIN(52, "NC"), /* C13 */
  753. PINCTRL_PIN(53, "NC"), /* C14 */
  754. PINCTRL_PIN(54, "NC"), /* C15 */
  755. PINCTRL_PIN(55, "NC"), /* C16 */
  756. PINCTRL_PIN(56, "NC"), /* C17 */
  757. PINCTRL_PIN(57, "USBP[2]"), /* C18 */
  758. PINCTRL_PIN(58, "IORDY"), /* C19 */
  759. PINCTRL_PIN(59, "DMACKN"), /* C20 */
  760. /* Row D */
  761. PINCTRL_PIN(60, "AD[24]"), /* D1 */
  762. PINCTRL_PIN(61, "DA[25]"), /* D2 */
  763. PINCTRL_PIN(62, "DD[11]"), /* D3 */
  764. PINCTRL_PIN(63, "SDCLKEN"), /* D4 */
  765. PINCTRL_PIN(64, "AD[19]"), /* D5 */
  766. PINCTRL_PIN(65, "DD[9]"), /* D6 */
  767. PINCTRL_PIN(66, "DD[5]"), /* D7 */
  768. PINCTRL_PIN(67, "AD[16]"), /* D8 */
  769. PINCTRL_PIN(68, "MIIRXD[2]"), /* D9 */
  770. PINCTRL_PIN(69, "MIITXD[3]"), /* D10 */
  771. PINCTRL_PIN(70, "TXEN"), /* D11 */
  772. PINCTRL_PIN(71, "NC"), /* D12 */
  773. PINCTRL_PIN(72, "NC"), /* D13 */
  774. PINCTRL_PIN(73, "NC"), /* D14 */
  775. PINCTRL_PIN(74, "EGPIO[14]"), /* D15 */
  776. PINCTRL_PIN(75, "NC"), /* D16 */
  777. PINCTRL_PIN(76, "USBM[2]"), /* D17 */
  778. PINCTRL_PIN(77, "ARSTN"), /* D18 */
  779. PINCTRL_PIN(78, "DIORN"), /* D19 */
  780. PINCTRL_PIN(79, "EGPIO[1]"), /* D20 */
  781. /* Row E */
  782. PINCTRL_PIN(80, "AD[23]"), /* E1 */
  783. PINCTRL_PIN(81, "DA[23]"), /* E2 */
  784. PINCTRL_PIN(82, "DA[26]"), /* E3 */
  785. PINCTRL_PIN(83, "CSN[6]"), /* E4 */
  786. PINCTRL_PIN(84, "GND"), /* E5 */
  787. PINCTRL_PIN(85, "GND"), /* E6 */
  788. PINCTRL_PIN(86, "CVDD"), /* E7 */
  789. PINCTRL_PIN(87, "CVDD"), /* E8 */
  790. PINCTRL_PIN(88, "RVDD"), /* E9 */
  791. PINCTRL_PIN(89, "GND"), /* E10 */
  792. PINCTRL_PIN(90, "GND"), /* E11 */
  793. PINCTRL_PIN(91, "RVDD"), /* E12 */
  794. PINCTRL_PIN(92, "CVDD"), /* E13 */
  795. PINCTRL_PIN(93, "CVDD"), /* E14 */
  796. PINCTRL_PIN(94, "GND"), /* E15 */
  797. PINCTRL_PIN(95, "ASDI"), /* E16 */
  798. PINCTRL_PIN(96, "DIOWN"), /* E17 */
  799. PINCTRL_PIN(97, "EGPIO[0]"), /* E18 */
  800. PINCTRL_PIN(98, "EGPIO[3]"), /* E19 */
  801. PINCTRL_PIN(99, "EGPIO[5]"), /* E20 */
  802. /* Row F */
  803. PINCTRL_PIN(100, "SDCSN[3]"), /* F1 */
  804. PINCTRL_PIN(101, "DA[22]"), /* F2 */
  805. PINCTRL_PIN(102, "DA[24]"), /* F3 */
  806. PINCTRL_PIN(103, "AD[25]"), /* F4 */
  807. PINCTRL_PIN(104, "RVDD"), /* F5 */
  808. PINCTRL_PIN(105, "GND"), /* F6 */
  809. PINCTRL_PIN(106, "CVDD"), /* F7 */
  810. PINCTRL_PIN(107, "CVDD"), /* F14 */
  811. PINCTRL_PIN(108, "GND"), /* F15 */
  812. PINCTRL_PIN(109, "GND"), /* F16 */
  813. PINCTRL_PIN(110, "EGPIO[2]"), /* F17 */
  814. PINCTRL_PIN(111, "EGPIO[4]"), /* F18 */
  815. PINCTRL_PIN(112, "EGPIO[6]"), /* F19 */
  816. PINCTRL_PIN(113, "EGPIO[8]"), /* F20 */
  817. /* Row G */
  818. PINCTRL_PIN(114, "SDCSN[0]"), /* G1 */
  819. PINCTRL_PIN(115, "SDCSN[1]"), /* G2 */
  820. PINCTRL_PIN(116, "SDWEN"), /* G3 */
  821. PINCTRL_PIN(117, "SDCLK"), /* G4 */
  822. PINCTRL_PIN(118, "RVDD"), /* G5 */
  823. PINCTRL_PIN(119, "RVDD"), /* G6 */
  824. PINCTRL_PIN(120, "RVDD"), /* G15 */
  825. PINCTRL_PIN(121, "RVDD"), /* G16 */
  826. PINCTRL_PIN(122, "EGPIO[7]"), /* G17 */
  827. PINCTRL_PIN(123, "EGPIO[9]"), /* G18 */
  828. PINCTRL_PIN(124, "EGPIO[10]"), /* G19 */
  829. PINCTRL_PIN(125, "EGPIO[11]"), /* G20 */
  830. /* Row H */
  831. PINCTRL_PIN(126, "DQMN[3]"), /* H1 */
  832. PINCTRL_PIN(127, "CASN"), /* H2 */
  833. PINCTRL_PIN(128, "RASN"), /* H3 */
  834. PINCTRL_PIN(129, "SDCSN[2]"), /* H4 */
  835. PINCTRL_PIN(130, "CVDD"), /* H5 */
  836. PINCTRL_PIN(131, "GND"), /* H8 */
  837. PINCTRL_PIN(132, "GND"), /* H9 */
  838. PINCTRL_PIN(133, "GND"), /* H10 */
  839. PINCTRL_PIN(134, "GND"), /* H11 */
  840. PINCTRL_PIN(135, "GND"), /* H12 */
  841. PINCTRL_PIN(136, "GND"), /* H13 */
  842. PINCTRL_PIN(137, "RVDD"), /* H16 */
  843. PINCTRL_PIN(138, "RTCXTALO"), /* H17 */
  844. PINCTRL_PIN(139, "ADC_VDD"), /* H18 */
  845. PINCTRL_PIN(140, "ADC_GND"), /* H19 */
  846. PINCTRL_PIN(141, "XP"), /* H20 */
  847. /* Row J */
  848. PINCTRL_PIN(142, "DA[21]"), /* J1 */
  849. PINCTRL_PIN(143, "DQMN[0]"), /* J2 */
  850. PINCTRL_PIN(144, "DQMN[1]"), /* J3 */
  851. PINCTRL_PIN(145, "DQMN[2]"), /* J4 */
  852. PINCTRL_PIN(146, "GND"), /* J5 */
  853. PINCTRL_PIN(147, "GND"), /* J8 */
  854. PINCTRL_PIN(148, "GND"), /* J9 */
  855. PINCTRL_PIN(149, "GND"), /* J10 */
  856. PINCTRL_PIN(150, "GND"), /* J11 */
  857. PINCTRL_PIN(151, "GND"), /* J12 */
  858. PINCTRL_PIN(152, "GND"), /* J13 */
  859. PINCTRL_PIN(153, "CVDD"), /* J16 */
  860. PINCTRL_PIN(154, "RTCXTALI"), /* J17 */
  861. PINCTRL_PIN(155, "XM"), /* J18 */
  862. PINCTRL_PIN(156, "YP"), /* J19 */
  863. PINCTRL_PIN(157, "YM"), /* J20 */
  864. /* Row K */
  865. PINCTRL_PIN(158, "AD[22]"), /* K1 */
  866. PINCTRL_PIN(159, "DA[20]"), /* K2 */
  867. PINCTRL_PIN(160, "AD[21]"), /* K3 */
  868. PINCTRL_PIN(161, "DA[19]"), /* K4 */
  869. PINCTRL_PIN(162, "RVDD"), /* K5 */
  870. PINCTRL_PIN(163, "GND"), /* K8 */
  871. PINCTRL_PIN(164, "GND"), /* K9 */
  872. PINCTRL_PIN(165, "GND"), /* K10 */
  873. PINCTRL_PIN(166, "GND"), /* K11 */
  874. PINCTRL_PIN(167, "GND"), /* K12 */
  875. PINCTRL_PIN(168, "GND"), /* K13 */
  876. PINCTRL_PIN(169, "CVDD"), /* K16 */
  877. PINCTRL_PIN(170, "SYM"), /* K17 */
  878. PINCTRL_PIN(171, "SYP"), /* K18 */
  879. PINCTRL_PIN(172, "SXM"), /* K19 */
  880. PINCTRL_PIN(173, "SXP"), /* K20 */
  881. /* Row L */
  882. PINCTRL_PIN(174, "DA[18]"), /* L1 */
  883. PINCTRL_PIN(175, "DA[17]"), /* L2 */
  884. PINCTRL_PIN(176, "DA[16]"), /* L3 */
  885. PINCTRL_PIN(177, "DA[15]"), /* L4 */
  886. PINCTRL_PIN(178, "GND"), /* L5 */
  887. PINCTRL_PIN(179, "GND"), /* L8 */
  888. PINCTRL_PIN(180, "GND"), /* L9 */
  889. PINCTRL_PIN(181, "GND"), /* L10 */
  890. PINCTRL_PIN(182, "GND"), /* L11 */
  891. PINCTRL_PIN(183, "GND"), /* L12 */
  892. PINCTRL_PIN(184, "GND"), /* L13 */
  893. PINCTRL_PIN(185, "CVDD"), /* L16 */
  894. PINCTRL_PIN(186, "COL[5]"), /* L17 */
  895. PINCTRL_PIN(187, "COL[7]"), /* L18 */
  896. PINCTRL_PIN(188, "RSTON"), /* L19 */
  897. PINCTRL_PIN(189, "PRSTN"), /* L20 */
  898. /* Row M */
  899. PINCTRL_PIN(190, "AD[7]"), /* M1 */
  900. PINCTRL_PIN(191, "DA[14]"), /* M2 */
  901. PINCTRL_PIN(192, "AD[6]"), /* M3 */
  902. PINCTRL_PIN(193, "AD[5]"), /* M4 */
  903. PINCTRL_PIN(194, "CVDD"), /* M5 */
  904. PINCTRL_PIN(195, "GND"), /* M8 */
  905. PINCTRL_PIN(196, "GND"), /* M9 */
  906. PINCTRL_PIN(197, "GND"), /* M10 */
  907. PINCTRL_PIN(198, "GND"), /* M11 */
  908. PINCTRL_PIN(199, "GND"), /* M12 */
  909. PINCTRL_PIN(200, "GND"), /* M13 */
  910. PINCTRL_PIN(201, "GND"), /* M16 */
  911. PINCTRL_PIN(202, "COL[4]"), /* M17 */
  912. PINCTRL_PIN(203, "COL[3]"), /* M18 */
  913. PINCTRL_PIN(204, "COL[6]"), /* M19 */
  914. PINCTRL_PIN(205, "CSN[0]"), /* M20 */
  915. /* Row N */
  916. PINCTRL_PIN(206, "DA[13]"), /* N1 */
  917. PINCTRL_PIN(207, "DA[12]"), /* N2 */
  918. PINCTRL_PIN(208, "DA[11]"), /* N3 */
  919. PINCTRL_PIN(209, "AD[3]"), /* N4 */
  920. PINCTRL_PIN(210, "CVDD"), /* N5 */
  921. PINCTRL_PIN(211, "CVDD"), /* N6 */
  922. PINCTRL_PIN(212, "GND"), /* N8 */
  923. PINCTRL_PIN(213, "GND"), /* N9 */
  924. PINCTRL_PIN(214, "GND"), /* N10 */
  925. PINCTRL_PIN(215, "GND"), /* N11 */
  926. PINCTRL_PIN(216, "GND"), /* N12 */
  927. PINCTRL_PIN(217, "GND"), /* N13 */
  928. PINCTRL_PIN(218, "GND"), /* N15 */
  929. PINCTRL_PIN(219, "GND"), /* N16 */
  930. PINCTRL_PIN(220, "XTALO"), /* N17 */
  931. PINCTRL_PIN(221, "COL[0]"), /* N18 */
  932. PINCTRL_PIN(222, "COL[1]"), /* N19 */
  933. PINCTRL_PIN(223, "COL[2]"), /* N20 */
  934. /* Row P */
  935. PINCTRL_PIN(224, "AD[4]"), /* P1 */
  936. PINCTRL_PIN(225, "DA[10]"), /* P2 */
  937. PINCTRL_PIN(226, "DA[9]"), /* P3 */
  938. PINCTRL_PIN(227, "BRIGHT"), /* P4 */
  939. PINCTRL_PIN(228, "RVDD"), /* P5 */
  940. PINCTRL_PIN(229, "RVDD"), /* P6 */
  941. PINCTRL_PIN(230, "RVDD"), /* P15 */
  942. PINCTRL_PIN(231, "RVDD"), /* P16 */
  943. PINCTRL_PIN(232, "XTALI"), /* P17 */
  944. PINCTRL_PIN(233, "PLL_VDD"), /* P18 */
  945. PINCTRL_PIN(234, "ROW[6]"), /* P19 */
  946. PINCTRL_PIN(235, "ROW[7]"), /* P20 */
  947. /* Row R */
  948. PINCTRL_PIN(236, "AD[2]"), /* R1 */
  949. PINCTRL_PIN(237, "AD[1]"), /* R2 */
  950. PINCTRL_PIN(238, "P[17]"), /* R3 */
  951. PINCTRL_PIN(239, "P[14]"), /* R4 */
  952. PINCTRL_PIN(240, "RVDD"), /* R5 */
  953. PINCTRL_PIN(241, "RVDD"), /* R6 */
  954. PINCTRL_PIN(242, "GND"), /* R7 */
  955. PINCTRL_PIN(243, "CVDD"), /* R8 */
  956. PINCTRL_PIN(244, "CVDD"), /* R13 */
  957. PINCTRL_PIN(245, "GND"), /* R14 */
  958. PINCTRL_PIN(246, "RVDD"), /* R15 */
  959. PINCTRL_PIN(247, "RVDD"), /* R16 */
  960. PINCTRL_PIN(248, "ROW[0]"), /* R17 */
  961. PINCTRL_PIN(249, "ROW[3]"), /* R18 */
  962. PINCTRL_PIN(250, "PLL_GND"), /* R19 */
  963. PINCTRL_PIN(251, "ROW[5]"), /* R20 */
  964. /* Row T */
  965. PINCTRL_PIN(252, "DA[8]"), /* T1 */
  966. PINCTRL_PIN(253, "BLANK"), /* T2 */
  967. PINCTRL_PIN(254, "P[13]"), /* T3 */
  968. PINCTRL_PIN(255, "SPCLK"), /* T4 */
  969. PINCTRL_PIN(256, "V_CSYNC"), /* T5 */
  970. PINCTRL_PIN(257, "DD[14]"), /* T6 */
  971. PINCTRL_PIN(258, "GND"), /* T7 */
  972. PINCTRL_PIN(259, "CVDD"), /* T8 */
  973. PINCTRL_PIN(260, "RVDD"), /* T9 */
  974. PINCTRL_PIN(261, "GND"), /* T10 */
  975. PINCTRL_PIN(262, "GND"), /* T11 */
  976. PINCTRL_PIN(263, "RVDD"), /* T12 */
  977. PINCTRL_PIN(264, "CVDD"), /* T13 */
  978. PINCTRL_PIN(265, "GND"), /* T14 */
  979. PINCTRL_PIN(266, "INT[0]"), /* T15 */
  980. PINCTRL_PIN(267, "USBM[1]"), /* T16 */
  981. PINCTRL_PIN(268, "RXD[0]"), /* T17 */
  982. PINCTRL_PIN(269, "TXD[2]"), /* T18 */
  983. PINCTRL_PIN(270, "ROW[2]"), /* T19 */
  984. PINCTRL_PIN(271, "ROW[4]"), /* T20 */
  985. /* Row U */
  986. PINCTRL_PIN(272, "AD[0]"), /* U1 */
  987. PINCTRL_PIN(273, "P[15]"), /* U2 */
  988. PINCTRL_PIN(274, "P[10]"), /* U3 */
  989. PINCTRL_PIN(275, "P[7]"), /* U4 */
  990. PINCTRL_PIN(276, "P[6]"), /* U5 */
  991. PINCTRL_PIN(277, "P[4]"), /* U6 */
  992. PINCTRL_PIN(278, "P[0]"), /* U7 */
  993. PINCTRL_PIN(279, "AD[13]"), /* U8 */
  994. PINCTRL_PIN(280, "DA[3]"), /* U9 */
  995. PINCTRL_PIN(281, "DA[0]"), /* U10 */
  996. PINCTRL_PIN(282, "DSRN"), /* U11 */
  997. PINCTRL_PIN(283, "BOOT[1]"), /* U12 */
  998. PINCTRL_PIN(284, "NC"), /* U13 */
  999. PINCTRL_PIN(285, "SSPRX1"), /* U14 */
  1000. PINCTRL_PIN(286, "INT[1]"), /* U15 */
  1001. PINCTRL_PIN(287, "PWMOUT"), /* U16 */
  1002. PINCTRL_PIN(288, "USBM[0]"), /* U17 */
  1003. PINCTRL_PIN(289, "RXD[1]"), /* U18 */
  1004. PINCTRL_PIN(290, "TXD[1]"), /* U19 */
  1005. PINCTRL_PIN(291, "ROW[1]"), /* U20 */
  1006. /* Row V */
  1007. PINCTRL_PIN(292, "P[16]"), /* V1 */
  1008. PINCTRL_PIN(293, "P[11]"), /* V2 */
  1009. PINCTRL_PIN(294, "P[8]"), /* V3 */
  1010. PINCTRL_PIN(295, "DD[15]"), /* V4 */
  1011. PINCTRL_PIN(296, "DD[13]"), /* V5 */
  1012. PINCTRL_PIN(297, "P[1]"), /* V6 */
  1013. PINCTRL_PIN(298, "AD[14]"), /* V7 */
  1014. PINCTRL_PIN(299, "AD[12]"), /* V8 */
  1015. PINCTRL_PIN(300, "DA[2]"), /* V9 */
  1016. PINCTRL_PIN(301, "IDECS0N"), /* V10 */
  1017. PINCTRL_PIN(302, "IDEDA[2]"), /* V11 */
  1018. PINCTRL_PIN(303, "TDI"), /* V12 */
  1019. PINCTRL_PIN(304, "GND"), /* V13 */
  1020. PINCTRL_PIN(305, "ASYNC"), /* V14 */
  1021. PINCTRL_PIN(306, "SSPTX1"), /* V15 */
  1022. PINCTRL_PIN(307, "INT[2]"), /* V16 */
  1023. PINCTRL_PIN(308, "RTSN"), /* V17 */
  1024. PINCTRL_PIN(309, "USBP[0]"), /* V18 */
  1025. PINCTRL_PIN(310, "CTSN"), /* V19 */
  1026. PINCTRL_PIN(311, "TXD[0]"), /* V20 */
  1027. /* Row W */
  1028. PINCTRL_PIN(312, "P[12]"), /* W1 */
  1029. PINCTRL_PIN(313, "P[9]"), /* W2 */
  1030. PINCTRL_PIN(314, "DD[0]"), /* W3 */
  1031. PINCTRL_PIN(315, "P[5]"), /* W4 */
  1032. PINCTRL_PIN(316, "P[3]"), /* W5 */
  1033. PINCTRL_PIN(317, "DA[7]"), /* W6 */
  1034. PINCTRL_PIN(318, "DA[5]"), /* W7 */
  1035. PINCTRL_PIN(319, "AD[11]"), /* W8 */
  1036. PINCTRL_PIN(320, "AD[9]"), /* W9 */
  1037. PINCTRL_PIN(321, "IDECS1N"), /* W10 */
  1038. PINCTRL_PIN(322, "IDEDA[1]"), /* W11 */
  1039. PINCTRL_PIN(323, "TCK"), /* W12 */
  1040. PINCTRL_PIN(324, "TMS"), /* W13 */
  1041. PINCTRL_PIN(325, "EECLK"), /* W14 */
  1042. PINCTRL_PIN(326, "SCLK1"), /* W15 */
  1043. PINCTRL_PIN(327, "GRLED"), /* W16 */
  1044. PINCTRL_PIN(328, "INT[3]"), /* W17 */
  1045. PINCTRL_PIN(329, "SLA[1]"), /* W18 */
  1046. PINCTRL_PIN(330, "SLA[0]"), /* W19 */
  1047. PINCTRL_PIN(331, "RXD[2]"), /* W20 */
  1048. /* Row Y */
  1049. PINCTRL_PIN(332, "HSYNC"), /* Y1 */
  1050. PINCTRL_PIN(333, "DD[1]"), /* Y2 */
  1051. PINCTRL_PIN(334, "DD[12]"), /* Y3 */
  1052. PINCTRL_PIN(335, "P[2]"), /* Y4 */
  1053. PINCTRL_PIN(336, "AD[15]"), /* Y5 */
  1054. PINCTRL_PIN(337, "DA[6]"), /* Y6 */
  1055. PINCTRL_PIN(338, "DA[4]"), /* Y7 */
  1056. PINCTRL_PIN(339, "AD[10]"), /* Y8 */
  1057. PINCTRL_PIN(340, "DA[1]"), /* Y9 */
  1058. PINCTRL_PIN(341, "AD[8]"), /* Y10 */
  1059. PINCTRL_PIN(342, "IDEDA[0]"), /* Y11 */
  1060. PINCTRL_PIN(343, "DTRN"), /* Y12 */
  1061. PINCTRL_PIN(344, "TDO"), /* Y13 */
  1062. PINCTRL_PIN(345, "BOOT[0]"), /* Y14 */
  1063. PINCTRL_PIN(346, "EEDAT"), /* Y15 */
  1064. PINCTRL_PIN(347, "ASDO"), /* Y16 */
  1065. PINCTRL_PIN(348, "SFRM1"), /* Y17 */
  1066. PINCTRL_PIN(349, "RDLED"), /* Y18 */
  1067. PINCTRL_PIN(350, "USBP[1]"), /* Y19 */
  1068. PINCTRL_PIN(351, "ABITCLK"), /* Y20 */
  1069. };
  1070. static const unsigned int ssp_ep9312_pins[] = {
  1071. 285, 306, 326, 348,
  1072. };
  1073. static const unsigned int ac97_ep9312_pins[] = {
  1074. 77, 95, 305, 347, 351,
  1075. };
  1076. static const unsigned int pwm_ep9312_pins[] = { 74 };
  1077. static const unsigned int gpio1a_ep9312_pins[] = { 74 };
  1078. static const unsigned int gpio2a_9312_pins[] = {
  1079. 234, 235, 248, 249, 251, 270, 271, 291,
  1080. };
  1081. static const unsigned int gpio3a_9312_pins[] = {
  1082. 186, 187, 202, 203, 204, 221, 222, 223,
  1083. };
  1084. static const unsigned int keypad_9312_pins[] = {
  1085. 186, 187, 202, 203, 204, 221, 222, 223,
  1086. 234, 235, 248, 249, 251, 270, 271, 291,
  1087. };
  1088. static const unsigned int gpio4a_9312_pins[] = {
  1089. 78, 301, 302, 321, 322, 342,
  1090. };
  1091. static const unsigned int gpio6a_9312_pins[] = {
  1092. 257, 295, 296, 334,
  1093. };
  1094. static const unsigned int gpio7a_9312_pins[] = {
  1095. 4, 24, 25, 45, 46, 66, 314, 333,
  1096. };
  1097. static const unsigned int ide_9312_pins[] = {
  1098. 78, 301, 302, 321, 322, 342, 257, 295,
  1099. 296, 334, 4, 24, 25, 45, 46, 66,
  1100. 314, 333,
  1101. };
  1102. static const struct ep93xx_pin_group ep9312_pin_groups[] = {
  1103. PMX_GROUP("ssp", ssp_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
  1104. PMX_GROUP("i2s_on_ssp", ssp_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
  1105. EP93XX_SYSCON_DEVCFG_I2SONSSP),
  1106. PMX_GROUP("pwm1", pwm_ep9312_pins, EP93XX_SYSCON_DEVCFG_PONG,
  1107. EP93XX_SYSCON_DEVCFG_PONG),
  1108. PMX_GROUP("gpio1agrp", gpio1a_ep9312_pins, EP93XX_SYSCON_DEVCFG_PONG, 0),
  1109. PMX_GROUP("ac97", ac97_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
  1110. PMX_GROUP("i2s_on_ac97", ac97_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
  1111. EP93XX_SYSCON_DEVCFG_I2SONAC97),
  1112. PMX_GROUP("rasteronsdram0grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3, 0),
  1113. PMX_GROUP("rasteronsdram3grp", raster_on_sdram3_pins, EP93XX_SYSCON_DEVCFG_RASONP3,
  1114. EP93XX_SYSCON_DEVCFG_RASONP3),
  1115. PMX_GROUP("gpio2agrp", gpio2a_9312_pins, EP93XX_SYSCON_DEVCFG_GONK,
  1116. EP93XX_SYSCON_DEVCFG_GONK),
  1117. PMX_GROUP("gpio3agrp", gpio3a_9312_pins, EP93XX_SYSCON_DEVCFG_GONK,
  1118. EP93XX_SYSCON_DEVCFG_GONK),
  1119. PMX_GROUP("keypadgrp", keypad_9312_pins, EP93XX_SYSCON_DEVCFG_GONK, 0),
  1120. PMX_GROUP("gpio4agrp", gpio4a_9312_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
  1121. EP93XX_SYSCON_DEVCFG_EONIDE),
  1122. PMX_GROUP("gpio6agrp", gpio6a_9312_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
  1123. EP93XX_SYSCON_DEVCFG_GONIDE),
  1124. PMX_GROUP("gpio7agrp", gpio7a_9312_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
  1125. EP93XX_SYSCON_DEVCFG_HONIDE),
  1126. PMX_GROUP("idegrp", ide_9312_pins, EP93XX_SYSCON_DEVCFG_EONIDE |
  1127. EP93XX_SYSCON_DEVCFG_GONIDE | EP93XX_SYSCON_DEVCFG_HONIDE, 0),
  1128. };
  1129. static int ep93xx_get_groups_count(struct pinctrl_dev *pctldev)
  1130. {
  1131. struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  1132. switch (pmx->model) {
  1133. case EP93XX_9301_PINCTRL:
  1134. return ARRAY_SIZE(ep9301_pin_groups);
  1135. case EP93XX_9307_PINCTRL:
  1136. return ARRAY_SIZE(ep9307_pin_groups);
  1137. case EP93XX_9312_PINCTRL:
  1138. return ARRAY_SIZE(ep9312_pin_groups);
  1139. default:
  1140. return 0;
  1141. }
  1142. }
  1143. static const char *ep93xx_get_group_name(struct pinctrl_dev *pctldev,
  1144. unsigned int selector)
  1145. {
  1146. struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  1147. switch (pmx->model) {
  1148. case EP93XX_9301_PINCTRL:
  1149. return ep9301_pin_groups[selector].grp.name;
  1150. case EP93XX_9307_PINCTRL:
  1151. return ep9307_pin_groups[selector].grp.name;
  1152. case EP93XX_9312_PINCTRL:
  1153. return ep9312_pin_groups[selector].grp.name;
  1154. default:
  1155. return NULL;
  1156. }
  1157. }
  1158. static int ep93xx_get_group_pins(struct pinctrl_dev *pctldev,
  1159. unsigned int selector,
  1160. const unsigned int **pins,
  1161. unsigned int *num_pins)
  1162. {
  1163. struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  1164. switch (pmx->model) {
  1165. case EP93XX_9301_PINCTRL:
  1166. *pins = ep9301_pin_groups[selector].grp.pins;
  1167. *num_pins = ep9301_pin_groups[selector].grp.npins;
  1168. break;
  1169. case EP93XX_9307_PINCTRL:
  1170. *pins = ep9307_pin_groups[selector].grp.pins;
  1171. *num_pins = ep9307_pin_groups[selector].grp.npins;
  1172. break;
  1173. case EP93XX_9312_PINCTRL:
  1174. *pins = ep9312_pin_groups[selector].grp.pins;
  1175. *num_pins = ep9312_pin_groups[selector].grp.npins;
  1176. break;
  1177. default:
  1178. return -EINVAL;
  1179. }
  1180. return 0;
  1181. }
  1182. static const struct pinctrl_ops ep93xx_pctrl_ops = {
  1183. .get_groups_count = ep93xx_get_groups_count,
  1184. .get_group_name = ep93xx_get_group_name,
  1185. .get_group_pins = ep93xx_get_group_pins,
  1186. .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
  1187. .dt_free_map = pinconf_generic_dt_free_map,
  1188. };
  1189. static const char * const spigrps[] = { "ssp" };
  1190. static const char * const ac97grps[] = { "ac97" };
  1191. static const char * const i2sgrps[] = { "i2s_on_ssp", "i2s_on_ac97" };
  1192. static const char * const pwm1grps[] = { "pwm1" };
  1193. static const char * const gpiogrps[] = { "gpio1agrp", "gpio2agrp", "gpio3agrp",
  1194. "gpio4agrp", "gpio6agrp", "gpio7agrp" };
  1195. static const char * const rastergrps[] = { "rasteronsdram0grp", "rasteronsdram3grp"};
  1196. static const char * const keypadgrps[] = { "keypadgrp"};
  1197. static const char * const idegrps[] = { "idegrp"};
  1198. static const struct pinfunction ep93xx_pmx_functions[] = {
  1199. PINCTRL_PINFUNCTION("spi", spigrps, ARRAY_SIZE(spigrps)),
  1200. PINCTRL_PINFUNCTION("ac97", ac97grps, ARRAY_SIZE(ac97grps)),
  1201. PINCTRL_PINFUNCTION("i2s", i2sgrps, ARRAY_SIZE(i2sgrps)),
  1202. PINCTRL_PINFUNCTION("pwm", pwm1grps, ARRAY_SIZE(pwm1grps)),
  1203. PINCTRL_PINFUNCTION("keypad", keypadgrps, ARRAY_SIZE(keypadgrps)),
  1204. PINCTRL_PINFUNCTION("pata", idegrps, ARRAY_SIZE(idegrps)),
  1205. PINCTRL_PINFUNCTION("lcd", rastergrps, ARRAY_SIZE(rastergrps)),
  1206. PINCTRL_PINFUNCTION("gpio", gpiogrps, ARRAY_SIZE(gpiogrps)),
  1207. };
  1208. static int ep93xx_pmx_set_mux(struct pinctrl_dev *pctldev,
  1209. unsigned int selector,
  1210. unsigned int group)
  1211. {
  1212. struct ep93xx_pmx *pmx;
  1213. const struct pinfunction *func;
  1214. const struct ep93xx_pin_group *grp;
  1215. u32 before, after, expected;
  1216. unsigned long tmp;
  1217. int i;
  1218. pmx = pinctrl_dev_get_drvdata(pctldev);
  1219. switch (pmx->model) {
  1220. case EP93XX_9301_PINCTRL:
  1221. grp = &ep9301_pin_groups[group];
  1222. break;
  1223. case EP93XX_9307_PINCTRL:
  1224. grp = &ep9307_pin_groups[group];
  1225. break;
  1226. case EP93XX_9312_PINCTRL:
  1227. grp = &ep9312_pin_groups[group];
  1228. break;
  1229. default:
  1230. dev_err(pmx->dev, "invalid SoC type\n");
  1231. return -ENODEV;
  1232. }
  1233. func = &ep93xx_pmx_functions[selector];
  1234. dev_dbg(pmx->dev,
  1235. "ACTIVATE function \"%s\" with group \"%s\" (mask=0x%x, value=0x%x)\n",
  1236. func->name, grp->grp.name, grp->mask, grp->value);
  1237. regmap_read(pmx->map, EP93XX_SYSCON_DEVCFG, &before);
  1238. ep93xx_pinctrl_update_bits(pmx, EP93XX_SYSCON_DEVCFG,
  1239. grp->mask, grp->value);
  1240. regmap_read(pmx->map, EP93XX_SYSCON_DEVCFG, &after);
  1241. dev_dbg(pmx->dev, "before=0x%x, after=0x%x, mask=0x%lx\n",
  1242. before, after, PADS_MASK);
  1243. /* Which bits changed */
  1244. before &= PADS_MASK;
  1245. after &= PADS_MASK;
  1246. expected = before & ~grp->mask;
  1247. expected |= grp->value;
  1248. expected &= PADS_MASK;
  1249. /* Print changed states */
  1250. tmp = expected ^ after;
  1251. for_each_set_bit(i, &tmp, PADS_MAXBIT) {
  1252. bool enabled = expected & BIT(i);
  1253. dev_err(pmx->dev,
  1254. "pin group %s could not be %s: probably a hardware limitation\n",
  1255. ep93xx_padgroups[i], str_enabled_disabled(enabled));
  1256. dev_err(pmx->dev,
  1257. "DeviceCfg before: %08x, after %08x, expected %08x\n",
  1258. before, after, expected);
  1259. }
  1260. return tmp ? -EINVAL : 0;
  1261. };
  1262. static int ep93xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
  1263. {
  1264. return ARRAY_SIZE(ep93xx_pmx_functions);
  1265. }
  1266. static const char *ep93xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
  1267. unsigned int selector)
  1268. {
  1269. return ep93xx_pmx_functions[selector].name;
  1270. }
  1271. static int ep93xx_pmx_get_groups(struct pinctrl_dev *pctldev,
  1272. unsigned int selector,
  1273. const char * const **groups,
  1274. unsigned int * const num_groups)
  1275. {
  1276. *groups = ep93xx_pmx_functions[selector].groups;
  1277. *num_groups = ep93xx_pmx_functions[selector].ngroups;
  1278. return 0;
  1279. }
  1280. static const struct pinmux_ops ep93xx_pmx_ops = {
  1281. .get_functions_count = ep93xx_pmx_get_funcs_count,
  1282. .get_function_name = ep93xx_pmx_get_func_name,
  1283. .get_function_groups = ep93xx_pmx_get_groups,
  1284. .set_mux = ep93xx_pmx_set_mux,
  1285. };
  1286. static struct pinctrl_desc ep93xx_pmx_desc = {
  1287. .name = DRIVER_NAME,
  1288. .pctlops = &ep93xx_pctrl_ops,
  1289. .pmxops = &ep93xx_pmx_ops,
  1290. .owner = THIS_MODULE,
  1291. };
  1292. static int ep93xx_pmx_probe(struct auxiliary_device *adev,
  1293. const struct auxiliary_device_id *id)
  1294. {
  1295. struct ep93xx_regmap_adev *rdev = to_ep93xx_regmap_adev(adev);
  1296. struct device *dev = &adev->dev;
  1297. struct ep93xx_pmx *pmx;
  1298. /* Create state holders etc for this driver */
  1299. pmx = devm_kzalloc(dev, sizeof(*pmx), GFP_KERNEL);
  1300. if (!pmx)
  1301. return -ENOMEM;
  1302. pmx->dev = dev;
  1303. pmx->map = rdev->map;
  1304. pmx->aux_dev = rdev;
  1305. pmx->model = (enum ep93xx_pinctrl_model)(uintptr_t)id->driver_data;
  1306. switch (pmx->model) {
  1307. case EP93XX_9301_PINCTRL:
  1308. ep93xx_pmx_desc.pins = ep9301_pins;
  1309. ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9301_pins);
  1310. dev_info(dev, "detected 9301/9302 chip variant\n");
  1311. break;
  1312. case EP93XX_9307_PINCTRL:
  1313. ep93xx_pmx_desc.pins = ep9307_pins;
  1314. ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9307_pins);
  1315. dev_info(dev, "detected 9307 chip variant\n");
  1316. break;
  1317. case EP93XX_9312_PINCTRL:
  1318. ep93xx_pmx_desc.pins = ep9312_pins;
  1319. ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9312_pins);
  1320. dev_info(dev, "detected 9312/9315 chip variant\n");
  1321. break;
  1322. default:
  1323. return dev_err_probe(dev, -EINVAL, "unknown pin control model: %u\n", pmx->model);
  1324. }
  1325. /* using parent of_node to match in get_pinctrl_dev_from_of_node() */
  1326. device_set_node(dev, dev_fwnode(adev->dev.parent));
  1327. pmx->pctl = devm_pinctrl_register(dev, &ep93xx_pmx_desc, pmx);
  1328. if (IS_ERR(pmx->pctl))
  1329. return dev_err_probe(dev, PTR_ERR(pmx->pctl), "could not register pinmux driver\n");
  1330. return 0;
  1331. };
  1332. static const struct auxiliary_device_id ep93xx_pinctrl_ids[] = {
  1333. {
  1334. .name = "soc_ep93xx.pinctrl-ep9301",
  1335. .driver_data = (kernel_ulong_t)EP93XX_9301_PINCTRL,
  1336. },
  1337. {
  1338. .name = "soc_ep93xx.pinctrl-ep9307",
  1339. .driver_data = (kernel_ulong_t)EP93XX_9307_PINCTRL,
  1340. },
  1341. {
  1342. .name = "soc_ep93xx.pinctrl-ep9312",
  1343. .driver_data = (kernel_ulong_t)EP93XX_9312_PINCTRL,
  1344. },
  1345. { /* sentinel */ }
  1346. };
  1347. MODULE_DEVICE_TABLE(auxiliary, ep93xx_pinctrl_ids);
  1348. static struct auxiliary_driver ep93xx_pmx_driver = {
  1349. .probe = ep93xx_pmx_probe,
  1350. .id_table = ep93xx_pinctrl_ids,
  1351. };
  1352. module_auxiliary_driver(ep93xx_pmx_driver);