pinctrl-axp209.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * AXP20x pinctrl and GPIO driver
  4. *
  5. * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
  6. * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com>
  7. */
  8. #include <linux/bitops.h>
  9. #include <linux/device.h>
  10. #include <linux/gpio/driver.h>
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mfd/axp20x.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/regmap.h>
  19. #include <linux/slab.h>
  20. #include <linux/pinctrl/consumer.h>
  21. #include <linux/pinctrl/pinconf-generic.h>
  22. #include <linux/pinctrl/pinctrl.h>
  23. #include <linux/pinctrl/pinmux.h>
  24. #define AXP20X_GPIO_FUNCTIONS 0x7
  25. #define AXP20X_GPIO_FUNCTION_OUT_LOW 0
  26. #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1
  27. #define AXP20X_GPIO_FUNCTION_INPUT 2
  28. #define AXP20X_GPIO3_FUNCTIONS GENMASK(2, 1)
  29. #define AXP20X_GPIO3_FUNCTION_OUT_LOW 0
  30. #define AXP20X_GPIO3_FUNCTION_OUT_HIGH 2
  31. #define AXP20X_GPIO3_FUNCTION_INPUT 4
  32. #define AXP20X_FUNC_GPIO_OUT 0
  33. #define AXP20X_FUNC_GPIO_IN 1
  34. #define AXP20X_FUNC_LDO 2
  35. #define AXP20X_FUNC_ADC 3
  36. #define AXP20X_FUNCS_NB 4
  37. #define AXP20X_MUX_GPIO_OUT 0
  38. #define AXP20X_MUX_GPIO_IN BIT(1)
  39. #define AXP20X_MUX_ADC BIT(2)
  40. #define AXP813_MUX_ADC (BIT(2) | BIT(0))
  41. struct axp20x_pctrl_desc {
  42. const struct pinctrl_pin_desc *pins;
  43. unsigned int npins;
  44. /* Stores the pins supporting LDO function. Bit offset is pin number. */
  45. u8 ldo_mask;
  46. /* Stores the pins supporting ADC function. Bit offset is pin number. */
  47. u8 adc_mask;
  48. u8 gpio_status_offset;
  49. u8 adc_mux;
  50. };
  51. struct axp20x_pinctrl_function {
  52. const char *name;
  53. unsigned int muxval;
  54. const char **groups;
  55. unsigned int ngroups;
  56. };
  57. struct axp20x_pctl {
  58. struct gpio_chip chip;
  59. struct regmap *regmap;
  60. struct pinctrl_dev *pctl_dev;
  61. struct device *dev;
  62. const struct axp20x_pctrl_desc *desc;
  63. struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB];
  64. };
  65. static const struct pinctrl_pin_desc axp209_pins[] = {
  66. PINCTRL_PIN(0, "GPIO0"),
  67. PINCTRL_PIN(1, "GPIO1"),
  68. PINCTRL_PIN(2, "GPIO2"),
  69. PINCTRL_PIN(3, "GPIO3"),
  70. };
  71. static const struct pinctrl_pin_desc axp22x_pins[] = {
  72. PINCTRL_PIN(0, "GPIO0"),
  73. PINCTRL_PIN(1, "GPIO1"),
  74. };
  75. static const struct axp20x_pctrl_desc axp20x_data = {
  76. .pins = axp209_pins,
  77. .npins = ARRAY_SIZE(axp209_pins),
  78. .ldo_mask = BIT(0) | BIT(1),
  79. .adc_mask = BIT(0) | BIT(1),
  80. .gpio_status_offset = 4,
  81. .adc_mux = AXP20X_MUX_ADC,
  82. };
  83. static const struct axp20x_pctrl_desc axp22x_data = {
  84. .pins = axp22x_pins,
  85. .npins = ARRAY_SIZE(axp22x_pins),
  86. .ldo_mask = BIT(0) | BIT(1),
  87. .gpio_status_offset = 0,
  88. };
  89. static const struct axp20x_pctrl_desc axp813_data = {
  90. .pins = axp22x_pins,
  91. .npins = ARRAY_SIZE(axp22x_pins),
  92. .ldo_mask = BIT(0) | BIT(1),
  93. .adc_mask = BIT(0),
  94. .gpio_status_offset = 0,
  95. .adc_mux = AXP813_MUX_ADC,
  96. };
  97. static int axp20x_gpio_get_reg(unsigned int offset)
  98. {
  99. switch (offset) {
  100. case 0:
  101. return AXP20X_GPIO0_CTRL;
  102. case 1:
  103. return AXP20X_GPIO1_CTRL;
  104. case 2:
  105. return AXP20X_GPIO2_CTRL;
  106. }
  107. return -EINVAL;
  108. }
  109. static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
  110. {
  111. struct axp20x_pctl *pctl = gpiochip_get_data(chip);
  112. unsigned int val;
  113. int ret;
  114. /* AXP209 has GPIO3 status sharing the settings register */
  115. if (offset == 3) {
  116. ret = regmap_read(pctl->regmap, AXP20X_GPIO3_CTRL, &val);
  117. if (ret)
  118. return ret;
  119. return !!(val & BIT(0));
  120. }
  121. ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val);
  122. if (ret)
  123. return ret;
  124. return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
  125. }
  126. static int axp20x_gpio_get_direction(struct gpio_chip *chip,
  127. unsigned int offset)
  128. {
  129. struct axp20x_pctl *pctl = gpiochip_get_data(chip);
  130. unsigned int val;
  131. int reg, ret;
  132. /* AXP209 GPIO3 settings have a different layout */
  133. if (offset == 3) {
  134. ret = regmap_read(pctl->regmap, AXP20X_GPIO3_CTRL, &val);
  135. if (ret)
  136. return ret;
  137. if (val & AXP20X_GPIO3_FUNCTION_INPUT)
  138. return GPIO_LINE_DIRECTION_IN;
  139. return GPIO_LINE_DIRECTION_OUT;
  140. }
  141. reg = axp20x_gpio_get_reg(offset);
  142. if (reg < 0)
  143. return reg;
  144. ret = regmap_read(pctl->regmap, reg, &val);
  145. if (ret)
  146. return ret;
  147. /*
  148. * This shouldn't really happen if the pin is in use already,
  149. * or if it's not in use yet, it doesn't matter since we're
  150. * going to change the value soon anyway. Default to output.
  151. */
  152. if ((val & AXP20X_GPIO_FUNCTIONS) > 2)
  153. return GPIO_LINE_DIRECTION_OUT;
  154. /*
  155. * The GPIO directions are the three lowest values.
  156. * 2 is input, 0 and 1 are output
  157. */
  158. if (val & 2)
  159. return GPIO_LINE_DIRECTION_IN;
  160. return GPIO_LINE_DIRECTION_OUT;
  161. }
  162. static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
  163. int value)
  164. {
  165. return chip->set(chip, offset, value);
  166. }
  167. static int axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset,
  168. int value)
  169. {
  170. struct axp20x_pctl *pctl = gpiochip_get_data(chip);
  171. int reg;
  172. /* AXP209 has GPIO3 status sharing the settings register */
  173. if (offset == 3)
  174. return regmap_update_bits(pctl->regmap, AXP20X_GPIO3_CTRL,
  175. AXP20X_GPIO3_FUNCTIONS,
  176. value ?
  177. AXP20X_GPIO3_FUNCTION_OUT_HIGH :
  178. AXP20X_GPIO3_FUNCTION_OUT_LOW);
  179. reg = axp20x_gpio_get_reg(offset);
  180. if (reg < 0)
  181. return reg;
  182. return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS,
  183. value ? AXP20X_GPIO_FUNCTION_OUT_HIGH :
  184. AXP20X_GPIO_FUNCTION_OUT_LOW);
  185. }
  186. static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset,
  187. u8 config)
  188. {
  189. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  190. int reg;
  191. /* AXP209 GPIO3 settings have a different layout */
  192. if (offset == 3)
  193. return regmap_update_bits(pctl->regmap, AXP20X_GPIO3_CTRL,
  194. AXP20X_GPIO3_FUNCTIONS,
  195. config == AXP20X_MUX_GPIO_OUT ? AXP20X_GPIO3_FUNCTION_OUT_LOW :
  196. AXP20X_GPIO3_FUNCTION_INPUT);
  197. reg = axp20x_gpio_get_reg(offset);
  198. if (reg < 0)
  199. return reg;
  200. return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS,
  201. config);
  202. }
  203. static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev)
  204. {
  205. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  206. return ARRAY_SIZE(pctl->funcs);
  207. }
  208. static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev,
  209. unsigned int selector)
  210. {
  211. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  212. return pctl->funcs[selector].name;
  213. }
  214. static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev,
  215. unsigned int selector,
  216. const char * const **groups,
  217. unsigned int *num_groups)
  218. {
  219. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  220. *groups = pctl->funcs[selector].groups;
  221. *num_groups = pctl->funcs[selector].ngroups;
  222. return 0;
  223. }
  224. static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev,
  225. unsigned int function, unsigned int group)
  226. {
  227. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  228. unsigned int mask;
  229. /* Every pin supports GPIO_OUT and GPIO_IN functions */
  230. if (function <= AXP20X_FUNC_GPIO_IN)
  231. return axp20x_pmx_set(pctldev, group,
  232. pctl->funcs[function].muxval);
  233. if (function == AXP20X_FUNC_LDO)
  234. mask = pctl->desc->ldo_mask;
  235. else
  236. mask = pctl->desc->adc_mask;
  237. if (!(BIT(group) & mask))
  238. return -EINVAL;
  239. /*
  240. * We let the regulator framework handle the LDO muxing as muxing bits
  241. * are basically also regulators on/off bits. It's better not to enforce
  242. * any state of the regulator when selecting LDO mux so that we don't
  243. * interfere with the regulator driver.
  244. */
  245. if (function == AXP20X_FUNC_LDO)
  246. return 0;
  247. return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval);
  248. }
  249. static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
  250. struct pinctrl_gpio_range *range,
  251. unsigned int offset, bool input)
  252. {
  253. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  254. if (input)
  255. return axp20x_pmx_set(pctldev, offset,
  256. pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval);
  257. return axp20x_pmx_set(pctldev, offset,
  258. pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval);
  259. }
  260. static const struct pinmux_ops axp20x_pmx_ops = {
  261. .get_functions_count = axp20x_pmx_func_cnt,
  262. .get_function_name = axp20x_pmx_func_name,
  263. .get_function_groups = axp20x_pmx_func_groups,
  264. .set_mux = axp20x_pmx_set_mux,
  265. .gpio_set_direction = axp20x_pmx_gpio_set_direction,
  266. .strict = true,
  267. };
  268. static int axp20x_groups_cnt(struct pinctrl_dev *pctldev)
  269. {
  270. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  271. return pctl->desc->npins;
  272. }
  273. static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
  274. const unsigned int **pins, unsigned int *num_pins)
  275. {
  276. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  277. *pins = (unsigned int *)&pctl->desc->pins[selector];
  278. *num_pins = 1;
  279. return 0;
  280. }
  281. static const char *axp20x_group_name(struct pinctrl_dev *pctldev,
  282. unsigned int selector)
  283. {
  284. struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
  285. return pctl->desc->pins[selector].name;
  286. }
  287. static const struct pinctrl_ops axp20x_pctrl_ops = {
  288. .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
  289. .dt_free_map = pinconf_generic_dt_free_map,
  290. .get_groups_count = axp20x_groups_cnt,
  291. .get_group_name = axp20x_group_name,
  292. .get_group_pins = axp20x_group_pins,
  293. };
  294. static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask,
  295. unsigned int mask_len,
  296. struct axp20x_pinctrl_function *func,
  297. const struct pinctrl_pin_desc *pins)
  298. {
  299. unsigned long int mask_cpy = mask;
  300. const char **group;
  301. unsigned int ngroups = hweight8(mask);
  302. int bit;
  303. func->ngroups = ngroups;
  304. if (func->ngroups > 0) {
  305. func->groups = devm_kcalloc(dev,
  306. ngroups, sizeof(const char *),
  307. GFP_KERNEL);
  308. if (!func->groups)
  309. return -ENOMEM;
  310. group = func->groups;
  311. for_each_set_bit(bit, &mask_cpy, mask_len) {
  312. *group = pins[bit].name;
  313. group++;
  314. }
  315. }
  316. return 0;
  317. }
  318. static int axp20x_build_funcs_groups(struct platform_device *pdev)
  319. {
  320. struct axp20x_pctl *pctl = platform_get_drvdata(pdev);
  321. int i, ret, pin, npins = pctl->desc->npins;
  322. pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out";
  323. pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT;
  324. pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in";
  325. pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN;
  326. pctl->funcs[AXP20X_FUNC_LDO].name = "ldo";
  327. /*
  328. * Muxval for LDO is useless as we won't use it.
  329. * See comment in axp20x_pmx_set_mux.
  330. */
  331. pctl->funcs[AXP20X_FUNC_ADC].name = "adc";
  332. pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux;
  333. /* Every pin supports GPIO_OUT and GPIO_IN functions */
  334. for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) {
  335. pctl->funcs[i].ngroups = npins;
  336. pctl->funcs[i].groups = devm_kcalloc(&pdev->dev,
  337. npins, sizeof(char *),
  338. GFP_KERNEL);
  339. if (!pctl->funcs[i].groups)
  340. return -ENOMEM;
  341. for (pin = 0; pin < npins; pin++)
  342. pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name;
  343. }
  344. ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask,
  345. npins, &pctl->funcs[AXP20X_FUNC_LDO],
  346. pctl->desc->pins);
  347. if (ret)
  348. return ret;
  349. ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask,
  350. npins, &pctl->funcs[AXP20X_FUNC_ADC],
  351. pctl->desc->pins);
  352. if (ret)
  353. return ret;
  354. return 0;
  355. }
  356. static const struct of_device_id axp20x_pctl_match[] = {
  357. { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, },
  358. { .compatible = "x-powers,axp221-gpio", .data = &axp22x_data, },
  359. { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, },
  360. { }
  361. };
  362. MODULE_DEVICE_TABLE(of, axp20x_pctl_match);
  363. static int axp20x_pctl_probe(struct platform_device *pdev)
  364. {
  365. struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
  366. struct axp20x_pctl *pctl;
  367. struct device *dev = &pdev->dev;
  368. struct pinctrl_desc *pctrl_desc;
  369. int ret;
  370. if (!of_device_is_available(pdev->dev.of_node))
  371. return -ENODEV;
  372. if (!axp20x) {
  373. dev_err(&pdev->dev, "Parent drvdata not set\n");
  374. return -EINVAL;
  375. }
  376. pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
  377. if (!pctl)
  378. return -ENOMEM;
  379. pctl->chip.base = -1;
  380. pctl->chip.can_sleep = true;
  381. pctl->chip.request = gpiochip_generic_request;
  382. pctl->chip.free = gpiochip_generic_free;
  383. pctl->chip.parent = &pdev->dev;
  384. pctl->chip.label = dev_name(&pdev->dev);
  385. pctl->chip.owner = THIS_MODULE;
  386. pctl->chip.get = axp20x_gpio_get;
  387. pctl->chip.get_direction = axp20x_gpio_get_direction;
  388. pctl->chip.set = axp20x_gpio_set;
  389. pctl->chip.direction_input = pinctrl_gpio_direction_input;
  390. pctl->chip.direction_output = axp20x_gpio_output;
  391. pctl->desc = of_device_get_match_data(dev);
  392. pctl->chip.ngpio = pctl->desc->npins;
  393. pctl->regmap = axp20x->regmap;
  394. pctl->dev = &pdev->dev;
  395. platform_set_drvdata(pdev, pctl);
  396. ret = axp20x_build_funcs_groups(pdev);
  397. if (ret) {
  398. dev_err(&pdev->dev, "failed to build groups\n");
  399. return ret;
  400. }
  401. pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);
  402. if (!pctrl_desc)
  403. return -ENOMEM;
  404. pctrl_desc->name = dev_name(&pdev->dev);
  405. pctrl_desc->owner = THIS_MODULE;
  406. pctrl_desc->pins = pctl->desc->pins;
  407. pctrl_desc->npins = pctl->desc->npins;
  408. pctrl_desc->pctlops = &axp20x_pctrl_ops;
  409. pctrl_desc->pmxops = &axp20x_pmx_ops;
  410. pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);
  411. if (IS_ERR(pctl->pctl_dev)) {
  412. dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
  413. return PTR_ERR(pctl->pctl_dev);
  414. }
  415. ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl);
  416. if (ret) {
  417. dev_err(&pdev->dev, "Failed to register GPIO chip\n");
  418. return ret;
  419. }
  420. ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev),
  421. pctl->desc->pins->number,
  422. pctl->desc->pins->number,
  423. pctl->desc->npins);
  424. if (ret) {
  425. dev_err(&pdev->dev, "failed to add pin range\n");
  426. return ret;
  427. }
  428. dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n");
  429. return 0;
  430. }
  431. static struct platform_driver axp20x_pctl_driver = {
  432. .probe = axp20x_pctl_probe,
  433. .driver = {
  434. .name = "axp20x-gpio",
  435. .of_match_table = axp20x_pctl_match,
  436. },
  437. };
  438. module_platform_driver(axp20x_pctl_driver);
  439. MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
  440. MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
  441. MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver");
  442. MODULE_LICENSE("GPL");