pnv_php.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * PCI Hotplug Driver for PowerPC PowerNV platform.
  4. *
  5. * Copyright Gavin Shan, IBM Corporation 2016.
  6. * Copyright (C) 2025 Raptor Engineering, LLC
  7. * Copyright (C) 2025 Raptor Computing Systems, LLC
  8. */
  9. #include <linux/bitfield.h>
  10. #include <linux/libfdt.h>
  11. #include <linux/module.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include <linux/pci_hotplug.h>
  15. #include <linux/of_fdt.h>
  16. #include <asm/opal.h>
  17. #include <asm/pnv-pci.h>
  18. #include <asm/ppc-pci.h>
  19. #define DRIVER_VERSION "0.1"
  20. #define DRIVER_AUTHOR "Gavin Shan, IBM Corporation"
  21. #define DRIVER_DESC "PowerPC PowerNV PCI Hotplug Driver"
  22. #define SLOT_WARN(sl, x...) \
  23. ((sl)->pdev ? pci_warn((sl)->pdev, x) : dev_warn(&(sl)->bus->dev, x))
  24. struct pnv_php_event {
  25. bool added;
  26. struct pnv_php_slot *php_slot;
  27. struct work_struct work;
  28. };
  29. static LIST_HEAD(pnv_php_slot_list);
  30. static DEFINE_SPINLOCK(pnv_php_lock);
  31. static void pnv_php_register(struct device_node *dn);
  32. static void pnv_php_unregister_one(struct device_node *dn);
  33. static void pnv_php_unregister(struct device_node *dn);
  34. static void pnv_php_enable_irq(struct pnv_php_slot *php_slot);
  35. static void pnv_php_disable_irq(struct pnv_php_slot *php_slot,
  36. bool disable_device, bool disable_msi)
  37. {
  38. struct pci_dev *pdev = php_slot->pdev;
  39. u16 ctrl;
  40. if (php_slot->irq > 0) {
  41. pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &ctrl);
  42. ctrl &= ~(PCI_EXP_SLTCTL_HPIE |
  43. PCI_EXP_SLTCTL_PDCE |
  44. PCI_EXP_SLTCTL_DLLSCE);
  45. pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, ctrl);
  46. free_irq(php_slot->irq, php_slot);
  47. php_slot->irq = 0;
  48. }
  49. if (disable_device || disable_msi) {
  50. if (pdev->msix_enabled)
  51. pci_disable_msix(pdev);
  52. else if (pdev->msi_enabled)
  53. pci_disable_msi(pdev);
  54. }
  55. if (disable_device)
  56. pci_disable_device(pdev);
  57. }
  58. static void pnv_php_free_slot(struct kref *kref)
  59. {
  60. struct pnv_php_slot *php_slot = container_of(kref,
  61. struct pnv_php_slot, kref);
  62. WARN_ON(!list_empty(&php_slot->children));
  63. pnv_php_disable_irq(php_slot, false, false);
  64. destroy_workqueue(php_slot->wq);
  65. kfree(php_slot->name);
  66. kfree(php_slot);
  67. }
  68. static inline void pnv_php_put_slot(struct pnv_php_slot *php_slot)
  69. {
  70. if (!php_slot)
  71. return;
  72. kref_put(&php_slot->kref, pnv_php_free_slot);
  73. }
  74. static struct pnv_php_slot *pnv_php_match(struct device_node *dn,
  75. struct pnv_php_slot *php_slot)
  76. {
  77. struct pnv_php_slot *target, *tmp;
  78. if (php_slot->dn == dn) {
  79. kref_get(&php_slot->kref);
  80. return php_slot;
  81. }
  82. list_for_each_entry(tmp, &php_slot->children, link) {
  83. target = pnv_php_match(dn, tmp);
  84. if (target)
  85. return target;
  86. }
  87. return NULL;
  88. }
  89. struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn)
  90. {
  91. struct pnv_php_slot *php_slot, *tmp;
  92. unsigned long flags;
  93. spin_lock_irqsave(&pnv_php_lock, flags);
  94. list_for_each_entry(tmp, &pnv_php_slot_list, link) {
  95. php_slot = pnv_php_match(dn, tmp);
  96. if (php_slot) {
  97. spin_unlock_irqrestore(&pnv_php_lock, flags);
  98. return php_slot;
  99. }
  100. }
  101. spin_unlock_irqrestore(&pnv_php_lock, flags);
  102. return NULL;
  103. }
  104. EXPORT_SYMBOL_GPL(pnv_php_find_slot);
  105. /*
  106. * Remove pdn for all children of the indicated device node.
  107. * The function should remove pdn in a depth-first manner.
  108. */
  109. static void pnv_php_rmv_pdns(struct device_node *dn)
  110. {
  111. struct device_node *child;
  112. for_each_child_of_node(dn, child) {
  113. pnv_php_rmv_pdns(child);
  114. pci_remove_device_node_info(child);
  115. }
  116. }
  117. /*
  118. * Detach all child nodes of the indicated device nodes. The
  119. * function should handle device nodes in depth-first manner.
  120. *
  121. * We should not invoke of_node_release() as the memory for
  122. * individual device node is part of large memory block. The
  123. * large block is allocated from memblock (system bootup) or
  124. * kmalloc() when unflattening the device tree by OF changeset.
  125. * We can not free the large block allocated from memblock. For
  126. * later case, it should be released at once.
  127. */
  128. static void pnv_php_detach_device_nodes(struct device_node *parent)
  129. {
  130. struct device_node *dn;
  131. for_each_child_of_node(parent, dn) {
  132. pnv_php_detach_device_nodes(dn);
  133. of_node_put(dn);
  134. of_detach_node(dn);
  135. }
  136. }
  137. static void pnv_php_rmv_devtree(struct pnv_php_slot *php_slot)
  138. {
  139. pnv_php_rmv_pdns(php_slot->dn);
  140. /*
  141. * Decrease the refcount if the device nodes were created
  142. * through OF changeset before detaching them.
  143. */
  144. if (php_slot->fdt)
  145. of_changeset_destroy(&php_slot->ocs);
  146. pnv_php_detach_device_nodes(php_slot->dn);
  147. if (php_slot->fdt) {
  148. kfree(php_slot->dt);
  149. kfree(php_slot->fdt);
  150. php_slot->dt = NULL;
  151. php_slot->dn->child = NULL;
  152. php_slot->fdt = NULL;
  153. }
  154. }
  155. /*
  156. * As the nodes in OF changeset are applied in reverse order, we
  157. * need revert the nodes in advance so that we have correct node
  158. * order after the changeset is applied.
  159. */
  160. static void pnv_php_reverse_nodes(struct device_node *parent)
  161. {
  162. struct device_node *child, *next;
  163. /* In-depth first */
  164. for_each_child_of_node(parent, child)
  165. pnv_php_reverse_nodes(child);
  166. /* Reverse the nodes in the child list */
  167. child = parent->child;
  168. parent->child = NULL;
  169. while (child) {
  170. next = child->sibling;
  171. child->sibling = parent->child;
  172. parent->child = child;
  173. child = next;
  174. }
  175. }
  176. static int pnv_php_populate_changeset(struct of_changeset *ocs,
  177. struct device_node *dn)
  178. {
  179. struct device_node *child;
  180. int ret = 0;
  181. for_each_child_of_node(dn, child) {
  182. ret = of_changeset_attach_node(ocs, child);
  183. if (ret) {
  184. of_node_put(child);
  185. break;
  186. }
  187. ret = pnv_php_populate_changeset(ocs, child);
  188. if (ret) {
  189. of_node_put(child);
  190. break;
  191. }
  192. }
  193. return ret;
  194. }
  195. static void *pnv_php_add_one_pdn(struct device_node *dn, void *data)
  196. {
  197. struct pci_controller *hose = (struct pci_controller *)data;
  198. struct pci_dn *pdn;
  199. pdn = pci_add_device_node_info(hose, dn);
  200. if (!pdn)
  201. return ERR_PTR(-ENOMEM);
  202. return NULL;
  203. }
  204. static void pnv_php_add_pdns(struct pnv_php_slot *slot)
  205. {
  206. struct pci_controller *hose = pci_bus_to_host(slot->bus);
  207. pci_traverse_device_nodes(slot->dn, pnv_php_add_one_pdn, hose);
  208. }
  209. static int pnv_php_add_devtree(struct pnv_php_slot *php_slot)
  210. {
  211. void *fdt, *fdt1, *dt;
  212. int ret;
  213. /* We don't know the FDT blob size. We try to get it through
  214. * maximal memory chunk and then copy it to another chunk that
  215. * fits the real size.
  216. */
  217. fdt1 = kzalloc(0x10000, GFP_KERNEL);
  218. if (!fdt1) {
  219. ret = -ENOMEM;
  220. goto out;
  221. }
  222. ret = pnv_pci_get_device_tree(php_slot->dn->phandle, fdt1, 0x10000);
  223. if (ret) {
  224. SLOT_WARN(php_slot, "Error %d getting FDT blob\n", ret);
  225. goto free_fdt1;
  226. }
  227. fdt = kmemdup(fdt1, fdt_totalsize(fdt1), GFP_KERNEL);
  228. if (!fdt) {
  229. ret = -ENOMEM;
  230. goto free_fdt1;
  231. }
  232. /* Unflatten device tree blob */
  233. dt = of_fdt_unflatten_tree(fdt, php_slot->dn, NULL);
  234. if (!dt) {
  235. ret = -EINVAL;
  236. SLOT_WARN(php_slot, "Cannot unflatten FDT\n");
  237. goto free_fdt;
  238. }
  239. /* Initialize and apply the changeset */
  240. of_changeset_init(&php_slot->ocs);
  241. pnv_php_reverse_nodes(php_slot->dn);
  242. ret = pnv_php_populate_changeset(&php_slot->ocs, php_slot->dn);
  243. if (ret) {
  244. pnv_php_reverse_nodes(php_slot->dn);
  245. SLOT_WARN(php_slot, "Error %d populating changeset\n",
  246. ret);
  247. goto free_dt;
  248. }
  249. php_slot->dn->child = NULL;
  250. ret = of_changeset_apply(&php_slot->ocs);
  251. if (ret) {
  252. SLOT_WARN(php_slot, "Error %d applying changeset\n", ret);
  253. goto destroy_changeset;
  254. }
  255. /* Add device node firmware data */
  256. pnv_php_add_pdns(php_slot);
  257. php_slot->fdt = fdt;
  258. php_slot->dt = dt;
  259. kfree(fdt1);
  260. goto out;
  261. destroy_changeset:
  262. of_changeset_destroy(&php_slot->ocs);
  263. free_dt:
  264. kfree(dt);
  265. php_slot->dn->child = NULL;
  266. free_fdt:
  267. kfree(fdt);
  268. free_fdt1:
  269. kfree(fdt1);
  270. out:
  271. return ret;
  272. }
  273. static inline struct pnv_php_slot *to_pnv_php_slot(struct hotplug_slot *slot)
  274. {
  275. return container_of(slot, struct pnv_php_slot, slot);
  276. }
  277. int pnv_php_set_slot_power_state(struct hotplug_slot *slot,
  278. uint8_t state)
  279. {
  280. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  281. struct opal_msg msg;
  282. int ret;
  283. ret = pnv_pci_set_power_state(php_slot->id, state, &msg);
  284. if (ret > 0) {
  285. if (be64_to_cpu(msg.params[1]) != php_slot->dn->phandle ||
  286. be64_to_cpu(msg.params[2]) != state) {
  287. SLOT_WARN(php_slot, "Wrong msg (%lld, %lld, %lld)\n",
  288. be64_to_cpu(msg.params[1]),
  289. be64_to_cpu(msg.params[2]),
  290. be64_to_cpu(msg.params[3]));
  291. return -ENOMSG;
  292. }
  293. if (be64_to_cpu(msg.params[3]) != OPAL_SUCCESS) {
  294. ret = -ENODEV;
  295. goto error;
  296. }
  297. } else if (ret < 0) {
  298. goto error;
  299. }
  300. if (state == OPAL_PCI_SLOT_POWER_OFF || state == OPAL_PCI_SLOT_OFFLINE)
  301. pnv_php_rmv_devtree(php_slot);
  302. else
  303. ret = pnv_php_add_devtree(php_slot);
  304. return ret;
  305. error:
  306. SLOT_WARN(php_slot, "Error %d powering %s\n",
  307. ret, (state == OPAL_PCI_SLOT_POWER_ON) ? "on" : "off");
  308. return ret;
  309. }
  310. EXPORT_SYMBOL_GPL(pnv_php_set_slot_power_state);
  311. static int pnv_php_get_power_state(struct hotplug_slot *slot, u8 *state)
  312. {
  313. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  314. uint8_t power_state = OPAL_PCI_SLOT_POWER_ON;
  315. int ret;
  316. /*
  317. * Retrieve power status from firmware. If we fail
  318. * getting that, the power status fails back to
  319. * be on.
  320. */
  321. ret = pnv_pci_get_power_state(php_slot->id, &power_state);
  322. if (ret) {
  323. SLOT_WARN(php_slot, "Error %d getting power status\n",
  324. ret);
  325. } else {
  326. *state = power_state;
  327. }
  328. return 0;
  329. }
  330. static int pcie_check_link_active(struct pci_dev *pdev)
  331. {
  332. u16 lnk_status;
  333. int ret;
  334. ret = pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
  335. if (ret == PCIBIOS_DEVICE_NOT_FOUND || PCI_POSSIBLE_ERROR(lnk_status))
  336. return -ENODEV;
  337. ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA);
  338. return ret;
  339. }
  340. static int pnv_php_get_adapter_state(struct hotplug_slot *slot, u8 *state)
  341. {
  342. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  343. uint8_t presence = OPAL_PCI_SLOT_EMPTY;
  344. int ret;
  345. /*
  346. * Retrieve presence status from firmware. If we can't
  347. * get that, it will fail back to be empty.
  348. */
  349. ret = pnv_pci_get_presence_state(php_slot->id, &presence);
  350. if (ret >= 0) {
  351. if (pci_pcie_type(php_slot->pdev) == PCI_EXP_TYPE_DOWNSTREAM &&
  352. presence == OPAL_PCI_SLOT_EMPTY) {
  353. /*
  354. * Similar to pciehp_hpc, check whether the Link Active
  355. * bit is set to account for broken downstream bridges
  356. * that don't properly assert Presence Detect State, as
  357. * was observed on the Microsemi Switchtec PM8533 PFX
  358. * [11f8:8533].
  359. */
  360. if (pcie_check_link_active(php_slot->pdev) > 0)
  361. presence = OPAL_PCI_SLOT_PRESENT;
  362. }
  363. *state = presence;
  364. ret = 0;
  365. } else {
  366. SLOT_WARN(php_slot, "Error %d getting presence\n", ret);
  367. }
  368. return ret;
  369. }
  370. static int pnv_php_get_raw_indicator_status(struct hotplug_slot *slot, u8 *state)
  371. {
  372. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  373. struct pci_dev *bridge = php_slot->pdev;
  374. u16 status;
  375. pcie_capability_read_word(bridge, PCI_EXP_SLTCTL, &status);
  376. *state = (status & (PCI_EXP_SLTCTL_AIC | PCI_EXP_SLTCTL_PIC)) >> 6;
  377. return 0;
  378. }
  379. static int pnv_php_get_attention_state(struct hotplug_slot *slot, u8 *state)
  380. {
  381. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  382. pnv_php_get_raw_indicator_status(slot, &php_slot->attention_state);
  383. *state = php_slot->attention_state;
  384. return 0;
  385. }
  386. static int pnv_php_set_attention_state(struct hotplug_slot *slot, u8 state)
  387. {
  388. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  389. struct pci_dev *bridge = php_slot->pdev;
  390. u16 new, mask;
  391. php_slot->attention_state = state;
  392. if (!bridge)
  393. return 0;
  394. mask = PCI_EXP_SLTCTL_AIC;
  395. if (state)
  396. new = FIELD_PREP(PCI_EXP_SLTCTL_AIC, state);
  397. else
  398. new = PCI_EXP_SLTCTL_ATTN_IND_OFF;
  399. pcie_capability_clear_and_set_word(bridge, PCI_EXP_SLTCTL, mask, new);
  400. return 0;
  401. }
  402. static int pnv_php_activate_slot(struct pnv_php_slot *php_slot,
  403. struct hotplug_slot *slot)
  404. {
  405. int ret, i;
  406. /*
  407. * Issue initial slot activation command to firmware
  408. *
  409. * Firmware will power slot on, attempt to train the link, and
  410. * discover any downstream devices. If this process fails, firmware
  411. * will return an error code and an invalid device tree. Failure
  412. * can be caused for multiple reasons, including a faulty
  413. * downstream device, poor connection to the downstream device, or
  414. * a previously latched PHB fence. On failure, issue fundamental
  415. * reset up to three times before aborting.
  416. */
  417. ret = pnv_php_set_slot_power_state(slot, OPAL_PCI_SLOT_POWER_ON);
  418. if (ret) {
  419. SLOT_WARN(
  420. php_slot,
  421. "PCI slot activation failed with error code %d, possible frozen PHB",
  422. ret);
  423. SLOT_WARN(
  424. php_slot,
  425. "Attempting complete PHB reset before retrying slot activation\n");
  426. for (i = 0; i < 3; i++) {
  427. /*
  428. * Slot activation failed, PHB may be fenced from a
  429. * prior device failure.
  430. *
  431. * Use the OPAL fundamental reset call to both try a
  432. * device reset and clear any potentially active PHB
  433. * fence / freeze.
  434. */
  435. SLOT_WARN(php_slot, "Try %d...\n", i + 1);
  436. pci_set_pcie_reset_state(php_slot->pdev,
  437. pcie_warm_reset);
  438. msleep(250);
  439. pci_set_pcie_reset_state(php_slot->pdev,
  440. pcie_deassert_reset);
  441. ret = pnv_php_set_slot_power_state(
  442. slot, OPAL_PCI_SLOT_POWER_ON);
  443. if (!ret)
  444. break;
  445. }
  446. if (i >= 3)
  447. SLOT_WARN(php_slot,
  448. "Failed to bring slot online, aborting!\n");
  449. }
  450. return ret;
  451. }
  452. static int pnv_php_enable(struct pnv_php_slot *php_slot, bool rescan)
  453. {
  454. struct hotplug_slot *slot = &php_slot->slot;
  455. uint8_t presence = OPAL_PCI_SLOT_EMPTY;
  456. uint8_t power_status = OPAL_PCI_SLOT_POWER_ON;
  457. int ret;
  458. /* Check if the slot has been configured */
  459. if (php_slot->state != PNV_PHP_STATE_REGISTERED)
  460. return 0;
  461. /* Retrieve slot presence status */
  462. ret = pnv_php_get_adapter_state(slot, &presence);
  463. if (ret)
  464. return ret;
  465. /*
  466. * Proceed if there have nothing behind the slot. However,
  467. * we should leave the slot in registered state at the
  468. * beginning. Otherwise, the PCI devices inserted afterwards
  469. * won't be probed and populated.
  470. */
  471. if (presence == OPAL_PCI_SLOT_EMPTY) {
  472. if (!php_slot->power_state_check) {
  473. php_slot->power_state_check = true;
  474. return 0;
  475. }
  476. goto scan;
  477. }
  478. /*
  479. * If the power supply to the slot is off, we can't detect
  480. * adapter presence state. That means we have to turn the
  481. * slot on before going to probe slot's presence state.
  482. *
  483. * On the first time, we don't change the power status to
  484. * boost system boot with assumption that the firmware
  485. * supplies consistent slot power status: empty slot always
  486. * has its power off and non-empty slot has its power on.
  487. */
  488. if (!php_slot->power_state_check) {
  489. php_slot->power_state_check = true;
  490. ret = pnv_php_get_power_state(slot, &power_status);
  491. if (ret)
  492. return ret;
  493. if (power_status != OPAL_PCI_SLOT_POWER_ON)
  494. return 0;
  495. }
  496. /* Check the power status. Scan the slot if it is already on */
  497. ret = pnv_php_get_power_state(slot, &power_status);
  498. if (ret)
  499. return ret;
  500. if (power_status == OPAL_PCI_SLOT_POWER_ON)
  501. goto scan;
  502. /* Power is off, turn it on and then scan the slot */
  503. ret = pnv_php_activate_slot(php_slot, slot);
  504. if (ret)
  505. return ret;
  506. scan:
  507. if (presence == OPAL_PCI_SLOT_PRESENT) {
  508. if (rescan) {
  509. pci_lock_rescan_remove();
  510. pci_hp_add_devices(php_slot->bus);
  511. pci_unlock_rescan_remove();
  512. }
  513. /* Rescan for child hotpluggable slots */
  514. php_slot->state = PNV_PHP_STATE_POPULATED;
  515. if (rescan)
  516. pnv_php_register(php_slot->dn);
  517. } else {
  518. php_slot->state = PNV_PHP_STATE_POPULATED;
  519. }
  520. return 0;
  521. }
  522. static int pnv_php_reset_slot(struct hotplug_slot *slot, bool probe)
  523. {
  524. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  525. struct pci_dev *bridge = php_slot->pdev;
  526. uint16_t sts;
  527. /*
  528. * The CAPI folks want pnv_php to drive OpenCAPI slots
  529. * which don't have a bridge. Only claim to support
  530. * reset_slot() if we have a bridge device (for now...)
  531. */
  532. if (probe)
  533. return !bridge;
  534. /* mask our interrupt while resetting the bridge */
  535. if (php_slot->irq > 0)
  536. disable_irq(php_slot->irq);
  537. pci_bridge_secondary_bus_reset(bridge);
  538. /* clear any state changes that happened due to the reset */
  539. pcie_capability_read_word(php_slot->pdev, PCI_EXP_SLTSTA, &sts);
  540. sts &= (PCI_EXP_SLTSTA_PDC | PCI_EXP_SLTSTA_DLLSC);
  541. pcie_capability_write_word(php_slot->pdev, PCI_EXP_SLTSTA, sts);
  542. if (php_slot->irq > 0)
  543. enable_irq(php_slot->irq);
  544. return 0;
  545. }
  546. static int pnv_php_enable_slot(struct hotplug_slot *slot)
  547. {
  548. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  549. u32 prop32;
  550. int ret;
  551. ret = pnv_php_enable(php_slot, true);
  552. if (ret)
  553. return ret;
  554. /* (Re-)enable interrupt if the slot supports surprise hotplug */
  555. ret = of_property_read_u32(php_slot->dn, "ibm,slot-surprise-pluggable",
  556. &prop32);
  557. if (!ret && prop32)
  558. pnv_php_enable_irq(php_slot);
  559. return 0;
  560. }
  561. /*
  562. * Disable any hotplug interrupts for all slots on the provided bus, as well as
  563. * all downstream slots in preparation for a hot unplug.
  564. */
  565. static int pnv_php_disable_all_irqs(struct pci_bus *bus)
  566. {
  567. struct pci_bus *child_bus;
  568. struct pci_slot *slot;
  569. /* First go down child buses */
  570. list_for_each_entry(child_bus, &bus->children, node)
  571. pnv_php_disable_all_irqs(child_bus);
  572. /* Disable IRQs for all pnv_php slots on this bus */
  573. list_for_each_entry(slot, &bus->slots, list) {
  574. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot->hotplug);
  575. pnv_php_disable_irq(php_slot, false, true);
  576. }
  577. return 0;
  578. }
  579. /*
  580. * Disable any hotplug interrupts for all downstream slots on the provided
  581. * bus in preparation for a hot unplug.
  582. */
  583. static int pnv_php_disable_all_downstream_irqs(struct pci_bus *bus)
  584. {
  585. struct pci_bus *child_bus;
  586. /* Go down child buses, recursively deactivating their IRQs */
  587. list_for_each_entry(child_bus, &bus->children, node)
  588. pnv_php_disable_all_irqs(child_bus);
  589. return 0;
  590. }
  591. static int pnv_php_disable_slot(struct hotplug_slot *slot)
  592. {
  593. struct pnv_php_slot *php_slot = to_pnv_php_slot(slot);
  594. int ret;
  595. /*
  596. * Allow to disable a slot already in the registered state to
  597. * cover cases where the slot couldn't be enabled and never
  598. * reached the populated state
  599. */
  600. if (php_slot->state != PNV_PHP_STATE_POPULATED &&
  601. php_slot->state != PNV_PHP_STATE_REGISTERED)
  602. return 0;
  603. /*
  604. * Free all IRQ resources from all child slots before remove.
  605. * Note that we do not disable the root slot IRQ here as that
  606. * would also deactivate the slot hot (re)plug interrupt!
  607. */
  608. pnv_php_disable_all_downstream_irqs(php_slot->bus);
  609. /* Remove all devices behind the slot */
  610. pci_lock_rescan_remove();
  611. pci_hp_remove_devices(php_slot->bus);
  612. pci_unlock_rescan_remove();
  613. /* Detach the child hotpluggable slots */
  614. pnv_php_unregister(php_slot->dn);
  615. /* Notify firmware and remove device nodes */
  616. ret = pnv_php_set_slot_power_state(slot, OPAL_PCI_SLOT_POWER_OFF);
  617. php_slot->state = PNV_PHP_STATE_REGISTERED;
  618. return ret;
  619. }
  620. static const struct hotplug_slot_ops php_slot_ops = {
  621. .get_power_status = pnv_php_get_power_state,
  622. .get_adapter_status = pnv_php_get_adapter_state,
  623. .get_attention_status = pnv_php_get_attention_state,
  624. .set_attention_status = pnv_php_set_attention_state,
  625. .enable_slot = pnv_php_enable_slot,
  626. .disable_slot = pnv_php_disable_slot,
  627. .reset_slot = pnv_php_reset_slot,
  628. };
  629. static void pnv_php_release(struct pnv_php_slot *php_slot)
  630. {
  631. unsigned long flags;
  632. /* Remove from global or child list */
  633. spin_lock_irqsave(&pnv_php_lock, flags);
  634. list_del(&php_slot->link);
  635. spin_unlock_irqrestore(&pnv_php_lock, flags);
  636. /* Detach from parent */
  637. pnv_php_put_slot(php_slot);
  638. pnv_php_put_slot(php_slot->parent);
  639. }
  640. static struct pnv_php_slot *pnv_php_alloc_slot(struct device_node *dn)
  641. {
  642. struct pnv_php_slot *php_slot;
  643. struct pci_bus *bus;
  644. const char *label;
  645. uint64_t id;
  646. int ret;
  647. ret = of_property_read_string(dn, "ibm,slot-label", &label);
  648. if (ret)
  649. return NULL;
  650. if (pnv_pci_get_slot_id(dn, &id))
  651. return NULL;
  652. bus = pci_find_bus_by_node(dn);
  653. if (!bus)
  654. return NULL;
  655. php_slot = kzalloc_obj(*php_slot);
  656. if (!php_slot)
  657. return NULL;
  658. php_slot->name = kstrdup(label, GFP_KERNEL);
  659. if (!php_slot->name) {
  660. kfree(php_slot);
  661. return NULL;
  662. }
  663. /* Allocate workqueue for this slot's interrupt handling */
  664. php_slot->wq = alloc_workqueue("pciehp-%s", WQ_PERCPU, 0, php_slot->name);
  665. if (!php_slot->wq) {
  666. SLOT_WARN(php_slot, "Cannot alloc workqueue\n");
  667. kfree(php_slot->name);
  668. kfree(php_slot);
  669. return NULL;
  670. }
  671. if (dn->child && PCI_DN(dn->child))
  672. php_slot->slot_no = PCI_SLOT(PCI_DN(dn->child)->devfn);
  673. else
  674. php_slot->slot_no = -1; /* Placeholder slot */
  675. kref_init(&php_slot->kref);
  676. php_slot->state = PNV_PHP_STATE_INITIALIZED;
  677. php_slot->dn = dn;
  678. php_slot->pdev = bus->self;
  679. php_slot->bus = bus;
  680. php_slot->id = id;
  681. php_slot->power_state_check = false;
  682. php_slot->slot.ops = &php_slot_ops;
  683. INIT_LIST_HEAD(&php_slot->children);
  684. INIT_LIST_HEAD(&php_slot->link);
  685. return php_slot;
  686. }
  687. static int pnv_php_register_slot(struct pnv_php_slot *php_slot)
  688. {
  689. struct pnv_php_slot *parent;
  690. struct device_node *dn = php_slot->dn;
  691. unsigned long flags;
  692. int ret;
  693. /* Check if the slot is registered or not */
  694. parent = pnv_php_find_slot(php_slot->dn);
  695. if (parent) {
  696. pnv_php_put_slot(parent);
  697. return -EEXIST;
  698. }
  699. /* Register PCI slot */
  700. ret = pci_hp_register(&php_slot->slot, php_slot->bus,
  701. php_slot->slot_no, php_slot->name);
  702. if (ret) {
  703. SLOT_WARN(php_slot, "Error %d registering slot\n", ret);
  704. return ret;
  705. }
  706. /* Attach to the parent's child list or global list */
  707. while ((dn = of_get_parent(dn))) {
  708. if (!PCI_DN(dn)) {
  709. of_node_put(dn);
  710. break;
  711. }
  712. parent = pnv_php_find_slot(dn);
  713. if (parent) {
  714. of_node_put(dn);
  715. break;
  716. }
  717. of_node_put(dn);
  718. }
  719. spin_lock_irqsave(&pnv_php_lock, flags);
  720. php_slot->parent = parent;
  721. if (parent)
  722. list_add_tail(&php_slot->link, &parent->children);
  723. else
  724. list_add_tail(&php_slot->link, &pnv_php_slot_list);
  725. spin_unlock_irqrestore(&pnv_php_lock, flags);
  726. php_slot->state = PNV_PHP_STATE_REGISTERED;
  727. return 0;
  728. }
  729. static int pnv_php_enable_msix(struct pnv_php_slot *php_slot)
  730. {
  731. struct pci_dev *pdev = php_slot->pdev;
  732. struct msix_entry entry;
  733. int nr_entries, ret;
  734. u16 pcie_flag;
  735. /* Get total number of MSIx entries */
  736. nr_entries = pci_msix_vec_count(pdev);
  737. if (nr_entries < 0)
  738. return nr_entries;
  739. /* Check hotplug MSIx entry is in range */
  740. pcie_capability_read_word(pdev, PCI_EXP_FLAGS, &pcie_flag);
  741. entry.entry = FIELD_GET(PCI_EXP_FLAGS_IRQ, pcie_flag);
  742. if (entry.entry >= nr_entries)
  743. return -ERANGE;
  744. /* Enable MSIx */
  745. ret = pci_enable_msix_exact(pdev, &entry, 1);
  746. if (ret) {
  747. SLOT_WARN(php_slot, "Error %d enabling MSIx\n", ret);
  748. return ret;
  749. }
  750. return entry.vector;
  751. }
  752. static void
  753. pnv_php_detect_clear_suprise_removal_freeze(struct pnv_php_slot *php_slot)
  754. {
  755. struct pci_dev *pdev = php_slot->pdev;
  756. struct eeh_dev *edev;
  757. struct eeh_pe *pe;
  758. int i, rc;
  759. /*
  760. * When a device is surprise removed from a downstream bridge slot,
  761. * the upstream bridge port can still end up frozen due to related EEH
  762. * events, which will in turn block the MSI interrupts for slot hotplug
  763. * detection.
  764. *
  765. * Detect and thaw any frozen upstream PE after slot deactivation.
  766. */
  767. edev = pci_dev_to_eeh_dev(pdev);
  768. pe = edev ? edev->pe : NULL;
  769. rc = eeh_pe_get_state(pe);
  770. if ((rc == -ENODEV) || (rc == -ENOENT)) {
  771. SLOT_WARN(
  772. php_slot,
  773. "Upstream bridge PE state unknown, hotplug detect may fail\n");
  774. } else {
  775. if (pe->state & EEH_PE_ISOLATED) {
  776. SLOT_WARN(
  777. php_slot,
  778. "Upstream bridge PE %02x frozen, thawing...\n",
  779. pe->addr);
  780. for (i = 0; i < 3; i++)
  781. if (!eeh_unfreeze_pe(pe))
  782. break;
  783. if (i >= 3)
  784. SLOT_WARN(
  785. php_slot,
  786. "Unable to thaw PE %02x, hotplug detect will fail!\n",
  787. pe->addr);
  788. else
  789. SLOT_WARN(php_slot,
  790. "PE %02x thawed successfully\n",
  791. pe->addr);
  792. }
  793. }
  794. }
  795. static void pnv_php_event_handler(struct work_struct *work)
  796. {
  797. struct pnv_php_event *event =
  798. container_of(work, struct pnv_php_event, work);
  799. struct pnv_php_slot *php_slot = event->php_slot;
  800. if (event->added) {
  801. pnv_php_enable_slot(&php_slot->slot);
  802. } else {
  803. pnv_php_disable_slot(&php_slot->slot);
  804. pnv_php_detect_clear_suprise_removal_freeze(php_slot);
  805. }
  806. kfree(event);
  807. }
  808. static irqreturn_t pnv_php_interrupt(int irq, void *data)
  809. {
  810. struct pnv_php_slot *php_slot = data;
  811. struct pci_dev *pchild, *pdev = php_slot->pdev;
  812. struct eeh_dev *edev;
  813. struct eeh_pe *pe;
  814. struct pnv_php_event *event;
  815. u16 sts, lsts;
  816. u8 presence;
  817. bool added;
  818. unsigned long flags;
  819. int ret;
  820. pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &sts);
  821. sts &= (PCI_EXP_SLTSTA_PDC | PCI_EXP_SLTSTA_DLLSC);
  822. pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, sts);
  823. pci_dbg(pdev, "PCI slot [%s]: HP int! DLAct: %d, PresDet: %d\n",
  824. php_slot->name,
  825. !!(sts & PCI_EXP_SLTSTA_DLLSC),
  826. !!(sts & PCI_EXP_SLTSTA_PDC));
  827. if (sts & PCI_EXP_SLTSTA_DLLSC) {
  828. pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lsts);
  829. added = !!(lsts & PCI_EXP_LNKSTA_DLLLA);
  830. } else if (!(php_slot->flags & PNV_PHP_FLAG_BROKEN_PDC) &&
  831. (sts & PCI_EXP_SLTSTA_PDC)) {
  832. ret = pnv_pci_get_presence_state(php_slot->id, &presence);
  833. if (ret) {
  834. SLOT_WARN(php_slot,
  835. "PCI slot [%s] error %d getting presence (0x%04x), to retry the operation.\n",
  836. php_slot->name, ret, sts);
  837. return IRQ_HANDLED;
  838. }
  839. added = !!(presence == OPAL_PCI_SLOT_PRESENT);
  840. } else {
  841. pci_dbg(pdev, "PCI slot [%s]: Spurious IRQ?\n", php_slot->name);
  842. return IRQ_NONE;
  843. }
  844. /* Freeze the removed PE to avoid unexpected error reporting */
  845. if (!added) {
  846. pchild = list_first_entry_or_null(&php_slot->bus->devices,
  847. struct pci_dev, bus_list);
  848. edev = pchild ? pci_dev_to_eeh_dev(pchild) : NULL;
  849. pe = edev ? edev->pe : NULL;
  850. if (pe) {
  851. eeh_serialize_lock(&flags);
  852. eeh_pe_mark_isolated(pe);
  853. eeh_serialize_unlock(flags);
  854. eeh_pe_set_option(pe, EEH_OPT_FREEZE_PE);
  855. }
  856. }
  857. /*
  858. * The PE is left in frozen state if the event is missed. It's
  859. * fine as the PCI devices (PE) aren't functional any more.
  860. */
  861. event = kzalloc_obj(*event, GFP_ATOMIC);
  862. if (!event) {
  863. SLOT_WARN(php_slot,
  864. "PCI slot [%s] missed hotplug event 0x%04x\n",
  865. php_slot->name, sts);
  866. return IRQ_HANDLED;
  867. }
  868. pci_info(pdev, "PCI slot [%s] %s (IRQ: %d)\n",
  869. php_slot->name, added ? "added" : "removed", irq);
  870. INIT_WORK(&event->work, pnv_php_event_handler);
  871. event->added = added;
  872. event->php_slot = php_slot;
  873. queue_work(php_slot->wq, &event->work);
  874. return IRQ_HANDLED;
  875. }
  876. static void pnv_php_init_irq(struct pnv_php_slot *php_slot, int irq)
  877. {
  878. struct pci_dev *pdev = php_slot->pdev;
  879. u32 broken_pdc = 0;
  880. u16 sts, ctrl;
  881. int ret;
  882. /* Check PDC (Presence Detection Change) is broken or not */
  883. ret = of_property_read_u32(php_slot->dn, "ibm,slot-broken-pdc",
  884. &broken_pdc);
  885. if (!ret && broken_pdc)
  886. php_slot->flags |= PNV_PHP_FLAG_BROKEN_PDC;
  887. /* Clear pending interrupts */
  888. pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &sts);
  889. if (php_slot->flags & PNV_PHP_FLAG_BROKEN_PDC)
  890. sts |= PCI_EXP_SLTSTA_DLLSC;
  891. else
  892. sts |= (PCI_EXP_SLTSTA_PDC | PCI_EXP_SLTSTA_DLLSC);
  893. pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, sts);
  894. /* Request the interrupt */
  895. ret = request_irq(irq, pnv_php_interrupt, IRQF_SHARED,
  896. php_slot->name, php_slot);
  897. if (ret) {
  898. pnv_php_disable_irq(php_slot, true, true);
  899. SLOT_WARN(php_slot, "Error %d enabling IRQ %d\n", ret, irq);
  900. return;
  901. }
  902. /* Enable the interrupts */
  903. pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &ctrl);
  904. if (php_slot->flags & PNV_PHP_FLAG_BROKEN_PDC) {
  905. ctrl &= ~PCI_EXP_SLTCTL_PDCE;
  906. ctrl |= (PCI_EXP_SLTCTL_HPIE |
  907. PCI_EXP_SLTCTL_DLLSCE);
  908. } else {
  909. ctrl |= (PCI_EXP_SLTCTL_HPIE |
  910. PCI_EXP_SLTCTL_PDCE |
  911. PCI_EXP_SLTCTL_DLLSCE);
  912. }
  913. pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, ctrl);
  914. /* The interrupt is initialized successfully when @irq is valid */
  915. php_slot->irq = irq;
  916. }
  917. static void pnv_php_enable_irq(struct pnv_php_slot *php_slot)
  918. {
  919. struct pci_dev *pdev = php_slot->pdev;
  920. int irq, ret;
  921. /*
  922. * The MSI/MSIx interrupt might have been occupied by other
  923. * drivers. Don't populate the surprise hotplug capability
  924. * in that case.
  925. */
  926. if (pci_dev_msi_enabled(pdev))
  927. return;
  928. ret = pci_enable_device(pdev);
  929. if (ret) {
  930. SLOT_WARN(php_slot, "Error %d enabling device\n", ret);
  931. return;
  932. }
  933. pci_set_master(pdev);
  934. /* Enable MSIx interrupt */
  935. irq = pnv_php_enable_msix(php_slot);
  936. if (irq > 0) {
  937. pnv_php_init_irq(php_slot, irq);
  938. return;
  939. }
  940. /*
  941. * Use MSI if MSIx doesn't work. Fail back to legacy INTx
  942. * if MSI doesn't work either
  943. */
  944. ret = pci_enable_msi(pdev);
  945. if (!ret || pdev->irq) {
  946. irq = pdev->irq;
  947. pnv_php_init_irq(php_slot, irq);
  948. }
  949. }
  950. static int pnv_php_register_one(struct device_node *dn)
  951. {
  952. struct pnv_php_slot *php_slot;
  953. u32 prop32;
  954. int ret;
  955. /* Check if it's hotpluggable slot */
  956. ret = of_property_read_u32(dn, "ibm,slot-pluggable", &prop32);
  957. if (ret || !prop32)
  958. return -ENXIO;
  959. ret = of_property_read_u32(dn, "ibm,reset-by-firmware", &prop32);
  960. if (ret || !prop32)
  961. return -ENXIO;
  962. php_slot = pnv_php_alloc_slot(dn);
  963. if (!php_slot)
  964. return -ENODEV;
  965. ret = pnv_php_register_slot(php_slot);
  966. if (ret)
  967. goto free_slot;
  968. ret = pnv_php_enable(php_slot, false);
  969. if (ret)
  970. goto unregister_slot;
  971. /* Enable interrupt if the slot supports surprise hotplug */
  972. ret = of_property_read_u32(dn, "ibm,slot-surprise-pluggable", &prop32);
  973. if (!ret && prop32)
  974. pnv_php_enable_irq(php_slot);
  975. return 0;
  976. unregister_slot:
  977. pnv_php_unregister_one(php_slot->dn);
  978. free_slot:
  979. pnv_php_put_slot(php_slot);
  980. return ret;
  981. }
  982. static void pnv_php_register(struct device_node *dn)
  983. {
  984. struct device_node *child;
  985. /*
  986. * The parent slots should be registered before their
  987. * child slots.
  988. */
  989. for_each_child_of_node(dn, child) {
  990. pnv_php_register_one(child);
  991. pnv_php_register(child);
  992. }
  993. }
  994. static void pnv_php_unregister_one(struct device_node *dn)
  995. {
  996. struct pnv_php_slot *php_slot;
  997. php_slot = pnv_php_find_slot(dn);
  998. if (!php_slot)
  999. return;
  1000. php_slot->state = PNV_PHP_STATE_OFFLINE;
  1001. pci_hp_deregister(&php_slot->slot);
  1002. pnv_php_release(php_slot);
  1003. pnv_php_put_slot(php_slot);
  1004. }
  1005. static void pnv_php_unregister(struct device_node *dn)
  1006. {
  1007. struct device_node *child;
  1008. /* The child slots should go before their parent slots */
  1009. for_each_child_of_node(dn, child) {
  1010. pnv_php_unregister(child);
  1011. pnv_php_unregister_one(child);
  1012. }
  1013. }
  1014. static int __init pnv_php_init(void)
  1015. {
  1016. struct device_node *dn;
  1017. pr_info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1018. for_each_compatible_node(dn, NULL, "ibm,ioda2-phb")
  1019. pnv_php_register(dn);
  1020. for_each_compatible_node(dn, NULL, "ibm,ioda3-phb")
  1021. pnv_php_register(dn);
  1022. for_each_compatible_node(dn, NULL, "ibm,ioda2-npu2-opencapi-phb")
  1023. pnv_php_register_one(dn); /* slot directly under the PHB */
  1024. return 0;
  1025. }
  1026. static void __exit pnv_php_exit(void)
  1027. {
  1028. struct device_node *dn;
  1029. for_each_compatible_node(dn, NULL, "ibm,ioda2-phb")
  1030. pnv_php_unregister(dn);
  1031. for_each_compatible_node(dn, NULL, "ibm,ioda3-phb")
  1032. pnv_php_unregister(dn);
  1033. for_each_compatible_node(dn, NULL, "ibm,ioda2-npu2-opencapi-phb")
  1034. pnv_php_unregister_one(dn); /* slot directly under the PHB */
  1035. }
  1036. module_init(pnv_php_init);
  1037. module_exit(pnv_php_exit);
  1038. MODULE_VERSION(DRIVER_VERSION);
  1039. MODULE_LICENSE("GPL v2");
  1040. MODULE_AUTHOR(DRIVER_AUTHOR);
  1041. MODULE_DESCRIPTION(DRIVER_DESC);